DC-DC Converters: Topologies, Modeling, and Controlpemclab.cn.nctu.edu.tw/W3news/實驗室課程網頁... · 2018. 9. 11. · Full-Bridge Converter S L CR S n:1 Vg n:n S S1 S2 n:1

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DC-DC Converters: Topologies, Modeling, and Control

台灣新竹‧交通大學‧電機控制工程研究所‧電力電子實驗室~鄒應嶼教授

電力電子系統與晶片實驗室Power Electronic Systems & Chips Lab.交通大學 • 電機控制工程研究所

Power Electronic Systems & Chips Lab., NCTU, Taiwan

2/270

Basic Structure of a Switching Power Supply

PWM

OSC

COMP

REF

60 Hz

lineinput PFC converter

and filter

PWM Controller

Highfrequencyinverter

20-200 KHz DC

output

output rectifierand filter

LoadSource

120 Hz

Feedback Sensing and

IsolatorPFC

Controller

Input EMI filter

Output EMI filter

3/270

Why Topologies is Important in SPS Design?

Power ratings (voltage and current) are primary concerns in determination of SPS topologies Converters are classified as nonisolated and isolated converters DC-DC converters are basic of other converters Resonant and soft-switching converters are derivatives of their corresponding PWM converters

AC/DC Battery Charger DC/DCDC/DC

DC

AC

85…

265V

PFC Controller PWM Controller

DC/DCController

SMPS AC/DC

BatteryCharger

DC/DCController

IC

DC/DC Converter

Power Conversion, Control, and Management

4/270

ac inputsupply

dc output

voltage

Transformers in SPS+

–

v1(t)

i1(t)+

–

v2(t)

i2(t)n1:n2

+

–

i3(t)

v3(t)

n3

Isolation Turns Ratio Provide Wide Range Output Multiple Outputs Transformer

Input rectificationand filtering

duty cyclecontrol

controlcircuitry

HighFrequency

switch

PowerTransformer

Output rectificationand filtering

Vref

mosfet orbipolar

TPWM

OSC

Signal Coupling

5/270

Objectives of Transformer

Isolation of input and output ground connections, to meet safety requirements

Extend the voltage conversion range Reduction of transformer size by incorporating high frequency

isolation transformer inside converter Minimization of current and voltage stresses when a large step-up or

step-down conversion ratio is needed — use transformer turns ratio Obtain multiple output voltages via multiple transformer secondary

windings and multiple converter secondary circuits Transformer isolation is required for all circuits operating at a dc

input voltage of 60 V DC or more.

6/270

Transformers for Asymmetrical and Symmetrical Converters

Asymmetrical Converter Symmetrical Converter

2Bs

B

H

Bssymmetricalconverters

asymmetricalconverters

symmetricalconverters

forwardconverter

flybackconverter

AvailableFlux swing

A

BCDN2

N1

v1

i1

v2

i2

Ll2Ll1

Lm

A

B

C

D

7/270

Buck Derived Isolated DC-DC Converters with Synchronous Switch

Push-Pull Converter

Forward Converter Half-Bridge Converter

Full-Bridge Converter

S

L

C RSn:1

Vg

n:n

S

S1

S2n:1

S2

S1

Vg

S1

S2n:1

S2

S1

Vg

S1

S2

S1

S2

n:1

S1

S2

Vg

LC R

LC R

LC R

8/270

Buck-Boost Derived Isolated DC-DC Converter

Flyback Converter

n:1

S

Vg Lp Ls

S

R

9/270

Most Commonly Used Isolated Converters for Low-Power Applications

Flyback Converter

LOAD

Forward Converter

LOAD

An isolated dc-dc converter module (MS Kennedy Corporation)

10/270

Basic Topologies of PWM DC-DC Converters

Buck

Boost

Buck-Boost L C

D

vovi

L

C

D

vovi

vi vo

L

CD

One Inductor, One Capacitor

　

　

　

C,uk

L1

C2D

L2C1

L1

C2

D

L2

C1

SEPIC

Zeta L1 C2D

L2C1

SEPIC: Single-Ended Primary Inductor Converter

Two Inductors, Two Capacitors

vi

vi

vi

vo

vo

vo

11/270

Basic DC-DC Converters in CCM

Buck Converter

Boost Converter

Buck-Boost Converter

V

Buck converter

+

V

Boost converter

+

V

Buck-boost converter

0 0.2 0.4 0.6 0.8 10

0.20.40.60.8

1

M(D

)

D

0 0.2 0.4 0.6 0.8 10

M(D

)

D

0 0.2 0.4 0.6 0.8 1

-5

M(D

)

D

-4-3-2-10

+

V

Cuk converter

+

V

Sepic

0 0.2 0.4 0.6 0.8 1

-5

M(D

)

D

-4-3-2-10

0 0.2 0.4 0.6 0.8 10

M(D

)

D

12345

12345

Transform to Isolated Converters

Buck-Boost Converter

L C

D

vovi

　

L1

C2

D

L2

C1

vi vo

SEPIC Converter

　

L1

C2D

L2C1

vi vo

Cuk Converter

LOAD

Flyback Converter

Isolated SEPIC Converter

LOAD

L1 L2

V1 V2

V0

i1 i2

C1 C2

VinLOAD

Isolated Cuk Converter

13/270

Power Supply Topologies (sluw001a)

14/270

Power Supply Topologies (sluw001a)

15/270

Selection of Isolated SPS Topologies in Watts

Topologies

1 10 100 1000 10000Output power, watts

Com

plex

ity

Flyback

Resonant resetForward

Current fedPush-pull

Single transistorforward

Tow transistorforward

Half bridge

Dual interleavedForward converter

Full bridge

Phase shiftedFull bridge

Server applications

16/270

Modeling of Switching Converters




17/270


Why Modeling ? Classification of Modeling Techniques Modeling of Switching Power Converters State-Space Averaging Technique Transfer Functions Small-Signal Equivalent Circuit Model

18/270

Objective of Modeling

Objective of Modeling

Analysis

Simulation

DesignEfficiency

Output Impedance

Static Characteristics

19/270

Difficulties with Modeling of SPS

Nonsmooth Systems (time and state discontinuity)Nonlinearity due to operating point Concepts of existence, uniqueness, stability not clearly defined for systems with discontinuous right half-plan zero Inherent Nonlinear Dynamic Behavior! Concept of chaotic dynamics relatively new to power electronics

20/270

Working Profile of a Switching Converter

Power-on Power-off

ov

oi

Wat

ts

% C

PU

tim

e

Dell power edge 2400 (web/SQL server)

21/270

Operating Region State-Variable Plane

DCM

D = 1.0

0.1

0.3

0.5

0.7

0.9

CCM

80% 100%60%40% 110%90%10% 20%

從工作點

到工作點

的軌跡均在連續導

通工作區內，但是從工作點

到工作點

則有部分會進入不連續導通工作區。

Vo/Vi = 1.0

0.25

0.5

0.75

0

1.0

22/270

Operating Region Operating Point Operating Mode?

IN

OUT

VV

)(max,LB

o

II

0 0.5 1.0 1.5 2.0

0

0.25

0.50

0.75

1.0

DCM

D = 1.0

0.1

0.3

0.5

0.7

0.9

CCMCRM

VIN = constant

(min)

(max)

IN

OUT

VV

(max)

(min)

IN

OUT

VV

(max)OUTI(min)OUTI

23/270

Modeling of Switching Power Converters

Modeling of Voltage-Mode DC-DC Converters- Power Stage Modeling State-space average model (Middlebrook and C'uk 1977) Discrete time-domain model (Lee 1979) Equivalent circuit model (Chetty 1981) Unified topological model (Pietkiewicz and Tollik, 1987) PWM switch model (Voperian 1988) Injected-absorbed-current model (Kisovski 1991)

- Error Processor Modeling (Chetty 1982)- Pulsewidth Modulator Modeling Describing function model (Lee 1983) Equivalent circuit model (Bello 1981)

- Larger Signal Modeling (Vicua 1992) Modeling of Current-Mode DC-DC Converters

- Equivalent Circuit Model (Chetty 1981)- y-parameter Model (Middlebrook 1989)

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Modeling Techniques

State Space Averaging Method[1] R. D. Middlebrook and S. Cuk, “A general unified approach to modeling switching-converter

stages,” IEEE PESC Conf. Rec., pp. 18-34, 1976.[2] S. Cuk and R. D. Middlebrook, “A general unified approach to modeling switching DC-to-DC

converters in discontinuous conduction mode,” IEEE PESC Conf. Rec., pp. 36-57, 1977.

Modeling of Switching Converters in DCM Operation[1] D. Maksimovic and S. Cuk, “A unified analysis of PWM converters in discontinuous modes,” IEEE

Trans. Power Electron., vol. 6, pp. 476–490, May 1991. [2] J. Sun, D. M. Mitchell, M. F. Greuel, P. T. Krein, and R. M. Bass, “Averaged modeling of PWM

converters operating in discontinuous conduction mode,” IEEE Trans. Power Electron., vol. 16, pp. 482-492, July 2001.

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Modeling Techniques ..

PWM Switch Method[1] V. Vorperian, “Simplified Analysis of PWM Converters Using Model of PWM Switch Part I:

Continuous Conduction Mode,” IEEE Trans. on Aero. and Elec. Sys., vol. 26, no. 3, pp. 490-496, May 1990.

[2] V. Vorperian, “Simplified Analysis of PWM Converters Using Model of PWM Switch Part II: Discontinuous Conduction Mode,” IEEE Trans. on Aero. and Electron. Sys., vol. 26, no. 3, pp. 497-505, May 1990.

Fast Analytical Techniques for Electrical and Electronic Circuits,V. Vorperian, Cambridge Press, 2004.

26/270

Modeling Techniques ..

Discrete Time-Domain Method[1] F. C. Lee, R. P. Iwens, Y. Yu, and J. E. Triner, “Generalized computer-aided discrete time-domain

modeling and analysis of DC-DC converters,” IEEE Trans. IECI, vol. 26, pp. 58-69, May 1979.

Equivalent Circuit Method[1] P.R.K. Chetty, Switch-Mode Power Supply Design, TAB BOOKS, Inc., 1986.

Modeling of Current-Programmed Converter[1] R. D. Middlebrook, “Modeling current programmed Buck and Boost converters,” IEEE Trans. on

Power Electronics, vol. 4, pp. 36-52, January 1989.

Unified Topological Method[1] Pietkiewicz, A. and D. Tollik, “Unified topological modeling method of switching dc-dc converters

in duty-ratio programmed mode,” IEEE Trans. on Power Electron., vol. 2, no. 3, pp. 218-226, July 1987.

Injected-Absorbed-Current Method[1] Kislovski, A. S., R. Redl, and N. O. Sokal, Dynamic Analysis of Switching-Mode DC/DC

Converters, Van Nostrand Reinhold, 1991.

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Recommended Books: Modeling and Simulation

Dynamic Analysis of Switching-Mode DC/DC Converters,Andre'S. Kislovski, Richard Redl, and Nathan O. Sokal,Van Nostrand Reinhold, New York, 1991.

Complex Behavior of Switching Power Converters, Chi Kong Tse, CRC Press, 2004.

Switch-Mode Power Supply Simulation: Designing with SPICE 3Steven M. Sandler, McGraw-Hill Professional; 1 edition, Nov. 11, 2005.

Switch-Mode Power Supplies - SPICE Simulations and Practical Designs, Christophe Basso, McGraw-Hill, Feb. 1, 2008.

Modeling of DC-DC Converters

voltagereference

Pulse-widthmodulator

cv)(t sGc

refv

+– v

H

tδ

tsTsdT

tv

t

Complex Behavior of Switching Power Converters, Chi Kong Tse, CRC Press, 2004.

Dynamic Analysis of Switching-Mode DC/DC Converters, Andre'S. Kislovski, Richard Redl and Nathan O. Sokal, Van Nostrand Reinhold, New York, USA, 1991

SMPS Simulation with SPICE 3, Steven M. Sandler, McGraw-Hill Professional, Dec. 1, 1996.

Computer-Aided Analysis and Design of Switch-Mode Power Supplies, Yim-Shu Lee, Marcel Dekker, Inc., Feb. 23, 1993.

Switch-Mode Power Supplies - SPICE Simulations and Practical Designs, Christophe Basso, McGraw-Hill, Feb. 1, 2008. Fast Analytical Techniques for Electrical and Electronic Circuits,

V. Vorperian, Cambridge Press, 2004.

29/270

Modeling and Control of DC-DC Converters

Output voltage feedback only!

PWMModulator

LoopCompensator

vo

digital signal processor analog signal processor

vR

d

load

LR di~

Buck Converter Boost Converter

Buck/Boost Converter C,uk Converter

vi vo

L

CD

L

C

D

vovi

　

L C

D

vovi

　　　

L1

C2D

C1

vi vo

Switching power converters

oi

Define the Operating Point!

Define the Load Disturbance

vgosZ

sv~

sV

Define the Line

Disturbance

Define the Source Output Impedance!

Small-Signal Modeling of a Buck Converter

IN

OUT

VV

)(max,LB

o

II

0 0.5 1.0 1.5 2.0

0

0.25

0.50

0.75

1.0

DCM

D = 1.0

0.1

0.3

0.5

0.7

0.9

CCMCRM

Averaged Switch Modeling of Boundary Conduction Mode DC-to-DC ConvertersJ, Chen, R. Erickson, and D. Maksimovic, IECON 2001.

VIN = constant

V. Vorperian, "Simplified Analysis of PWM Converters Using Model of PWM Switch Part II: Discontinuous Conduction Mode," IEEE Trans. on Aero. and Electron. Sys., vol. 26, no. 3, pp. 497-505, May 1990.

V. Vorperian, "Simplified Analysis of PWM Converters Using Model of PWM Switch Part I: Continuous Conduction Mode," IEEE Trans. on Aero. and Elec. Sys., vol. 26, no. 3, pp. 490-496, May 1990.

31/270

Modeling of Switching Converters in DCM Operation

IN

OUT

VV

)(max,LB

o

II

0 0.5 1.0 1.5 2.0

0

0.25

0.50

0.75

1.0

DCM

D = 1.0

0.1

0.3

0.5

0.7

0.9

CCMCRM

VIN = constant

V. Vorperian, "Simplified Analysis of PWM Converters Using Model of PWM Switch Part II: Discontinuous Conduction Mode," IEEE Trans. on Aero. and Electron. Sys., vol. 26, no. 3, pp. 497-505, May 1990.

J. Sun, D. M. Mitchell, M. F. Greuel, P. T. Krein, and R. M. Bass, “Averaged modeling of PWM converters operating in discontinuous conduction mode,” IEEE Trans. Power Electron., vol. 16, pp. 482-492, July 2001.

D. Maksimovic and S. Cuk, “A unified analysis of PWM converters in discontinuous modes,” IEEE Trans. Power Electron., vol. 6, pp. 476–490, May 1991.

Systematic View of DC-DC ConvertersEfficiency

Output Impedance

Selection of Switching Frequency amd PWM Strategies

Frequency Responses

Time Responses

Current Injection Testing

33/270

PWM DC-DC Power Conversion and Regulation

CLOCK RAMP

vref

vo

cv

vi

TON

s

ON

TTD

cv

clock

RS

Q

clock

ramp

PWM

D

sT


1Z

2Z

REF: AN937 Designing with L4971, 1.5 A high efficiency DC-DC converter.pdf

swv

swvMV

34/270

Signal Composition of a PWM DC-DC Converters

comparator

D

d̂

V c

vc ˆcv

V g

v g ˆgv

i gI g

ĝi

clock ramp

analogamplifier

reference

load

v̂

modulator-power-stagesubsystem

Ii î

Vv

35/270

Frequency Spectrum

outputspectrum

bandpassfilter

frequency

sf sf fsf f3 f2 ff 2 sf 3 sf

36/270

AC and DC Quantities in a PWM Switching DC-DC Converter

ˆi iI i vd ioio

Io

ôvvo Vo

vrefvc

ˆI iV v

CLOCK RAMP

vd

Vc

vc ˆcv

io

voLoad

INPUT oR

Analysis of Dynamic Responses

1Z

2Z

Frequency Response of Converter

Loop Gain

FR of Disturbance Rejection

Root Locus

Pole-Zero Identification

Transient Disturbance

L

C

37/270

Small-Signal Modeling of a Switching Power Converter

iIi iIi ˆ

error processor

Z i

Z f

vref

vc

î I iv V v

duty cyclemodulator

power stage

ˆd D d

open

oOo iIi ˆ ô O ov V v

AveragedPower Stageîv

oî

d̂

ôvvo

The concerned transfer functions under small perturbations can be measured under an open loop condition.

L

C oZ

1

oZ

38/270

Definition of

v to( )

t

V I VO O I, ,

ioo viv ˆ,ˆ,î to( )

v ti( )

small signal perturbationTtD on

D

d t( )IOO VIV ,, T

td xˆ

power switch gating waveform

xt

Tont

ˆd D d

represents the averaging small-signal perturbation of the duty ratio d around a constant operation duty ratio D.

d̂

d̂

( )d t

t

t

39/270

Small-Signal Modeling of Voltage-Mode DC-DC Converters

BuckBoost

Buck/Boost

Switching Power Converter

PulseModulator

ErrorProcessor

ˆrv

ôv

ˆcv

ôi

d̂

îv

1

oZ

Source Disturbances

Load Disturbances Load Variations Mode (DCM, CCM, CRM) Variations

ˆrv

rV

t

Voltage Scaling

Measurement Noises

ˆnv

Sensing position Sensor characteristicsParameter Variations

Switching frequency Variations

Source disturbances DC-link limitations

Transfer function of the disturbance source to the desired output, for example, from to .

Sensitivity function of the parameter variation to the desired output, for example, from to .

ˆnv ôv

ôvL̂

d̂i

Modeling of Single-Loop DC-DC Converters

ôv

ĉv

ôid̂

îv ˆ ˆ ˆ; ;ˆ ˆˆ

o o o

i o

v v vv i d

PWMk

ˆˆˆ ˆ( , , )o i ov f v i d

îv

ôi

d ˆcv

ôvvG

pZ

dG

( )A s ( )A s

: Open-loop input-to-output (audio-susceptibility)

: Open-loop output impedance

: Control to output transfer function

PWMk

ˆ ˆ0, 0

ˆ( )ˆ

o

ov

i d i

vG sv

ˆ ˆ0, 0

ˆˆ

i

op

o d v

vZi

ˆˆ 0, 0

ˆˆ

i o

od

v i

vGd

PWM

ˆˆc

dkv

: PWM modulator gain

ˆ( )

ˆc

o

vA sv

: Compensator gain

41/270

Small Signal Transfer Functions

: Open-loop input-to-output (audio-susceptibility)

PWM

ˆˆcdkv




ˆ( )

ˆc

o

vA sv

PWM1

p

KV

: Compensator gain: PWM dc gain

ˆ ˆ0, 0

ˆ( )

ˆo

ov

i d i

vG sv

ˆ ˆ0, 0

ˆˆ

i

op

o d v

vZi

ˆˆ 0, 0

ˆˆ

i o

od

v i

vGd

42/270

Modeling of PWM DC-DC Converters

A dc-to-dc switching regulator incorporating a three-port duty ratio programmedmodulator-power-stage subsystem whose transfer functions are defined in terms ofratios of small-signal ac quantities (hats) superimposed upon large-signal dcquantities (capitals).

The spectrum of the output signal contains the switching frequency, the controlfrequency, their respective harmonics, and sidebands.

The modeling objective is to find, as function of frequency, the loop gain and theclosed properties of the regulator.

The essential prerequisite is to find the transfer function of the three-port subsystemof the modulator-power-stage.


43/270

Concerned Transfer Functions

Control-to-output transfer function Line-to-output transfer function (audio susceptibility) Reference-to-output transfer function Input impedance Output impedance

A voltage sourcing power supply should have a low (zero) output impedance,while a current sourcing power supply should have a high (infinite) outputimpedance.

44/270

Closed-Loop Transfer Functions

Gv,CL (Closed-loop Audio-Susceptibility)

ˆˆ ô v i dv G v G d

PWMˆ ôd AK v

PWM

ˆˆ 1 1o v v

i d

v G Gv G K A T

Zp,CL (Closed-loop Output Impedance)

ˆˆô p o dv Z i G d

PWMˆ ôd AK v

ˆ1

po

o

Zvi T

Loop Gain : PWMT A s K Gd ( )

ôv

ĉv

ôid̂

îv ˆ ˆ ˆ; ;ˆ ˆˆ

o o o

i o

v v vv i d

KPWM

ˆˆˆ ˆ( , , )o i ov f v i d

( )A s

îv

ôi

d̂ ˆcv

ôvvG

pZ

dG

( )A sPWMK

)(sT

45/270

State-Space Averaging Technique




46/270

State-Space Averaging Techniques

State Space Averaging Modeling Static Analysis Small-Signal Model at CCM Small-Signal Model at DCM Frequency Response Analysis

47/270

Concept of Time Averaging (Low Frequency Response Behavior)

î iI i vd ôiio

I o

ôvv oV o

RLC

L

Z i

Z f

vrefv c

Î iV v

CLOCK RAMP

v d

V c

vc ˆcv

io

v o

48/270

Linear Approximation of State Space Trajectories

x( )0

x( )dTs

x ( )Ts

x A x B u

1 1 x A x B u

dT s( )Ton

( )1 d Ts( )Toff

t

x( )t

2 2 x A x B u

49/270

State-Space Averaging Method (CCM)

1 1

1 1

2 2

2 2

During

During

ON

OFF

T

T

x A x B uy C x E ux A x B uy C x E u

When the circuit time constant is far greater than the switching period, the above equations can be averaged as:

x d1

averaging by using state duty ratio weighting

x d2+

Switch-ON Period Switch-OFF Period

2 2

2 2

x A x B uy C x E u1 1

1 1

x A x B uy C x E u

50/270

State-Space Averaging Method

1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

( ) ( )( ) ( )

d d d dd d d d

x A A x B B uy C C x E E u

x Ax Buy Cx Du

A A AB B BC C CE E E

where =

1 1 2 2

1 1 2 2

1 1 2 2

1 1 2 2

d dd dd dd d

51/270

State Averaging by Active Duty Ratios

1 1

1 1

2 2

2 2

During

During

ON

OFF

T

T

x A x B uy C x E ux A x B uy C x E u

When the circuit time constant is far greater than the switching period, the above equations can be averaged as:

d1

state averaging by using duty ratio weighting

d2


2 2

2 2

x A x B uy C x E u1 1

1 1

x A x B uy C x E u

1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

( ) ( )( ) ( )

d d d dd d d d


x Ax Buy Cx Du


where =

1 1 2 2

1 1 2 2

1 1 2 2

1 1 2 2

d dd dd dd d

52/270

Small-Signal Perturbation at a DC Operating Point

Substitute

1 1 2 2

ˆ ˆ ˆ; ; ;ˆ ˆ;d D d d D d

x X x y Y y u U u

1 1 2 2 1 1 2 2ˆ ˆ ˆ ˆˆ ˆ ˆ( ) ( ) ( ) ( ) ( ) ( ) ( )d D d D d D d D d

dt X x A A X x B B U u

00

1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

1 2 1 2

1 2 1 2

ˆ ( ) ( )

ˆ ˆ) ( )ˆ) ( )

ˆ ˆˆ ˆ) ( )

dc termsdc terms

ignore nonlinear term

(

(

(

id d D D D Ddt dt

D D D D

d

d d

X x A A X B B U

A A x B B u

A A X B B U

A A x B B u

Note:The nonlinear dynamic system is linearized around a selected operating point!

53/270

DC Model and AC Model

DC Model

X A BU1

Y ( CA B E)U1

where

ddt

d

d

x Ax Bu F

y Cx Eu G

AC ModelA A AB B BC C CE E EF A A X B B UG C C X E E U

1 1 2 2

1 1 2 2

1 1 2 2

1 1 2 2

1 2 1 2

1 2 1 2

D DD DD DD D

( ) ( )( ) ( )

54/270

Transfer Function Matrix

)()()(

)()(

)()()()(

)()(

2

1

2221

1211 sdsGsG

sisv

sGsGsGsG

sisv

d

d

d

i

uu

uu

i

o

)()()()()()()()()( 11

sdssssdssss

du HuHFAIBuAIx

y C A B E u C A F GG u G

( ) [ ( ) ] ( ) [ ( ) ] ( )( ) ( ) ( ) ( )

s sI s sI d ss s s d su d

1 1

G C A B Eu s sI( ) ( ) 1

G C A F Gd s sI( ) ( ) 1

H I A BH I A F

u

d

s ss s d s

( ) ( )( ) ( ) ( )

1

1

55/270

Open Loop Transfer Functions

control-to-output (open-loop transfer function): v sd s

G s s so d d( )( )

( ) ( ) ( ) 1 11

1G C I A F G

line-to-output (audio susceptibility):

output impedance:

v sv s

G s s soi

u u( )( )

( ) ( ) ( ) 11 111

11G C I A B E

v si s

G s s sod

u u( )( )

( ) ( ) ( ) 12 121

12G C I A B E

56/270

Example: Buck Converter

Step 1. Draw the linear equivalent circuit for each switching state of the converter.

L

CD

Q iL io

vc

icrc

rL

R vo id

iRu1 vi u2

iiy2

y1

x1

x2

Q closed, D open

L

C

iL io

vc

icrc

rL

vi R vo

id

iRii

D closed, Q open

L

C

iL io

vc

icrc

rL

R vo

id

iRii

57/270

Select State Variables

Select the inductor current iL and capacitor voltage vL state variables.

c

L

vi

xx

2

1x

i

o

iv

yy

2

1y

Select the input dc voltage and output disturbance current as input variables.

Select the output voltage and input current as output variables.

d

i

iv

uu

2

1u

58/270

Derive Circuit Equations: State Equations

Step 2. Write the circuit equations for each equivalent circuit in a state-variable format.

L

C

iL io

vc

icrc

rL

vi R vo

id

iRiiQ-ON and D-OFF State:

v L didt

i r r C dvdt

vi L L L C c C

r Cdvdt

v i i i R

i Cdvdt

i R

i R RCdvdt

i R

Cc

C L C d

Lc

d

Lc

d

( )

( )

( )R r Cdvdt

i R v i RC c L C d

dvdt

RR r C

iR r C

v RR r C

icC

LC

CC

d

( ) ( ) ( )1

59/270

State-Space Average Modeling: State Equations

dC

CiC

CLL

C

C

CdC

CC

C

CL

C

CLLi

L

irR

RrvvrR

RirrR

Rr

virR

RrvrR

rirR

RrrivdtdiL

)()()(

dC

CiC

CLL

C

CL irR

RrL

vL

vrR

RL

irrR

RrLdt

di

1111

Replace in with R

R ri

R rv R

R ri

CL

CC

Cd( ) ( ) ( )

1C dv

dtc

CdC

CC

LC

CLLL

i virRRv

rRi

rRRrri

dtdiLv

)()(

1)(

We can obtain:

60/270


i ii L

dC

CC

CL

C

C

ddC

CC

LC

L

dCL

dCLo

irR

RrvrR

RirR

Rr

RiiCrR

RvCrR

iCrR

RRCRi

RiRiRiRiiiv

)()()(

)()(1

)(

)(

v RrR r

i RR r

v RrR r

io CC

LC

CC

Cd

( ) ( ) ( )

d

iC

C

C

LCC

C

i

o

d

i

C

C

C

C

L

CC

CL

C

C

C

L

iv

rRRr

vi

rRR

rRRr

iv

iv

rRR

C

rRRr

LLvi

rRCrRR

C

rRR

Lr

rRRr

Lvi

00

0

01

10

11

111

11

Q-OFF and D-ONState Equation

61/270


Q-OFF and D-ON State:

0 Ldidt

i r r Cdvdt

vL L L C c C

RidtdvRCRi

RidtdvCi

RiiivdtdvCr

dc

L

dc

L

dCLCc

C

)(

)(

L

C

iL io

vc

icrc

rL

R vo

id

iRii

RivRidtdvCrR dCLcC )(

dC

CC

LC

c iCrR

RvCrR

iCrR

Rdtdv

)()(1

)(

62/270


dC

CiC

CLL

C

C

CdC

CC

C

CL

C

CLL

L

irR

RrvrR

RirrR

Rr

virR

RrvrR

rirR

RrridtdiL

)()()(

dC

CiC

CLL

C

CL irR

RrL

vrR

RL

irrR

RrLdt

di

111

( )R r Cdvdt

i R v i RC c L C d

dvdt

RR r C

iR r C

v RR r C

icC

LC

CC

d

( ) ( ) ( )1

Replace in with RR r

iR r

v RR r

iC

LC

CC

d( ) ( ) ( )

1C dv

dtc

CdC

CC

LC

CLLL vi

rRRv

rRi

rRRrri

dtdiL

)()(

1)(

0We can obtain:

63/270


ii 0

dC

CC

CL

C

C

ddC

CC

LC

L

dCL

dCLo

irR

RrvrR

RirR

Rr

RiiCrR

RvCrR

iCrR

RRCRi

RiRiRiRiiiv

)()()(

)()(1

)(

)(

v RrR r

i RR r

v RrR r

io CC

LC

CC

Cd

( ) ( ) ( )

d

iC

C

C

LCC

C

i

o

d

i

C

C

C

C

L

CC

CL

C

C

C

L

iv

rRRr

vi

rRR

rRRr

iv

iv

rRR

C

rRRr

Lvi

rRCrRR

C

rRR

Lr

rRRr

Lvi

00

0

00

10

10

111

11

Q-ON and D-OFFState Equation

64/270


d

iC

C

C

LCC

C

i

o

d

i

C

C

C

C

L

CC

CL

C

C

C

L

iv

rRRr

vi

rRR

rRRr

iv

iv

rRR

C

rRRr

LLvi

rRCrRR

C

rRR

Lr

rRRr

Lvi

00

0

01

10

11

111

11

Q Conducted:

D Conducted:

d

iC

C

C

LCC

C

i

o

d

i

C

C

C

C

L

CC

CL

C

C

C

L

iv

rRRr

vi

rRR

rRRr

iv

iv

rRR

C

rRRr

Lvi

rRCrRR

C

rRR

Lr

rRRr

Lvi

00

0

00

10

10

111

11

65/270


00

0 ,01

10

11

,111

11

11

11

C

C

CC

C

C

C

C

CC

CL

C

C

rRRr

rRR

rRRr

rRR

C

rRRr

LL

rRCrRR

C

rRR

Lr

rRRr

L

EC

BA

00

0 ,00

10

10 ,

111

11

22

22

C

C

CC

C

C

C

C

CC

CL

C

C

rRRr

rRR

rRRr

rRR

C

rRRr

L

rRCrRR

C

rRR

Lr

rRRr

L

EC

BA

Q Conducted:

D Conducted:

66/270

State-Space Average Modeling: Averaging

Step 3. Average each state by using duty ratio as a weighting factor and then combine thetwo sets of equations into a single set.

x A x B uy C x E u

1 1

1 1uExCyuBxAx

22

22

Q : D :x d1


x d2+

( ) ( )( ) ( )


1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

d d d dd d d d

x Ax Buy Cx Eu


where =

1 1 2 2

1 1 2 2

1 1 2 2

1 1 2 2

d dd dd dd d

67/270

State-Space Average Modeling: Perturbation

Step 4. Perturb the averaged equation set to produce DC and small signal terms and eliminatenonlinear product terms.

Substitute

into the averaged equations (in Steps 3)

x X x y Y y u U u

; ; ; ; d D d d D d1 1 2 2

( ) ( )( ) ( )


1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

d d d dd d d d

uBuBUBUB

uBuBUBUB

xAxAXAXA

xAxAXAXA

uUBB

xXAAxX

ˆˆˆˆ

ˆˆˆˆ

ˆˆˆˆ

ˆˆˆˆ)ˆ))(ˆ()ˆ((

)ˆ))(ˆ()ˆ(()ˆ(

222222

111111

222222

111111

2211

2211

dDdD

dDdD

dDdD

dDdD

dDdD

dDdDdtd

68/270

State-Space Average Modeling: Perturbation

1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

1 2 1 2

1 2 1 2

ˆ( ) ( ) ( )

ˆ ˆ ( ) ( )ˆ ( ) ( )

ˆ ˆˆ ˆ ( ) ( )

d D D D Ddt

D D D D

d

d d

X x A A X B B U

A A x B B u

A A X B B U

A A x B B u

1 1 2 2

1 1 2 2

1 1 2 2 1 1 2 2

1 1 2 2 1 2 1 2

1 1 2 2 1 2 1 2

ˆ ˆˆ ˆ( ( ) ( ))( )ˆ ˆ ˆ ( ( ) ( ))( )

( ) ( )ˆˆ ( ) ( ) ( )

ˆ ˆˆ ˆ ˆ ( ) ( ) ( )

D d D d

D d D dD D D D

D D d

D D d d

Y y C C X x

E E U uC C X E E U

C C x C C X E E U

E E u C C x E E u

Perturbation of the State Equations

x1

x1Operating Point New Coordinates

1x̂

2x̂


69/270

State-Space Average Modeling: DC Analysis

DC Analysis:

Set all variation terms to zero, we can obtain

X A BU1

Y ( CA B E)U1

0 1 1 2 2 1 1 2 2

( ) ( )A A X B B UAX BU

D D D D

Y C C X E E UCX EU

( ) ( )1 1 2 2 1 1 2 2D D D D

Therefore, DC characteristics is

1 1 2 2 1 1 2 2

1 1 2 2 1 1 2 2

1 2 1 2

1 2 1 2

ˆ( ) ( ) ( )

ˆ ˆ ( ) ( )ˆ ( ) ( )

ˆ ˆˆ ˆ ( ) ( )

d D D D Ddt

D D D D

d

d d

X x A A X B B U

A A x B B u

A A X B B U

A A x B B u

1 1 2 2

1 1 2 2

1 1 2 2 1 1 2 2

1 1 2 2 1 2 1 2

1 1 2 2 1 2 1 2

ˆ ˆˆ ˆ( ( ) ( ))( )ˆ ˆ ˆ ( ( ) ( ))( )

( ) ( )ˆˆ ( ) ( ) ( )

ˆ ˆˆ ˆ ˆ ( ) ( ) ( )

D d D d

D d D dD D D D

D D d

D D d d

Y y C C X x

E E U uC C X E E U

C C x C C X E E U

E E u C C x E E u

0 0

0

00 0

0 0 0 00 0 0

0

000 0

70/270

State-Space Average Modeling: DC Model

AX BU 0Eliminate the DC term ddt

X 0 and Y CX EU

LS

CC

LCo

CC

LC

iCC

LCL

DII

VrR

RIrRV

VrR

IrR

R

DVVrR

RIrRr

CD

)//(

10

)//(0

..

We obtain the dc model equation:

Comments:1. DC model gives DC information (steady-state behavior). 2. DC model can be used for loss estimation.

71/270

State-Space Average Modeling: AC Model

ˆˆ ˆ ˆ

ˆˆ ˆ ˆ

d dd t

d

x A x B u F

y C x E u G

Neglect the nonlinear product term ˆ ˆˆ ˆ and d d x u

where

A A AB B BC C CE E EF A A X B B UG C C X E E U

1 1 2 2

1 1 2 2

1 1 2 2

1 1 2 2

1 2 1 2

1 2 1 2

D DD DD DD D

( ) ( )( ) ( )

dIiDi

vrR

RirRv

vrRL

irR

RCdt

vd

dLVv

LDv

rRR

Li

LrRr

dtid

CA

LLs

CC

LCo

CC

LC

C

iiC

CL

CLL

ˆˆˆ

ˆˆ)//(ˆ

ˆ11ˆ1ˆ

ˆˆˆ1ˆ//ˆ

..

We obtain the ac model (small-signal) equation:

Comments:1. AC model gives small signal information.2. AC model parameter value depends on dc operating point.

72/270

Time-to-Frequency Transform

In the following, the hat above the variables will be neglected for simplicity. The small signal(or ac term) of a variable is denoted using lower case letter. Thus, the dynamic equation of aPWM dc-dc converter can be represented as:

Step 5. Transform ac state-space model into frequency domain (Laplace transform, s-domain).

ddt

d

d

x Ax Bu F

y Cx Eu G

ddt

d

d

x Ax Bu F

y Cx Eu G

73/270

Time-to-Frequency Transform

Take Laplace transform:

s s s s d ss s s d s

x Ax Bu Fy Cx Eu G

( ) ( ) ( ) ( )( ) ( ) ( ) ( )

x I A Bu I A FH u H

( ) ( ) ( ) ( ) ( )( ) ( ) ( ) ( )

s s s s d ss s s d su d

1 1

y C I A B E u C I A F GG u G

( ) [ ( ) ] ( ) [ ( ) ] ( )( ) ( ) ( ) ( )

s s s s d ss s s d su d

1 1

G C I A B Eu s s( ) ( ) 1

G C I A F Gd s s( ) ( ) 1

H I A BH I A F

u

d

s ss s d s

( ) ( )( ) ( ) ( )

1

1

)()()()(

)()(2221

12111

sGsGsGsG

ssuu

uuu EBAICG

74/270

State-Space Average Modeling: Transfer Functions

dsGsG

iv

sGsGsGsG

iv

d

d

d

i

uu

uu

i

o

)()(

)()()()(

2

1

2221

1211

Interpretation of the transfer function matrix

Input-to-output voltage gain(audio susceptibility)

Output impedance

Input AdmittanceLoad-to-line current gain

Control-to-output voltage gain

Control-to-input current gain

75/270

State-Space Average Modeling: Transfer Functions

ôv

ĉv

ôi

d̂

îv

ˆ ˆ ˆ; ;ˆ ˆˆo o o

i o

v v vv i d

K PWM A(s)

îidi

ii

vi i

o

i

i

iˆˆ

;ˆˆ

;ˆˆ

Loop compensator

Disturbances Results

Control action

76/270

State-Space Averaging: Time-to-Frequency Transform

LC

C

LLC

C

i

o

LC

C

LLC

Ci

o

rrRrRLCs

rRLCrRCrs

CsrDsvsv

rrRrRLCs

rRLCrRCrs

CsrVsdsv

2

2

]//[1

1)(ˆ)(ˆ

]//[1

1)(ˆ)(ˆ

Z s v si s

G so od dv

u

i

( ) ( )( )

( ) 00

12

77/270

State-Space Averaging: Time-to-Frequency Transform

2

ˆ ( ) 1ˆ( )o C

io

v s sr CVsd s

LCsCrrRLs

CsrVsdsv

LC

Ci

o

2)(1

1)(ˆ)(ˆ

CrrRLQ

LC

sQ

ss

CLo

o

oo

)(

11

1

22

Note: In most conditions, because R >>(rL + rC), the above equations can be approximated as

LCsCrrRLs

CsrVsdsv

LC

Ci

o

2)(1

1)(ˆ)(ˆ

LCsCrrRLs

CsrDsvsv

LC

C

i

o

2)(1

1)(ˆ)(ˆ

78/270

State-Space Average Modeling

The small signal control-to-output , and line-to-output are transferfunctions of two poles and one zero

ˆ ( )ˆ ( )ov s

d sˆ ( )ˆ ( )

o

i

v sv s

K s zs p s p

( )( )( )

1

1 2

with its parameters depending upon component values and operating point. p1, p2 can be complex poles or real poles. But p1, p2 and z1 all lie on LHP.

Note: The equivalent series resistance of the capacitor will introduce a LHP zero.

79/270

State-Space Averaging: Output Impedance

Output Impedance: Z s v si s

so od du

( ) ( )( )

( )

00

1c I A B du

( ) ( )

( )v si s

R

sQ

s

so

d o

1

1 1 1

2

2

CrrLQr

rLC

CrrRLQLC

sQ

ss

LC

C

L

CLo

o

oo

11;1

)(

11,1

111

22


Modeling of Load Impedance and Disturbances

PWMModulator

LoopCompensator

vg

vo

vR

Boost Converter Buck/Boost Converter Buck Converter

load

RL di~

GateDrive

osZ

sv~

sV

iL

vc

icrc

rL

vi vo

iR

io id

RC

L

D

Q

81/270

Dynamic Responses for Step Load Changes

Intel: VRM (Voltage Regulator Module) and Enterprise Voltage Regulator-Down (EVRD) 11.0 Design Guidelines, Nov. 2006.

Adaptive voltagepositioning offset

VOFFSET (40mV)

Nominal setpoint voltageVSET (2.0V)

Dynamic voltagetolerance, VDYN-(100mV for 2s)

Initial voltage drop is mainly due to the product

of the load current step and ESR of the capacitors.

V = I ESR.(ESL effects are ignored)

Output voltageVOUT (50mV/Div)

Steady state voltage athigh current is approximatelyVSET VOFFSET IOUT RSENSE

Output current transientstep, I = 0 to 14A(5A/Div)

m5.2 GX;-MV Sanyo F15006 ;H5.2 SENSEOUT RCL

82/270

Buck Converter with Load Current DisturbanceBlock Diagram Representation

D

Q

vi

iL iC vo

io

1sL rL

rsCC

1

1R

id

iR

83/270

Buck Converters: Transfer Functions

12

1)(ˆ)(ˆ D

o

Ci

o Fs

CsrVsdsv

1121

)(ˆ)(ˆ U

o

C

i

o Fs

CsrDsvsv

122

2

111

)(1

)(ˆ)(ˆ U

oeq

d

o Fs

sQs

Rsisv

221

)(ˆ)(ˆ D

o

L

L

iL Fs

CsrrV

sdsi

2221

)(ˆ)(ˆ U

o

C

d

L Fs

Csrsisi

22 oo sQss Leq rR

CrrLQ

LC

11

11

LCo1

1 1

( )o L CQ L r r C

R

C

L

rr

LC1

1

dsGsG

iv

sGsGsGsG

iv

d

d

d

i

uu

uu

i

o

)()(

)()()()(

2

1

2221

1211

2121

)(ˆ)(ˆ U

oi

L FsRCs

RD

svsi

vi voC

L

R

Lr

CrD

84/270

Boost Converters: Transfer Functions

vovi

22 oo sQss 'o

DLC

1' eq

C

RDrLC

' 1 '

' 'Lo

C

DQ r CL D r CD R D

2 ' 'L

eq Cr DR r

D D 1 1

2

1 1

( )' Ceq

Q L r CD R

2( ') aD R

L CrC

z1

dsGsG

iv

sGsGsGsG

iv

d

d

d

i

uu

uu

i

o

)()(

)()()()(

2

1

2221

1211

12 2

(1 )(1 )ˆ ( )ˆ ( ')( )o i z a D

o

s sv s V F

D sd s

11 2

ˆ ( ) 1 1ˆ ( ) 'o U

i o

v s Fv s D s

122

2

111

)(1

)(ˆ)(ˆ U

oeq

d

o Fs

sQs

Rsisv

22 2

1ˆ ( ) 2 2ˆ ( ')( )L I D

o

RCi s V F

D R sd s

22

2

ˆ 1( ) 1ˆ '( )

C UL

od

r Cs Fi sD si s

21

3 2

ˆ 2( ) 1ˆ ( ) ( ')

i UL

i o

V Fi s RCsv s D R s

85/270

Buck/Boost Converters: Transfer Functions

22 oo sQss 'o

DLC

C

eqo r

R 1

11

2

1 1

( )' Ceq

Q L r CD R

2( ') aD RDL

CrCz

1

dsGsG

iv

sGsGsGsG

iv

d

d

d

i

uu

uu

i

o

)()(

)()()()(

2

1

2221

1211

12 2

(1 )(1 )ˆ ( )ˆ ( ')( )o i z a D

o

s sv s V F

D sd s

11 2

ˆ ( ) 1ˆ ( ) 'o C U

i o

v s r Cs FDv s D s

122

2

111

)(1

)(ˆ)(ˆ U

oeq

d

o Fs

sQs

Rsisv

22 2

ˆ ( ) 1ˆ ( ')( )L I D

o

i s V FRCsD R sd s

22 2

ˆ 1( ) 1ˆ '( )

C UL

od

r Cs Fi sD si s

21

2 2

ˆ ( ) 1ˆ ( ) ( ')

i UL

i o

V Fi s RCsv s D R s

ovvi

2 2

' 1

( )( ') ' ( ')

C Lo

DQ r rL CD R D D

2 ' '

Leq C

r DR rD D

86/270

Q-factor of Buck Converter

Buck

11)(

1)(ˆ)(ˆ

2

sQ

sCsrV

sdsv

oo

Ci

o

LCo1

vi vo

1 1

( )o

oL C

LC RQ QL L Lr r CR R C

o

CLoCLCLCL

oZ

rrRZ

LCrr

CL

RCrr

RL

LCCrr

RLQ

1

)(11

)(

111

)(

11

ESRoo

CLoCL

o QQZ

rrRZCrr

RLQ

111

)(

11

C

L

D

CrrRLQ

CLo )(

11

CLZo

CL

RQo

o

CLESR Z

rrQ

If rL and rC can be neglected:

87/270

Control-to-Output Transfer FunctionsDC-DC Converters in CCM Operating Mode

Buck

2

ˆ ( ) 1ˆ 1( ) ( ) 1o C

i

o o

v s r CsV sd s sQ

CrrRLQ

LC

CLo

o

)(

11

1

Boost

2

2

ˆ ( ) (1 )(1 ( ' ))ˆ 1'( ) ( ) 1

o i C

o o

v s V r Cs sL D RsDd s s

Q

'

' 1

'' '

o

LoC

DLC

DQ r CL D r CD R D

Buck/Boost

2

2

ˆ ( ) (1 )(1 ( ' ))ˆ 1'( ) ( ) 1

o i C

o o

v s V r Cs sDL D RsDd s s

Q

2 2

'

' 1

( )( ') ' ( ')

o

C Lo

DLC

DQ r rL CD R D D

C

C

C

R

L

R

L

RL

oviv

oviv

oviv

RHPZ

Lr

Cr

Lr Cr

Lr

Cr

88/270

Resonant Frequency of Buck Converter

vi ov

11)(

1)(ˆ)(ˆ

2

sQ

sCsrV

sdsv

oo

Ci

o

CrrRLQ

LC

CLo

o

)(

11

1

C

12Q

R

L Lr

CriV

20 1r

1o LC

20 log( )Q

CL

RQo

o

CLESR Z

rrQ

11

ESRo

QQ

Q

CLZo

1z

Cr C

89/270

Bode Plot of Control-to-Output of the Buck Converter in CCM

22

ˆ ( ) 1 1( ) ˆ( ) 1 ( )

o C Cvd i i

oC L

v s sr C sr CG s V VL sd s s r r C s LCR

2 2 o os s sQ

( )vdG s

( )vdG s

f

f

-40dB/dec

-20dB/dec

zf

of 1 1

( )o L CQ L r r C

R

1o LC

1

2of

LC

0vd iG V

0

90

180

12Q

0.1 of

10 of 0.1 zf

10 zf

zfof

Frequency Responses of Control-to-Output of Buck Converter in CCM

( )vdG s

( )vdG s

f

f

-40dB/dec

-20dB/dec

zf

of

0vd iG V

0

90

180

0.1 of

10 of 0.1 zf

10 zf

zfof

100 KHzsf 21 1.27 kHzd of f

7.95 KHzzf

of2

2 2

ˆ ( ) ( )( ) ˆ 2( )o oz

vd io o z

v s sG s Vs sd s

91/270

Right-Half-Plane Zero of the Boost and Buck-Boost Converters

RLeez /

11

2'

eLL

D

The boost and buck/boost converter introduce a right-half-plane zero:

Boost

Buck/Boost2'eDLLD

Boost

2

2

ˆ ( ) (1 )(1 ( ' ))ˆ 1'( ) ( ) 1

o i C

o o

v s V r Cs sL D RsDd s s

Q

'

' 1

'' '

o

LoC

DLC

DQ r CL D r CD R D

Buck/Boost

2

2

ˆ ( ) (1 )(1 ( ' ))ˆ 1'( ) ( ) 1

o i C

o o

v s V r Cs sDL D RsDd s s

Q

2 2

'

' 1

( )( ') ' ( ')

o

C Lo

DLC

DQ r rL CD R D D

C

C

R

L

RL

oviv

oviv

Lr

Cr

Lr Cr

92/270

Dynamic Responses for Step Load Changes

Intel: VRM (Voltage Regulator Module) and Enterprise Voltage Regulator-Down (EVRD) 11.0 Design Guidelines, Nov. 2006.

Adaptive voltagepositioning offset

VOFFSET (40mV)

Nominal setpoint voltageVSET (2.0V)

Dynamic voltagetolerance, VDYN-(100mV for 2s)

Initial voltage drop is mainly due to the product

of the load current step and ESR of the capacitors.

V = I ESR.(ESL effects are ignored)

Output voltageVOUT (50mV/Div)

Steady state voltage athigh current is approximatelyVSET VOFFSET IOUT RSENSE

Output current transientstep, I = 0 to 14A(5A/Div)

m5.2 GX;-MV Sanyo F15006 ;H5.2 SENSEOUT RCL

R. Redl, B. P. Erisman and Z. Zansky, “Optimizing the load transient response of the buck converter,” IEEE APEC Conf. Proc., pp. 170-176, Anaheim, CA, 1998.

Buck Converter with Load Current DisturbanceBlock Diagram Representation

vi

iL iC voio

1sL rL

rsCC

1

1R

idiR

iL io

vc

icrc

rL

vi vo

id

iR

RC

L

D

id

t

dI

T

Load Current Slew RateTId

Q

D

Q

94/270

Modeling of a Buck Converter

iv ovci

LR

cR

L

Lvxv dioR

Ri

CdcV D

Load Disturbance

iC vos1

C1CQ

)( 0tQ C

cr

cviv iLs1

ovLr

L1L

)( 0tL

di

oR1

Ri

dcV DQ

Inductor Capacitor

Modeling of a Buck Converter in CCM

iv ovci

Lr

cr

L

Lv

xv dioRRi

CdcV D

Load Disturbance

iC vos1

C1CQ

)( 0tQC

cr

cviv iLs1

ovLr

L1L

)( 0tL

di

oR1

Ri

dcV DQ

Power MOSFET

Switching Diode

Resistive Load or Equivalent Constant Load

Inductor Capacitor

Q

96/270

Summary: Buck Converters at CCM

L

CD

Q iL io

vc

icrc

rL

vi R vo

idiR

L

C

iL io

vc

icrc

rL

vi R vo

idiRii

Transfer Function Transfer Function

21

)(ˆ)(ˆ

o

Ci

o

sCsrV

sdsv

21

)(ˆ)(ˆ

o

C

i

o

sCsrD

svsv

2

2

111

)(1

)(ˆ)(ˆ

oeq

d

o

s

sQs

Rsisv

21

)(ˆ)(ˆ

o

L

L

iL

sCsr

rV

sdsi

21

)(ˆ)(ˆ

oi

L

sRCs

RD

svsi

21

)(ˆ)(ˆ

o

C

d

L

sCsr

sisi

L

C

iL io

vc

icrc

rL

R vo

idiR

ii

x d1


x d2


x A x B uy C x E u

2 2

2 2

x A x B uy C x E u

1 1

1 1

x Ax Buy Cx Du


where =

1 1 2 2

1 1 2 2

1 1 2 2

1 1 2 2

d dd dd dd d

D ONQ ON

22 oo sQss

97/270

PWM Switch Model




98/270

PWM Switch Model

Introduction PWM Switch and its Invariant Properties CCM Analysis

DC and Small-Signal Model of PWM SwitchPWM Switch Model of Buck ConvertersPWM Switch Model of Boost ConvertersPWM Switch Model of Buck/Boost ConvertersPWM Switch Model of Cuk ConvertersAnalysis of PWM ConvertersRight-half Plane Zero of the ConvertersPWM Switch Model Including Storage-Time Modulation

DCM AnalysisDC and Small Model of PWM SwitchAnalysis of PWM ConvertersZero of Control-to-Output Transfer Function in DCM

99/270

Pulse-Width Modulator

For natural sampling,

v c

vp

d ts ( )

vpD T

Tvv

ON

S

c

p

ˆ( ) ( )m cd s K v s

Kvm p

1 constant

100/270

PWM Switch Model

( )ai t

( )cpv t

cd

1-d

p

( )apv t

a)(~ tic

(common)

(passive)

(active)

Instantaneous value

PWM Switch Modeling[1] V. Vorperian, “Simplified Analysis of PWM Converters Using Model of PWM Switch Part I: Continuous

Conduction Mode,” IEEE Trans. on Aero. and Electron. Sys., vol. 26, no. 3, pp. 490-496, May 1990.[2] V. Vorperian, “Simplified Analysis of PWM Converters Using Model of PWM Switch Part II: Discontinuous

Conduction Mode,” IEEE Trans. on Aero. and Electron. Sys., vol. 26, no. 3, pp. 497-505, May 1990.[3] E. Van Dijk, J. N. Spruijt, D. M. O'Sullivan, and J. B. Klaassens, “PWM-switch modeling of DC-DC converters,”

IEEE Transactions on Power Electronics,, vol. 10, no. 6, pp. 659 -665, Nov 1995.

101/270

Modeling of the Switch

( )ai t )(~ tic

( )apv t ( )cpv t

vcp

vap

i Dia c

v Dvcp ap

)(~ of valueaverage thedenotes :Note tii aa

During a PWM switching interval:

ss

sea TtDT

DTttiti

,00),(~

)(~

ss

sapcp TtDT

DTttvtv

,00),(~

)(~

102/270

Small-Signal Perturbation

ccccaa

ccaa

ca

idiDdIDIiI

iIdDiI

dii

ˆˆˆˆˆ)ˆ)(ˆ(ˆ

ˆˆ ˆ( )( )ˆ ˆˆ ˆ ˆ

cp ap

cp cp ap ap

cp cp ap ap ap ap

v dv

V v D d V v

V v DV V d Dv dv

ˆˆ

cp cp cp

ap ap ap

v V vv V v

Make a small-signal perturbation at a DC operating point

ˆ

ˆa a a

c c c

i I i

i I i

d D d

i Dia c

v Dvcp ap

We can obtain

103/270

DC and AC Analysis

For dc analysis, eliminate all small signal perturbation terms, we can get itsequivalent dc model.

I DIV DV

a c

cp ap

For ac analysis, set all dc terms to zero and neglect second order nonlinear terms, we can get its equivalent small-signal ac model.

cca iDdIi ˆˆˆ

ˆˆ ˆcp ap apv V d Dv

104/270

PWM Switch Model

DC Model:

apcp

ca

DVVDII

a c

p

1 D

I a Ic

Vap Vcp

AC Model:

dVvDv

dIiDi

apapcp

cca

ˆˆˆ

ˆˆˆ

ˆapV dD

a c

p

1 DˆcI d

aî cîciDˆ

105/270

DC Analysis of a Buck Converter

DC Analysis

rL

rCR

L

C

a

p

c

Li

o

rRRD

VV

p

a c

1Vi Vo

DR

rL

106/270

AC Analysis of a Buck Converter

Note:In the following, the hat above the small signal variables are neglected for simplicity.

Small-signal equivalent circuit model of the buck converter.

voRrC

C

rLL iL io

vc

ic

id

iR

I dc

dDVi ˆ

p

1iv̂

Dii

aia

cic

ii

Vi

iS

iDvoR

rC

C

rLL iL io

vc

ic

id

iR

107/270

AC Analysis: Control-to-Output Transfer Function

Short the unrelated voltage source and open the unrelated current source

voRrC

C

rLL iL io

vc

iR

VD

dap

p

a c

1 Dii ic

'

108/270

AC Analysis: Control-to-Output Transfer Function

v VD

d D

v v R r sCr sL R r sC

V d R sr Cs R r LC s r r C r RC L r RC R r

cpi

o cpC

L C

iC

C L C L C L

/ /( / )( ) / /( / )

( )( ) ( ) ( )

11

12

G s v sd s

V R sr Cs RLC s r r C L r RC r RC R rd

oi

C

L C L C L

( ) ( )( )

( )( ) ( )

1

2

if rL

109/270

AC Analysis: Line-to-Output Transfer Function

voRrC

C

rLL iL io

vc

id

iR

p

a c

1 Dvi

ii ic'

R r sC R r sCR r sCC

C

C

/ /( / ) ( / )/

1 11

110/270

AC Analysis: Line-to-Output Transfer Function

)()()()1(

)1()1)(()1(

)/1()/1)(()/1(

/1)/1()(

/1)/1(

)/1//()()/1//(

2LCLCLC

Ci

CCL

Ci

CCL

Ci

C

CL

C

C

iCL

Ccpo

icp

rRRCrLRCrCrrsLCrRsCsrRDv

CsrRCsrsRCsLrCsrRDv

sCrRsCrRsLrsCrRDv

sCrRsCrRsLr

sCrRsCrR

DvsCrRsLr

sCrRvv

Dvv

G s v sv s

D R sr Cs RLC s r r C L r RC r RC R rv

o

i

C

L C L C L

( ) ( )( )

( )( ) ( )

1

2

if rL

111/270

AC Analysis: Disturbance-to-Output Transfer Function

voRrC

C

rLL iL io

vc

id

iR

p

a c

1 Dii ic

'

112/270


LLLCCC

LCLC

LCC

LCLC

LCC

LC

LCC

LC

LC

C

LC

C

LC

CLC

d

o

rsLRCsrCrsrLCrsRLCsRRCsrrsLCrsrLCrsR

sLrCsrsRCRRCsrrsLCrsrLCrsR

sLrCsrsRCCsrRsLrCsrR

sLrsCrRsCrRsLrsCrR

sLrsCrR

sCrR

sLrsCrR

sCrR

sLrsCrR

sCrRsLrsCrRiv

22

2

2

))(1())(1()1())(1(

))(/1()/1())(/1(

/1)/1(

)(/1

)/1(

)//(/1

)/1()//()/1//(

vi

R s r LC s L r r C rs R r LC s L r r RC r r C R r

o

d

C L C L

C C L C L L

2

2

( )( ) ( ) ( )

113/270


if rL

115/270


Q LR

r r Lo C L

1 1 ( )

22

2 11)(

oo

LCop

Qss

LCLrr

RCsssZ

s s sQ

oo

2 2

111

1

1)(

11

221

2

2

2

sQ

sR

srLLCs

rr

LCr

LCr

CsrssZ

oeq

LL

CL

LCoq

R req L

11

rr LC

L

C

Q rLL

11

1

116/270


The exact output impedance is derived as:

LCRr

Rrrrr

LRCs

Rrs

LCr

Lrr

Csrs

Rr

RCrrCrr

RLsLC

Rrs

rCrrLsLCrsrRCrrRCrrLsLCrRs

rCrrLsLCrsRiv

LCLLC

C

LCLC

LLCLC

C

LCLC

LLCLCC

LCLC

d

o

1)1()(11)1(

)1(

)1()()1(

)(

)()()()(

2

2

2

2

2

2

117/270


111

1)(1)(

11

221

2

22

sQ

sR

sCrrLLCs

rr

LCr

LCr

Lrr

CsrssZ

oeq

CLL

CLLCLCoq

R req L

11

rr LC

L

C

Q Lr

r CL

C

11

1 1

118/270

Output Impedance of the Buck Converter

LCRr

Rrrrr

LRCs

Rrs

LCr

Lrr

Csrs

sisvsZ

LCLLC

C

LCLC

d

oo 1)1()(11)1(

)1(

)()()(

2

2

Z s v si s

R

sQ

s

soo

deq

o

( ) ( )( )

( )

11 1 1

2

2

Output Impedance of the Buck Converter:

s sQ

s R r

LCQ L

Rr r C

LCrr

Q Lr

r C

oo eq L

oo

L C

L

C

CL

2 2

1 11

1 1 1

1 1 1

,

,( )

;

119/270

Difficulties with Modeling and Control of SPS




120/270

6. Difficulties with Modeling and Control of SPS

Nonsmooth Systems (time and state discontinuity)Concepts of existence, uniqueness, stability not clearly defined for systems with discontinuous right hand sideConcept of chaotic dynamics relatively new To power electronics

121/270

Complex Behavior of Switching Power ConvertersChi Kong Tse, Complex Behavior of Switching Power Converters, CRC Press, 2004.

(c) Simulation results

(d) Experimental results

E = 22-33 V, L = 20 mH, C = 47 F, R = 22 , Vref = 11 V, A = 8.4, T = 400 s, VL = 3.8 V, VU = 8.2 V.

(a) Voltage-mode controlled buck converter.

(b) Operation waveforms.

u

VL

VU Vrampvcon

t

t3T2T1T0

122/270

Bifurcation of Voltage Mode Buck Converter in CCM

RLC

Z i

Z f

vref

v c

V vI i

CLOCK RAMP

vd

Vc

vc vc

io vo

rampv

u

VL

VUVramp

vcon

t

t3T2T1T0

Li

123/270

Vcon & Vramp at Different Gains

L = 20 mH, C = 47 F, R = 22 , T = 400 s, VL = 3.8 V, VU = 8.2 V, Vs = 33 V, Vref = 11 V.

KP = 5.0

KP = 3.0

KP = 7.0

KP = 9.0

8 msec

RL

vrefv c

vd

io vo

rampv

Li

PK

C

124/270

Phase Portraits

KP = 6.8KP = 3.0

KP = 7.4 KP = 12.0

125/270

Inductor Current and Output Voltage at Kp = 12.0

KP = 12.0Inductor Current

Output Voltage

126/270

Simulation Results with Varying Source VoltageSource Voltage

Output Voltage

Inductor Curent

127/270

Experimental Setup for Measuring of a SPS

Active LoadDC Power Supply

Buck Converter

Experimental Setup Experimental Buck Converter

128/270

Typical Waveforms

IL

VC

IL

VC

Coupling switching noise

5s

1ms

What happens?

129/270

Bifurcation Occurs in a Switching Power Supply

IL

IL

IL

IL

IL

IL

VC

VC

VC

VC

IL

VC

130/270

Intermittency, Parasitic and Common Mode Effects

IL

IL

VC

VC

Icom

131/270

Homework Assignments



電力電子系統與晶片實驗室

Power Electronic Systems & Chips Lab.交通大學 • 電機控制工程研究所

132/270

Simulation of a Buck Converter

S. A. Shirsavar, "Teaching Practical Design of Switch-Mode Power Supplies," IEEE Trans. on Education, vol. 47, no. 4, pp. 467-473, Nov. 2004.

Vinvca

iL

LvL vo

io

C R

low-pass filteris

ic

Input voltage Vin = 12 VNominal output voltage Vout = 5 V

Switching Frequency fs = 76.5 kHzInductor L = 100 HCapacitor C = 2.4 FLoad resistor R => 25

id

133/270

Buck Converter

v VDL HrC FrRf KHz

i

L

C

s

10502000 14700 05550

%

.

.

ohm

ohm ohm

L

RvorC

C

rL

vi D

Q

iL

io

vc

iciSiD

Control-to-Output Transfer Function

( )( ) ( )

v sd s

V r CssQ

so

iC

o o

11 12

o o

L CLC

Q LR

r r C

1 1 1 ,( )

134/270

Control Loop Design



Chapter 12 Feedback Loop Analysis and Stability,Switching Power Supplies A to Z,Sanjaya Maniktala, Newnes, July 6, 2006.

Designing Control Loops for Linear and Switching Power Supplies: A Tutorial Guide,Christophe Basso, McGraw-Hill, Sept. 30, 2012.

Voltage Mode Control of DC-DC Converters

PWMModulator

LoopCompensator

v o


vR

d


load

LR di~



vi vo

L

CD

L

C

D

vovi

　

L C

D

vovi

　　　

L1

C2D

C1

vi vo


oi

vgosZ

sv~

sV

136/270

Control Loop Design for DC-DC Converters

L. H. Dixon, Closing the Feedback Loop, Unitrode, 1988.

Feedback Control to Achieve: Good Voltage Regulation (Load Variation & Line Variation) High Stability (Load Variation & Line Variation)

vref

d

ve

v v f do i ( )

Fm

ConverterPower Stage

)(sA

Rvi

Single-Loop-Controlled Switching Regulator

137/270

Small Signal Modeling of Voltage Mode ControlSwitching Mode DC-DC Regulator

BuckBoost

Buck/Boost

Power Stage

PulseModulator

ErrorProcessor rv

~

ov~

cv~

oi~

d~

iv~

LoadDynamics

138/270


ˆ ˆ0, 0

ˆ( )ˆ

o

ov

i d i

vG sv

: Open-loop input-to-output

G vdd

o

v ii o

, 0 0

K dv c

PWM




Z vip

o

o d v i

, 0 0

ˆ( )ˆ

c

o

vA sv

KV p

PWM 1

: Compensator gain

: Power stage transfer function

: PWM dc gain

G Z Gv p d, ,

DC gain: DV Vc p

1

A(s) : Compensator to be designed

139/270

Small Signal Model of Voltage Mode Control

dv

iv

vv o

o

o

i

o ~~

;~~

;~~

KPWM A(s)

)~,~,~(~ divfv oio Zp

Gd

-A(s)

Gv

KPWM

)(1Z

sLZ

Z popcpo

)()()( sGKsAsL dPWM)(1

sL

GGG vovcvo

oi~

d~

iv~

oi~

d~

iv~ov~

cv~cv~

ov~

The design problem is to synthesize a loop compensator L(s) to satisfy given specifications of Gvc(s) and Zpc(s).

140/270


G s vvv

o

i d io

( ) ,

0 0

: Open-loop input-to-output

G vdd

o

v ii o

,0 0

cvdkˆˆ

PWM




Z vip

o

o d vi

, 0 0

A s vv

c

o

( )

KVp

PWM 1 : Compensator gain: PWM dc gain

141/270

Control Concept for Switching Regulators

vo

vc

io

d

vi

; ;

vv

vi

vd

o

i

o

o

o

K PWM A(s)

iîdi

ii

vi i

o

i

i

iˆˆ

;ˆˆ

;ˆˆ

Loop compensator

Disturbances Results

Control action

142/270

Single-Loop Control Example

vovi

PWM Modulator

Zi

Zf

vref

DriverStage

Buck Converter

Power Stage

Error Amplifierand Compensation

VoltageDividerNetwork

vc

d

R

VP

143/270

Single-Loop-Controlled PWM Converter

Z i

Z f

v ref

Logic&

DRIVE

+

A

Se

vi

vo

B

FvFm

RL

Features of Voltage Mode Control: Error voltage compared to external ramp Se. Unique loop gain for control loop design Analog signal can be measured at B. Digital signal can be measured at A.

144/270

Control Architecture




145/270

The Purpose of Feedback Control

PWMModulator

LoopCompensator

vgvo

vR

load

RL di~

Buck Converter

Power Flow Control Efficiency & Stability & Power Quality Output Voltage Regulation Zero Output Impedance Input Voltage Disturbance Rejection Zero Audio Suspetibility Control with Estimated Feedback Signals

146/270

Control of Basic PWM DC-DC Converters

PWMModulator

LoopCompensator

vg

vo

vR

Efficiency

load

RL di~


Output Impedance

GateDrive

osZ

sv~

sV

Buck ConverterBuck-Boost ConverterBoost Converter

147/270

Multiple-Loop Control Scheme

PWMModulator

Voltage LoopCompensator

vo

vRCurrent LoopCompensator

CurrentSensing

CurrentLoop

VoltageLoop

load

RL di~Buck ConverterBuck-Boost ConverterBoost Converter

vgosZ

sv~

sV

Switching Power Converters

CarrierGenerator

148/270

Pioneer Voltage-Mode PWM Control IC SG1524

The First PWM IC: SG1524, Bob Mammano, 1976.

SG1524: -55°C ~ 125°CSG2524: -25°C ~ 85°CSG3524: 0°C ~ 70°C

Pioneer Current-Mode PWM Control IC uc3842

7/12

5/9

4/7

2/3

1/1

3/5

Vcc

VFB

ground

compCurrent

sense

OSC

34V

2.50V

UVLO

Vrefgoodlogic

TS2R

R 1VPWMlatch Power

ground

output

CurrentSense

comparator

Vref5.0V

50mAInternalbias

5VrefRS /

Erroramp

RT /CT

R

Vc

8/14

7/11

6/10

5/8

Block Diagram of UC3842/3/4/5

ccV

RS

Q

Latch

Clock

PWMcomparator

Erroramplifier

reference

Li

eV

sR

sV

RV

oV

RESET

LatchOutput(PWM)

Clock (SET)

Li

eV

sV

150/270

Voltage-Mode Control vs. Current-Mode Control

REF: Bob Bell, National Semiconductor, "Virtual-current mode: current-mode control without the noise," EDN, Feb. 16, 2006.

Voltage Mode Control Current Mode Control

VIN VINVOUT VOUTL1 L1

D1 D1

Q1 Q1

FET DRIVER

CLOCKSAWTOOTHGENERATOR

1.25VREFERENCE

Q RS

Q RS

CLOCK1.25V

REFERENCE

SWITCH DRIVER

SWITCH-CURRENTMEASURE

PWMCOMPARATOR

PWMCOMPARATOR

ERRORAMPLIFIER

ERRORAMP

151/270

Control Block Diagram of a Current-Mode Controller

152/270

Peak-Current-Mode-Control of a Buck Converter

153/270

Current-Mode Control vs. Voltage-Model Control

A. J. Forsyth and S. V. Mollov, "Modelling and control of DC-DC converters," IEEE Power Engineering Journal, vol. no. 5, pp. 229-236, Oct. 1998.

(a) Voltage-Mode Control (b) Current-Mode Control

154/270

Current-Mode vs. Voltage-Mode Control

Control-to-output bode plots for voltage and current mode converters. (The current mode converter has an extra 90 degrees of phase.)

155/270

Voltage Mode Control of DC-DC Converters

PWMModulator

LoopCompensator

vg vo


vR

d


load

LR di~



vi vo

L

CD

L

C

D

vovi

　

L C

D

vovi

　　　

L1

C2D

C1

vi vo


oi

156/270

Voltage Mode Control

REF: Voltage-mode control and compensation - Intricacies for buck regulators (Timothy Hegarty, EDN 2008)

Converter power stage

ModulatorType III compensator

PWMcomparator

Erroramp

COMP

SW

VIN

Vout

IoutRLRESRCO

LORDCR

RFB1FB

RC1CC1

CC2

RC2

RFB2

CC3

Vref

Driver&

deadtime

D

PWM rampVramp

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Robert W. Erickson and Dragan Maksimovic, Fundamentals of Power Electronics, Kluwer Academic Publishers, 2nd Ed., February 2001.

Control Loop Design Basics



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Control Loop Design Basics

1. Introduction2. Effect of Negative Feedback

Feedback reduces the transfer function from disturbances to the output Feedback causes the transfer function from the reference input to the output to

be insensitive to variations in the gains in the forward path of the loop

3. Construction of the important quantities 1/(1+T) and T/(1+T) andthe closed-loop transfer functions

4. Stability The phase margin test The relation between phase margin and closed-loop damping factor Transient response vs. damping factor

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Control Loop Design Basics ..

5. Regulator design Feedback Lead (PD) compensator Lag (PI) compensator Combined (PID) compensator Design example

6. Measurement of loop gains The Voltage injection Current injection Measurement of unstable systems

7. Summary of key points

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tvg tvo

tiload


Switching converter

transistor gate driver

Load

tvc tδ tδ

tsTsdT tvo

tvg

tiload td

divftv loadg ,,

disturbances

Control input

Switching converter

Output voltage of a switchingconverter depends on duty cycled, input voltage vg, and loadcurrent iload

td

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The DC Regulator Application

Objective: maintain constantoutput voltage vo(t) = V, in spite ofdisturbances in vg(t) and iload(t).Typical variation in vg(t) : 100Hz or120Hz ripple, produced by rectifiercircuit.

Load current variations: a significant step-change in load current, such as from50% to 100% of rated value, may be applied.

A typical output voltage regulation specification: 5V ± 0.1V.

Circuit elements are constructed to some specified tolerance. In high volumemanufacturing of converters, all output voltages must meet specifications.

tvo tvg

tiload td

divftv loadgo ,,

disturbances

Control input

Switching converter

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The DC Regulator Application

So we cannot expect to set the duty cycle to a single value, and obtain a givenconstant output voltage under all conditions.

Negative feedback: build a circuit that automatically adjusts the duty cycle asnecessary, to obtain the specified output voltage with high accuracy, regardless ofdisturbances or component tolerances.

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Negative Feedback: A Switching Regulator System

gv v

tiload


Switching converter

transistor gate driver

Load

cvδ

Powerinput

H(s)sensorgain

error signal

compensator

sGc ev

refvreference

input

+–

tvo

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Negative Feedback

tvo tvg

tiload td

divftv loadgo ,,

disturbances

Control input

Switching converter


cv

error signal

sensorgain

tverefvreference

input

+– compensator

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Effect of Negative Feedback




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Effect of Negative Feedback

tiloadC tvgˆ svoˆ sdsj ˆ

eL

R

sdse ˆ

1 : M(D)

Small signal model: open-loop equivalent circuit mode of a buck converter

Output voltage can be expressed as

where

sisZsvsGsdsGtv loadoutgvgvdo ˆˆˆˆ

0ˆ0ˆ0ˆ

0ˆ0ˆ

0ˆ ˆˆ

ˆˆ

ˆˆ

gloadload

g

vdload

oout

id

g

ovg

sisv

ovd si

svsZsvsvsG

sdsvsG

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Voltage Regulator System Small-Signal Model

Use small-signal converter model

Perturb and linearize remainder of feedback loop

. ˆ

ˆ

etctvvtv

tvvtv

eee

refrefref

C tvgˆ svoˆ sdsj ˆ

eL

R

sdse ˆ1 : M(D)

tiload

error signal

sveˆ svrefˆ

referenceinput

+–

svcˆ

H(s)

sGccompensator Pulse-width

modulator

sd̂

svsH oˆ

sensorgain

MV1

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H(s)

Regulator System Small-Signal Block Diagram

error signal

sveˆ svrefˆ

referenceinput

svcˆ sGc

compensator Pulse-widthmodulator

svsH oˆ

Sensor gain

MV1 sd̂ sGvd

sGvd svgˆac line variation

svoˆ

tiloadˆload current variation

output voltagevariation

duty cyclevariation

Converter power stage

sZout

Mvdc

outload

Mvdc

vdg

Mvdc

Mvdcrefo VGHG

ZiVGHG

GvVGHG

VGGvv/1

ˆ/1

ˆ/1

/ˆˆ

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Solution of Block Diagram

Manipulate block diagram to solve for . Result is

Loop gain T(s) = products of the gains around the negative feedback loop.

which is of the form

svoˆ

Mvdc

outload

Mvdc

vdg

Mvdc

Mvdcrefo VGHG

ZiVGHG

GvVGHG

VGGvv/1

ˆ/1

ˆ/1

/ˆˆ

" "/with 1

ˆ1

ˆ1

1ˆˆ

gainloopVsGsGsHsTT

ZiT

Gv

TT

Hvv

Mvdc

outload

vggrefo

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Feedback Reduces Sensitivity to Load Disturbances

Original (open-loop) line-to-output transfer function:

With addition of negative feedback, the line-to-output transfer function becomes:

Feedback reduces the line-to-output transfer function by a factor of

If T(s) is large in magnitude, then the line-to-output transfer function becomessmall.

Documents

DC-DC Converters: Topologies, Modeling, and Controlpemclab.cn.nctu.edu.tw/W3news/實驗室課程網頁... · 2018. 9. 11. · Full-Bridge Converter S L CR S n:1 Vg n:n S S1 S2 n:1