Damu, 2008EGE535 Spring 08, Lecture 11 EGE535 Low Power VLSI Design EGE535 Low Power VLSI Design Damu Radhakrishnan Dept of Electrical and Computer Engineering

Damu, 2008Damu, 2008 EGE535 Spring 08, Lecture 1EGE535 Spring 08, Lecture 1 11

EGE535 Low Power VLSI EGE535 Low Power VLSI DesignDesign

Damu RadhakrishnanDamu RadhakrishnanDept of Electrical and Computer EngineeringDept of Electrical and Computer Engineering

State University of New York, New Paltz, NY 12561State University of New York, New Paltz, NY 12561

Tel: (845) 257-3772Tel: (845) 257-3772

[email protected]://www.engr.newpaltz.edu/~damu/spring2008/lowpower.htm


Course ObjectivesCourse Objectives

Low-power is a current need in VLSI Low-power is a current need in VLSI design.design.

Learn basic ideas, concepts, theory and Learn basic ideas, concepts, theory and methods.methods.

Gain experience with techniques and Gain experience with techniques and tools.tools.


Low-Power DesignLow-Power DesignDesign practices that reduce power Design practices that reduce power

consumption at least by one order of consumption at least by one order of magnitude; in practice 50% reduction magnitude; in practice 50% reduction is often acceptable.is often acceptable.

Low-power design methods:Low-power design methods:Algorithms and architecturesAlgorithms and architecturesHigh-level and software techniquesHigh-level and software techniquesGate and circuit-level methodsGate and circuit-level methodsTest powerTest power


PrerequisitesPrerequisites

Graduate Standing Graduate Standing Basic background in probability and Basic background in probability and

statistics statistics Familiarity with basic MOSFET structure Familiarity with basic MOSFET structure Analyzed circuits involving transistors Analyzed circuits involving transistors Circuit simulation (PSPICE)Circuit simulation (PSPICE)


Topics CoveredTopics Covered

MOSFET BasicsMOSFET Basics Power dissipation in CMOS circuitsPower dissipation in CMOS circuits

Dynamic power Dynamic power Charging and discharging of load and parasitic capacitancesCharging and discharging of load and parasitic capacitances

Short circuit powerShort circuit powerBoth nmos and pmos conducting simultaneouslyBoth nmos and pmos conducting simultaneously

Static power Static power leakage power due to reverse biased pn junctionsleakage power due to reverse biased pn junctionssub-threshold conductionsub-threshold conduction

Low power analysis and design toolsLow power analysis and design toolsAnalysis, especiallyAnalysis, especially power estimation in CMOS circuits (circuit, power estimation in CMOS circuits (circuit, gate and architecture level) gate and architecture level)

Simulation based approaches (highly computationally Simulation based approaches (highly computationally intensive)intensive)

Probabilistic approaches (based on random processes with Probabilistic approaches (based on random processes with certain statistical characteristics)certain statistical characteristics)


Topics CoveredTopics Covered (contd.)(contd.) Logic level power optimizationLogic level power optimization

Combinational Circuit – two level and multilevelCombinational Circuit – two level and multilevelSequential Circuits – state assignment, logic Sequential Circuits – state assignment, logic optimizationsoptimizations

Circuit level power optimizationCircuit level power optimizationLogic styles - Static, dynamic, pass transistorLogic styles - Static, dynamic, pass transistorLatches and flip-flopsLatches and flip-flopsTransistor sizing and orderingTransistor sizing and orderingDrivers for large loadsDrivers for large loads


Topics Covered (Topics Covered (contdcontd.).)

Low power design of sub-modules – adder, multiplier Low power design of sub-modules – adder, multiplier Case studies of arithmetic sub-modules Case studies of arithmetic sub-modules - full adder, 4-2 compressor, adder arrays, multiplier etc.- full adder, 4-2 compressor, adder arrays, multiplier etc.

Memory and Multicore designMemory and Multicore designMemMemory hierarchy, power consumption in memory systemsory hierarchy, power consumption in memory systemsLow power memory designs – DRAM and SRAMLow power memory designs – DRAM and SRAMLow power datapath architectureLow power datapath architecturePower reduction in processorsPower reduction in processors

System on a chipSystem on a chipPower reduction at the chip levelPower reduction at the chip levelBus power minimizationBus power minimizationClock powerClock power

Project presentations?Project presentations?


Student EvaluationStudent Evaluation

Homeworks (15%)Homeworks (15%)Midterms (30%)Midterms (30%)Quiz (10%)Quiz (10%)Class Project (15%)Class Project (15%)Final Exam (30%): Thursday, May 15, Final Exam (30%): Thursday, May 15,

2008, 2:30 – 4:30PM, REH111.2008, 2:30 – 4:30PM, REH111.


Power Consumption of VLSI ChipsPower Consumption of VLSI Chips

Why is it a concern?


ISSCC, Feb. 2001, KeynoteISSCC, Feb. 2001, Keynote“Ten years from now, microprocessors will run at 10GHz to 30GHz and be capable of processing 1 trillion operations per second – about the same number of calculations that the world's fastest supercomputer can perform now.

“Unfortunately, if nothing changes these chips will produce as much heat, for their proportional size, as a nuclear reactor. . . .”

Patrick P. Gelsinger Senior Vice PresidentGeneral ManagerDigital Enterprise Group INTEL CORP.


VLSI Chip Power DensityVLSI Chip Power Density

40048008

80808085

8086

286386

486Pentium®

P6

1

10

100

1000

10000

1970 1980 1990 2000 2010

Year

Po

wer

Den

sity

(W

/cm

2 )

Hot Plate

NuclearReactor

RocketNozzle

Sun’sSurface

Source: Intel


SIA Roadmap for Processors (1999)SIA Roadmap for Processors (1999)YearYear 19991999 20022002 20052005 20082008 20112011 20142014

Feature size (nm)Feature size (nm) 180180 130130 100100 7070 5050 3535

Logic transistors/cmLogic transistors/cm22 6.2M6.2M 18M18M 39M39M 84M84M 180M180M 390M390M

Clock (GHz)Clock (GHz) 1.251.25 2.12.1 3.53.5 6.06.0 10.010.0 16.916.9

Chip size (mmChip size (mm22)) 340340 430430 520520 620620 750750 900900

Power supply (V)Power supply (V) 1.81.8 1.51.5 1.21.2 0.90.9 0.60.6 0.50.5

High-perf. Power (W)High-perf. Power (W) 9090 130130 160160 170170 175175 183183

Source: http://www.semichips.org


Recent DataRecent Data

Source: http://www.eetimes.com/story/OEG20040123S0041



IC Design SpaceIC Design Space


Why worry about power?Why worry about power?

Portability: Battery Storage Capacity is the limiting factor

Multimedia Terminals

Laptop Computers

Digital Cellular Telephony

Personal Digital Assistants

Increasing Prominance of Portable SystemsIncreasing Prominance of Portable Systems


In July 2006, the U.S. Congress approved legislation In July 2006, the U.S. Congress approved legislation instructing businesses to give high priority to energy instructing businesses to give high priority to energy efficiency as a factor in determining best value and efficiency as a factor in determining best value and performance for purchase of servers1. While Washington may performance for purchase of servers1. While Washington may have recently discovered that higher efficiency server not only have recently discovered that higher efficiency server not only reduces electricity bills but utilize less power for cooling, reduces electricity bills but utilize less power for cooling, businesses have long found that these energy-efficient businesses have long found that these energy-efficient performance platforms provide tremendous benefits.performance platforms provide tremendous benefits.


Battery progressBattery progress

Factor 4 over the last 10 years!2X improvements in semiconducors in 18 months


10 times more charge for lithium-ion batteries

A group of researchers have formulated a way of increasing A group of researchers have formulated a way of increasing the capacity of lithium-ion batteries. The team lead by Yi Cui at the capacity of lithium-ion batteries. The team lead by Yi Cui at Stanford University, has built a substrate out of silicon nanowiers Stanford University, has built a substrate out of silicon nanowiers capable of holding ten times more lithium compared to a carbon capable of holding ten times more lithium compared to a carbon solution. Ten times more lithium means 10 times more charge. solution. Ten times more lithium means 10 times more charge. ““High-performance lithium battery anodes using High-performance lithium battery anodes using

silicon nanowires.” Nature Nanotechnology, silicon nanowires.” Nature Nanotechnology, December 2007December 2007

New Battery TechnologiesNew Battery Technologies

Intel is investigating fuel cells and other exotic options and is Intel is investigating fuel cells and other exotic options and is particularly interested in two existing chemistries – advanced lithium particularly interested in two existing chemistries – advanced lithium polymer and zinc-alkaline, which have the potential to double polymer and zinc-alkaline, which have the potential to double battery capacities without significant increase in size or weight.battery capacities without significant increase in size or weight.





Source: S. Borkar, Intel




Cooling CostsCooling Costs


IEEE Spectrum, October 2007




Books on Low-Power Design (1) Books on Low-Power Design (1) L. Benini and G. De Micheli, L. Benini and G. De Micheli, Dynamic Power Management Design Techniques and Dynamic Power Management Design Techniques and

CAD ToolsCAD Tools, Boston: Springer, 1998., Boston: Springer, 1998. T. D. Burd and R. A. Brodersen, T. D. Burd and R. A. Brodersen, Energy Efficient Microprocessor DesignEnergy Efficient Microprocessor Design, Boston: , Boston:

Springer, 2002.Springer, 2002. A. Chandrakasan and R. Brodersen, A. Chandrakasan and R. Brodersen, Low-Power Digital CMOS DesignLow-Power Digital CMOS Design, Boston: , Boston:

Springer, 1995.Springer, 1995. A. Chandrakasan and R. Brodersen, A. Chandrakasan and R. Brodersen, Low-Power CMOS DesignLow-Power CMOS Design, New York: IEEE , New York: IEEE

Press, 1998.Press, 1998. J.-M. Chang and M. Pedram, J.-M. Chang and M. Pedram, Power Optimization and Synthesis at Behavioral and Power Optimization and Synthesis at Behavioral and

System Levels using Formal MethodsSystem Levels using Formal Methods, Boston: Springer, 1999., Boston: Springer, 1999. M. S. Elrabaa, I. S. Abu-Khater and M. I. Elmasry, M. S. Elrabaa, I. S. Abu-Khater and M. I. Elmasry, Advanced Low-Power Digital Advanced Low-Power Digital

Circuit TechniquesCircuit Techniques, Boston: Springer, 1997., Boston: Springer, 1997. R. Graybill and R. Melhem, R. Graybill and R. Melhem, Power Aware ComputingPower Aware Computing, New York: Plenum , New York: Plenum

Publishers, 2002.Publishers, 2002. S. Iman and M. Pedram, S. Iman and M. Pedram, Logic Synthesis for Low Power VLSI DesignsLogic Synthesis for Low Power VLSI Designs, Boston: , Boston:

Springer, 1998.Springer, 1998. J. B. Kuo and J.-H. Lou, J. B. Kuo and J.-H. Lou, Low-Voltage CMOS VLSI CircuitsLow-Voltage CMOS VLSI Circuits, New York: Wiley-, New York: Wiley-

Interscience, 1999.Interscience, 1999. J. Monteiro and S. Devadas, J. Monteiro and S. Devadas, Computer-Aided Design Techniques for Low Power Computer-Aided Design Techniques for Low Power

Sequential Logic CircuitsSequential Logic Circuits, Boston: Springer, 1997., Boston: Springer, 1997. S. G. Narendra and A. Chandrakasan, S. G. Narendra and A. Chandrakasan, Leakage in Nanometer CMOS Leakage in Nanometer CMOS

TechnologiesTechnologies, Boston: Springer, 2005., Boston: Springer, 2005. W. Nebel and J. Mermet, W. Nebel and J. Mermet, Low Power Design in Deep Submicron ElectronicsLow Power Design in Deep Submicron Electronics, ,

Boston: Springer, 1997.Boston: Springer, 1997.


Books on Low-Power Design (2)Books on Low-Power Design (2) N. Nicolici and B. M. Al-Hashimi, N. Nicolici and B. M. Al-Hashimi, Power-Constrained Testing of VLSI CircuitsPower-Constrained Testing of VLSI Circuits, ,

Boston: Springer, 2003.Boston: Springer, 2003. V. G. Oklobdzija, V. M. Stojanovic, D. M. Markovic and N. Nedovic, V. G. Oklobdzija, V. M. Stojanovic, D. M. Markovic and N. Nedovic, Digital System Digital System

Clocking: High Performance and Low-Power AspectsClocking: High Performance and Low-Power Aspects, Wiley-IEEE, 2005., Wiley-IEEE, 2005. M. Pedram and J. M. Rabaey, M. Pedram and J. M. Rabaey, Power Aware Design MethodologiesPower Aware Design Methodologies, Boston: , Boston:

Springer, 2002.Springer, 2002. C. Piguet, C. Piguet, Low-Power Electronics DesignLow-Power Electronics Design, Boca Raton: Florida: CRC Press, 2005., Boca Raton: Florida: CRC Press, 2005. J. M. Rabaey and M. Pedram, J. M. Rabaey and M. Pedram, Low Power Design MethodologiesLow Power Design Methodologies, Boston: , Boston:

Springer, 1996.Springer, 1996. S. Roudy, P. K. Wright and J. M. Rabaey, S. Roudy, P. K. Wright and J. M. Rabaey, Energy Scavenging for Wireless Sensor Energy Scavenging for Wireless Sensor

NetworksNetworks, Boston: Springer, 2003., Boston: Springer, 2003. K. Roy and S. C. Prasad, K. Roy and S. C. Prasad, Low-Power CMOS VLSI Circuit DesignLow-Power CMOS VLSI Circuit Design, New York: Wiley-, New York: Wiley-

Interscience, 2000.Interscience, 2000. E. Sánchez-Sinencio and A. G. Andreaou, E. Sánchez-Sinencio and A. G. Andreaou, Low-Voltage/Low-Power Integrated Low-Voltage/Low-Power Integrated

Circuits and Systems – Low-Voltage Mixed-Signal CircuitsCircuits and Systems – Low-Voltage Mixed-Signal Circuits, New York: IEEE , New York: IEEE Press, 1999.Press, 1999.

W. A. Serdijn, W. A. Serdijn, Low-Voltage Low-Power Analog Integrated CircuitsLow-Voltage Low-Power Analog Integrated Circuits, , Boston:Springer, 1995.Boston:Springer, 1995.

S. Sheng and R. W. Brodersen, S. Sheng and R. W. Brodersen, Low-Power Wireless Communications: A Low-Power Wireless Communications: A Wideband CDMA System DesignWideband CDMA System Design, Boston: Springer, 1998., Boston: Springer, 1998.

G. Verghese and J. M. Rabaey, G. Verghese and J. M. Rabaey, Low-Energy FPGAsLow-Energy FPGAs, Boston: springer, 2001., Boston: springer, 2001. G. K. Yeap, G. K. Yeap, Practical Low Power Digital VLSI DesignPractical Low Power Digital VLSI Design, Boston:Springer, 1998., Boston:Springer, 1998. K.-S. Yeo and K. Roy, K.-S. Yeo and K. Roy, Low-Voltage Low-Power SubsystemsLow-Voltage Low-Power Subsystems, McGraw Hill, 2004., McGraw Hill, 2004.


Books Useful in Low-Power Design Books Useful in Low-Power Design A. Chandrakasan, W. J. Bowhill and F. Fox, A. Chandrakasan, W. J. Bowhill and F. Fox, Design of High-Design of High-

Performance Microprocessor Circuits, Performance Microprocessor Circuits, New York: IEEE Press, New York: IEEE Press, 2001.2001.

R. C. Jaeger and T. N. Blalock, R. C. Jaeger and T. N. Blalock, Microelectronic Circuit Design, Microelectronic Circuit Design, Third EditionThird Edition, McGraw-Hill, 2006., McGraw-Hill, 2006.

S. M. Kang and Y. Leblebici, S. M. Kang and Y. Leblebici, CMOS Digital Integrated CircuitsCMOS Digital Integrated Circuits, , New York: McGraw-Hill, 1996.New York: McGraw-Hill, 1996.

E. Larsson, E. Larsson, Introduction to Advanced System-on-Chip Test Introduction to Advanced System-on-Chip Test Design and OptimizationDesign and Optimization, Springer, 2005., Springer, 2005.

J. M. Rabaey, A. Chandrakasan and B. Nikolić, J. M. Rabaey, A. Chandrakasan and B. Nikolić, Digital Integrated Digital Integrated Circuits, Second EditionCircuits, Second Edition, Upper Saddle River, New Jersey: , Upper Saddle River, New Jersey: Prentice-Hall, 2003.Prentice-Hall, 2003.

J. Segura and C. F. Hawkins, J. Segura and C. F. Hawkins, CMOS Electronics, How It Works, CMOS Electronics, How It Works, How It FailsHow It Fails, New York: IEEE Press, 2004., New York: IEEE Press, 2004.

N. H. E. Weste and D. Harris, N. H. E. Weste and D. Harris, CMOS VLSI Design, Third EditionCMOS VLSI Design, Third Edition, , Reading, Massachusetts: Addison-Wesley, 2005.Reading, Massachusetts: Addison-Wesley, 2005.

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Damu, 2008EGE535 Spring 08, Lecture 11 EGE535 Low Power VLSI Design EGE535 Low Power VLSI Design Damu Radhakrishnan Dept of Electrical and Computer Engineering