Analog VLSI Neural Circuits

CS599 – computational architectures in biological

vision

Charge-Coupled Devices Uniform array of sensors Very little on-board processing Very inexpensive

CMOS devices More onboard processing Even cheaper!

Example: ICM532B from www.ic-media.com: single-chip solution includes photoreceptor array, various gain control and color adjustment mechanisms, image compression and USB interface. Just add a lens and provide power!

The challenge Digital processing is power hungry

Analog processing is much more energy efficient

But … so much variability in the gain of transistors obtained when fabricating highly integrated (VLSI) chips that analog computations seem impossible:

nearly each analog amplifier on the chip should be associated with control pins, analog memories, etc to correct for fabrication variability.

Hopeless situation?

A VLSI MOS transistor

An analog chip layout: the wish

An actual chip: the cold reality

Biological motivation Well, there is also a lot of variability in size

and shape of neurons from a same class

But the brain still manages to produce somewhat accurate computations

What’s the trick? online adaptability to counteract morphological and electrical mismatches among elementary components.

Remember? Electron Micrograph of a Real Neuron

Mahowald & Mead’s Silicon Retina Smoothing network: allows system to adapt to various light levels.

Andreou and Boahen's silicon retina

See http://www.iee.et.tu-dresden.de/iee/eb/ analog/papers/mirror/visionchips/vision_chips/

andreou_retina.html

Diffusive network

dQn/dt is the current supplied by the network to node n, and D is the diffusion constant of the network, which depends on the transistor parameters, and the voltage Vc.

Full network Two layers of the diffusive network: upper

corresponds to horizontal cells in retina and lower to cones. Horizontal N-channel transistors model chemical synapses.

The function of the network can be approximated by the biharmonic equation

where g and h are proportional to the diffusivity of the upper and lower smoothing layers, respectively.

Full network

VLSI sensor with retinal organization

Carver Mead: the floating gate

www.cs.washington.edu/homes/hsud/fg_workshop.html

Spatial layout

Electron tunneling

Electron tunneling

Hot electron injection

Hot electron injection

Spatial layout

A learning synapse circuit