Advance Electronic Circuit

A. Kruger Lecture 9-15-1Advanced Electronic Circuits 55:036 The University of Iowa, 2009

55:195 Advanced Electronic Circuits

Lecture 9-15

Switching Regulators

Material: Lecture Notes & Handouts


Why Study Power Supplies?

Electronic Design 01/4/10 page 33.


Why Study Power Supplies?

We will look at this


Switching Power Supplies

Primary switching power supplies

Convert line (120/240 VAC) to DC

Switchers, SMPS, medical switchers, etc.

Efficient

Small

Uses smaller transformer, inexpensive compared

to a non-switching power supply with the same power-handling capability

Cell-phone chargers, laptop power supplies, medical equipment, etc.

Secondary switching power supplies

Convert DC to DC

Also called DC/DC converters


Linear Power Supply

Bulky, expensive transformer

Linear regulator, often

dissipates significant power

and need expensive heat

sinks.

Ripple voltage isfC

IV L

pp2

Where f is the line frequency (50/60 Hz)

Thus for good pre regulation, need large

C (bulky, $$$)

LI


Switch Mode Power Supply

The rest of the circuit

can tolerate significant

ripple, so C can be small

Chop DC at 50

kHz – 1 MHz

Recall the universal

transformer equationfNaB

fNaBE

peak

rms 44.42

2

High frequencies require smaller transformers

Ripple voltage isfC

IV L

pp2

High frequencies require small C


DC/DC Converter

Linear Regulator Switching Regulator


Switching Regulator Topologies

Buck Boost

Buck-Boost

IO DVV IO VD

V1

1

IO VD

DV

1

Note that the average output

voltage is essentially independent

from the value of L and C


Buck Converter

ONS

S

ON

OFFON

ON tfT

t

tt

tD

What factors affects efficiency?


With switched closed, voltage cross the inductor is VI - Vo – VSAT and the

current though the inductor increases linearly. After tON, the inductor

current has increased byON

sattIoL t

L

VVVi

Assume output and input voltages are constant. VSAT is the voltage across the (BJT/FET) switch when

closed, and VD is the voltage cross the diode when conducting.

When the switch opens, current cannot change instantaneously, voltage

across inductor reverses, and cathode swings to below ground. The

voltage across the inductor is Vo+VD and the current decreases linearly as

the magnetic field collapses. After tOFF, the current has decreased by

OFFDo

L tL

VVi

In the steady state, the increase during tON should balance the decrease during tOFF , so that

OFFONSAT t

L

VVt

L

VVV DoIo

Solving for Vo and recognizing that tON + tOFF = 1/f and that D = tON + tOFF is the duty cycle D, then

IDIo DVVDVVDV 1SATNote that this is independent of the load current, L, and C

Switch

Close

Switch

Open


Buck DC/DC Converter

Called continuous conduction mode (CCM),

where the inductor current never goes to zero

In the CCM, output voltage is independent of

the load current


Buck Regulator: Discontinuous Mode

This is called discontinuous conduction mode

(DCCM)

ONsattIo

L tL

VVVi OFF

DoL t

L

VVi

When load current drops, the output voltage

stays constant, and ΔiL stays the same.

When the load current falls below a critical

value Iomin the inductor goes to zero during a

cycle.

i

ooomin

V

VV

L

TI 1

2

In DCCM, more energy is stored than

extracted in each cycle and the output voltage

rises (and some of our assumptions thus far

are not valid…)

The controller will reduce D to keep Vo fixed


Buck Switching Regulator

Only valid for CCMIO DVV

When the converter goes into

DCCM, output voltage rises and

controller reduced duty cycle to

keep voltages fixed


Buck Ripple Voltage

Capacitor smoothes output voltage. The capacitor charge current is IL – Io. The

charge applied and removed during one cycle corresponds to the hatched area

(remember Q = I t) The change in capacitor voltage is thus

LL

o IC

TItt

CC

QV

82222

11 OFFON

Note: both ΔIL and ΔVo are peak-to-peak values.


Buck Ripple Voltage

LL

o IC

TItt

CC

QV

82222

11 OFFON

However, the capacitor has an ESR, that also contributes to the ripple voltage.

The voltage across the ESR is

Note that the voltage is not in phase with the voltage across the capacitor:

CESR iESRv

ESR

oESRr VjvV


Buck Capacitor Selection

LL

o IC

TItt

CC

QV

82222

11 OFFON

Both capacitance and ESR contribute to ripple voltage.

CESR iESRv

ESR

oESRr VjvV

Capacitor dissipates (ESR) I 2C(rms) and must be able to handle this

Capacitor must be able to handle ripple current ΔILGood capacitor must can cost $$$


Buck Coil Selection

Continuous Mode Discontinuous Mode

2

2

1LL Liw

LS

IOO

if

VVVL

)/1(

LL Ii 2.0

Suggested Design Equation

Coil must handle IP without

saturating the core.


Efficiency

If all the components are lossless:

ESR = 0

VD = 0

ESL = 0

Switch resistance = 0

Then the buck DC/DC converter can provide 100% conversion

disso

o

PP

Pooo IVP

controllercapcoilDSWdiss PPPPPP


Efficiency

disso

o

PP

Pooo IVP

controllercapcoilDSWdiss PPPPPP

SWSWSWSWSATD tivIVP 2 2

)(rmsCcap IESRP

)(2

)( fPIRP corermsLcoilcoil

RRFRsavgFDD tIVfIVP )(

Conduction loss Switching loss


Buck Coil Selection

Continuous Mode Discontinuous Mode

2

2

1LL Liw

LS

IOO

if

VVVL

)/1(

LL Ii 2.0

Suggested Design

Equation


Coil Selection

Coil must carry some rms

current IL to feed the load

Discontinuous Mode

OL II

O

I

OL I

V

VI 1

O

I

OL I

V

VI

Buck

Buck-boost

Boost

Coil must handle IP without

saturating the core.


Switching Regulator: Controller

Both Pulse Frequency Modulation and Pulse Width Modulation (PWM) can

be used for control.

Most commercial ICs use PWM control with fs between 10 kHz and 1 MHz

Two-types of control: voltage and current-mode control


Voltage Mode PWM Control

Voltage Mode Control Waveforms

Comparator

Sawtooth generator running at fS

Question: what type of feedback? How does it

affect the output resistance?


Voltage Mode PWM Control

Voltage Mode Control Waveforms

Comparator

Sawtooth generator running at fS


Error Amplifier in CCM Voltage Control

Assume changes in

output voltage is much

slower than fs

Equivalent for buck

converter operating in

CCM with voltage control

Model as a linear system

Will analyze later


Gated Oscillator Converter

Reference

Oscillator, fixed

duty cycle

Switch

Uncommitted

op-amp

Comparator



Comparator with hysteresis ~ 10 mV

Non-linear element non-linear feedback

More stable feedback, more efficient converter



Very low supply current – oscillator switched only when needed, when FB drops

below reference

Adaptive base drive to make sure switch is not overdriven improve efficiency

Hysteresis ensures loop stability without complex compensation networks

D Duty cycle optimized for circuits where Vin and Vout differ by factor D

Can be uses to terminate switch

cycle prematurely Comparator with hysteresis ~ 10 mV


LT1173 DC/DC Converter

Switch frequency ~ 24 kHz, duty cycle ~ 50%

1 A internal switch

Comparator with ~ 5 mV hysteresis

Uncommitted op-amp

100 μA in standby mode

Step-up or step down

Supply 2.0 – 30 V

50% Duty cycle


Wiring as a buck

regulator


L

CD

VI

Vo


L

CD

R2

R1

VI

Vo


L

CD

R2

R1

Choose either R2 or R1, solve for other one. Choose a

value > 50K

VI

Vo


L

CD

R2

R1


value > 50K

VI

Vo


L

CD

C1

R2

R1


value > 50K

VI

Vo


L

CD

C1C2

R2

R1

L1


value > 50K

VI

Vo


L

CD

C1C2

R2

R1

L1


value > 50K

VI

Vo

C = Low ESR

D = Schottky

L = No saturation


L

C

D

C1C2

R2

R1

L1


value > 50K

VI

Vo

C = Low ESR

D = Schottky

L = No saturation

Wiring as a boost

regulator


L

C

D

C1C2

R2

R1

L1VI

Vo


L

C

D

R2

R1

VI

Vo

Increasing Output Drive

Buck Regulator

What if this switch

can not handle the

peak and rms

currents?


L

C

D

R2

R1

VI

Vo

Increasing Output Drive, Take 1

Add external power

transistor to make

this a Darlington

Transistor


L

C

D

R2

R1

VI

Vo



L

C

D

R2

R1

VI

Vo


Add external

“high-side “switch


L

C

D

R2

R1

VI

Vo



L

C

D

R2

R1

VI

Vo




A application notes for a particular chip often

contain a wealth of information




LT1173 DC/DC Converter



Assume changes in

output voltage is much

slower than fs

Equivalent for buck


CCM with voltage control

Model as a linear system



What is the gain of Mod ?

Io DVV

sm

I

c

o

V

V

v

V

sm

c

V

vD



Qj

j

V

V

V

VH z

sm

I

C

OCO

0

2

01

1

LCESRRQ

CESRLCz

)(

1

)(

11

coil

0

Note that L and C in loop create a complex pole pair, and ESR creates as zero.

Assume that the switching frequency is high enough so that PWM can be regarded as a

continuous process over range of (load) frequencies.

Purpose of EA is to provide good regulation and good phase margin to ensure stability.

Equivalent for buck


CCM with voltage

control

One can show that the control-to-output transfer function is (this assumes RL >> ESR,

normally a very good assumption)



Purpose of EA is

to provide good

regulation and

good phase

margin to ensure

stability.

435

21

11)(

11

jjj

jj

V

VH

O

CEA

22

5

14

4

33

3

32

2

24

1

11111

CRCRCRCRCR2312 RRCCWith then


Switching Regulator

435

21

11)(

11

jjj

jj

V

VH

O

CEA

Qj

j

V

V

V

VH z

sm

I

C

OCO

0

2

01

1

COEAHHTOverall loop gain:Qj

j

jjj

jj z

/)/()/(1

/1

11)(

11

0

2

0435

21



For fast response the crossover frequency fx should be as high as possible. A common

choice is fx ~ fs/5

COEAHHTOverall loop gain:Qj

j

jjj

jj z

/)/()/(1

/1

11)(

11

0

2

0435

21


Current-Mode Control

Pulse-by pulse current-limiting

Fast transient response


LT1070 Switching Regulator


LT1070 Switching Regulator

REFO VR

RV

1

21

Soft start: build up duty cycle

Boost configuration


Flyback Regulator

Triple-output flyback

regulator


Switched Capacitor Converters

Also called charge-pump converters

Flying capacitor converters

Generally used for low-power (~ 100 mA or less)



Non-overlapping switches

Basic Circuit “Flying Capacitor”

Switch frequency 10–100 kHz



Voltage Inverter

Step 1: Charge C1 to Vin

Step 2: All switches open

With proper

capacitors and

switches, the

inversion

efficiency can be

close to 100%

Step 3: Transfer charge


Voltage Doubler

Reverse biased =>

can remove from

circuit


Voltage Doubler

Note, only one set of switches are used. One can put the

other set of switches to generate other voltages


TC962 Charge Pump

Uncommitted Zener diode

Switches

Oscillator


TC962 Charge Pump

Uncommitted Zener diode

Switches

Oscillator


TC962 Charge Pump Oscillator

Charges the capacitors until V+

exceed VREF +VH/2 and the

comparator trips.

The square wave here has a

frequency that depend on the

charge/discharge currents and

capacitor

Discharges the capacitors until

V+ is less than VREF – VH/2 and

the comparator trips.



Lowers the frequency

Increases the frequency



Can supply one’s own

clock here


TC962 Charge Pump


ICL7662


More Circuits


More Circuits

Increase output current capacity

Noisy output

NOR gate helps synchronize

switching and reduce output

ripple noise


Switched Capacitor Building Block

)( 211 VVCfT

qs

Charge transferred each cycle

)1(

)(

1

21

Cf

VVI

s

1

eq

1

CfR

s

Rewriting

eq

21 )(

R

VVI

VCq 1

Charge transferred per unit time is I


Implementation

The switches are commonly implemented with FETs. While SC ideas have been

around for a long time, moderns IC manufacturing allows for commercially-viable

implementations.

The switched are not ideal and has an “on” resistance of a few Ohms


Performance

Note that the output is unregulated

Size & characteristics of capacitors?

Output voltage is a function of the load

Switched-capacitor inverter

Thevenin equivalent


Performance

2

1

142131

1)(2)(2 ESRC

CfESRCRRESRCRRR

pump

SWSWSWSWO

21

1

41

2 ESRCESRCCf

RRpump

SWO

20~RSW

kHz10,F1021 oscfCCExample ESR~RO 550

Pump frequency, and switch resistances depend on temperature and the supply voltage.

?OR

(sum of all switch resistances)


Performance

Segment A is the voltage drop across the ESR of C2 at the instant it goes from being charged by C1

(current flowing into C2) to being discharged through the load (current flowing out of C2). The

magnitude of this current change is 2IO, hence the total drop is 2IO ×ESRC2 .

2

2

22

1ESRC

CfIV

pump

ORIPPLE

To reduce ripple, increase pump frequency, increase C2 and reduce ESR of C2. ESR of C1 is less

important.

The assumption is that C1 and C2 can charge/discharge during a pump cycle. If they are too big, this

can contribute to the ripple as well.

Segment B is the voltage change across C2 during time t2, the half of the cycle when C2 supplies current

to the load. The drop at B is IOUT × t2/C2 . The peak-to-peak ripple voltage is the sum of these voltages


Switched-Capacitor Building Block

Assume CA and CB are initially uncharged. When the switch is thrown to (a), CA charges and attains a

charge CAVi. When the switch is thrown to (b) the capacitors are in parallel with value CT = CA+CB, and

charge CAVi on them, so the output voltage after the first cycle is

When the switch is returned to (a), CA again attains a charge CAVi. When the switch is thrown to (b), the

capacitors are in parallel and has a charge and output voltage after the second cycle:

One can see that the output voltage is a geometric series

or

The charge on CB after the first cycle is


Switched-Capacitor Building Block


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