A31G22x Internal Data Flash Memory Guide

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A31G22x Internal Data Flash Memory Guide

Application Note

Version 1.00

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Contents A31G22x Internal Data Flash Memory Guide

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Contents

1 Introduction .................................................................................................................................... 4

2 Data Flash Memory Features ........................................................................................................ 5

3 Data Flash Memory Structure ........................................................................................................ 6

4 Data Flash Memory Operations ..................................................................................................... 7

4.1 Read Operation ................................................................................................................... 7

4.1.1 Latency of Data Flash Memory .............................................................................. 7

4.1.2 Wait time for Flash Access Timing .......................................................................... 8

4.2 Write Protection for Assessing Flash Memory .................................................................... 9

4.3 Erase Operation ................................................................................................................ 11

4.3.1 Page Erase ........................................................................................................... 11

4.3.2 Sector Erase ......................................................................................................... 12

4.3.3 Full-Chip Erase ..................................................................................................... 13

4.4 Program Operation ............................................................................................................ 14

4.4.1 Word Program ...................................................................................................... 15

4.4.2 Byte Program ........................................................................................................ 16

4.5 Option Block Program/ Erase ............................................................................................ 17

4.6 Read Protection................................................................................................................. 17

5 How to use the Data Flash Memory Drivers ................................................................................ 18

5.1 Use of the Data Flash on the Project ................................................................................ 18

5.2 Example Descriptions ....................................................................................................... 23

5.2.1 512 Bytes Page / 1KB Sector / 4KB Sector Erase ............................................... 23

5.2.2 Chip Erase ............................................................................................................ 23

5.2.3 Byte Program ........................................................................................................ 23

5.2.4 Word Program ...................................................................................................... 23

5.2.5 Option Area Access .............................................................................................. 23

5.2.6 Flash Access Timing ............................................................................................. 23

6 References ................................................................................................................................... 24

Revision History .................................................................................................................................... 25

A31G22x Internal Data Flash Memory Guide List of Figures/ List of Tables

3

List of Figures

Figure 1. Data Flash Memory Map of A31G22x...................................................................................... 6

Figure 2. Flowchart of Data Flash Access Timing ................................................................................... 7

Figure 3. Write Protection Range of Each Bit of A31G22x ..................................................................... 9

Figure 4. Flowchart of Write Protection of Data Flash Memory ............................................................ 10

Figure 5. Flowchart of Page Erase of Data Flash Memory ................................................................... 11

Figure 6. Flowchart of Sector Erase of Data Flash Memory ................................................................. 12

Figure 7. Flowchart of Full Chip Erase of Data Flash Memory ............................................................. 13

Figure 8. Flowchart of Word Program of Data Flash Memory .............................................................. 15

Figure 9. Flowchart of Byte Program of Data Flash Memory ................................................................ 16

Figure 10. Option Block of Data Flash Memory .................................................................................... 17

Figure 11. Keil Project of A31G226 with Default Settings ..................................................................... 18

Figure 12. Example: Adding a Header File and Source Code of Data Flash Driver ............................. 19

Figure 13. Data Flash Test Code Source Code and Header File Settings ........................................... 20

Figure 14. Definition and Call for the TestCode_DFMC_Test() in main.c ............................................. 21

Figure 15. Example Settings of Memory Area in Target Option ............................................................ 22

Figure 16. Example Data Flash Test Code in User Code. .................................................................... 22

List of Tables

Table 1. Flash Memory Controller Features ............................................................................................ 5

Table 2. Wait-Time Setting Table of A31G22x Data Flash Memory ........................................................ 8

1. Introduction A31G22x Internal Data Flash Memory Guide

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1 Introduction

A31G22x series has Internal Data Flash Memory which is nonvolatile memory and stores user data.

Since it doesn’t require external EEPROM to store the user data, A31G22x series can effectively reduce

the cost to develop user solutions. All operations such as programming and deleting in the Internal Data

Flash Memory can be executed within all products’ operating voltage ranges.

This application note provides information of the memory structure and operation of A31G22x series.

In addition, various examples using API are used in this document to enable users to easily understand

and develop application prototypes quickly.

A31G22x Internal Data Flash Memory Guide 2. Data Flash Memory Features

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2 Data Flash Memory Features

The Data Flash Memory Controller of A31G22x series is an Internal Data Flash Memory Interface

Controller, and includes features listed below:

32KB Data Flash Memory

Wait, 0-wait to 6-wait (default : 5-wait)

Write Protection support with 1KB-unit

Read Protection support

A byte (8-bit) unit program and word (32-bit) unit program support

Endurance: 10,000 Cycles

Life time: 10 Years

Table 1. Flash Memory Controller Features

Item Description

Size 32KB

Start address 0x0E00_0000

End address 0x0E00_7FFF

Page size 512-byte

Total page count 64 pages

PGM unit Byte PGM: 1 Byte

Word PGM: 4 Bytes

Erase unit 512-byte Erase

1KB-byte Erase

4KB-byte Erase

Bulk (Chip) Erase

Option block User Option (3 pages)

Read Protection (1 page)

3. Data Flash Memory Structure A31G22x Internal Data Flash Memory Guide

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3 Data Flash Memory Structure

A31G226 has a memory structure which consists of Data Flash Memory Area and Option Block Area

as shown in Figure 1.

Data Flash Memory Area consists of 64 pages, with a total size of 32KB.

Option Block Area stores User Option Data, and can be applied with Read Protection.

1K

Sector 0

0x0E00 0000 0x0000 0000

0x0E00 0200

0x0E00 0400

0x0E00 0600

Page 0

Page 1

1K

Sector 1Page 2

Page 3

1K

Sector 2

0x0000 0400

Page 4

Page 5

1K

Sector 3Page 6

Page 7

0x0E00 0800

0x0E00 0A00

0x0E00 0C00

0x0E00 0E00

0x0E00 1000

4K

Sector 0

1K

Sector 28

0x0E00 7000

0x0E00 7200

0x0E00 7400

0x0E00 7600

Page 55

Page 57

1K

Sector 29Page 58

Page 59

1K

Sector 30Page 60

Page 61

1K

Sector 31Page 62

Page 63

0x0E00 7800

0x0E00 7A00

0x0E00 7C00

0x0E00 7E00

0x0E00 8000

4K

Sector 7

0x0000 0800

0x0000 0C00

0x0000 1000

0x0001 F000

0x0001 F400

0x0001 F800

0x0001 FC00

0x0002 0000

Data Flash

Area

Read Protection0x0E01 0000

User Option 20x0E01 6400



Option Block

Area

Figure 1. Data Flash Memory Map of A31G22x

A31G22x Internal Data Flash Memory Guide 4. Data Flash Memory Operations

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4 Data Flash Memory Operations

4.1 Read Operation

In each Data Flash Module, data can be read by specifying an address directly. Both Instruction Fetch

and Data Access are executed through the same AHB Bus.

4.1.1 Latency of Data Flash Memory

Before reading Data Flash Memory, users need to adjust the latency according to the clock speed of

system’s AHB Bus. Users can adjust the latency of A31G22x Data Flash Memory by setting the wait

time and configuring the Flash Access Timing.

Figure 2 shows the flowchart setting the Data Flash Access Timing.

START

DFMC_MR<ACODE> = 0x81


DFMC_CFG = 0x78580300

DFMC_MR = 0x0

END

Set data flash memory mode to AMBA mode

Set Wait time (3-wait, 4-cycles) with WAITKEY value (0x7858)

Release AMBA mode of data flash memory

Figure 2. Flowchart of Data Flash Access Timing

4. Data Flash Memory Operations A31G22x Internal Data Flash Memory Guide

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4.1.2 Wait time for Flash Access Timing

System Core Clock set in the system operates with APB Bus Clock, and configures WAITTIME[10:8] in

the DFMC_CFG register. The wait time ranges from 0 to 5, and each time the number increases by one,

the set time to wait per 1 cycle is added to the Flash Access Timing.

Read Access Speed (MHz) = APB Speed (Hz)/(1-cycle + Wait-time) <= 20MHz

Read Access Timing (s) = 1/{APB Speed time/(1-cycle + Wait-time)} <= 50ns

To operate user application with optimized performance, proper Access Timing of the Data Flash

Memory is required.

Table 2 shows the wait time settings of Data Flash Memory.

Table 2. Wait-Time Setting Table of A31G22x Data Flash Memory

APB speed

(HCLK)

Wait-time Access freq. Access time Recommended

access time of

data flash area

Recommended

access time of

user option area

48MHz 5 (6-cycles) 8.0MHz 125.0ns 50ns 100ns












500KHz 5 (6-cycles) 83.3KHz 12.0us 50ns 100ns




500KHz 1 (2-cycles) 250KHz 4.0us 50ns 100ns

500KHz 0 (1-cycles) 500KHz 2.0us 50ns 100ns


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4.2 Write Protection for Assessing Flash Memory

MCU has a function to protect Flash Code from corruption which is due to the external noise or

unexpected event while processing user code. In the area where this Write Protection is applied, data

cannot be written nor erased. Therefore, the Write Protection must be deactivated in the area to be

updated.

The Write Protection is set by configuring the DFMC_WPROT (0x4000_0234) register. Each bit of the

register sets the range of the Code Flash to which the Write Protection is applied.

Figure 3 shows the Write Protection range.

A31G22x applies the Write Protection to each segment unit of 1KB in Data Flash Memory.

Bit

31

Bit

30...

Bit

1

Bit

0

Write Protection Region [31] = 1


0x0E007FFF

0x0E007C00



...

0x0E007BFF

0x0E007800

0x0E0003FF

0x0E000000

0x0E0007FF

0x0E000400

Protected Area

from Write/Erase Access

Write/Erase Accessible Area

Figure 3. Write Protection Range of Each Bit of A31G22x


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The Write Protection can be applied to the Data Flash Memory by following the procedure shown in

Figure 4.

START



DFMC_WPROT = 0x0000FFFF

DFMC_MR = 0x0

END

Set data flash memory mode to PROT mode

Enable Write Protection

0x0E000000 ~ 0x0E003FFF (16KB)

Release PROT mode of data flash memory

Figure 4. Flowchart of Write Protection of Data Flash Memory


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4.3 Erase Operation

A31G22x can perform a delete operation for each page or a sector of the Data Flash Memory. In

addition, it can delete the entire data of the Data Flash Memory at once. The area where data was

deleted is initialized to have ‘0xFF’.

4.3.1 Page Erase

A Page Erase deletes data of 512Bytes in the Data Flash Memory at once. Figure 5 shows the flowchart

executing the Page Erase.

START

Disable Write Protection

DFMC_MR<ACODE> = 0x5A

DFMC_MR<ACODE> = 0xA5

DFMC_CR<PMODE> = 1


Set data flash memory mode to FLASH mode

Set PMODE bit to 1

DFMC_CR<ERS> = 1 Set ERS bit to 1

DFMC_AR = ADDRESS Specify the address of data flash memory to be deleted.

DFMC_CR<WADCK> = 1 Set WADCK bit to 1

DFMC_CR<HVEN> = 1 Set HVEN bit to 1

WRBUSY bit in

DFMC_BUSY = 1

DFMC_CR = 0x0 Clear the values to 0 of DFMC Control Register.

DFMC_MR = 0x0 Release FLASH mode of data flash memory

END

Yes

No

Figure 5. Flowchart of Page Erase of Data Flash Memory


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4.3.2 Sector Erase

A Sector Erase deletes data of 1KB or 4KB in the Data Flash Memory at once. Figure 6 shows the

flowchart executing the Sector Erase.

START




DFMC_CR<PMODE> = 1



Set PMODE bit to 1


DFMC_AR = ADDRESS Specify the address of data flash memory to be deleted.



WRBUSY bit in

DFMC_BUSY = 1



END

Yes

No

DFMC_CR<SECT1K> = 1

or

DFMC_CR<SECT4K> = 1

Set SECT1K bit to 1 (for 1KB-unit sector erase)

Or

Set SECT4K bit to 1 (for 4KB-unit sector erase)

Figure 6. Flowchart of Sector Erase of Data Flash Memory


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4.3.3 Full-Chip Erase

A Full-Chip Erase deletes entire data in the Data Flash Memory at once. When the Full-Chip Erase

completes the operation, the <CERSD> bit of the DFMC_RPROT(0x4000_023C) register is set as ‘1’

to inform that the Full-Chip Erase was applied. Figure 7 shows the flowchart executing the Full-Chip

Erase.

START




DFMC_CR<PMODE> = 1



Set PMODE bit to 1




WRBUSY bit in

DFMC_BUSY = 1



END

Yes

No

DFMC_CR<MAS> = 1 Set MAS bit to 1 for Full-Chip Erase

Figure 7. Flowchart of Full Chip Erase of Data Flash Memory


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4.4 Program Operation

Data Flash Memory of A31G22x can be programmed in Byte (1Byte) or Word (4Bytes) units. Before

programming in the Data Flash Memory, users must perform the Erase to initialize the area to be

programmed or updated to have ‘0xFF’.


15

4.4.1 Word Program

Using a Word Program, a user can program 4Bytes of data to the address the user specifies. Figure 8

shows the flowchart executing the Word Program.

START




DFMC_CR<PMODE> = 1



Set PMODE bit to 1

DFMC_CR<PGM> = 1 Set PGM bit to 1

DFMC_AR = ADDRESS Specify the address of data flash memory to be Programmed.

DFMC_CR<WADCK> = 1

Set HVEN bit to 1

DFMC_CR<HVEN> = 1

Wait until the WRBUSY flag bit is cleared.

WRBUSY bit in

DFMC_BUSY = 1



END

No

DFMC_CR<WORDPGM> = 1 Set WORDPGM bit to 1 for Word PROGRAM

DFMC_DR = Data

Set WADCK bit to 1

DFMC_CR<WADCK> = 0 Clear WADCK bit to 0

DFMC_CR<HVEN> = 0 Clear HVEN bit to 0

Update word (4 Bytes) data to DFMC_DR register to be PROGRAM.

Yes

Figure 8. Flowchart of Word Program of Data Flash Memory


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4.4.2 Byte Program

Using a Byte Program, a user can program 1Byte of data to the address the user specifies. Figure 9

shows the flowchart executing the Byte Program.

START




DFMC_CR<PMODE> = 1



Set PMODE bit to 1

DFMC_CR<BYTEPGM> = 1 Set BYTEPGM bit to 1

DFMC_AR = ADDRESS Specify the address of data flash memory to be Programmed.


DFMC_CR<HVEN> = 1

Wait until the WRBUSY flag bit is cleared.

WRBUSY bit in

DFMC_BUSY = 1



END

No

DFMC_CR<PGM> = 1 Set PGM bit to 1

DFMC_DR = Data

DFMC_CR<WADCK> = 0 Clear WADCK bit to 0

DFMC_CR<HVEN> = 0 Clear HVEN bit to 0

Update Bytes data to DFMC_DR register to be PROGRAM.

Yes

Set HVEN bit to 1

Figure 9. Flowchart of Byte Program of Data Flash Memory


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4.5 Option Block Program/ Erase

Option Block Area in Data Flash Memory has four Option Pages to use for System Configuration and

Read Protection.

If the DFMC_CR<IFEN> bit is set to ‘1’, each Option Page is accessible to Erase/ Program. If the

DFMC_CR<RPAEN> bit is set to ‘1’, the area protected by the Read Protection is accessible to Erase/

Program.

Read Protection0x0E01 0000

Option 20x0E01 6400

Option 10x0E01 6200

Option 00x0E01 6000

DFMC_CR<RPAEN> = 1

DFMC_CR<IFEN> = 1

Figure 10. Option Block of Data Flash Memory

4.6 Read Protection

A31G22x provides three methods to set the Read Protection in the Data Flash Memory as listed below:

1. In the Read Protection Option Area, access to the DFMC_RPROT register and update

corresponding code which configures the Read Protection in the form of OTP Command.

When the update process of the code in the form of OTP Command is completed, if a user

resets the system, BootROM code is executed at the initial stage of the booting process and

the updated Read Protection is executed.

2. Access to the Read Protection register directly and set the DFMC_RPROT<RPROT> to Level-

1. This applies the Read Protection immediately. By using this method, however, the Read

Protection is enabled temporarily and disabled after the system reset.

3. If the Read Protection is enabled in the Code Flash Memory, it is applied to the Data Flash

Memory too. To disable the Read Protection in this condition, the password match in the Code

Flash Memory or elimination of Read Protection OTP area is required. If the Read Protection

is enabled in the Code Flash Memory and the Data Flash Memory respectively, it needs to be

disabled in each area respectively.

5. How to use the Data Flash Memory Drivers A31G22x Internal Data Flash Memory Guide

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5 How to use the Data Flash Memory Drivers

In this chapter, we introduce methods to use Data Flash Memory in Keil Compiler Environment.

A31G226 provides drivers and example codes for Data Flash features in the Example Code folder.

5.1 Use of the Data Flash on the Project

1. After creating a Keil project, load a start up file of a device (*.s), device’s driver files and a

system file (system_DEVICE.c), and user main code. (Refer to Quick Start Guide).

Example Code A31G22x\Example\DFMC_Test\Keil\DFMC_Test.uvprojx

Figure 11 shows an example project of DFMC_Test running through the above path in the Keil

environment.

Figure 11. Keil Project of A31G226 with Default Settings

A31G22x Internal Data Flash Memory Guide 5. How to use the Data Flash Memory Drivers

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2. HAL Driver of Data Flash Memory is located in the following path:

Driver header : Example Code A31G22x\Drivers\Include\A31G22x_hal_dfmc.h

Driver source : Example Code A31G22x\Drivers\Source\A31G22x_hal_dfmc.c

Click right on the Project > Drivers group to select Add Existing Files to Group … menu. This

adds A31G226_hal_drivers.c source code to the place where Driver is located. Select Driver

Include Path as a header file in Target > C/C++ > Include path.

Figure 12. Example: Adding a Header File and Source Code of Data Flash Driver


20

3. Example code of Data Flash Memory is located in the following path:

Example Code A31G22x\TestCode\Include\DFMC\TestCode_DFMC_Test.h

Example Code A31G22x\TestCode\Source\DFMC\ TestCode_DFMC_Test.c

Click right on the Project > TestCode group to select Add Existing Files to Group … menu.

This selects Test Code source code.

Figure 13. Data Flash Test Code Source Code and Header File Settings


21

4. Define the external function TestCode_DFMC_Test() and call the function

TestCode_DFMC_Test() in the main.c.

Figure 14. Definition and Call for the TestCode_DFMC_Test() in main.c


22

5. Target ROM and RAM of a project are configured as shown in Figure 15.

Figure 15. Example Settings of Memory Area in Target Option

6. Write the example code in the user code using the DFMC Test. Then build and download the

user code to the target device. Finally, check the result on a terminal or a debugger window.

Figure 16. Example Data Flash Test Code in User Code.


23

5.2 Example Descriptions

5.2.1 512 Bytes Page / 1KB Sector / 4KB Sector Erase

It divides test area in Data Flash Memory into 512 Bytes, 1KB, or 4KB to verify that data in the test area

was deleted. Then the verification result is output.

5.2.2 Chip Erase

It deletes entire data in Data Flash Memory.

5.2.3 Byte Program

It performs the Page Erase on the test area, then programs the test area of 128Bytes in Byte units.

Finally, it outputs the result.

5.2.4 Word Program

It performs the Page Erase on the test area, then programs the test area of 512Bytes in Word units.

Finally, it outputs the result.

5.2.5 Option Area Access

It performs the Erase or Program on the Option Area, then processes the contents of test area. Finally,

it outputs the result.

5.2.6 Flash Access Timing

It calculates and outputs the speed of Flash Access under the condition that Data Flash Memory’s wait

time is set based on the current system clock.

6. References A31G22x Internal Data Flash Memory Guide

24

6 References

A31G22x User’s Manual

A31G22x Datasheet

A31G22x Internal Data Flash Memory Guide Revision History

25

Revision History

Version Date Description

1.00 20.09.02 Initial preliminary version created

Important Notice A31G22x Internal Data Flash Memory Guide

26

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A31G22x Internal Data Flash Memory Guide