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Flash MemoryFlash Memory
Points of DiscussionPoints of Discussion Flash Memory GeneralitiesFlash Memory Generalities
Construction & PropertiesConstruction & Properties
History of Flash MemoryHistory of Flash Memory NOR & NAND ArchitecturesNOR & NAND Architectures OptimizationsOptimizations StandardizationStandardization New Developments & Future of FlashNew Developments & Future of Flash Closing StatementsClosing Statements
Flash MemoryFlash Memory
A type of EEPROM (Electrically-Erasable A type of EEPROM (Electrically-Erasable Programmable Read-Only Memory)Programmable Read-Only Memory)
Non-volatile, solid state technologyNon-volatile, solid state technology Relatively limited lifespanRelatively limited lifespan Information is stored in an array of Information is stored in an array of
memory cells made from floating-gate memory cells made from floating-gate (FG) transistors(FG) transistors
Flash MemoryFlash Memory
Packaged inside a memory card:Packaged inside a memory card: Extremely durableExtremely durable Can withstand intense pressureCan withstand intense pressure Immersion in waterImmersion in water
Better kinetic shock resistance than hard Better kinetic shock resistance than hard disksdisks
Average power requirements range from Average power requirements range from 5V-12V5V-12V
Flash Memory CellFlash Memory Cell
History of Flash MemoryHistory of Flash Memory
Invented by Fujio Masuoka while he was Invented by Fujio Masuoka while he was working for Toshiba in the early 1980s working for Toshiba in the early 1980s
First introduced at the 1984 International First introduced at the 1984 International Electron Devices Meeting in San Electron Devices Meeting in San Francisco Francisco
Manufacturers of FlashManufacturers of Flash
NOR Flash MemoryNOR Flash Memory
Developed to replace read only memoryDeveloped to replace read only memory Full address and data buses allow random Full address and data buses allow random
access to any memory locationaccess to any memory location Can access any memory cellCan access any memory cell Slow sequential accessSlow sequential access
NAND Flash MemoryNAND Flash Memory
Developed to replace hard disks Sequential-accessed command and data
registers replace the external bus of NOR Decreases chip real estateDecreases chip real estate Can only access pagesCan only access pages Faster sequential accessFaster sequential access
OptimizationsOptimizations
Wear levellingWear levelling Counting writes & dynamically remapping Counting writes & dynamically remapping
blocksblocks
Bad block managementBad block management Write verification and remapping bad sectorsWrite verification and remapping bad sectors
Multi-Level Cell technologyMulti-Level Cell technology Memory cells store more than one bitMemory cells store more than one bit
StandardizationStandardization
Part of the reason for the success of Flash Part of the reason for the success of Flash memorymemory
Open NAND Flash Interface Working Open NAND Flash Interface Working Group developed standard low-level Group developed standard low-level interfaceinterface Standard pinoutStandard pinout Standard command set for reading, writing, Standard command set for reading, writing,
and erasing NAND flash chips and erasing NAND flash chips Mechanism for self-identification Mechanism for self-identification
New DevelopmentsNew Developments AND FlashAND Flash
Bit line replaced with embedded diffusion line Bit line replaced with embedded diffusion line to reduce cell sizeto reduce cell size
Low power dissipation (3V)Low power dissipation (3V)
DINOR (DIvided bit-line NOR) FlashDINOR (DIvided bit-line NOR) Flash Attempts to reduce the chip real estate Attempts to reduce the chip real estate
compared to conventional NORcompared to conventional NOR Low power dissipation (3V), sector erase, Low power dissipation (3V), sector erase,
high data transfer ratehigh data transfer rate
Future of Flash MemoryFuture of Flash Memory
Continues to be among the most Continues to be among the most aggressively scaled electronic aggressively scaled electronic technologiestechnologies
Memory cell size minimum of 20 nm Memory cell size minimum of 20 nm expected to be met in 2010expected to be met in 2010
May be replaced by Phase-Change RAM May be replaced by Phase-Change RAM or other emerging technologiesor other emerging technologies
In Closing…In Closing…
One of the most popular alternatives for One of the most popular alternatives for portable device storageportable device storage
Aggressive advances are still being madeAggressive advances are still being made
ReferencesReferencesWikipedia - Flash MemoryWikipedia - Flash Memory
How Stuff Works - Flash How Stuff Works - Flash MemoryMemory
http://smithsonianchips.si.eduhttp://smithsonianchips.si.edu
Questions?Questions?