1 2. 2 Other Reconfigurable and Morphable Hardware 2.1. Reconfigurable hardware (switch-based). Devices, SW Tools, Potential for EHW 2.2. Field Programmable

1

2. 2 Other Reconfigurable and Morphable Hardware

2.1. Reconfigurable hardware (switch-based). Devices, SW Tools, Potential for EHW

2.2. Field Programmable Gate Arrays (FPGA) – Xilinx examples2.3. Field Programmable Analog Arrays (FPAA) – Anadigm Examples2.4. Field Programmable Transistor Arrays (FPTA) – JPL examples2.5. Reconfigurable antennas2.6. Other reconfigurable structures2.7. Speed of reconfiguration, partial reconfiguration, context-switching2.8. Morphable hardware (no switches). Fine changes and tuning.2.9. Morphable Materials and devices 2.10. Polymorphic circuits

2

DEvAn System: Antenna

DEvAn Reconfigurable antenna based on EvAn’s grid antenna• Same layout except that its perimeter is closed with switches• 48 switches vs EvAn’s 30• ~1/5 scale of EvAn antenna

EvAn DEvAn

3

Reconfigurable Antennas

Reconfigurable grid antenna

48 Reed relay switches

13.2 cm x 10.5 cm overall size

2.1 cm cell size

SMA coaxial cable connection for RF signal

Coaxial control lines feeds control coils

Control lines are roughly perpendicular to plane of antenna to limit interference

4

ConfigurationsB roadside 45 deg ang le

E ndfire B arrie r

3 Orientations

• Broadside (plane of antenna |_ to signal)

• 45 deg

• Endfire (plane of antenna // to signal)

Barrier configurations

(placed before optimization begins)

• Solid metal (Al) sheet

Polarization is vertical for all tests

5

2. Reconfigurable and Morphable Hardware


2.2. Field Programmable Gate Arrays (FPGA) – Xilinx examples

2.3. Field Programmable Analog Arrays (FPAA) – Anadigm Examples

2.4. Field Programmable Transistor Arrays (FPTA) – JPL examples

2.5. Reconfigurable antennas

2.6. Other reconfigurable structures

2.7. Context-switching, speed of change, latency issues

2.8. Morphable hardware (no switches). Fine changes and tuning.

2.9. Morphable Materials and devices

2.10. Polymorphic circuits

6

Evolvable Femtosecond Laser System - Higuchi

Advantages: 1. Autonomous Adjustment 2. Portable Size 3. Ultrashort pulse (~10-15sec)

Especially Suitable for 1. Laser Processing for Diamonds and Shape-memory-alloy 2. Medical Treatment (e.g. macula, depilation)

Laser alignment can be optimized autonomouslyby genetic algorithms to obtain the maximum output

7

Deformable Mirror

Higuchi

DeformableMirror

Laser beam

8

V 1 V 2 V 3 V 4 V 5 V 6 V 7V b

M ir r o r面

( A c t u a t o r s )コントロール電極

基板

29

23 24 25 26

12

3 4

5

67

8

9

10 11 12

13

14

15

161718

19

20

21

22 27

28

30

31

32333435

36

37

Channels 　 37

http://www.okotech.com/

Deformable Mirror control

Higuchi

9

Example of application of adaptive optics systems

• The Real Time Computer (RTC) is a key component of an adaptive optics system. In the Nasmyth Adaptive Optics System (NAOS) for the ESO VLT, the RTC will control the 185 actuators of the corrective optics from the 144 wavefront sensor subapertures at a maximum frequency of 500 Hz. The RTC hardware architecture is fully reconfigurable to switch between the two NAOS wavefront sensors. The software includes an on-line control optimization allowing the use in a broad magnitude range (up to = 18). This RTC is designed to be easily upgraded for Laser Guide Star.

• NAOS is the adaptive optics system to be installed at one of the Nasmyth foci of the VLT to provide the near IR spectro imager (CONICA) with a compensation of the atmospheric turbulence effects on astronomical images. Incoming wavefronts are corrected by a 185 piezo-stack deformable mirror associated with a tip-tilt mirror. Output wavefront sensing is achieved by means of 2 Shack-Hartmann type sensors, working respectively at visible and IR wavelengths.

• NAOS Real-Time Computer for Optimized Closed Loop and On-Line Performance Estimation. D. Rabaud1, F. Chazallet2, G. Rousset3, C. Amra4, B. Argast5, J. Montri6, P.-Y. Madec7, R. Arsenault8, N. Hubin9, J. Charton10, G. Dumont11

• http://adass.org/adass/proceedings/adass99/P2-04/

10

Nanoscale Arrays

• “Advances in our basic scientific understanding at the molecular and atomic level place us on the verge of engineering designer structures with key features at the single nanometer scale. This offers us the opportunity to design computing systems at what may be the ultimate limits on device size. At this scale, we are faced with new challenges and a new cost structure which motivates different computing architectures than we found efficient and appropriate in conventional VLSI. We sketch a basic architecture for nanoscale electronics based on carbon nanotubes, silicon nanowires, and nano-scale FETs. This architecture can provide universal logic functionality with all logic and signal restoration operating at the nanoscale. The key properties of this architecture are its minimalism, defect tolerance, and compatibility with emerging, bottom-up, nanoscale fabrication techniques. The architecture further supports micro-to-nanoscale interfacing for communication with conventional integrated circuits and bootstrap loading. “

• Array-Based Architecture for FET-Based, Nanoscale Electronics André DeHon (Caltech)in IEEE Transactions on Nanotechnology, Volume

2, Number 1, Pages 23--32, Mar 2003.

http://www.cs.caltech.edu/~andre/

http://www.cs.caltech.edu/~andre/

11



2.2. Field Programmable Gate Arrays (FPGA) – Xilinx examples

2.3. Field Programmable Analog Arrays (FPAA) – Anadigm Examples

2.4. Field Programmable Transistor Arrays (FPTA) – JPL examples

2.5. Reconfigurable antennas

2.6. Other reconfigurable structures

2.7.Speed of reconfiguration: partial configuration and context-switching

2.8. Morphable hardware (no switches). Fine changes and tuning.

2.9. Morphable Materials and devices

2.10. Polymorphic circuits

12

Speed of reconfiguration: partial configuration and context-switching

Faster reconfiguration means fast changes between optimal processing architectures. Techniques:

• Partial configuration. Selective access to configuration memory. The speed of dynamic reconfiguration is directly proportional to the number of configuration memory locations which need to be changed in order to implement the desired dynamic design modification.

• Multiple-context configuration memory. Maps successive configurations in multiple contexts of the configuration memory. The dynamic reconfiguration is performed by swapping a selected inactive configuration memory context into the active context. The configuration in the active context controls the programmable switches on the dynamically reconfigurable device. This "context swap" can be performed quickly across the entire configurable array so these devices have the shortest dynamic configuration times. The multiple-context configuration memory, however, can occupy large silicon area.

• Context switching FPGA (S. Scalera, Lockheed Sanders)

13

Controlling it from the inside

• Another way of speeding reconfiguration and ensuring in fact self-configuration is having the reconfiguration mechanism/processor inside the chip.

• Integration of a processor and Reconfigurable Computing Array (now in Virtex II Pro)

• Cells controls other cells

• Development, embryonics

14




15

Morphable hardware (no switches). Fine changes and tuning

Function changes without switches can come from changing biases on device. In a circuit, signal values in certain ranges can cause a dramatic functional change; most often it keeps function and only changes its parametric operation: for example VCOs or various gain-control schemes. In these cases a fine tuning is possible by changing for example a bias current. In more dramatic cases the function can radically change. For example at a change of a controlling parameter the same circuit (with no switches) behaves as an NAND or as a NOR.

16




17

Magnetic Shape Memories• AdaptaMat Ltd. has initiated new technology based on Magnetic Shape Memory (MSM) materials.

Those materials develop large strokes at high frequencies and high power, and they are expected to greatly simplify electromechanical devices. AdaptaMat Ltd. is the first company in the world dedicated to MSM materials and products.

• In early 1990's, Dr. Kari Ullakko invented a new way to produce motion by a magnetic field. Certain materials were found to have a specific microstructure and magnetic properties, which cause the material to change its shape when exposed to a magnetic field. These materials were named Magnetic Shape Memory (MSM) materials. AdaptaMat Ltd. was established in Finland in 1996 by Kari Ullakko and his colleague Ilkka Aaltio, to further develop, produce and market adaptive materials to industrial customers.

• Magnetic-field-induced strains of 0.2 % in a MSM material were obtained by Dr. Ullakko at Massachussetts Institute of Technology in 1996. Thereafter he together with Dr. Robert C. O'Handley from MIT has continued research of MSM materials and raised interest in this new potential technology. Today, strains over 6 percent have been obtained in materials manufactured by AdaptaMat. AdaptaMat has established first stage MSM material and actuator production in 2001 and sells products based on its NiMnGa actuating elements.

• Actuating elements made from MSM materials can produce complicated shape changes in the magnetic field. Electromechanical machines will become simpler, as a piece of material can "take the role of a machine". One of the simplest MSM device may consist of just an electromagnet and a piece of MSM material. Machines based on MSM materials will become easily controlled, greatly simplified, lighter and smaller than existing constructions.

• Compared to previous magnetically controlled actuator materials, MSM materials have already shown 50 times greater strains at room temperature, and even larger strains seem to be possible. AdaptaMat manufactures MSM elements at its production facilities in Helsinki, Finland. It has patented principal MSM mechanism in e.g. US and Europe, and patent applications are in process in important industrial countries.

• http://www.adaptamat.com/about.php

18

MSM Properties

http://www.adaptamat.com/technology/properties.php

19

Smart structures

• 'Smart' structures can be fabricated by integrating sensor and actuator materials within a host structural material. Examples of this technology include Sensory Structures containing fibre optic or piezoelectric sensors and Adaptive Structures containing piezoceramic, electrostrictive, magnetostrictive, and shape memory solid state actuators. The aforementioned actuation materials are solid state, however smart fluids also have the ability to change properties given a suitable stimulus. The dream, of course, is to integrate all this functionality at the microstructural or atomic/molecular scale to produce a truly 'smart material'. However, this is still some way off, even though the enabling technologies, such as nanotechnology, are under development.

• http://www.materials.org.uk/iom/divisions/mst/smasc/intro.htm

20




21

• Could change their function as a result of changes in temperature, light, radiation, power supply voltage or other variable that produces variations to the device characteristics.

• Built-in reactive behavior surfacing/taking control in specified conditions

Logic thresholdbetween 0 and 11.65V

In1

In2

OutT=27C

T=90C

Example of evolved circuit

In1

In2

Out

AND

OR

It is the exactly the same circuit - only its function changes with temperature!

Polytronics (Polymorphic electronics)

0.00E+00

5.00E-01

1.00E+00

1.50E+00

2.00E+00

2.50E+00

3.00E+00

3.50E+00

1

10

00

10OC 20

OC 30

OC 40

OC 50

OC 60

OC

• Circuits with built-in multiple functionality, with the functional change caused by a induced modification in the operational points of constituent components.

Polytronics – Stoica ICES 2001

00 0

1 10

11

22

Examples of Polymorphic Functional Circuits

• Analog

Change analog filter characteristic

C1 C2

Multi-valued/fuzzy　logic

Ss1 = max(x1,x2)Ts1 = min(x1,x2)

Ss2 = x1 + x2 - x1 x2

Ts2 = x1.x2

Change logic

C1 C2 C1 C2 C3

Neural

Change neuron characteristic

C1 C2

Digital　Logic

Change logic function

S models OR, T models AND

23

Examples of Polymorphic Controls

• Vdd

Change voltage supply level

Control　Voltage　Signals

Change value of the control signal (could be multi-valued)

Temperature

Change temperature

Optics　or　electric/magnetic　field

Change illumination pattern

3.3VT1 = 27C T2 =

125C

CS1

0V

CS2

3.3V

1.2V

24

When Vm changes from 3.3V to 0V the function changes from AND to OR

In1 (

Vo

lts)

0 2.5 5 7.5 100

2

4

In2(V

olt

s)

0 2.5 5 7.5 100

2

4

Ou

t (V

olt

s)

0 2.5 5 7.5 100

2

4

Ou

t (V

olt

s)

0 2.5 5 7.5 100

2

4

AND (Vm = 0V)

OR (Vm = 3.3V)

Polymorphic circuitResponse

Evolved AND/OR polymorphic gate controlled by dedicated signal

25

Evolved OR/XOR/AND polymorphic gate with multi-level control

• Specs:- Use control input Vmorph

-OR if Vm= 0V-XOR if Vm =1.5V-AND if Vm = 3.3V

Convergence

A single multi-level signal Vm controls three functional instances. Solution is rather compact.

Out

(Vol

ts)

0 2.5 5 7.5 100

2

4

Out

(Vol

ts)

0 2.5 5 7.5 100

2

4

Out

(Vol

ts)

0 2.5 5 7.5 100

2

4

In1

(Vol

ts)

0 2.5 5 7.5 100

2

4

In2(

Volts

)

0 2.5 5 7.5 100

2

4

OR (Vm = 0V)

XOR (Vm = 1.5V)

AND (Vm= 3.3V)

Polymorphic circuit Response

26

Original specifications:

- AND gate for Vdd = 1.2V;

- OR gate for Vdd = 3.3V;

- Load C = 50pf

- 8 transistors

Generations

Fitn

ess

(Err

or)

0 30 60 90 120 150 180 210 240 270 300-10.5

-9

-7.5

-6

-4.5

-3

-1.5

0

AND/OR polymorphic gate with supply voltage (VDD) control

Out

(Vol

ts)

0 2.5 5 7.5 100

2

4

In1

(Vol

ts)

0 2.5 5 7.5 100

2

4

In2(

Volts

)0 2.5 5 7.5 10

0

2

4

OR : VDD = 3.3V

ms

Out

(Vol

ts)

0 2.5 5 7.5 100

0.8

1.6

In1(

Volts

)

0 2.5 5 7.5 100

0.8

1.6

In2(

Volts

)

0 2.5 5 7.5 100

0.8

1.6

AND : VDD = 1.2

ms

27

Silicon tested polymorphic circuit

In1 In2 Out

0 1

0 1

0 0 1 1

1 1 1 0

NAND gate response

In1 In2 Out

0 0 1 1

0 0 1 1

0 0 0

1

NOR gate response

28

New Map: Elementary unit of function-changing (reconfigurable) devices

Digital

• FPGA (commercial)

• Context-switching FPGA (research)– cell memory

Analog

• FPAA (commercial)– Op Amp

　FPTA　(research)Transistor

　Polymorphic　cell

Would　work　also　with　novel　materials/devices　without　good　switch　Would　work　also　with　novel　materials/devices　without　good　switch　characteristics!　This　would　enable　function-changing　(without　switches)characteristics!　This　would　enable　function-changing　(without　switches)

29

PIC Architecture

Polymorphic Integrated Circuit (PIC)

Polymorphic Cell

Polymorphic Cell

PolymorphicInterconnect

Polymorphic Cell

Polymorphic Cell



Polymorphic Cell

Polymorphic Cell

Polymorphic Cell

Polymorphic Cell




Polymorphic Cell

Polymorphic Cell

Polymorphic Cell

Polymorphic Cell

InputOutput

Polymorphic tile

Documents

1 2. 2 Other Reconfigurable and Morphable Hardware 2.1. Reconfigurable hardware (switch-based). Devices, SW Tools, Potential for EHW 2.2. Field Programmable