09_NuMicro ADC.pdf

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NuMicro ADC

[email protected]

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Agenda

FeaturesADC Block DiagramADC Function DescriptionsADC Operation ModesADC Operation Flow and Sample Code

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Features

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ADC General Features (I)

12-bit SAR ADCAnalog input voltage range:

0~Vref (Max to 5.0V).

Operation voltage: AVDD=3.0V~5.5V;

Input channel:Up to 8 single-end analog input channels

4 pairs of differential analog input channel.

Up to 600KHz

conversion rate.The maximum ADC operating frequency is 16M HzThree operation modes

Single mode

Single-cycle modeContinuous scan mode

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ADC General Features (II)

An A/D conversion can be started bySoftware triggerExternal trigger pin (STADC pin)

Conversion results are held in data registers for each channel with VALID and OVERRUN indicators.The ADC equips with a digital compare function. User can use this function to monitor the conversion result of a user-specific channel.Channel 7 support 3 input sources:

external analog voltage internal bandgap

voltage

output of internal temperature sensor

Support Self-calibration to minimize the conversion error.

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ADC Block Diagram

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Conversion Results

ADC Configuration Control

Channel Selection

External Trigger Pin4 options: falling/rising /high/low

Reference Voltage Input

ADC PDMA Request

ADC Interrupt Request

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ADC Function Descriptions

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ADC Register Map

Register Offset R/W Description Reset Value

ADC_BA = 0x400E_0000

ADDR0 ADC_BA+0x00 R A/D Data Register 0 0x0000_0000



ADDR3 ADC_BA+0x0C R A/D Data Register 3 0x0000_0000




ADDR7 ADC_BA+0x1C R A/D Data Register 7 0x0000_0000

ADCR ADC_BA+0x20 R/W A/D Control Register 0x0000_0000

ADCHER ADC_BA+0x24 R/W A/D Channel Enable Register 0x0000_0000

ADCMPR0 ADC_BA+0x28 R/W A/D Compare Register 0 0x0000_0000

ADCMPR1 ADC_BA+0x2C R/W A/D Compare Register 1 0x0000_0000

ADSR ADC_BA+0x30 R/W A/D Status Register 0x0000_0000

ADCALR ADC_BA+0x34 R/W A/D Calibration Register 0x0000_0000

ADPDMA ADC_BA+0x40 R/W ADC PDMA current transfer data 0x0000_0000

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ADC Clock Source

The maximum ADC clock frequency is 16MHzThe ADC clock frequency = (ADC clock source frequency) / (ADC_N+1); ADC_N is an 8-bit pre-scaler

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ADC Input Channel Setting

The ADC input pins share with GPIO port AThe ADC input pins must be configured in input typeSingle-end input mode

Channel 0 ~ Channel 7 share with GPA0~GPA7Differential input mode

Channel 0 ~ Channel 3Differential input channels are the paired channels of single-end input channels

Differential input paired channel

Single-end input channel

0 0 1

1 2 3

2 4 5

3 6 7

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Self-Calibration

User can write 1 to CALEN bit in ADCALR register to enable the self calibration function. The CAL_DONE bit reflects the calibration state.

The timing of self-calibrationAfter power onAfter switching input mode between single-end and differential

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Result Monitor Function

Two digital comparators. Compare the ADC result of the specified channel with a user defined compare value stored in CMPD(ADCCMPRx[27:16]) When the conversion of the channel specified by CMPCH is completed, the comparing action will be triggered automatically.

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ADC Interrupt

Three interrupt sourcesADF: completion of a ADC operation modeCMPF0: Condition match monitored by ADC comparator0CMPF1: Condition match monitored by ADC comparator1

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ADC Operation Modes

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Single Mode

A/D conversion is to be performed only once on the specified single channel.If software enables more than one channel in single mode, only the lowest channel

will be

converted and the other enabled channels will be ignored.

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Single-Cycle Scan Mode

3'b000 3'b010 3'b011 3'b111

sample

ADST

chsel[2:0]

SAR[11:0]

ADDR0

ADDR2

ADDR3

ADDR7

Single-cycle scan on channel 0, 2, 3 and 7 (ADCHER[7:0] = 8'b10001101)

R0 R2 R3 R7

R0

R2

R3

R7

Channel0 Channel2 Channel3 Channel7

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Continuous Scan Mode

3'b000 3'b010 3'b011 3'b111 3'b000 3'b010 3'b011 3'b111 3'b010

ADDR7

ADDR3

ADDR2

ADDR0

sample

chsel[2:0]

ADST

Continuous scan on channel 0, 2, 3, and 7 (ADCHER[7:0] = 8'b10001101)

Software clear ADST

Channel0 Channel2 Channel3 Channel7 Channel0 Channel2

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ADC operation flow

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Step 1

Step 2

Step 3

Step 4

Step 5

Step 7

Step 6

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/*----------------------------------------------------------------------------MAIN function----------------------------------------------------------------------------*/int32_t main (void){

/* Step 1. GPIO initial *///Set input mode GPIOA->PMD.PMD1=0;//Disable digital input pathGPIOA->SCH|=0x00020000;//Set ADC functionSYS->GPAMFP.ADC1=1;

/* Step 2. Enable and Select ADC clock source, and then enable ADC module */ //Select 22Mhz for ADCSYSCLK->CLKSEL1.ADC_S = 2;//ADC clock source = 22Mhz/2 =11Mhz;SYSCLK->CLKDIV.ADC_N = 1;//Enable clock sourceSYSCLK->APBCLK.ADC_EN = 1;

/* Step 3. Select Operation mode *///Enable ADC moduleADC->ADCR.ADEN = 1;//Single end inputADC->ADCR.DIFF = 0;//Single modeADC->ADCR.ADMD = 0;

Sample Code(1/2)

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/* Step 4. Select ADC channel */ADC->ADCHER.CHEN = 0x02;

/* Step 5. Enable ADC interrupt *///clear the A/D interrupt flags for safe ADC->ADSR.ADF =1; ADC->ADCR.ADIE = 1;// To enable the ADC interrtuptNVIC_EnableIRQ(ADC_IRQn);

/* Step 6. Conversion start */ADC->ADCR.ADST=1;/* Step 7. wait ADC interrupt */while(1){

if (ADC_INT_FLAG==0) break;

}}

Sample Code(2/2)

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ConditionADC

Input channel:ADC7Clock source: 11MHz (22MHz/2)Operation mode: Single mode

PWMOutput Channel:PWM0Clock source: 0.66Hz (22.1184MHz/((255+1)*2)/(65535+1))PWM duty is defined by ADC value

LCDDisplay ADC value

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ADC+PWM Block DiagramBlock Diagram

NUC140V3AN

ADC7

Cortex-M0

Flash

VCC

VR120KADC

GP

A7

ADC Value: 277

LCD PanelPWM0

LED

SPI

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Run Run ““Smpl_ADC_PWM”” CodeCode

Customer_CDCustomer_CD Readme.txtReadme.txt

NUC1xx BSPDriver Reference GuideNUC1xx BSPDriver Reference GuideNUC1xx_BSP

NuvotonPlatform_Keil

NUC1xx-LB_002

Sample

Smpl_DrvADC_PWM. uvprojSmpl_DrvADC_PWM. uvprojSmpl_ADC_PWM

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Thank you

Documents

09_NuMicro ADC.pdf