Parallel Binary Adder

ReCAP

• Combinational Circuit

• Sequential Circuit

• Binary Adder

– Half Adder

– Full Adder

• Binary Subtraction

‾ Half Subtractor

‾ Full Subtractor

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Parallel Binary Adder

• Definition: The Parallel binary adder is acombinational circuit consists of various fulladders in parallel structure so that when morethan 1-bit numbers are to be added, then therecan be full adder for every column for theaddition.

• The number of full adders in a parallel binaryadder depends on the number of bits present inthe number for the addition. If 4-bits numbers areto be added, then there will be 4-full adder in theparallel binary adder.

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Concept

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Logic circuit of 2-Bit Parallel Binary Adder

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2-Bit Parallel Binary Adder

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If you will carefully observe the logic circuit of 2-Bit Parallel Binary Adder, you will notice 2-full adder are connected in a parallel manner.

5-Bit Parallel Binary Adder

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Advantages and Disadvantages of Parallel Binary Adders

• The advantage of using Parallel binary adder is its fast processing.

• If parallel connected full adders can increase the speed of operation, then these parallel-connected adders are also responsible for the increased complexity of the circuit. The higher the number of bits the more will be the circuit complexity.

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Parallel Binary Subtractors

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4 bit parallel Subtractor

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It is also possible to design a 4 bit parallel subtractor using 4 full addersas shown in the below figure.

This circuit performs the subtraction operation by considering theprinciple that the addition of minuend and the complement of thesubtrahend is equivalent to the subtraction process.

Parallel Adder / Subtractor

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The operations of both addition and subtraction can be performed by a one common binary adder. Such binary circuit can be designed by adding an Ex-OR gate with each full adder as shown in below figure. The figure below shows the 4 bit parallel binary adder/subtractor which has two 4 bit inputs as A3A2A1A0 and B3B2B1B0.

The mode input control line M is connected with carry input of the least significant bit of the full adder. This control line decides the type of operation, whether addition or subtraction.

Summary

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