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1 New designs of binary adders and multipliers Dr. Daniel Torno IEEE Computer Society Member New designs of binary adders and multipliers How to use Binary Stored Carry-or-Borrow representation

New designs of binary adders and multipliers

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This document introduces the principles of Binary Stored Carry-or-Borrow (BSCB) representation It fully describes new designs of arithmetic operators based on this representation: half-adder, full-adder, carry-look-ahead adder, ripple carry adder, multi-operands adders and multiplier. You will be able to adapt or design by your own other operators that will fit your needs.

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Page 1: New designs of binary adders and multipliers

1

New designs of binary adders

and multipliers

Dr. Daniel Torno

IEEE Computer Society Member

New designs of binary adders and multipliers

How to use Binary Stored Carry-or-Borrow

representation

Page 2: New designs of binary adders and multipliers

2

Question: what is the

difference?

1nr

nunb

na

nc

Binary Stored Carry-or-Borrow Full Adder

Carry/Save Full Adder

Answer:The name of the left design is much longer inspite the purpose of both is the same (you may say BSCB instead of Binary Stored Carry-or-Borrow)

1ncy

nsnb

na

nc

(answer at the bottom of the slide)

New designs of binary adders and multipliers

Page 3: New designs of binary adders and multipliers

Purpose & Benefits

3

-This document introduces the principles of Binary Stored Carry-or-Borrow (BSCB) representation

- You will be able to adapt or design by your own other operators that will fit your needs

- It fully describes new designs of arithmetic operators based on this representation: half-adder, full-adder, carry-look-ahead adder, ripple carry adder, multi-operands adders and multiplier

New designs of binary adders and multipliers

Page 4: New designs of binary adders and multipliers

Structure

4

1°) The BSCB representation is introduced then implementations of full-adder, half-adder and accumulator are described

2°) Some equations show how to transform a standard Carry-Look-Ahead adder equations into a new BSCB Carry-Look-Ahead adder

5°) Conclusion, references and useful links

3°) A combination of full adders with a Ripple-Carry adder chain is shown

New designs of binary adders and multipliers

4°) A BSCB multiplier is briefly described showing some very interesting properties: simple adding cell and a recurrence relation between intermediate results

Page 5: New designs of binary adders and multipliers

5

Two different binary

redundant representations

Current binary redundant adders are using variables expressed in the range [0, +3] (well known carry/save form) with two binary signal: - Partial sum (ps) and carry (cy)

Two binary signals u and r are used to express BSCB variables in the range [-1, +2]

Carry/save

nSum

3

0

21

0

1

1

0

1

1

0 0

nps

1ncy

New designs of binary adders and multipliers

BSCB

nSum

1

0

21

0

1

1

0

1

1

0 0

nu1nr

This leads to new designs

Page 6: New designs of binary adders and multipliers

6

Assumed carries for 3 bits

addition

0

na0

nb

ACinACout

0

nSum

0

1na

0

1na

0

1nb

0

1nb

0

1nc

0

nc0

1nc

New designs of binary adders and multipliers

Usualy when 3 bits are added, the implicit assumption is that all carries are null: - assumed input carry (ACin) - assumed output carry (ACout)

02

, , 0,1

0 0,3

0

n n n n

n n n

n

Sum a b c ACin ACout

a b c

ACout Sum

ACin

Page 7: New designs of binary adders and multipliers

7

Initial estimation for 3 bits

addition na

,n nb c

1nr

nu:nSum

00 : 011:1

0

0,0

0,1

1

101:

00 : 0

1,0

1,1

00 : 0

102 :

101:

101:

New designs of binary adders and multipliers

By taking assumption that carries are not null, the sum of a, b,c is expressed in the range [-1, 2] with u an r values as:

1

1 1,2

1

n

n n n n

ACout

ACin Sum

Sum a b c

1.

n n n n

n n n n n

u a b c

a b b cr

Page 8: New designs of binary adders and multipliers

8

BSCB full adder

1nr

nunb

na

nc

BSCB arithmetic operators can be directly implemented with And-Exor gates (Reed-Muller form)

New designs of binary adders and multipliers

1.

n n n n

n n n n n

u a b c

a b b cr

Page 9: New designs of binary adders and multipliers

9

BSCB accumulation

1

i

nr

i

nu

nc

1i

nr

1

1

i

nu

1i

nu

BSCB results at step (i-1) are added to a c value and generate a BSCB result at step (i)

New designs of binary adders and multipliers

Page 10: New designs of binary adders and multipliers

10

BSCB Half-Adder

1

i

nr

i

nu

1i

nr

1i

nu

1

1

i

nu

1 1

1 1 1

1 1

i i i

nn n

i ii i

n nn n

u u r

u ur r

r signals can have positive and negative effects on partial sum u like a borrow or a carry

New designs of binary adders and multipliers

Page 11: New designs of binary adders and multipliers

11

Standard CLA adder -> BSCB adder

0s

1s

2s

3s

outcy

0b

0a

1b

1a

2b

2a

3b

3a

incy

0s

1s

2s

3s

outcy

0b

0a

1b

1a

2b

2a

3b

3a

incy

New designs of binary adders and multipliers

Page 12: New designs of binary adders and multipliers

12

3 2 1 0

3 2 1 0

3 2 1 0

3 2 1 0

.2 .2 .2 .2

.2 .2 .2 .2

a a a aA

b b b bB

0 0

1 1 0 0

2 2 1 1 0 1 0

3 3 2 2 1 2 1 0 2 1 0

3 3 2 3 2 1 3 2 1 0 3 2 1 0

.

. . .

. . . . . .

. . . . . . . . . .

in

in

in

in

out in

p cys

p g p cys

p g p g p p cys

p g p g p p g p p p cys

cy g p g p p g p p p g p p p p cy

Inputs (4 bits):

Propagate and generate signals:

Sum and carry out signals:

.n nn

n nn

g a b

p a b

na

nb

1na

1

n

n

p

g

1nb

How to transform a CLA adder

into …

New designs of binary adders and multipliers

Page 13: New designs of binary adders and multipliers

13 13

00

1

in

n nn

n nn

q cyb

q b a

p a b

0 0

1 1 1 0 0

2 2 2 1 1 1 0 0

3 3 3 2 2 2 1 1 2 1 0 0

3 3 3 3 2 2 3 2 1 1 3 2 1 0 0

.

. . .

. . . . . .

. . . . . . . . . .

in

out

p cys

qq ps a

q p q p p qs a

q p q p p q p p p qs a

cy p q p p q p p p q p p p p qa

A new term is substituted to generate term

With:

iq

ig

na

nb

1na

n

n

p

q

New generation term follows the diagonal line

iq

a BSCB adder by using a

boolean re-expression

New designs of binary adders and multipliers

Page 14: New designs of binary adders and multipliers

14

Ripple carry adder

- Same complexity as the standard Ripple-carry adder

- Improved testability: 4 test vectors versus 5 for the standard implementation

0s

0

1s

2s

outcy

0b

0a

1b

1a

2b

2a

incy

0z

1z

2z

1

1.

nn n n

n nn n

qs a z

p qz z

Definition of a signal such that:

New designs of binary adders and multipliers

Page 15: New designs of binary adders and multipliers

15

Combination of BSCB functions

1nu

nsnu

nr

1nz

nz

1nr

nunb

na

nc

0s

1s

2s

3s

0b

0a

0c

1b

1a

1c

2b

2a

2c

4s

3b

3a

3c

15s

+

3 operands adder

BSCB full-adder

BSCB ripple-carry cell for u,r expression

New designs of binary adders and multipliers

Page 16: New designs of binary adders and multipliers

16

Steps to design a BSCB array multiplier:

1°) Transformation of the initial AND matrix into a XOR matrix resulting in matrix values expressed in BSCB form

2°) Accumulation of all lines of the matrix within the BSCB range [-1, 2], with an accumulator cell

3°) A recurrence property between intermediate results is used to keep the accumulation values in the range [-1, 2] at each step 4°) Final result in binary form is generated by a BSCB ripple-carry adder

BSCB Multiplier

New designs of binary adders and multipliers

Page 17: New designs of binary adders and multipliers

17

Regular design 1

y 4x0z

0z

3x 2x 1x 0x

2z

0p

1p

2p

3p4

p5

p6

p7

p8

p9

p

3z

4z

5z

1y

3y

4y

1

2r1

3r1

4r1

5r1

1u1

2u1

3u1

4u

2

2r2

3r2

4r2

5r2

6r2

2u2

3u2

4u2

5u

3

3u3

4u3

5u3

6u3

3r3

4r3

5r3

6r3

7r

4

4u4

5u4

6u4

7u4

4r4

5r4

6r4

7r4

8r

2y

3y

3z

2z2

y

0z

4z

5z4

y

0y

1y

0z

3y

2y

4y

2

6e2

5e2

4e2

3e2

2e

ACC

INIT

3

7e7

6e3

5e3

4e3

3e

4

4e4

5e4

6e4

7e4

8e

5

4u5

5u5

6u5

7u5

4r5

5r5

6r5

7r5

8r5

9r5

8u

4

2u4

3r4

3u

3

2u3

2r3

1u

2

1u

RCARCARCARCA

5

3u

INITINITINIT

ACCACCACCACC

ACC ACCACCACCACC

ACC ACCACCACCACC

ACCACCACCACCACC

6

6r 6

5r6

7r6

8r6

9r

4x 3x 2x 1x 0x

nxi

yi

n ie

Row signals generation

Exor matrix generation

ix

iy

ix

Inversion of x for last

stage

iy

1y

2

1r2

0u

1

1r1

0u

INIT

1y

ACC

ACC

ACC

ACC

0

2z

0

3z

4z

RCA

4y

Inversion of y for

diagonal

New designs of binary adders and multipliers

Page 18: New designs of binary adders and multipliers

18

A very simple adding cell

1

1

i

nr

1i

nu

1iz

1

i

ne

i

nu

i

nr

BSCB Adder-accumulator (ACC cell)

Following signals are generated:

New designs of binary adders and multipliers

i

n n i iye x

1i i i

y yz

1

1

11

1 1 1.

i i i

n in n

i ii i

n i n n n

u u r z

e ur z r

And processed at each stage by this accumulation cell :

Page 19: New designs of binary adders and multipliers

19

A recurrence property

1. 0i ii

n n ne ur

Accumulation of all BSCB values in the range [-1, 2] is possible because of a recurrence relation. This relation between each accumulated values expressed with u and r signals and the corresponding e value insures that:

This relation does not exist in any known array multiplier It could be used for example to check the correctness of all intermediate results and thus to improve reliability

New designs of binary adders and multipliers

It makes the accumulation cell (ACC cell) more efficient than a standard full adder

Page 20: New designs of binary adders and multipliers

20

Ways to explore

• Is the BSCB representation applicable to a tree multiplier?

• Does the BSCB representation make easier the SRT division algorithm? (down-sizing of tables)

• Is the result impacted when big numbers are multiplied and accumulated with truncature or rounding?

• How to use the recurrence property to check the correctness of results in the most efficient way?

• …. New designs of binary adders and multipliers

Page 21: New designs of binary adders and multipliers

21

Conclusions • A new binary redundant representation was introduced:

- The Binary Stored Carry-or-Borrow representation which allows to expresse values in the range [-1, 2]

• All kinds of arithmetic operators (adders, multiplier)

can be designed with this representation

• The BSCB representation leads directly to implementations with AND and EXOR gates (Reed-Muller form very useful for reversible logic)

• Advantages: improved testability and for the multplier improved reliability by using an amazing recurrence property New designs of binary adders and multipliers

Page 22: New designs of binary adders and multipliers

References

22

Behrooz Parhami, ”Generalized Signed-Digit Number Systems: A unifying Framework For Redundant Number Representation”, IEEE Transactions on Computer, Vol. 39, no. 1, pp 89-98, January 1990.

Algirdas Avizienis, ” Signed-Digit Number Representations for fast Parallel Arithmetic”, IRE Transactions on Electronic Computer, Vol. EC-10, pp 389-400, 1961.

Dhananjay S. Phatak and Israel Koren, ”Hybrid Signed-Digit Number Systems: A unified Framework for redundant Number Representations With Bounded Carry Propagation Chains”, IEEE Transactions on Computer, Vol. 43, no. 8, pp 880-891, August 1994.

Naofumi Takagi,”Multiple-Value-Digit Number Representations in Arithmetic Circuit Algorithms”, 32th IEEE International Symposium on Multiple-Value Logic, May 2002.

Daniel Torno, Behrooz Parhami, ”Arithmetic Operators based on the BSCB Representation”, 44th Asilomar Conf. Signals, Systems, and Computers, Pacific Grove, CA, U.S.A., November 2010.

New designs of binary adders and multipliers

Page 23: New designs of binary adders and multipliers

Ressources at exorand.com

23

- An article about BSCB adders:

- A verilog model of an 8x8 bits BSCB multiplier

- An excel simulator written in Visual Basic Application implementing a 16x32 bits BSCB multiplier

D. Torno, “Reed-Muller Adders Based on Binary Stored Carry or Borrow Representation” Proc. 18th Int’l Workshop Post-Binary ULSI Systems, Naha, Japan, 2009.

D. Torno, “Array Multiplier Based on Binary Stored Carry or Borrow Representation” Proc. 19th Int’l Workshop Post-Binary ULSI Systems, Barcelona, Spain, 2010.

- An article about BSCB multiplier:

New designs of binary adders and multipliers

Page 24: New designs of binary adders and multipliers

Thank you for your

attention!

New designs of binary adders and multipliers 24

Any comments, suggestions,

questions, ideas ?

Dont hesitate to send them to:

[email protected]