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26 e 27 de Agosto, 2014 Transamérica Expo Center, São Paulo/SP
Low Power / Analog: Systems Design on
LTSpice: a High Precision Servo-DAC
Jonny Doin, CEO, GridVortex
Agenda!• Introduction!• LT Spice as an Embedded System Modeling Tool!• Design Example: Precision Analog ServoDAC !• Modeling Microcontroller Interfaces:!
– ADC Interface!– PWM Interface!
• Delta Modulation Integrator block!• Firmware Control Loop!• System response jitter effects!• Prototype and Real circuit performance!
Intro!
In this talk we will see:!
• A complete design for a mixed signal subsystem!
• Some techniques for behavioral modelling with LT Spice!
• A complete closed-loop (Fw/Hw) simulation using LT Spice!
LT Spice as a System Tool!
LT Spice is a very fast and accurate professional circuit simulation tool.!
Used as a circuit simulator, LT Spice can predict actual behavior with high precision.!
Modelling interaction of Firmware and Analog hardware in the design stage is a powerful capability.!
LT Spice as a System Tool (2)!
LT Spice allows modeling mixed-signal systems, including Firmware behavior interaction with Analog hardware:!
• Behavioral sources (B)!
• Digital Gate primitives (Axxx)!
• Hierarchical subcircuits!
• Waveform and data file generators!
Design Example: ServoDAC!
ServoDAC requirements:!• Generate 2 independent 0-10V DC
analog outputs from one PWM output and one ADC input!
• Support numerous failsafe features!• Be implemented with very low cost!
Design Example: ServoDAC (2)!
Modelling system interfaces (2)!
Model Interface blocks: !
• Microcontroller ADC interface!
• Microcontroller PWM interface!
• Firmware control loop!
• Delta Modulation integrator!
• Failsafe Drivers!
Microcontroller ADC interface!
Microcontroller ADC interface (2)!
Microcontroller ADC interface (3)!
• Ideal transfer function!
• Quantized Vout and Digital Count outputs!
• Can be used by digital behavioral models!
Microcontroller PWM interface!
Modeling of a microcontroller’s PWM peripheral interface.!
1) Datasheet!Reference!Behavior!
Microcontroller PWM interface (2)!
Microcontroller PWM interface (3)!
Microcontroller PWM interface (4)!
• Identical to datasheet!
• Generates Interrupt signal!
• Can drive external analog circuitry!
Delta Modulation Integrator!Integrates the digital PWM output into a “trend” analog voltage. !
Delta Modulation Integrator (2)!
• 2-stage integrator:!– Lossy passive 1st stage!– Active stage around OpAmp!
• Very simple single supply bias (VDD/2)!
• Generates a steady-state output from a 50% PWM!
• Implemented with very low cost components!
Failsafe Drivers!The 2 analog outputs are buffered with failsafe drivers that go high impedance when VCC is lost!
Failsafe Drivers (2)!
• The load circuit is a 0-10V input which has an internal 100µA current source. The driver needs to source 7V into the load to light the LED lamp to 100%.!
• Each output is buffered and isolated with 2 NPN bipolar transistors.!
• When VCC fails, the transistors cut off, with very high impedance.!
• The 68K resistor is isolated from the driver circuit during failures, and will drive the output voltage to 6.8V (100% brightness on the LED lamp).!
Firmware control Loop!The control loop reads the integrator output with the ADC and computes the error from the desired target voltage.!
Firmware control Loop (2)!The PWM value is set to 50% when the error is Zero.!
Positive errors make the PWM duty cycle to be > 50%, driving the net integrated voltage “down”.!
Negative errors set < 50% duty cycles, driving the net integrated voltage “up”.!
Delays in the Firmware control loop can adversely affect the output correction.!
We can simulate the effects of interrupts causing long control loop latencies.!
Simulation Waveforms!
Detail: integrator waveforms!
• Integrator waveform sampled always at the same point (middle of PWM positive cycle)!
• +/- 20µA into the integrator!
• Integrator output easily filtered!
Detail: integrator waveforms (2)!
• Steady-state waveforms: 50% PWM!
• Integrator ripple much lower than one ADC bit!
• Filtered output pk-pk is less than 50µV!
Detail: firmware interference!
130.5ms 132.0ms 133.5ms 135.0ms 136.5msV5942.1V8942.1V1052.1V4052.1V7052.1V0152.1V3152.1V6152.1V9152.1V2252.1V5252.1V68052.1V88052.1V09052.1V29052.1V49052.1V69052.1V89052.1V00152.1V20152.1V40152.1V0.0V1.0V2.0V3.0V4.0V5.0V6.0V7.0V8.0V9.0V0.1
V(adc_val) V(adc_in)
V(vip)
V(isr_block)
• For comparison, we removed the PWM from the control loop: direct GPIO mode instead of Servo PWM mode!
• Simulating Interrupts blocking time delaying GPIO control loop!
• Any firmware latency directly affects the output stability!
• Hard realtime requirements for direct GPIO control loop!
!
Detail: firmware interference (2)!
• Control loop via PWM as Servo drive!
• Same delays caused by Interrupts blocking time, delaying PWM error update!
• PWM servo maintains DC voltage, with minor error deviations!
• Soft realtime requirements for PWM Servo control loop!
• Accept soft timing failures from Firmware operation!
Prototype circuit!
• Worked First try!!
• Measured convergence times and DC performance follows the simulation closely!
• All failsafe modes worked as designed!
• Tryout PCB Rev.0 worked as designed!
Final Thoughts!
Using LT Spice for Mixed Signal:!
• Accelerated design decisions and anticipated anomalous behaviors!
• Helped assess firmware timing failure effects!
• Provided a round-trip testbed for system failsafes before physical prototype!
• Reduced overall design cycle!
