Presentation for Intel core i5.
- 1. Introduction Specifications Memory Handling Processor
registers Core i5 Cache Memory AdvancedTechnologies Conclusion
2. Core i5 is using the Ivy Bridge microarchitecture. Ivy Bridge
is the codename for an Intel microprocessorusing the Sandy Bridge
microarchitecture. Ivy Bridge uses a 22 nanometer process.The
IvyBridge die shrink, known in the IntelTick-Tock modelas the
"tick", is based on 3D tri-gate transistors. Inteldemonstrated Ivy
Bridge processors in 2011. 3. Status LaunchedLaunch Date
Q212Processor Number i5-3550S# of Cores 4# ofThreads 4Clock Speed 3
GHzMaxTurbo Frequency 3.7 GHzIntel Smart Cache 6 MBBus/Core Ratio
30DMI 5 GT/sInstruction Set 64-bitInstruction Set Extensions
SSE4.1/4.2,AVXEmbeddedOptionsAvailable YesLithography 22 nm 4.
Memory SpecificationsMax Memory Size (dependent onmemory type)32
GBMemoryTypes DDR3-1333/1600# of Memory Channels 2Max Memory
Bandwidth 25.6 GB/sECC Memory Supported No 5. Graphics
SpecificationsProcessorGraphics Intel HD Graphics 2500Graphics Base
Frequency 650 MHzGraphics Max Dynamic Frequency 1.15 GHzIntelQuick
SyncVideo YesIntel InTru 3DTechnology YesIntel Insider
YesIntelWireless Display YesIntel Flexible Display Interface
(IntelFDI)YesIntelClearVideo HDTechnology Yes# of Displays
Supported 3 6. AdvancedTechnologiesIntelTurbo BoostTechnology
2.0Intel vProTechnology YesIntel Hyper-ThreadingTechnology
YesIntelVirtualizationTechnology forDirected I/O
(VT-d)YesIntelTrusted ExecutionTechnology YesAES New Instructions
YesIntel 64 YesIntelAnti-TheftTechnology YesIdle States YesEnhanced
Intel SpeedStepTechnology YesThermal MonitoringTechnologies
YesExecute Disable Bit YesIntelVT-x with Extended
PageTables(EPT)Yes 7. PEG port upper pre-fetchable
base/limitregisters.This allows the PEG unit to claimI/O accesses
above 32 bit. Addressing of greater than 4 GB is allowed oneither
the DMI Interface or PCI Express*(PCIe*) interface. The processor
supports a maximum of 32 GBof DRAM. No DRAM memory will
beaccessible above 32 GB. 8. Processor contains more than 430
registers. PCI Device 0 Function 0 Configuration Space Registers.
PCI Device 1 Function 02 Configuration Space Registers. PCI Device
1 Function 02 Extended Configuration Registers. PCI Device 2
Configuration Space Registers. Device 2 IO Registers. PCI Device 6
Registers. PCI Device 6 Extended Configuration Registers. Direct
Media Interface Base Address Registers (DMIBAR). MCHBAR Registers
in Memory Controller Channel 0 Registers. MCHBAR Registers in
Memory Controller Channel 1. MCHBAR Registers in Memory Controller
Integrated Memory Peripheral Hub (IMPH). MCHBAR Registers in Memory
Controller Common. Memory Controller MMIO Registers Broadcast Group
Registers. Integrated GraphicsVTd Remapping Engine Registers. PCU
MCHBAR Registers. PXPEPBAR Registers. Default PEG/DMIVTd Remapping
Engine Registers. 9. A 32-KB instruction and 32-KB data
first-levelcache (L1) for each core A 256-KB shared instruction /
data second-level cache (L2) for each core Up to 8-MB shared
instruction / data third-level cache (L3), shared among all cores.
10. The ring design isquite simple and hasmany advantages:shortest
path, easilyscalable to includemore cores ifrequired. 11.
AdvancedTechnologies Makes a single system appear as
multipleindependent systems to software. This allows multiple,
independentoperating systems to run simultaneouslyon a single
system. IntelVirtualizationTechnology forDirected I/O (IntelVT-d)
adds chipsethardware implementation to support andimprove I/O
(VT-x)IntelVirtualizationTechnology for DirectedI/O (VT-d) 12.
AdvancedTechnologies Defines platform-level enhancements
thatprovide the building blocks for creatingtrusted platforms.
provide the authenticity of the controllingenvironment such that
those wishing to rely onthe platform can make an appropriate
trustdecision. determines the identity of the
controllingenvironment by accurately measuring andverifying the
controlling software.IntelTrusted ExecutionTechnology 13.
AdvancedTechnologiesIntelTrusted ExecutionTechnology 14.
AdvancedTechnologies Allows an execution core to function astwo
logical processors. While some execution resources such ascaches,
execution units, and buses areshared, each logical processor has
its ownarchitectural state with its own set ofgeneral-purpose
registers and controlregisters. This feature must be enabled using
theBIOS and requires operating systemsupport.Intel
Hyper-ThreadingTechnology* 15. AdvancedTechnologies Allows the
processor core toopportunistically and automatically runfaster than
its rated operatingfrequency/render clock if it is operatingbelow
power, temperature, and currentlimits. The IntelTurbo
BoostTechnology featureis designed to increase performance ofboth
multi-threaded and single-threadedworkloads.IntelTurbo
BoostTechnology 16. AdvancedTechnologies is a set of security and
manageabilitycapabilities built into the processor aimedat
addressing four critical areas of ITsecurity Threat management,
including protection fromrootkits, viruses, and malware. Identity
and web site access point protection . Confidential personal and
business dataprotection. Remote and local monitoring, remediation,
andrepair of PCs and workstations.Intel vProTechnology 17.
AdvancedTechnologies Intel 64 architecture delivers 64-bitcomputing
on server, workstation,desktop and mobile platforms whencombined
with supporting software. Intel 64 architecture improvesperformance
by allowing systems toaddress more than 4 GB of both virtualand
physical memory.Intel 64 18. AdvancedTechnologies Intel
Anti-TheftTechnology (Intel AT)helps keep your laptop safe and
secure inthe event that its ever lost or stolen.Intel AT requires a
service subscriptionfrom an Intel ATenabled serviceprovider.
Detects device theft Locks down lost device Restores operation
easilyIntelAnti-TheftTechnology 19. AdvancedTechnologies The latest
expansion of the Intelinstruction set. It extends the Intel
Streaming SIMDExtensions (Intel SSE) from 128-bitvectors to 256-bit
vectors. Intel AVX addresses the continued needfor vector
floating-point performance inmainstream scientific and
engineeringnumerical applications, visualprocessing, recognition,
data-mining/synthesis, gaming, physics, cryptography and other
application areas.IntelAdvancedVectorExtensions 20.
IntelAdvancedVector ExtensionsIntel AVX introducessupport for
256-bit wideSIMD registers (YMM0-YMM7 in operating modesthat are
32-bit orless,YMM0-YMM15 in 64-bit mode).The lower 128-bits of
theYMM registersare aliased to therespective 128-bitXMM registers.
21. AdvancedTechnologies A set of Single Instruction Multiple
Data(SIMD) instructions that enable fast andsecure data encryption
and decryption basedon the Advanced Encryption Standard (AES).
IntelAES-NI are valuable for a wide range ofcryptographic
applications, for example:applications that perform
bulkencryption/decryption, authentication,random number generation,
andauthenticated encryption. AES is broadly accepted as the
standard forboth government and industry applications,and is widely
deployed in various protocols.IntelAdvancedEncryption StandardNew
Instructions(IntelAES-NI) 22. AdvancedTechnologies AES-NI consists
of six Intel SSEinstructions. Four instructions, namelyAESENC,
AESENCLAST, AESDEC, andAESDELAST facilitate high performanceAES
encryption and decryption. AESIMC and AESKEYGENASSIST, supportthe
AES key expansion procedure.IntelAdvancedEncryption StandardNew
Instructions(IntelAES-NI) 23. AdvancedTechnologies Allows memory to
be marked as executable or non-executable, when combined with a
supporting operatingsystem. If code attempts to run in
non-executablememory the processor raises an error to the
operatingsystem.This feature can prevent some classes of virusesor
worms that exploit buffer overrun vulnerabilities andcan thus help
improve the overall security of the system.Execute Disable Bit 24.
Core i5-3550S is built over Ivy bridgemicroarchitecture. Processor
supporting L3 cache memory. Most of Intel latest technologies
aresupported like Anti-Seft,Vpro andVirtualizations. 25.