Intel 8085 mp

2

Intel 8085 Pin Configuration

3Signals and I/O Pins

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Accumulator (A) Flag

B C

D E

H L

Programme Counter(PC)

Stack Pointer(SP)

Sign Flag(S)

Zero Flag(Z)

X Auxiliary Carry

Flag(AC)

X Parity Flag(P)

X Carry Flag(C)

7 6 5 4 3 2 1 0

Intel 8085 microprocessor has following registers One 8-bit accumulator(ACC);register A Six 8-bit GPR;B,C,D,E,H,L One 16-bit Stack pointer; SP One 16-bit programme counter; PC Instruction register and Temporary register

Instruction Set of 8085

• An instruction is a command given to the microprocessor to

perform a specified operation on given data.

• An instruction contain two part: operational code(opcode) and

operand.

• The first part of the instruction which specifies the task to be

performed by microprocessor is called opcode.

• The second part of the instruction is the data to be operated on

and it is called operand. Operand may be 8-bit or 16-bit data,

8-bit or 16-bit address, internal registers or a register or

memory location.

Opcode Operand

Classification of Instruction Set

• Data Transfer Instruction

• Arithmetic Instructions

• Logical Instructions

• Branching Instructions

• Control Instructions

Data Transfer Instruction

• MOV B,A

• MVI C,45H

23 6A

B A

7D

C

45

Opcode Operand Description

MOV Rd, RsM, RsRd, M

Copy from source to destination.


MVI Rd, DataM, Data

Move immediate 8-bit

6A


LXI Rp, data [16-bit] Move immediate 16-bit data to the register pair[rh]=8-MSB, [rl]=8-LSB

45 3D

B C

LXI B, 1432 H14 32


LDA Address[16-bit] Store accumulator

LDA 1432 H 45

A 2B 1431

68 1432

4E 1433

68


STA Address[16-bit] Store accumulator

STA 4150H 45

A23

E3

6D

414F

4150

4151

45


LHLD Address[16-bit] Load [H-L] pair direct

LHLD 4409 H A0

H23

E3

6D

4408

4409

440A

D2

L

6D

E3


SHLD Address[16-bit] Store [H-L] pair direct

SHLD 4409 H A0

H23

E3

6D

4408

4409

440A

D2

L

A0 D2


XCHG Exchange the contents of[H-L] with [D-E] pair

A0

H

D2

L

78

D

9E

E

XCHG

Direct Access from Memory

H-L register pair is known as memory pointer

45 3D

H L

LXI H, 1432 H14 32

MOV D,M 952B 1431

68 1432

4E 1433

D

68

Arithmetic Instruction


ADD RM

Add register with accumulator

ADD B19

A

32

B 19+32=4B

4B

ADD M 14 32

H L

2B 1431

68 1432

4E 1433

4B

A

4B+68=B3B3


ADI Data[8-bit] Add immediate data[8-bit] with accumulator

ADI 34H B3

A

B3+34=E7E7


ADC rM

Add register with carry accumulator

ADC B19

A

32

B

19+32+1=4C

CF

1 4C


ACI Data[8-bit] Add with carry immediate data to accumulator

ACI 25H19

A

19+25+1=3F

CF

1 3F


DAD rp Add register pair with [H-L] pair

30

28

2A

36

30+2A+0=5A

28+36=5E

H

L

B

CDAD B

5A

5E

Arithmetic Instruction


SUB RM

Subtract register from accumulator

SUB B32

A

18

B 32-18=1A

1A

SUB M 14 32

H L

2B 1431

68 1432

4E 1433

72

A

72-68=0A0A


SUI Data[8-bit] Subtract immediate data[8-bit] from accumulator

SUI 04H 18

A

18-04=14 14


SBB rM

Subtract register from accumulator with borrow

SBB B32

A

0B

B

32-0B-0=27CF

0

27


SBI Data[8-bit] Subtract immediate data from accumulator with borrow

SBI 0EH19

A

19-0E-1=0A

CF

1 0A


INR rM

Increment register content

INR B 0B

B

0B+1=0C 0C


DCR rM

Decrement register content

DCR B 0B

B

0B-1=0A 0A


INX rp Increment the content of register pair

INX B FF

B

12FF+1=130012

C

00


DCX Rp Decrement the content of register pair

DCX B FF

B12FF-1=12FE12

CFE

13

Logical InstructionOpcode Operand Description

ANA rM

AND register with accumulator

ANA L0B

L0B 0 0 0 0 1 0 1 1

1E 0 0 0 1 1 1 1 0

0A 0 0 0 0 1 0 1 0

1E

A

0A


ANI Data[8-bit] AND immediate data with accumulator

ANI 0B 0B 0 0 0 0 1 0 1 1

1E 0 0 0 1 1 1 1 0

0A 0 0 0 0 1 0 1 0

1E

A

0A


ORA rM

OR register with accumulator

ORI Data[8-bit] OR immediate data with accumulator

XRA rM

EXCLUSIVE-OR register with accumulator

XRI Data[8-bit] EXCLUSIVE-OR immediate data with accumulator

CMC Compliment the carry status

STC Set carry status

CMA Complement the accumulator

CMA 2B 0 0 1 0 1 0 1 1

D4 1 1 0 1 0 1 0 02B

A

D4

Branch Instruction


JC address[16-bit] Jump immediate address if CF=1

324B

41FF xxx

4200 xxxxx

4201 xxxxxx

4202 xxxxxx

PC

1

CF324A xx

324B JC 4200

324E xxxxxx

324F xxxxxx 4200


JNC address[16-bit] Jump immediate address if CF=0

JZ address[16-bit] Jump immediate address if ZF=1

JNZ address[16-bit] Jump immediate address if ZF=0

JP address[16-bit] Jump immediate address if SF=0

JM address[16-bit] Jump immediate address if SF=1

JPE address[16-bit] Jump immediate address if PF=1

JPO address[16-bit] Jump immediate address if PF=0

Machine Control Instruction


HLT Stop the execution of instruction in the microprocessor

NOP No operation

IN Port-address Input to accumulator from I/O port

OUT Port-address Output from accumulator from I/O port

Place 05 in the accumulator. Increment it by one

and store the result in the memory location 4150 H

Memory Address

4100

4102

4103

4106

Machine Code

3E,05

3C

32,50,41

76

Mnemonics

MVI

INR

STA

HLT

Operands

A,05

A

4150

Comments

Get 05 in the ACC

Inc the content of Acc

Store the result in 4150 H

Halt

55

414F 23

4150 45

4151 E2

4152 94

A

0506 06

Engineering

Intel 8085 mp