1. COMPUTER ORGANIZATION AND ARCHITECTURE DESIGNING FOR
PERFORMANCE EIGHTH EDITION William Stallings Prentice Hall Upper
Saddle River, NJ 07458
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3. ToTricia (ATS), my loving wife the kindest and gentlest
person
4. WEB SITE FOR COMPUTER ORGANIZATION AND ARCHITECTURE, EIGHTH
EDITION The Web site at WilliamStallings.com/COA/COA8e.html
provides support for instructors and students using the book. It
includes the following elements. Course Support Materials A set of
PowerPoint slides for use as lecture aids. Copies of figures from
the book in PDF format. Copies of tables from the book in PDF
format. Computer Science Student Resource Site: contains a number
of links and docu- ments that students may find useful in their
ongoing computer science education. The site includes a review of
basic, relevant mathematics; advice on research, writing, and doing
homework problems; links to computer science research resources,
such as report repositories and bibliographies; and other useful
links. An errata sheet for the book, updated at most monthly.
Supplemental Documents A set of supplemental homework problems with
solutions. Students can en- hance their understanding of the
material by working out the solutions to these problems and then
checking their answers. Three online chapters: number systems,
digital logic, and IA-64 architecture Nine online appendices that
expand on the treatment in the book.Topics include recursion, and
various topics related to memory. All of the Intel x86 and ARM
architecture material from the book reproduced in two PDF documents
for easy reference. Other useful documents COA Courses The Web site
includes links to Web sites for courses taught using the book.
These sites can provide useful ideas about scheduling and topic
ordering, as well as a num- ber of useful handouts and other
materials. Useful Web Sites The Web site includes links to relevant
Web sites. The links cover a broad spectrum of topics and will
enable students to explore timely issues in greater depth. Internet
Mailing List An Internet mailing list is maintained so that
instructors using this book can ex- change information,
suggestions, and questions with each other and the author. Sub-
scription information is provided at the books Web site. Simulation
Tools for COA Projects The Web site includes a number of
interactive simulation tools, which are keyed to the topics of the
book.TheWeb site also includes links to the SimpleScalar and
SMPCache web sites.These are two software packages that serve as
frameworks for project imple- mentation. Each site includes
downloadable software and background information. T
5. v CONTENTS Web Site for the Book iv About the Author xi
Preface xiii Chapter 0 Readers Guide 1 0.1 Outline of the Book 2
0.2 A Roadmap for Readers and Instructors 2 0.3 Why Study Computer
Organization and Architecture 3 0.4 Internet and Web Resources 4
PART ONE OVERVIEW 7 Chapter 1 Introduction 8 1.1 Organization and
Architecture 9 1.2 Structure and Function 10 1.3 Key Terms and
Review Questions 15 Chapter 2 Computer Evolution and Performance 16
2.1 A Brief History of Computers 17 2.2 Designing for Performance
38 2.3 The Evolution of the Intel x86 Architecture 44 2.4 Embedded
Systems and the ARM 46 2.5 Performance Assessment 50 2.6
Recommended Reading and Web Sites 57 2.7 Key Terms, Review
Questions, and Problems 59 PART TWO THE COMPUTER SYSTEM 63 Chapter
3 A Top-Level View of Computer Function and Interconnection 65 3.1
Computer Components 66 3.2 Computer Function 68 3.3 Interconnection
Structures 83 3.4 Bus Interconnection 85 3.5 PCI 95 3.6 Recommended
Reading and Web Sites 104 3.7 Key Terms, Review Questions, and
Problems 104 Appendix 3A Timing Diagrams 108 Chapter 4 Cache Memory
110 4.1 Computer Memory System Overview 111 4.2 Cache Memory
Principles 118 4.3 Elements of Cache Design 121 4.4 Pentium 4 Cache
Organization 140 4.5 ARM Cache Organization 143
6. vi CONTENTS 4.6 Recommended Reading 145 4.7 Key Terms,
Review Questions, and Problems 146 Appendix 4A Performance
Characteristics of Two-Level Memories 151 Chapter 5 Internal Memory
Technology 158 5.1 Semiconductor Main Memory 159 5.2 Error
Correction 169 5.3 Advanced DRAM Organization 173 5.4 Recommended
Reading and Web Sites 179 5.5 Key Terms, Review Questions, and
Problems 180 Chapter 6 External Memory 184 6.1 Magnetic Disk 185
6.2 RAID 194 6.3 Optical Memory 203 6.4 Magnetic Tape 210 6.5
Recommended Reading and Web Sites 212 6.6 Key Terms, Review
Questions, and Problems 214 Chapter 7 Input/Output 217 7.1 External
Devices 219 7.2 I/O Modules 222 7.3 Programmed I/O 224 7.4
Interrupt-Driven I/O 228 7.5 Direct Memory Access 236 7.6 I/O
Channels and Processors 242 7.7 The External Interface: FireWire
and Infiniband 244 7.8 Recommended Reading and Web Sites 253 7.9
Key Terms, Review Questions, and Problems 254 Chapter 8 Operating
System Support 259 8.1 Operating System Overview 260 8.2 Scheduling
271 8.3 Memory Management 277 8.4 Pentium Memory Management 288 8.5
ARM Memory Management 293 8.6 Recommended Reading and Web Sites 298
8.7 Key Terms, Review Questions, and Problems 299 PART THREE THE
CENTRAL PROCESSING UNIT 303 Chapter 9 Computer Arithmetic 305 9.1
The Arithmetic and Logic Unit (ALU) 306 9.2 Integer Representation
307 9.3 Integer Arithmetic 312 9.4 Floating-Point Representation
327 9.5 Floating-Point Arithmetic 334 9.6 Recommended Reading and
Web Sites 342 9.7 Key Terms, Review Questions, and Problems
344
7. CONTENTS vii Chapter 10 Instruction Sets: Characteristics
and Functions 348 10.1 Machine Instruction Characteristics 349 10.2
Types of Operands 356 10.3 Intel x86 and ARM Data Types 358 10.4
Types of Operations 362 10.5 Intel x86 and ARM Operation Types 374
10.6 Recommended Reading 384 10.7 Key Terms, Review Questions, and
Problems 385 Appendix 10A Stacks 390 Appendix 10B Little, Big, and
Bi-Endian 396 Chapter 11 Instruction Sets: Addressing Modes and
Formats 400 11.1 Addressing 401 11.2 x86 and ARM Addressing Modes
408 11.3 Instruction Formats 413 11.4 x86 and ARM Instruction
Formats 421 11.5 Assembly Language 426 11.6 Recommended Reading 428
11.7 Key Terms, Review Questions, and Problems 428 Chapter 12
Processor Structure and Function 432 12.1 Processor Organization
433 12.2 Register Organization 435 12.3 The Instruction Cycle 440
12.4 Instruction Pipelining 444 12.5 The x86 Processor Family 461
12.6 The ARM Processor 469 12.7 Recommended Reading 475 12.8 Key
Terms, Review Questions, and Problems 476 Chapter 13 Reduced
Instruction Set Computers (RISCs) 480 13.1 Instruction Execution
Characteristics 482 13.2 The Use of a Large Register File 487 13.3
Compiler-Based Register Optimization 492 13.4 Reduced Instruction
Set Architecture 494 13.5 RISC Pipelining 500 13.6 MIPS R4000 504
13.7 SPARC 511 13.8 The RISC versus CISC Controversy 517 13.9
Recommended Reading 518 13.10 Key Terms, Review Questions, and
Problems 518 Chapter 14 Instruction-Level Parallelism and
Superscalar Processors 522 14.1 Overview 524 14.2 Design Issues 528
14.3 Pentium 4 538 14.4 ARM Cortex-A8 544 14.5 Recommended Reading
552 14.6 Key Terms, Review Questions, and Problems 554
8. viii CONTENTS PART FOUR THE CONTROL UNIT 559 Chapter 15
Control Unit Operation 561 15.1 Micro-operations 563 15.2 Control
of the Processor 569 15.3 Hardwired Implementation 581 15.4
Recommended Reading 584 15.5 Key Terms, Review Questions, and
Problems 584 Chapter 16 Microprogrammed Control 586 16.1 Basic
Concepts 587 16.2 Microinstruction Sequencing 596 16.3
Microinstruction Execution 602 16.4 TI 8800 614 16.5 Recommended
Reading 624 16.6 Key Terms, Review Questions, and Problems 625 PART
FIVE PARALLEL ORGANIZATION 627 Chapter 17 Parallel Processing 628
17.1 The Use of Multiple Processors 630 17.2 Symmetric
Multiprocessors 632 17.3 Cache Coherence and the MESI Protocol 640
17.4 Multithreading and Chip Multiprocessors 646 17.5 Clusters 653
17.6 Nonuniform Memory Access Computers 660 17.7 Vector Computation
664 17.8 Recommended Reading and Web Sites 676 17.9 Key Terms,
Review Questions, and Problems 677 Chapter 18 Multicore Computers
684 18.1 HardwarePerformance Issues 685 18.2 Software Performance
Issues 690 18.3 Multicore Organization 694 18.4 Intel x86 Multicore
Organization 696 18.5 ARM11 MPCore 699 18.6 Recommended Reading and
Web Sites 704 18.7 Key Terms, Review Questions, and Problems 705
Appendix A Projects for Teaching Computer Organization and
Architecture 707 A.1 Interactive Simulations 708 A.2 Research
Projects 708 A.3 Simulation Projects 710 A.4 Assembly Language
Projects 711 A.5 Reading/Report Assignments 711 A.6 Writing
Assignments 712 A.7 Test Bank 712
9. CONTENTS ix Appendix B Assembly Language and Related Topics
713 B.1 Assembly Language 714 B.2 Assemblers 723 B.3 Loading and
Linking 728 B.4 Recommended Reading and Web Sites 735 B.5 Key
Terms, Review Questions, and Problems 736 ONLINE CHAPTERS
WilliamStallings.com/COA/COA8e.html Chapter 19 Number Systems 19-1
19.1 The Decimal System 19-2 19.2 The Binary System 19-2 19.3
Converting between Binary and Decimal 19-3 19.4 Hexadecimal
Notation 19-5 19.5 Key Terms, Review Questions, and Problems 19-8
Chapter 20 Digital Logic 20-1 20.1 Boolean Algebra 20-2 20.2 Gates
20-4 20.3 Combinational Circuits 20-7 20.4 Sequential Circuits
20-24 20.5 Programmable Logic Devices 20-33 20.6 Recommended
Reading and Web Site 20-38 20.7 Key Terms and Problems 20-39
Chapter 21 The IA-64 Architecture 21-1 21.1 Motivation 21-3 21.2
General Organization 21-4 21.3 Predication, Speculation, and
Software Pipelining 21-6 21.4 IA-64 Instruction Set Architecture
21-23 21.5 Itanium Organization 21-28 21.6 Recommended Reading and
Web Sites 21-31 21.7 Key Terms, Review Questions, and Problems
21-32 ONLINE APPENDICES WilliamStallings.com/COA/COA8e.html
Appendix C Hash Tables Appendix D Victim Cache Strategies D.1
Victim Cache D.2 SelectiveVictim Cache Appendix E Interleaved
Memory Appendix F International Reference Alphabet Appendix G
Virtual Memory Page Replacement Algorithms
10. x CONTENTS Appendix H Recursive Procedures H.1 Recursion
H.2 Activation Tree Representation H.3 Stack Processing H.4
Recursion and Iteration Appendix I Additional Instruction Pipeline
Topics I.1 Pipeline Reservation Tables I.2 Reorder Buffers I.3
Scoreboarding I.4 Tomasulos Algorithm Appendix J Linear Tape Open
Technology Appendix K DDR SDRAM Glossary 740 References 750 Index
763
11. xi ABOUT THE AUTHOR William Stallings has made a unique
contribution to understanding the broad sweep of tech- nical
developments in computer security, computer networking and computer
architecture. He has authored 17 titles, and counting revised
editions, a total of 42 books on various as- pects of these
subjects. His writings have appeared in numerous ACM and IEEE
publica- tions, including the Proceedings of the IEEE and ACM
Computing Reviews. He has 10 times received the award for the best
Computer Science textbook of the year from the Text and Academic
Authors Association. In over 30 years in the field, he has been a
technical contributor, technical manager, and an executive with
several high-technology firms. He has designed and implemented both
TCP/IP-based and OSI-based protocol suites on a variety of
computers and operating sys- tems, ranging from microcomputers to
mainframes. As a consultant, he has advised govern- ment agencies,
computer and software vendors, and major users on the design,
selection, and use of networking software and products. He created
and maintains the Computer Science Student Resource Site at
WilliamStallings.com/StudentSupport.html. This site provides
documents and links on a va- riety of subjects of general interest
to computer science students (and professionals). He is a member of
the editorial board of Cryptologia, a scholarly journal devoted to
all aspects of cryptology. Dr. Stallings holds a PhD from M.I.T. in
Computer Science and a B.S. from Notre Dame in electrical
engineering.
12. This page intentionally left blank
13. xiii PREFACE OBJECTIVES This book is about the structure
and function of computers. Its purpose is to present, as clearly
and completely as possible, the nature and characteristics of
modern-day computer systems. This task is challenging for several
reasons. First, there is a tremendous variety of prod- ucts that
can rightly claim the name of computer, from single-chip
microprocessors costing a few dollars to supercomputers costing
tens of millions of dollars. Variety is exhibited not only in cost,
but also in size, performance, and application. Second, the rapid
pace of change that has always characterized computer technology
continues with no letup. These changes cover all aspects of
computer technology, from the underlying integrated circuit
technology used to construct computer components, to the increasing
use of parallel organization con- cepts in combining those
components. In spite of the variety and pace of change in the
computer field, certain fundamental concepts apply consistently
throughout. The application of these concepts depends on the
current state of the technology and the price/performance
objectives of the designer.The in- tent of this book is to provide
a thorough discussion of the fundamentals of computer orga-
nization and architecture and to relate these to contemporary
design issues. The subtitle suggests the theme and the approach
taken in this book. It has always been important to design computer
systems to achieve high performance, but never has this requirement
been stronger or more difficult to satisfy than today. All of the
basic perfor- mance characteristics of computer systems, including
processor speed, memory speed, mem- ory capacity, and
interconnection data rates, are increasing rapidly. Moreover, they
are increasing at different rates. This makes it difficult to
design a balanced system that maxi- mizes the performance and
utilization of all elements. Thus, computer design increasingly
becomes a game of changing the structure or function in one area to
compensate for a per- formance mismatch in another area. We will
see this game played out in numerous design decisions throughout
the book. A computer system, like any system, consists of an
interrelated set of components. The system is best characterized in
terms of structurethe way in which components are intercon- nected,
and functionthe operation of the individual components.
Furthermore, a computers organization is hierarchical.Each major
component can be further described by decomposing it into its major
subcomponents and describing their structure and function. For
clarity and ease of understanding, this hierarchical organization
is described in this book from the top down: Computer system: Major
components are processor, memory, I/O. Processor: Major components
are control unit, registers,ALU, and instruction execution unit.
Control Unit: Provides control signals for the operation and
coordination of all processor components.Traditionally, a
microprogramming implementation has been used, in which major
components are control memory, microinstruction sequencing logic,
and registers. More recently, microprogramming has been less
prominent but remains an important implementation technique.
14. xiv PREFACE The objective is to present the material in a
fashion that keeps new material in a clear context. This should
minimize the chance that the reader will get lost and should
provide better motivation than a bottom-up approach. Throughout the
discussion, aspects of the system are viewed from the points of
view of both architecture (those attributes of a system visible to
a machine language programmer) and organization (the operational
units and their interconnections that realize the architecture).
EXAMPLE SYSTEMS This text is intended to acquaint the reader with
the design principles and implementation is- sues of contemporary
operating systems. Accordingly, a purely conceptual or theoretical
treatment would be inadequate.To illustrate the concepts and to tie
them to real-world design choices that must be made, two processor
families have been chosen as running examples: Intel x86
architecture: The x86 architecture is the most widely used for
non-embedded computer systems.The x86 is essentially a complex
instruction set computer (CISC) with some RISC features. Recent
members of the x86 family make use of superscalar and mul- ticore
design principles.The evolution of features in the x86 architecture
provides a unique case study of the evolution of most of the design
principles in computer architecture. ARM: The ARM embedded
architecture is arguably the most widely used embedded processor,
used in cell phones, iPods, remote sensor equipment, and many other
de- vices.The ARM is essentially a reduced instruction set computer
(RISC). Recent members of the ARM family make use of superscalar
and multicore design principles. Many, but by no means all, of the
examples are drawn from these two computer families: the Intel x86,
and the ARM embedded processor family. Numerous other systems, both
contempo- rary and historical, provide examples of important
computer architecture design features. PLAN OF THE TEXT The book is
organized into five parts (see Chapter 0 for an overview) Overview
The computer system The central processing unit The control unit
Parallel organization, including multicore The book includes a
number of pedagogic features, including the use of interactive sim-
ulations and numerous figures and tables to clarify the discussion.
Each chapter includes a list of key words, review questions,
homework problems, suggestions for further reading, and recommended
Web sites. The book also includes an extensive glossary, a list of
frequently used acronyms, and a bibliography. INTENDED AUDIENCE The
book is intended for both an academic and a professional
audience.As a textbook, it is in- tended as a one- or two-semester
undergraduate course for computer science, computer engi- neering,
and electrical engineering majors. It covers all the topics in CS
220 Computer Architecture, which is one of the core subject areas
in the IEEE/ACM Computer Curricula 2001.
15. PREFACE xv For the professional interested in this field,
the book serves as a basic reference volume and is suitable for
self-study. INSTRUCTIONAL SUPPORT MATERIALS To support instructors,
the following materials are provided: Solutions manual: Solutions
to end-of-chapter Review Questions and Problems Projects manual:
Suggested project assignments for all of the project categories
listed below PowerPoint slides: A set of slides covering all
chapters, suitable for use in lecturing PDF files: Reproductions of
all figures and tables from the book Test bank: Includes
true/false, multiple choice, and fill-in-the-blanks questions and
answers All of these support materials are available at the
Instructor Resource Center (IRC) for this textbook.To gain access
to the IRC, please contact your local Prentice Hall sales rep-
resentative via prenhall.com/replocator or call Prentice Hall
Faculty Services at 1-800-526- 0485.You can also locate the IRC
through http://www.pearsonhighered.com/stallings. INTERNET SERVICES
FOR INSTRUCTORS AND STUDENTS There is a Web site for this book that
provides support for students and instructors. The site includes
links to other relevant sites and a set of useful documents. See
the section, Web Site for Computer Organization and Architecture,
preceding this Preface, for more infor- mation.The Web page is at
williamstallings.com/COA/COA8e.html. New to this edition is a set
of homework problems with solutions publicly available at this Web
site. Students can enhance their understanding of the material by
working out the solutions to these problems and then checking their
answers. An Internet mailing list has been set up so that
instructors using this book can ex- change information,
suggestions, and questions with each other and with the author.As
soon as typos or other errors are discovered, an errata list for
this book will be available at WilliamStallings.com. Finally, I
maintain the Computer Science Student Resource Site at
WilliamStallings.com/StudentSupport.html. PROJECTS AND OTHER
STUDENT EXERCISES For many instructors, an important component of a
computer organization and architecture course is a project or set
of projects by which the student gets hands-on experience to rein-
force concepts from the text. This book provides an unparalleled
degree of support for in- cluding a projects component in the
course. The instructors support materials available through
Prentice Hall not only includes guidance on how to assign and
structure the projects but also includes a set of users manuals for
various project types plus specific assignments, all written
especially for this book. Instructors can assign work in the
following areas: Interactive simulation assignments: Described
subsequently. Research projects: A series of research assignments
that instruct the student to re- search a particular topic on the
Internet and write a report.
16. xvi PREFACE Simulation projects: The IRC provides support
for the use of the two simulation pack- ages: SimpleScalar can be
used to explore computer organization and architecture design
issues. SMPCache provides a powerful educational tool for examining
cache design issues for symmetric multiprocessors. Assembly
language projects: A simplified assembly language, CodeBlue, is
used and assignments based on the popular Core Wars concept are
provided. Reading/report assignments: A list of papers in the
literature, one or more for each chapter, that can be assigned for
the student to read and then write a short report. Writing
assignments: A list of writing assignments to facilitate learning
the material. Test bank: Includes T/F, multiple choice, and
fill-in-the-blanks questions and answers. This diverse set of
projects and other student exercises enables the instructor to use
the book as one component in a rich and varied learning experience
and to tailor a course plan to meet the specific needs of the
instructor and students. See Appendix A in this book for details.
INTERACTIVE SIMULATIONS New to this edition is the incorporation of
interactive simulations.These simulations provide a powerful tool
for understanding the complex design features of a modern computer
system.A total of 20 interactive simulations are used to illustrate
key functions and algorithms in com- puter organization and
architecture design.At the relevant point in the book, an icon
indicates that a relevant interactive simulation is available
online for student use.Because the animations enable the user to
set initial conditions, they can serve as the basis for student
assignments.The instructors supplement includes a set of
assignments, one for each of the animations. Each assignment
includes a several specific problems that can be assigned to
students. WHATS NEW IN THE EIGHTH EDITION In the four years since
the seventh edition of this book was published, the field has seen
continued innovations and improvements. In this new edition, I try
to capture these changes while maintaining a broad and
comprehensive coverage of the entire field. To begin this process
of revision, the seventh edition of this book was extensively
reviewed by a number of professors who teach the subject and by
professionals working in the field. The result is that, in many
places, the narrative has been clarified and tightened, and illus-
trations have been improved. Also, a number of new field-tested
homework problems have been added. Beyond these refinements to
improve pedagogy and user friendliness, there have been substantive
changes throughout the book. Roughly the same chapter organization
has been retained, but much of the material has been revised and
new material has been added. The most noteworthy changes are as
follows: Interactive simulation: Simulation provides a powerful
tool for understanding the complex mechanisms of a modern
processor.The eighth edition incorporates 20 sepa- rate
interactive,Web-based simulation tools covering such areas as cache
memory, main memory, I/O, branch prediction, instruction
pipelining, and vector processing.At appropriate places in the
book, the simulators are highlighted so that the student can invoke
the simulation at the proper point in studying the book.
17. PREFACE xvii Embedded processors: The eighth edition now
includes coverage of embedded proces- sors and the unique design
issues they present.The ARM architecture is used as a case study.
Multicore processors: The eighth edition now includes coverage of
what has become the most prevalent new development in computer
architecture: the use of multiple processors on a single chip.
Chapter 18 is devoted to this topic. Cache memory: Chapter 4, which
is devoted to cache memory, has been extensively revised, updated,
and expanded to provide broader technical coverage and im- proved
pedagogy through the use of numerous figures, as well as
interactive simula- tion tools. Performance assessment: Chapter 2
includes a significantly expanded discussion of performance
assessment, including a new discussion of benchmarks and an
analysis of Amdahls law. Assembly language: A new appendix has been
added that covers assembly language and assemblers. Programmable
logic devices: The discussion of PLDs in Chapter 20 on digital
logic has been expanded to include an introduction to
field-programmable gate arrays (FPGAs). DDR SDRAM: DDR has become
the dominant main memory technology in desktops and servers,
particularly DDR2 and DDR3. DDR technology is covered in Chapter 5,
with additional details in Appendix K. Linear tape open (LTO): LTO
has become the best selling super tape format and is widely used
with small and large computer systems, especially for backup, LTO
is cov- ered in Chapter 6, with additional details in Appendix J.
With each new edition it is a struggle to maintain a reasonable
page count while adding new material. In part this objective is
realized by eliminating obsolete material and tighten- ing the
narrative. For this edition, chapters and appendices that are of
less general interest have been moved online, as individual PDF
files. This has allowed an expansion of material without the
corresponding increase in size and price. ACKNOWLEDGEMENTS This new
edition has benefited from review by a number of people, who gave
generously of their time and expertise.The following people
reviewed all or a large part of the manuscript: AzadAzadmanesh
(University of NebraskaOmaha);Henry Casanova (University of
Hawaii); Marge Coahran (Grinnell College); Andree Jacobsen
(University of New Mexico); Kurtis Kredo (University of
CaliforniaDavis); Jiang Li (Austin Peay State University); Rachid
Manseur (SUNY, Oswego); John Masiyowski (George Mason University);
Fuad Muztaba (Winston-Salem State University); Bill Sverdlik
(Eastern Michigan University); and Xiaobo Zhou (University of
Colorado Colorado Springs). Thanks also to the people who provided
detailed technical reviews of a single chapter: Tim Mensch, Balbir
Singh, Michael Spratte (Hewlett-Packard), Franois-Xavier Peretmere,
John Levine, Jeff Kenton, Glen Herrmannsfeldt, Robert Thorpe,
Grzegorz Mazur (Institute of Computer Science, Warsaw University of
Technology), Ian Ameline, Terje Mathisen, Ed- ward Brekelbaum
(Varilog Research Inc), Paul DeMone, and Mikael Tillenius. I would
also like to thank Jon Marsh of ARM Limited for the review of the
material on ARM.
18. xviii PREFACE Professor Cindy Norris of Appalachian State
University, Professor Bin Mu of the Uni- versity of New Brunswick,
and Professor Kenrick Mock of the University of Alaska kindly
supplied homework problems. Aswin Sreedhar of the University of
Massachusetts developed the interactive simula- tion assignments
and also wrote the test bank. Professor Miguel Angel Vega
Rodriguez, Professor Dr. Juan Manuel Snchez Prez, and Prof. Dr.
Juan Antonio Gmez Pulido, all of University of Extremadura, Spain
prepared the SMPCache problems in the instructors manual and
authored the SMPCache Users Guide. Todd Bezenek of the University
of Wisconsin and James Stine of Lehigh University prepared the
SimpleScalar problems in the instructors manual, and Todd also
authored the SimpleScalar Users Guide. Thanks also to Adrian Pullin
at Liverpool Hope University College, who developed the PowerPoint
slides for the book. Finally, I would like to thank the many people
responsible for the publication of the book, all of whom did their
usual excellent job.This includes my editor Tracy Dunkelberger, her
assistant Melinda Haggerty, and production manager Rose
Kernan.Also, Jake Warde of Warde Publishers managed the reviews;
and Patricia M. Daly did the copy editing.
19. Acronyms ACM Association for Computing Machinery ALU
Arithmetic Logic Unit ASCII American Standards Code for Information
Interchange ANSI American National Standards Institute BCD Binary
Coded Decimal CD Compact Disk CD-ROM Compact Disk-Read Only Memory
CPU Central Processing Unit CISC Complex Instruction Set Computer
DRAM Dynamic Random-Access Memory DMA Direct Memory Access DVD
Digital Versatile Disk EPIC Explicitly Parallel Instruction
Computing EPROM Erasable Programmable Read-Only Memory EEPROM
Electrically Erasable Programmable Read-Only Memory HLL High-Level
Language I/O Input/Output IAR Instruction Address Register IC
Integrated Circuit IEEE Institute of Electrical and Electronics
Engineers ILP Instruction-Level Parallelism IR Instruction Register
LRU Least Recently Used LSI Large-Scale Integration MAR Memory
Address Register MBR Memory Buffer Register MESI
Modify-Exclusive-Shared-Invalid MMU Memory Management Unit MSI
Medium-Scale Integration NUMA Nonuniform Memory Access OS Operating
System PC Program Counter PCI Peripheral Component Interconnect
PROM Programmable Read-Only Memory PSW Processor Status Word PCB
Process Control Block RAID Redundant Array of Independent Disks
RALU Register/Arithmetic-Logic Unit RAM Random-Access Memory RISC
Reduced Instruction Set Computer ROM Read-Only Memory SCSI Small
Computer System Interface SMP Symmetric Multiprocessors SRAM Static
Random-Access Memory SSI Small-Scale Integration ULSI Ultra
Large-Scale Integration VLSI Very Large-Scale Integration VLIW Very
Long Instruction Word
20. DATA AND COMPUTER COMMUNICATIONS, EIGHTH EDITION A
comprehensive survey that has become the standard in the field,
covering (1) data communications, including transmission, media,
signal encoding, link control, and multiplexing; (2) communication
networks, including circuit- and packet-switched, frame relay,ATM,
and LANs; (3) the TCP/IP protocol suite, including IPv6,TCP, MIME,
and HTTP, as well as a detailed treatment of network security.
Received the 2007 Text and Academic Authors Association (TAA) award
for the best Computer Science and Engineering Textbook of the year.
ISBN 0-13-243310-9 OPERATING SYSTEMS, SIXTH EDITION A state-of-the
art survey of operating system principles. Covers fundamental
technology as well as contemporary design issues, such as threads,
microkernels, SMPs, real-time systems, multiprocessor scheduling,
embedded OSs, distributed systems, clusters, security, and
object-oriented design. Third and fourth editions received the TAA
award for the best Computer Science and Engineering Textbook of
2002. ISBN 978-0-13-600632-9 BUSINESS DATA COMMUNICATIONS, SIXTH
EDITION A comprehensive presentation of data communications and
telecommunications from a business perspective. Covers voice, data,
image, and video communi- cations and applications technology and
includes a number of case studies. ISBN 978-0-13-606741-2
CRYPTOGRAPHY AND NETWORK SECURITY, FOURTH EDITION A tutorial and
survey on network security technology. Each of the basic building
blocks of network security, including conventional and public-key
cryptography, authentication, and digital signatures, are
covered.Thorough mathematical background for such algorithms as AES
and RSA.The book covers important network security tools and
applications, including S/MIME, IP Security, Kerberos, SSL/TLS,
SET, and X509v3. In addition, methods for countering hackers and
viruses are explored. Second edition received the TAA award for the
best Computer Science and Engineering Textbook of 1999. ISBN
0-13-187316-4 COMPUTER SECURITY (With Lawrie Brown) A comprehensive
treatment of computer security technology, including algorithms,
protocols, and applications. Covers cryptography, authentication,
THE WILLIAM STALLINGS BOOKS ON COMPUTER
21. access control, database security, intrusion detection and
prevention, malicious software, denial of service, firewalls,
software security, physical security, human factors, auditing,
legal and ethical aspects, and trusted systems. Received the 2008
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Computer Science and Engineering Textbook of the year. ISBN
0-13-600424-5 NETWORK SECURITY ESSENTIALS, THIRD EDITION A tutorial
and survey on network security technology.The book covers important
network security tools and applications, including S/MIME, IP
Security, Kerberos, SSL/TLS, SET, and X509v3. In addition, methods
for countering hackers and viruses are explored. ISBN 0-13-238033-1
WIRELESS COMMUNICATIONS AND NETWORKS, SECOND EDITION A
comprehensive, state-of-the art survey. Covers fundamental wireless
communications topics, including antennas and propagation, signal
encoding techniques, spread spectrum, and error correction
techniques. Examines satellite, cellular, wireless local loop
networks and wireless LANs, including Bluetooth and 802.11. Covers
Mobile IP and WAP. ISBN 0-13-191835-4 COMPUTER NETWORKS WITH
INTERNET PROTOCOLS AND TECHNOLOGY An up-to-date survey of
developments in the area of Internet-based protocols and
algorithms. Using a top-down approach, this book covers
applications, transport layer, Internet QoS, Internet routing, data
link layer and computer networks, security, and network management.
ISBN 0-13141098-9 HIGH-SPEED NETWORKS AND INTERNETS, SECOND EDITION
A state-of-the art survey of high-speed networks.Topics covered
include TCP congestion control,ATM traffic management, Internet
traffic management, differentiated and integrated services,
Internet routing protocols and multicast routing protocols,
resource reservation and RSVP, and lossless and lossy compression.
Examines important topic of self-similar data traffic. ISBN
0-13-03221-0 AND DATA COMMUNICATIONS TECHNOLOGY
22. This page intentionally left blank
23. READERS GUIDE 0.1 Outline of the Book 0.2 A Roadmap for
Readers and Instructors 0.3 Why Study Computer Organization and
Architecture? 0.4 Internet and Web Resources Web Sites for This
Book Other Web Sites USENET Newsgroups 1 CHAPTER
24. 2 CHAPTER 0 / READERS GUIDE This book, with its
accompanying Web site, covers a lot of material. In this chapter,
we give the reader an overview. 0.1 OUTLINE OF THE BOOK The book is
organized into five parts: Part One: Provides an overview of
computer organization and architecture and looks at how computer
design has evolved. Part Two: Examines the major components of a
computer and their intercon- nections, both with each other and the
outside world. This part also includes a detailed discussion of
internal and external memory and of inputoutput (I/O). Finally, the
relationship between a computers architecture and the op- erating
system running on that architecture is examined. Part Three:
Examines the internal architecture and organization of the proces-
sor.This part begins with an extended discussion of computer
arithmetic.Then it looks at the instruction set architecture.The
remainder of the part deals with the structure and function of the
processor, including a discussion of reduced instruction set
computer (RISC) and superscalar approaches. Part Four: Discusses
the internal structure of the processors control unit and the use
of microprogramming. Part Five: Deals with parallel organization,
including symmetric multiprocess- ing, clusters, and multicore
architecture. A number of online chapters and appendices at this
books Web site cover additional topics relevant to the book. A more
detailed, chapter-by-chapter summary of each part appears at the
beginning of that part. This text is intended to acquaint you with
the design principles and implemen- tation issues of contemporary
computer organization and architecture.Accordingly, a purely
conceptual or theoretical treatment would be inadequate. This book
uses examples from a number of different machines to clarify and
reinforce the concepts being presented. Many, but by no means all,
of the examples are drawn from two computer families: the Intel x86
family and the ARM (Advanced RISC Machine) family.These two systems
together encompass most of the current computer design trends. The
Intel x86 architecture is essentially a complex instruction set
computer (CISC) with some RISC features, while the ARM is
essentially a RISC. Both sys- tems make use of superscalar design
principles and both support multiple processor and multicore
configurations. 0.2 A ROADMAP FOR READERS AND INSTRUCTORS This book
follows a top-down approach to the presentation of the material.As
we discuss in more detail in Section 1.2, a computer system can be
viewed as a hierar- chical structure. At a top level, we are
concerned with the major components of
25. 0.3 / WHY STUDY COMPUTER ORGANIZATION AND ARCHITECTURE? 3
the computers: processor, I/O, memory, peripheral devices. Part Two
examines these components and looks in some detail at each
component except the proces- sor.This approach allows us to see the
external functional requirements that drive the processor design,
setting the stage for Part Three. In Part Three, we examine the
processor in great detail. Because we have the context provided by
Part Two, we are able, in Part Three, to see the design decisions
that must be made so that the processor supports the overall
function of the computer system. Next, in Part Four, we look at the
control unit, which is at the heart of the processor. Again, the
design of the control unit can best be explained in the context of
the function it performs within the context of the processor.
Finally, Part Five examines systems with multiple processors,
including clusters, multiprocessor computers, and multi- core
computers. 0.3 WHY STUDY COMPUTER ORGANIZATION AND ARCHITECTURE?
The IEEE/ACM Computer Curricula 2001, prepared by the Joint Task
Force on Computing Curricula of the IEEE (Institute of Electrical
and Electronics Engineers) Computer Society and ACM (Association
for Computing Machinery), lists computer architecture as one of the
core subjects that should be in the curriculum of all stu- dents in
computer science and computer engineering. The report says the
following: The computer lies at the heart of computing. Without it
most of the computing disciplines today would be a branch of
theoretical mathematics. To be a professional in any field of
computing today, one should not regard the computer as just a black
box that exe- cutes programs by magic.All students of computing
should acquire some understanding and appreciation of a computer
systems func- tional components, their characteristics, their
performance, and their interactions.There are practical
implications as well. Students need to understand computer
architecture in order to structure a program so that it runs more
efficiently on a real machine. In se- lecting a system to use, they
should be able to understand the tradeoff among various components,
such as CPU clock speed vs. memory size. A more recent publication
of the task force, Computer Engineering 2004 Curriculum Guidelines,
emphasized the importance of Computer Architecture and Organization
as follows: Computer architecture is a key component of computer
engineer- ing and the practicing computer engineer should have a
practical understanding of this topic. It is concerned with all
aspects of the design and organization of the central processing
unit and the inte- gration of the CPU into the computer system
itself. Architecture extends upward into computer software because
a processors
26. 4 CHAPTER 0 / READERS GUIDE architecture must cooperate
with the operating system and system software. It is difficult to
design an operating system well without knowledge of the underlying
architecture. Moreover, the computer designer must have an
understanding of software in order to imple- ment the optimum
architecture. The computer architecture curriculum has to achieve
multi- ple objectives. It must provide an overview of computer
architec- ture and teach students the operation of a typical
computing machine. It must cover basic principles, while
acknowledging the complexity of existing commercial systems.
Ideally, it should rein- force topics that are common to other
areas of computer engineer- ing; for example, teaching register
indirect addressing reinforces the concept of pointers in C.
Finally, students must understand how various peripheral devices
interact with, and how they are inter- faced to a CPU. [CLEM00]
gives the following examples as reasons for studying computer
architecture: 1. Suppose a graduate enters the industry and is
asked to select the most cost- effective computer for use
throughout a large organization.An understanding of the
implications of spending more for various alternatives, such as a
larger cache or a higher processor clock rate, is essential to
making the decision. 2. Many processors are not used in PCs or
servers but in embedded systems.A de- signer may program a
processor in C that is embedded in some real-time or larger
system,such as an intelligent automobile electronics
controller.Debugging the system may require the use of a logic
analyzer that displays the relationship between interrupt requests
from engine sensors and machine-level code. 3. Concepts used in
computer architecture find application in other courses. In
particular, the way in which the computer provides architectural
support for programming languages and operating system facilities
reinforces concepts from those areas. As can be seen by perusing
the table of contents of this book, computer orga- nization and
architecture encompasses a broad range of design issues and
concepts. A good overall understanding of these concepts will be
useful both in other areas of study and in future work after
graduation. 0.4 INTERNET AND WEB RESOURCES There are a number of
resources available on the Internet and the Web that support this
book and help readers keep up with developments in this field. Web
Sites for This Book There is a Web page for this book at
WilliamStallings.com/COA/COA8e.html. See the layout at the
beginning of this book for a detailed description of that
site.
27. 0.4 / INTERNET AND WEB RESOURCES 5 An errata list for this
book will be maintained at the Web site and updated as needed.
Please e-mail any errors that you spot to me. Errata sheets for my
other books are at WilliamStallings.com. I also maintain the
Computer Science Student Resource Site, at WilliamStallings
.com/StudentSupport.html. The purpose of this site is to provide
documents, informa- tion, and links for computer science students
and professionals. Links and docu- ments are organized into six
categories: Math: Includes a basic math refresher, a queuing
analysis primer, a number system primer, and links to numerous math
sites. How-to: Advice and guidance for solving homework problems,
writing techni- cal reports, and preparing technical presentations.
Research resources: Links to important collections of papers,
technical re- ports, and bibliographies. Miscellaneous: A variety
of other useful documents and links. Computer science careers:
Useful links and documents for those considering a career in
computer science. Humor and other diversions: You have to take your
mind off your work once in a while. Other Web Sites There are
numerous Web sites that provide information related to the topics
of this book. In subsequent chapters, lists of specific Web sites
can be found in the Recommended Reading and Web Sites section.
Because the addresses for Web sites tend to change frequently, the
book does not provide URLs. For all of the Web sites listed in the
book, the appropriate link can be found at this books Web site.
Other links not mentioned in this book will be added to the Web
site over time. The following are Web sites of general interest
related to computer organiza- tion and architecture: WWW Computer
Architecture Home Page: A comprehensive index to infor- mation
relevant to computer architecture researchers, including
architecture groups and projects, technical organizations,
literature, employment, and com- mercial information CPU Info
Center: Information on specific processors, including technical pa-
pers, product information, and latest announcements Processor
Emporium: Interesting and useful collection of information ACM
Special Interest Group on Computer Architecture: Information on
SIGARCH activities and publications IEEE Technical Committee on
Computer Architecture: Copies of TCAA newsletter USENET Newsgroups
A number of USENET newsgroups are devoted to some aspect of
computer orga- nization and architecture. As with virtually all
USENET groups, there is a high
28. 6 CHAPTER 0 / READERS GUIDE noise-to-signal ratio, but it
is worth experimenting to see if any meet your needs.The most
relevant are as follows: comp.arch: A general newsgroup for
discussion of computer architecture. Often quite good.
comp.arch.arithmetic: Discusses computer arithmetic algorithms and
standards. comp.arch.storage: Discussion ranges from products to
technology to practical usage issues. comp.parallel: Discusses
parallel computers and applications.
29. PART ONE P.1 ISSUES FOR PART ONE The purpose of Part One is
to provide a background and context for the remainder of this book.
The fundamental concepts of computer organization and architecture
are presented. 7 Overview ROAD MAP FOR PART ONE Chapter 1
Introduction Chapter 1 introduces the concept of the computer as a
hierarchical system. A computer can be viewed as a structure of
components and its function described in terms of the collective
function of its cooperating components. Each component, in turn,
can be described in terms of its internal structure and
function.The major levels of this hierarchical view are
introduced.The remainder of the book is organized, top down, using
these levels. Chapter 2 Computer Evolution and Performance Chapter
2 serves two purposes. First, a discussion of the history of com-
puter technology is an easy and interesting way of being introduced
to the basic concepts of computer organization and architecture.
The chapter also addresses the technology trends that have made
performance the focus of computer system design and previews the
various techniques and strategies that are used to achieve
balanced, efficient performance.
30. CHAPTER INTRODUCTION 1.1 Organization and Architecture 1.2
Structure and Function Function Structure 1.3 Key Terms and Review
Questions 8
31. 1.1 / ORGANIZATION AND ARCHITECTURE 9 This book is about
the structure and function of computers.Its purpose is to
present,as clearly and completely as possible, the nature and
characteristics of modern-day com- puters.This task is a
challenging one for two reasons. First, there is a tremendous
variety of products, from single-chip microcomputers costing a few
dollars to supercomputers costing tens of millions of dollars, that
can rightly claim the name computer. Variety is exhibited not only
in cost, but also in size, performance,and application.Second,the
rapid pace of change that has always charac- terized computer
technology continues with no letup. These changes cover all aspects
of computer technology,from the underlying integrated circuit
technology used to con- struct computer components to the
increasing use of parallel organization concepts in combining those
components. In spite of the variety and pace of change in the
computer field, certain funda- mental concepts apply consistently
throughout.To be sure, the application of these con- cepts depends
on the current state of technology and the price/performance
objectives of the designer.The intent of this book is to provide a
thorough discussion of the funda- mentals of computer organization
and architecture and to relate these to contemporary computer
design issues. This chapter introduces the descriptive approach to
be taken. 1.1 ORGANIZATION AND ARCHITECTURE In describing
computers,a distinction is often made between computer architecture
and computer organization. Although it is difficult to give precise
definitions for these terms, a consensus exists about the general
areas covered by each (e.g., see [VRAN80], [SIEW82], and
[BELL78a]); an interesting alternative view is presented in
[REDD76]. Computer architecture refers to those attributes of a
system visible to a pro- grammer or, put another way, those
attributes that have a direct impact on the logi- cal execution of
a program. Computer organization refers to the operational units
and their interconnections that realize the architectural
specifications. Examples of architectural attributes include the
instruction set, the number of bits used to repre- sent various
data types (e.g., numbers, characters), I/O mechanisms, and
techniques for addressing memory. Organizational attributes include
those hardware details transparent to the programmer, such as
control signals; interfaces between the com- puter and peripherals;
and the memory technology used. For example, it is an architectural
design issue whether a computer will have a multiply instruction.
It is an organizational issue whether that instruction will be im-
plemented by a special multiply unit or by a mechanism that makes
repeated use of the add unit of the system. The organizational
decision may be based on the antici- pated frequency of use of the
multiply instruction, the relative speed of the two ap- proaches,
and the cost and physical size of a special multiply unit.
Historically, and still today, the distinction between architecture
and organiza- tion has been an important one. Many computer
manufacturers offer a family of computer models, all with the same
architecture but with differences in organization. Consequently,
the different models in the family have different price and perfor-
mance characteristics. Furthermore, a particular architecture may
span many years and encompass a number of different computer
models, its organization changing with changing technology. A
prominent example of both these phenomena is the
32. 10 CHAPTER 1 / INTRODUCTION IBM System/370 architecture.
This architecture was first introduced in 1970 and in- cluded a
number of models. The customer with modest requirements could buy a
cheaper, slower model and, if demand increased, later upgrade to a
more expensive, faster model without having to abandon software
that had already been developed. Over the years, IBM has introduced
many new models with improved technology to replace older models,
offering the customer greater speed, lower cost, or both.These
newer models retained the same architecture so that the customers
software invest- ment was protected. Remarkably, the System/370
architecture, with a few enhance- ments, has survived to this day
as the architecture of IBMs mainframe product line. In a class of
computers called microcomputers, the relationship between archi-
tecture and organization is very close. Changes in technology not
only influence or- ganization but also result in the introduction
of more powerful and more complex architectures. Generally, there
is less of a requirement for generation-to-generation compatibility
for these smaller machines. Thus, there is more interplay between
or- ganizational and architectural design decisions. An intriguing
example of this is the reduced instruction set computer (RISC),
which we examine in Chapter 13. This book examines both computer
organization and computer architecture. The emphasis is perhaps
more on the side of organization. However, because a com- puter
organization must be designed to implement a particular
architectural specifi- cation, a thorough treatment of organization
requires a detailed examination of architecture as well. 1.2
STRUCTURE AND FUNCTION A computer is a complex system;contemporary
computers contain millions of elemen- tary electronic
components.How,then,can one clearly describe them?The key is to
rec- ognize the hierarchical nature of most complex systems,
including the computer [SIMO96].A hierarchical system is a set of
interrelated subsystems,each of the latter,in turn,hierarchical in
structure until we reach some lowest level of elementary subsystem.
The hierarchical nature of complex systems is essential to both
their design and their description.The designer need only deal with
a particular level of the system at a time. At each level, the
system consists of a set of components and their interrela-
tionships.The behavior at each level depends only on a simplified,
abstracted charac- terization of the system at the next lower
level. At each level, the designer is concerned with structure and
function: Structure: The way in which the components are
interrelated Function: The operation of each individual component
as part of the structure In terms of description, we have two
choices: starting at the bottom and build- ing up to a complete
description, or beginning with a top view and decomposing the
system into its subparts. Evidence from a number of fields suggests
that the top- down approach is the clearest and most effective
[WEIN75]. The approach taken in this book follows from this
viewpoint. The computer system will be described from the top
down.We begin with the major components of a computer, describing
their structure and function, and proceed to successively lower
layers of the hierarchy. The remainder of this section provides a
very brief overview of this plan of attack.
33. 1.2 / STRUCTURE AND FUNCTION 11 Function Both the structure
and functioning of a computer are, in essence, simple. Figure 1.1
depicts the basic functions that a computer can perform. In general
terms, there are only four: Data processing Data storage Data
movement Control The computer, of course, must be able to process
data.The data may take a wide variety of forms,and the range of
processing requirements is broad.However,we shall see that there
are only a few fundamental methods or types of data processing. It
is also essential that a computer store data. Even if the computer
is processing data on the fly (i.e., data come in and get
processed, and the results go out immedi- ately),the computer must
temporarily store at least those pieces of data that are being Data
movement apparatus Operating environment (source and destination of
data) Control mechanism Data storage facility Data processing
facility Figure 1.1 A Functional View of the Computer
34. 12 CHAPTER 1 / INTRODUCTION MovementMovement Control (a)
Storage Processing Movement Control (d) Storage Processing Movement
Control (c) Storage Processing (b) Control Storage Processing
Figure 1.2 Possible Computer Operations worked on at any given
moment.Thus, there is at least a short-term data storage func-
tion. Equally important, the computer performs a long-term data
storage function. Files of data are stored on the computer for
subsequent retrieval and update. The computer must be able to move
data between itself and the outside world. The computers operating
environment consists of devices that serve as either
35. 1.2 / STRUCTURE AND FUNCTION 13 sources or destinations of
data.When data are received from or delivered to a device that is
directly connected to the computer, the process is known as
inputoutput (I/O), and the device is referred to as a peripheral.
When data are moved over longer distances, to or from a remote
device, the process is known as data communications. Finally, there
must be control of these three functions. Ultimately, this control
is exercised by the individual(s) who provides the computer with
instructions.Within the computer, a control unit manages the
computers resources and orchestrates the performance of its
functional parts in response to those instructions. At this general
level of discussion, the number of possible operations that can be
performed is few. Figure 1.2 depicts the four possible types of
operations. The computer can function as a data movement device
(Figure 1.2a), simply transferring data from one peripheral or
communications line to another. It can also function as a data
storage device (Figure 1.2b), with data transferred from the
external environ- ment to computer storage (read) and vice versa
(write). The final two diagrams show operations involving data
processing, on data either in storage (Figure 1.2c) or en route
between storage and the external environment (Figure 1.2d). The
preceding discussion may seem absurdly generalized. It is certainly
possi- ble, even at a top level of computer structure, to
differentiate a variety of functions, but, to quote [SIEW82], There
is remarkably little shaping of computer structure to fit the
function to be performed.At the root of this lies the
general-purpose nature of computers, in which all the functional
specialization occurs at the time of programming and not at the
time of design. Structure Figure 1.3 is the simplest possible
depiction of a computer. The computer interacts in some fashion
with its external environment. In general, all of its linkages to
the external environment can be classified as peripheral devices or
communication lines.We will have something to say about both types
of linkages. COMPUTER Storage Processing Peripherals Com m
unication lines Figure 1.3 The Computer
36. 14 CHAPTER 1 / INTRODUCTION But of greater concern in this
book is the internal structure of the computer itself, which is
shown in Figure 1.4.There are four main structural components:
Central processing unit (CPU): Controls the operation of the
computer and performs its data processing functions; often simply
referred to as processor. Main memory: Stores data. I/O: Moves data
between the computer and its external environment. System
interconnection: Some mechanism that provides for communica- tion
among CPU, main memory, and I/O. A common example of system Main
memory I/O CPU COMPUTER System bus ALU Registers Control unit CPU
Internal bus Control unit registers and decoders CONTROL UNIT
Sequencing logic Control memory Figure 1.4 The Computer:Top-Level
Structure
37. 1.3 / KEY TERMS AND REVIEW QUESTIONS 15 Key Terms Review
Questions 1.1. What, in general terms, is the distinction between
computer organization and com- puter architecture? 1.2. What, in
general terms, is the distinction between computer structure and
computer function? 1.3. What are the four main functions of a
computer? 1.4. List and briefly define the main structural
components of a computer. 1.5. List and briefly define the main
structural components of a processor. interconnection is by means
of a system bus, consisting of a number of con- ducting wires to
which all the other components attach. There may be one or more of
each of the aforementioned components. Tradi- tionally, there has
been just a single processor. In recent years, there has been in-
creasing use of multiple processors in a single computer. Some
design issues relating to multiple processors crop up and are
discussed as the text proceeds; Part Five focuses on such
computers. Each of these components will be examined in some detail
in Part Two. How- ever, for our purposes, the most interesting and
in some ways the most complex component is the CPU. Its major
structural components are as follows: Control unit: Controls the
operation of the CPU and hence the computer Arithmetic and logic
unit (ALU): Performs the computers data processing functions
Registers: Provides storage internal to the CPU CPU
interconnection: Some mechanism that provides for communication
among the control unit,ALU, and registers Each of these components
will be examined in some detail in Part Three, where we will see
that complexity is added by the use of parallel and pipelined
organizational techniques. Finally, there are several approaches to
the implementation of the con- trol unit; one common approach is a
microprogrammed implementation. In essence, a microprogrammed
control unit operates by executing microinstructions that define
the functionality of the control unit. With this approach, the
structure of the control unit can be depicted, as in Figure
1.4.This structure will be examined in Part Four. 1.3 KEY TERMS AND
REVIEW QUESTIONS arithmetic and logic unit (ALU) central processing
unit (CPU) computer architecture computer organization control unit
inputoutput (I/O) main memory processor registers system bus
38. CHAPTER 16 COMPUTER EVOLUTION AND PERFORMANCE 2.1 A Brief
History of Computers The First Generation:Vacuum Tubes The Second
Generation:Transistors The Third Generation: Integrated Circuits
Later Generations 2.2 Designing for Performance Microprocessor
Speed Performance Balance Improvements in Chip Organization and
Architecture 2.3 The Evolution of the Intel x86 Architecture 2.4
Embedded Systems and the ARM Embedded Systems ARM Evolution 2.5
Performance Assessment Clock Speed and Instructions per Second
Benchmarks Amdahls Law 2.6 Recommended Reading and Web Sites 2.7
Key Terms, Review Questions, and Problems
39. 2.1 / A BRIEF HISTORY OF COMPUTERS 17 KEY POINTS The
evolution of computers has been characterized by increasing
processor speed, decreasing component size, increasing memory size,
and increasing I/O capacity and speed. One factor responsible for
the great increase in processor speed is the shrinking size of
microprocessor components; this reduces the distance be- tween
components and hence increases speed. However, the true gains in
speed in recent years have come from the organization of the
processor, in- cluding heavy use of pipelining and parallel
execution techniques and the use of speculative execution
techniques (tentative execution of future in- structions that might
be needed). All of these techniques are designed to keep the
processor busy as much of the time as possible. A critical issue in
computer system design is balancing the performance of the various
elements so that gains in performance in one area are not hand-
icapped by a lag in other areas. In particular, processor speed has
increased more rapidly than memory access time. A variety of
techniques is used to compensate for this mismatch, including
caches, wider data paths from memory to processor, and more
intelligent memory chips. We begin our study of computers with a
brief history.This history is itself interest- ing and also serves
the purpose of providing an overview of computer structure and
function. Next, we address the issue of performance. A
consideration of the need for balanced utilization of computer
resources provides a context that is use- ful throughout the book.
Finally, we look briefly at the evolution of the two sys- tems that
serve as key examples throughout the book: the Intel x86 and ARM
processor families. 2.1 A BRIEF HISTORY OF COMPUTERS The First
Generation:Vacuum Tubes ENIAC The ENIAC (Electronic Numerical
Integrator And Computer), designed and constructed at the
University of Pennsylvania, was the worlds first general- purpose
electronic digital computer.The project was a response to U.S.
needs during World War II.The Armys Ballistics Research Laboratory
(BRL), an agency respon- sible for developing range and trajectory
tables for new weapons, was having diffi- culty supplying these
tables accurately and within a reasonable time frame.Without these
firing tables, the new weapons and artillery were useless to
gunners.The BRL employed more than 200 people who, using desktop
calculators, solved the neces- sary ballistics equations.
Preparation of the tables for a single weapon would take one person
many hours, even days.
40. 18 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE 1 In this
book, unless otherwise noted, the term instruction refers to a
machine instruction that is directly interpreted and executed by
the processor, in contrast to an instruction in a high-level lan-
guage, such as Ada or C++, which must first be compiled into a
series of machine instructions before being executed. John Mauchly,
a professor of electrical engineering at the University of
Pennsylvania, and John Eckert, one of his graduate students,
proposed to build a general-purpose computer using vacuum tubes for
the BRLs application. In 1943, the Army accepted this proposal, and
work began on the ENIAC. The resulting machine was enormous,
weighing 30 tons, occupying 1500 square feet of floor space, and
containing more than 18,000 vacuum tubes. When operating, it con-
sumed 140 kilowatts of power. It was also substantially faster than
any electro- mechanical computer, capable of 5000 additions per
second. The ENIAC was a decimal rather than a binary machine. That
is, numbers were represented in decimal form, and arithmetic was
performed in the decimal sys- tem. Its memory consisted of 20
accumulators, each capable of holding a 10-digit decimal number. A
ring of 10 vacuum tubes represented each digit. At any time, only
one vacuum tube was in the ON state, representing one of the 10
digits. The major drawback of the ENIAC was that it had to be
programmed manually by set- ting switches and plugging and
unplugging cables. The ENIAC was completed in 1946, too late to be
used in the war effort. In- stead, its first task was to perform a
series of complex calculations that were used to help determine the
feasibility of the hydrogen bomb. The use of the ENIAC for a
purpose other than that for which it was built demonstrated its
general-purpose nature.The ENIAC continued to operate under BRL
management until 1955, when it was disassembled. THE VON NEUMANN
MACHINE The task of entering and altering programs for the ENIAC
was extremely tedious.The programming process could be facilitated
if the program could be represented in a form suitable for storing
in memory alongside the data.Then, a computer could get its
instructions by reading them from memory, and a program could be
set or altered by setting the values of a portion of memory. This
idea, known as the stored-program concept, is usually attributed to
the ENIAC designers, most notably the mathematician John von
Neumann, who was a consultant on the ENIAC project.Alan Turing
developed the idea at about the same time.The first publication of
the idea was in a 1945 proposal by von Neumann for a new computer,
the EDVAC (Electronic Discrete Variable Computer). In 1946, von
Neumann and his colleagues began the design of a new stored-
program computer, referred to as the IAS computer, at the Princeton
Institute for Advanced Studies.The IAS computer, although not
completed until 1952, is the pro- totype of all subsequent
general-purpose computers. Figure 2.1 shows the general structure
of the IAS computer (compare to mid- dle portion of Figure 1.4). It
consists of A main memory, which stores both data and instructions1
An arithmetic and logic unit (ALU) capable of operating on binary
data
41. 2.1 / A BRIEF HISTORY OF COMPUTERS 19 Main memory (M)
Central Processing Unit (CPU) Arithmetic- logic unit (CA) Program
control unit (CC) I/O Equip- ment (I, O) Figure 2.1 Structure of
the IAS Computer A control unit, which interprets the instructions
in memory and causes them to be executed Input and output (I/O)
equipment operated by the control unit This structure was outlined
in von Neumanns earlier proposal, which is worth quoting at this
point [VONN45]: 2.2 First: Because the device is primarily a
computer, it will have to perform the elementary operations of
arithmetic most fre- quently. These are addition, subtraction,
multiplication and divi- sion. It is therefore reasonable that it
should contain specialized organs for just these operations. It
must be observed, however, that while this principle as such is
probably sound, the specific way in which it is realized re- quires
close scrutiny. At any rate a central arithmetical part of the
device will probably have to exist and this constitutes the first
spe- cific part: CA. 2.3 Second: The logical control of the device,
that is, the proper sequencing of its operations, can be most
efficiently carried out by a central control organ. If the device
is to be elastic, that is, as nearly as possible all purpose, then
a distinction must be made be- tween the specific instructions
given for and defining a particular problem, and the general
control organs which see to it that these instructionsno matter
what they areare carried out. The for- mer must be stored in some
way; the latter are represented by def- inite operating parts of
the device. By the central control we mean this latter function
only, and the organs which perform it form the second specific
part: CC.
42. 20 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE 2 There
is no universal definition of the term word. In general, a word is
an ordered set of bytes or bits that is the normal unit in which
information may be stored, transmitted, or operated on within a
given com- puter. Typically, if a processor has a fixed-length
instruction set, then the instruction length equals the word
length. 2.4 Third: Any device which is to carry out long and
compli- cated sequences of operations (specifically of
calculations) must have a considerable memory . . . (b) The
instructions which govern a complicated problem may constitute
considerable material, particularly so, if the code is
circumstantial (which it is in most arrangements). This material
must be remembered. At any rate, the total memory constitutes the
third specific part of the device: M. 2.6 The three specific parts
CA, CC (together C), and M cor- respond to the associative neurons
in the human nervous system. It remains to discuss the equivalents
of the sensory or afferent and the motor or efferent neurons.These
are the input and output organs of the device. The device must be
endowed with the ability to maintain input and output (sensory and
motor) contact with some specific medium of this type. The medium
will be called the outside record- ing medium of the device: R. 2.7
Fourth: The device must have organs to transfer . . . infor- mation
from R into its specific parts C and M. These organs form its
input, the fourth specific part: I. It will be seen that it is best
to make all transfers from R (by I) into M and never directly from
C. 2.8 Fifth: The device must have organs to transfer . . . from
its specific parts C and M into R.These organs form its output, the
fifth specific part: O. It will be seen that it is again best to
make all trans- fers from M (by O) into R, and never directly from
C. With rare exceptions, all of todays computers have this same
general structure and function and are thus referred to as von
Neumann machines. Thus, it is worth- while at this point to
describe briefly the operation of the IAS computer [BURK46].
Following [HAYE98], the terminology and notation of von Neumann are
changed in the following to conform more closely to modern usage;
the examples and illus- trations accompanying this discussion are
based on that latter text. The memory of the IAS consists of 1000
storage locations, called words, of 40 binary digits (bits) each.2
Both data and instructions are stored there. Numbers are
represented in binary form, and each instruction is a binary code.
Figure 2.2 illustrates these formats. Each number is represented by
a sign bit and a 39-bit value. A word may also contain two 20-bit
instructions, with each instruction consisting of an 8-bit
operation code (opcode) specifying the operation to be performed
and a 12-bit address designating one of the words in memory
(numbered from 0 to 999). The control unit operates the IAS by
fetching instructions from memory and executing them one at a time.
To explain this, a more detailed structure diagram is
43. 2.1 / A BRIEF HISTORY OF COMPUTERS 21 Figure 2.2 IAS Memory
Formats needed, as indicated in Figure 2.3. This figure reveals
that both the control unit and the ALU contain storage locations,
called registers, defined as follows: Memory buffer register (MBR):
Contains a word to be stored in memory or sent to the I/O unit, or
is used to receive a word from memory or from the I/O unit. Memory
address register (MAR): Specifies the address in memory of the word
to be written from or read into the MBR. Instruction register (IR):
Contains the 8-bit opcode instruction being exe- cuted. Instruction
buffer register (IBR): Employed to hold temporarily the right- hand
instruction from a word in memory. Program counter (PC): Contains
the address of the next instruction-pair to be fetched from memory.
Accumulator (AC) and multiplier quotient (MQ): Employed to hold
tem- porarily operands and results of ALU operations. For example,
the result of multiplying two 40-bit numbers is an 80-bit number;
the most significant 40 bits are stored in the AC and the least
significant in the MQ. The IAS operates by repetitively performing
an instruction cycle, as shown in Figure 2.4. Each instruction
cycle consists of two subcycles. During the fetch cycle, the opcode
of the next instruction is loaded into the IR and the address
portion is loaded into the MAR. This instruction may be taken from
the IBR, or it can be ob- tained from memory by loading a word into
the MBR, and then down to the IBR, IR, and MAR. Why the
indirection? These operations are controlled by electronic
circuitry and result in the use of data paths. To simplify the
electronics, there is only one (a) Number wordSign bit 0 39 (b)
Instruction word Opcode Address Left instruction 0 8 20 28 39 1
Right instruction Opcode Address
44. 22 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE Figure
2.3 Expanded Structure of IAS Computer AC IBR PC IR Control
circuits Addresses Control signals Instructions and data MAR MBR MQ
Arithmetic-logic circuits Arithmetic-logic unit (ALU) Program
control unit Input output equipment Main memory M register that is
used to specify the address in memory for a read or write and only
one register used for the source or destination. Once the opcode is
in the IR,the execute cycle is performed.Control circuitry in-
terprets the opcode and executes the instruction by sending out the
appropriate con- trol signals to cause data to be moved or an
operation to be performed by the ALU. The IAS computer had a total
of 21 instructions, which are listed in Table 2.1. These can be
grouped as follows: Data transfer: Move data between memory and ALU
registers or between two ALU registers.
45. 2.1 / A BRIEF HISTORY OF COMPUTERS 23 Figure 2.4 Partial
Flowchart of IAS Operation Start Is next instruction in IBR? MAR PC
MBR M(MAR) IR IBR (0:7) MAR IBR (8:19) IR MBR (20:27) MAR MBR
(28:39) Left instruction required? IBR MBR (20:39) IR MBR (0:7) MAR
MBR (8:19) PC PC + 1 Yes Yes Yes No No M(X) = contents of memory
location whose address is X (i:j) = bits i through j No memory
access required Decode instruction in IR AC M(X) Go to M(X, 0:19)
If AC > 0 then go to M(X, 0:19) AC AC + M(X) Is AC > 0? MBR
M(MAR) MBR M(MAR)PC MAR AC MBR AC AC + MBR Fetch cycle Execution
cycle Unconditional branch: Normally, the control unit executes
instructions in se- quence from memory. This sequence can be
changed by a branch instruction, which facilitates repetitive
operations. Conditional branch: The branch can be made dependent on
a condition, thus allowing decision points. Arithmetic: Operations
performed by the ALU. Address modify: Permits addresses to be
computed in the ALU and then in- serted into instructions stored in
memory. This allows a program considerable addressing
flexibility.
46. Table 2.1 The IAS Instruction Set Instruction Type Opcode
Symbolic Representation Description 00001010 LOAD MQ Transfer
contents of register MQ to the accumulator AC 00001001 LOAD MQ,M(X)
Transfer contents of memory location X to MQ 00100001 STOR M(X)
Transfer contents of accumulator to memory location X Data transfer
00000001 LOAD M(X) Transfer M(X) to the accumulator 00000010 LOAD
M(X)- Transfer M(X) to the accumulator- 00000011 LOAD |M(X)|
Transfer absolute value of M(X) to the accumulator 00000100 LOAD
|M(X)|- Transfer |M(X)| to the accumulator- Unconditional branch
00001101 JUMP M(X,0:19) Take next instruction from left half of
M(X) 00001110 JUMP M(X,20:39) Take next instruction from right half
of M(X) Conditional branch 00001111 JUMP M(X,0:19)+ If number in
the accumulator is nonnegative, take next in- struction from left
half of M(X) 00010000 JUMP M(X,20:39)+ If number in the accumulator
is nonnegative, take next instruction from right half of M(X)
00000101 ADD M(X) Add M(X) to AC; put the result in AC 00000111 ADD
|M(X)| Add |M(X)| to AC; put the result in AC 00000110 SUB M(X)
Subtract M(X) from AC; put the result in AC 00001000 SUB |M(X)|
Subtract |M(X)| from AC; put the remainder in AC Arithmetic
00001011 MUL M(X) Multiply M(X) by MQ; put most significant bits of
result in AC, put least significant bits in MQ 00001100 DIV M(X)
Divide AC by M(X); put the quotient in MQ and the remainder in AC
00010100 LSH Multiply accumulator by 2; i.e., shift left one bit
position 00010101 RSH Divide accumulator by 2; i.e., shift right
one position Address modify 00010010 STOR M(X,8:19) Replace left
address field at M(X) by 12 rightmost bits of AC 00010011 STOR
M(X,28:39) Replace right address field at M(X) by 12 rightmost bits
of AC 24 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE Table 2.1
presents instructions in a symbolic, easy-to-read form.Actually,
each instruction must conform to the format of Figure 2.2b. The
opcode portion (first 8 bits) specifies which of the 21
instructions is to be executed. The address portion (remaining 12
bits) specifies which of the 1000 memory locations is to be
involved in the execution of the instruction. Figure 2.4 shows
several examples of instruction execution by the control unit. Note
that each operation requires several steps. Some of these are quite
elaborate. The multiplication operation requires 39 suboperations,
one for each bit position ex- cept that of the sign bit. COMMERCIAL
COMPUTERS The 1950s saw the birth of the computer industry with two
companies, Sperry and IBM, dominating the marketplace.
47. 2.1 / A BRIEF HISTORY OF COMPUTERS 25 3 Also called
downward compatible. The same concept, from the point of view of
the older system, is referred to as upward compatible, or forward
compatible. In 1947, Eckert and Mauchly formed the Eckert-Mauchly
Computer Corpora- tion to manufacture computers commercially.Their
first successful machine was the UNIVAC I (Universal Automatic
Computer), which was commissioned by the Bureau of the Census for
the 1950 calculations.The Eckert-Mauchly Computer Cor- poration
became part of the UNIVAC division of Sperry-Rand Corporation,
which went on to build a series of successor machines. The UNIVAC I
was the first successful commercial computer. It was intended for
both scientific and commercial applications. The first paper
describing the sys- tem listed matrix algebraic computations,
statistical problems, premium billings for a life insurance
company, and logistical problems as a sample of the tasks it could
perform. The UNIVAC II, which had greater memory capacity and
higher performance than the UNIVAC I, was delivered in the late
1950s and illustrates several trends that have remained
characteristic of the computer industry. First, advances in
technology allow companies to continue to build larger, more
powerful computers. Second, each company tries to make its new
machines backward compatible3 with the older ma- chines.This means
that the programs written for the older machines can be executed on
the new machine. This strategy is adopted in the hopes of retaining
the customer base; that is, when a customer decides to buy a newer
machine, he or she is likely to get it from the same company to
avoid losing the investment in programs. The UNIVAC division also
began development of the 1100 series of comput- ers, which was to
be its major source of revenue. This series illustrates a
distinction that existed at one time. The first model, the UNIVAC
1103, and its successors for many years were primarily intended for
scientific applications, involving long and complex calculations.
Other companies concentrated on business applications, which
involved processing large amounts of text data. This split has
largely disappeared, but it was evident for a number of years. IBM,
then the major manufacturer of punched-card processing equipment,
de- livered its first electronic stored-program computer, the 701,
in 1953.The 701 was in- tended primarily for scientific
applications [BASH81]. In 1955, IBM introduced the companion 702
product, which had a number of hardware features that suited it to
business applications. These were the first of a long series of
700/7000 computers that established IBM as the overwhelmingly
dominant computer manufacturer. The Second Generation:Transistors
The first major change in the electronic computer came with the
replacement of the vacuum tube by the transistor. The transistor is
smaller, cheaper, and dissipates less heat than a vacuum tube but
can be used in the same way as a vacuum tube to con- struct
computers. Unlike the vacuum tube, which requires wires, metal
plates, a glass capsule, and a vacuum, the transistor is a
solid-state device, made from silicon. The transistor was invented
at Bell Labs in 1947 and by the 1950s had launched an electronic
revolution. It was not until the late 1950s, however, that fully
transis- torized computers were commercially available. IBM again
was not the first
48. 26 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE company
to deliver the new technology. NCR and, more successfully, RCA were
the front-runners with some small transistor machines. IBM followed
shortly with the 7000 series. The use of the transistor defines the
second generation of computers. It has be- come widely accepted to
classify computers into generations based on the fundamen- tal
hardware technology employed (Table 2.2). Each new generation is
characterized by greater processing performance, larger memory
capacity, and smaller size than the previous one. But there are
other changes as well. The second generation saw the introduc- tion
of more complex arithmetic and logic units and control units, the
use of high- level programming languages, and the provision of
system software with the computer. The second generation is
noteworthy also for the appearance of the Digital Equipment
Corporation (DEC). DEC was founded in 1957 and, in that year,
deliv- ered its first computer, the PDP-1.This computer and this
company began the mini- computer phenomenon that would become so
prominent in the third generation. THE IBM 7094 From the
introduction of the 700 series in 1952 to the introduction of the
last member of the 7000 series in 1964, this IBM product line
underwent an evolution that is typical of computer products.
Successive members of the product line show increased performance,
increased capacity, and/or lower cost. Table 2.3 illustrates this
trend.The size of main memory, in multiples of 210 36-bit words,
grew from 2K (1K 210 ) to 32K words,4 while the time to access one
word of memory, the memory cycle time, fell from 30 s to 1.4 s. The
number of opcodes grew from a modest 24 to 185. The final column
indicates the relative execution speed of the central process- ing
unit (CPU). Speed improvements are achieved by improved electronics
(e.g., a transistor implementation is faster than a vacuum tube
implementation) and more complex circuitry. For example, the IBM
7094 includes an Instruction Backup Reg- ister, used to buffer the
next instruction.The control unit fetches two adjacent words mm =
Table 2.2 Computer Generations Generation Approximate Dates
Technology Typical Speed (operations per second) 1 19461957 Vacuum
tube 40,000 2 19581964 Transistor 200,000 3 19651971 Small and
medium scale integration 1,000,000 4 19721977 Large scale
integration 10,000,000 5 19781991 Very large scale integration
100,000,000 6 1991 Ultra large scale integration 1,000,000,000 4 A
discussion of the uses of numerical prefixes, such as kilo and
giga, is contained in a supporting docu- ment at the Computer
Science Student Resource Site at
WilliamStallings.com/StudentSupport.html.
49. Table 2.3 Example members of the IBM 700/7000 Series Model
Number First Delivery CPU Tech- nology Memory Tech- nology Cycle
Time ( s)M Memory Size (K) Number of Opcodes Number of Index
Registers Hardwired Floating- Point I/O Overlap (Chan- nels)
Instruc- tion Fetch Overlap Speed (relative to 701) 701 1952 Vacuum
tubes Electrostatic tubes 30 24 24 0 no no no 1 704 1955 Vacuum
tubes Core 12 432 80 3 yes no no 2.5 709 1958 Vacuum tubes Core 12
32 140 3 yes yes no 4 7090 1960 Transistor Core 2.18 32 169 3 yes
yes no 25 7094 I 1962 Transistor Core 2 32 185 7 yes (double
precision) yes yes 30 7094 II 1964 Transistor Core 1.4 32 185 7 yes
(double precision) yes yes 50 27
50. 28 CHAPTER 2 / COMPUTER EVOLUTION AND PERFORMANCE from
memory for an instruction fetch. Except for the occurrence of a
branching in- struction, which is typically infrequent, this means
that the control unit has to access memory for an instruction on
only half the instruction cycles. This prefetching sig- nificantly
reduces the average instruction cycle time. The remainder of the
columns of Table 2.3 will become clear as the text proceeds. Figure
2.5 shows a large (many peripherals) configuration for an IBM 7094,
which is representative of second-generation computers [BELL71].
Several differ- ences from the IAS computer are worth noting. The
most important of these is the use of data channels. A data channel
is an independent I/O module with its own processor and its own
instruction set. In a computer system with such devices, the CPU
does not execute detailed I/O instructions. Such instructions are
stored in a main memory to be executed by a special-purpose
processor in the data channel it- self.The CPU initiates an I/O
transfer by sending a control signal to the data channel,
instructing it to execute a sequence of instructions in memory.The
data channel per- forms its task independently of the CPU and
signals the CPU when the operation is complete. This arrangement
relieves the CPU of a considerable processing burden. Another new
feature is the multiplexor, which is the central termination point
for data channels,the CPU,and memory. The multiplexor schedules
access to the memory from the CPU and data channels, allowing these
devices to act independently. The Third Generation: Integrated
Circuits A single, self-contained transistor is called a discrete
component. Throughout the 1950s and early 1960s, electronic
equipment was composed largely of discrete CPU Memory Data channel
Mag tape units Card punch Line printer Card reader Drum Disk Disk
Hyper tapes Teleprocessing equipment Data channel Data channel Data
channel Multi plexor Figure 2.5 An IBM 7094 Configuration