66
SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS Module 1

Microprocessor & Microcontrollers Module 1

Embed Size (px)

DESCRIPTION

Software architecture of the 8086/8088 microprocessorsAddress space, Data organization, registers, memory segmentation and addressing, stack, I/O space, Assembly language programming and program development.

Citation preview

Page 1: Microprocessor & Microcontrollers Module 1

SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS

Module 1

SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS

bull 21 Microarchitecture of the 80888086 Microprocessorbull 22 Software Model of the 80888086 Microprocessorbull 23 Memory Address Space and Data Organizationbull 24 Data Typesbull 25 Segment Registers and Memory Segmentationbull 26 Dedicated Reserved and General-Used Memorybull 27 Instruction Pointer

SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS

bull 28 Data Registersbull 29 Pointer and Index Registerbull 210 Status Registerbull 211 Generating a Memory Addressbull 212 The Stackbull 213 InputOutput Address Space

21 Microarchitecture of the 80888086 Microprocessor

bull 80888086 both employ parallel processingbull 80888086 contain two processing unit ndash the bus interface unit

(BIU) and execution unit (EU)bull The bus interface unit is the path that 80888086 connects to

external devicesbull The system bus includes an 8-bit bidirectional data bus for 8088 (16

bits for the 8086) a 20-bit address bus and the signal needed to control transfers over the bus

21 Microarchitecture of the 80888086 Microprocessor

21 Microarchitecture of the 0888086 Microprocessor

bull Components in BIU ndash Segment registerndash The instruction pointer ndash Address generation adderndash Bus control logic ndash Instruction queue

bull Components in EUndash Arithmetic logic unit ALUndash Status and control flagsndash General-purpose registersndash Temporary-operand registers

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 2: Microprocessor & Microcontrollers Module 1

SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS

bull 21 Microarchitecture of the 80888086 Microprocessorbull 22 Software Model of the 80888086 Microprocessorbull 23 Memory Address Space and Data Organizationbull 24 Data Typesbull 25 Segment Registers and Memory Segmentationbull 26 Dedicated Reserved and General-Used Memorybull 27 Instruction Pointer

SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS

bull 28 Data Registersbull 29 Pointer and Index Registerbull 210 Status Registerbull 211 Generating a Memory Addressbull 212 The Stackbull 213 InputOutput Address Space

21 Microarchitecture of the 80888086 Microprocessor

bull 80888086 both employ parallel processingbull 80888086 contain two processing unit ndash the bus interface unit

(BIU) and execution unit (EU)bull The bus interface unit is the path that 80888086 connects to

external devicesbull The system bus includes an 8-bit bidirectional data bus for 8088 (16

bits for the 8086) a 20-bit address bus and the signal needed to control transfers over the bus

21 Microarchitecture of the 80888086 Microprocessor

21 Microarchitecture of the 0888086 Microprocessor

bull Components in BIU ndash Segment registerndash The instruction pointer ndash Address generation adderndash Bus control logic ndash Instruction queue

bull Components in EUndash Arithmetic logic unit ALUndash Status and control flagsndash General-purpose registersndash Temporary-operand registers

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 3: Microprocessor & Microcontrollers Module 1

SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS

bull 28 Data Registersbull 29 Pointer and Index Registerbull 210 Status Registerbull 211 Generating a Memory Addressbull 212 The Stackbull 213 InputOutput Address Space

21 Microarchitecture of the 80888086 Microprocessor

bull 80888086 both employ parallel processingbull 80888086 contain two processing unit ndash the bus interface unit

(BIU) and execution unit (EU)bull The bus interface unit is the path that 80888086 connects to

external devicesbull The system bus includes an 8-bit bidirectional data bus for 8088 (16

bits for the 8086) a 20-bit address bus and the signal needed to control transfers over the bus

21 Microarchitecture of the 80888086 Microprocessor

21 Microarchitecture of the 0888086 Microprocessor

bull Components in BIU ndash Segment registerndash The instruction pointer ndash Address generation adderndash Bus control logic ndash Instruction queue

bull Components in EUndash Arithmetic logic unit ALUndash Status and control flagsndash General-purpose registersndash Temporary-operand registers

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 4: Microprocessor & Microcontrollers Module 1

21 Microarchitecture of the 80888086 Microprocessor

bull 80888086 both employ parallel processingbull 80888086 contain two processing unit ndash the bus interface unit

(BIU) and execution unit (EU)bull The bus interface unit is the path that 80888086 connects to

external devicesbull The system bus includes an 8-bit bidirectional data bus for 8088 (16

bits for the 8086) a 20-bit address bus and the signal needed to control transfers over the bus

21 Microarchitecture of the 80888086 Microprocessor

21 Microarchitecture of the 0888086 Microprocessor

bull Components in BIU ndash Segment registerndash The instruction pointer ndash Address generation adderndash Bus control logic ndash Instruction queue

bull Components in EUndash Arithmetic logic unit ALUndash Status and control flagsndash General-purpose registersndash Temporary-operand registers

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 5: Microprocessor & Microcontrollers Module 1

21 Microarchitecture of the 80888086 Microprocessor

21 Microarchitecture of the 0888086 Microprocessor

bull Components in BIU ndash Segment registerndash The instruction pointer ndash Address generation adderndash Bus control logic ndash Instruction queue

bull Components in EUndash Arithmetic logic unit ALUndash Status and control flagsndash General-purpose registersndash Temporary-operand registers

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 6: Microprocessor & Microcontrollers Module 1

21 Microarchitecture of the 0888086 Microprocessor

bull Components in BIU ndash Segment registerndash The instruction pointer ndash Address generation adderndash Bus control logic ndash Instruction queue

bull Components in EUndash Arithmetic logic unit ALUndash Status and control flagsndash General-purpose registersndash Temporary-operand registers

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 7: Microprocessor & Microcontrollers Module 1

21 Microarchitecture of the 80888086 Microprocessor

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 8: Microprocessor & Microcontrollers Module 1

22 Software Model of the 80888086 Microprocessor

bull 8088 microprocessor includes 13 16-bit internal registersndash The instruction pointer IP 1048729ndash Four data registers AX BX CX DX 1048729ndash Two pointer registers BP SP 1048729ndash Two index registers SI DI 1048729ndash Four segment registers CS DS SS ES

bull The status register SR with nine of its bits implemented for status and control flags

bull The memory address space is 1 Mbytes and the IO address space is 64 Kbytes in length

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 9: Microprocessor & Microcontrollers Module 1

22 Software Model of the 80888086 Microprocessor

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 10: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull The 8088 microcomputer supports 1 Mbytes of external memory bull The memory of an 8088-based microcomputer is organized as 8-bit

bytes not as 16-bit words

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 11: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull Lower address byte and higher address byte

The two bytes represent the word01010101000000102 = 550216

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 12: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull EXAMPLEndash What is the data word shown in the previous figure (b)

Express the result in hexadecimal form Is it stored at an even- or odd-addressed word boundary Is it an aligned or misaligned word of data

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 13: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull Solutionndash 111111012 = FD16 = FDH

ndash 101010102 = AA16 = AAH

bull Together the two bytes give the wordndash 11111101101010102 = FDAA16 = FDAAH

bull Expressing the address of the least significant byte in binary form gives ndash 0072BH = 0072B16 = 000000000111001010112

bull Therefore it is misaligned word of data

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 14: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull Even- or odd-addressed wordndash If the least significant bit of

the address is 0 the word is said to be held at an even-addressed boundary

bull Aligned word or misaligned word

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 15: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull A double word corresponds to four consecutive bytes of data stored in memory

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 16: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull A pointer is a double wordndash The higher address word represents the segment base

addressndash The lower address word represents the offset

Example Segment base address = 3B4C16 = 00111011010011002

Offset value = 006516 = 00000000011001012

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 17: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull EXAMPLEndash How should the pointer with segment base address equal to

A00016 and offset address 55FF16 be stored at an even-address boundary starting at 0000816 Is the double word aligned or misaligned

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 18: Microprocessor & Microcontrollers Module 1

23 Memory Address Space and Data Organization

bull Solutionndash Storage of the two-word pointer requires four consecutive byte

locations in memory starting at address 0000816

ndash The least-significant byte of the offset is stored at address 0000816 and is shown as FF16 in the previous figure

ndash The most significant byte of the offset 5516 is stored at address 0000916

ndash These two bytes are followed by the least significant byte of the segment base address 0016 at address 0000A16

ndash Its most significant byte A016 at address 0000B16ndash Since the double word is stored in memory starting at address

0000816 it is aligned

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 19: Microprocessor & Microcontrollers Module 1

24 Data Typesbull Integer data type

ndash Unsigned or signed integer ndash Byte-wide or word-wide integer

bull The most significant bit of a signed integer is a sign bitndash A zero in this bit position identifies a positive number

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 20: Microprocessor & Microcontrollers Module 1

24 Data Typesbull The range of a signed byte integer is +127 ~ -128bull The range of a signed word integer is +32767 ~ -32768bull The 8088 always expresses negative numbers in 2rsquoscomplement

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 21: Microprocessor & Microcontrollers Module 1

24 Data Typesbull EXAMPLE

ndash A signed word integer equals FEFF16 What decimal number does it represent

bull Solutionndash FEFF16 = 11111110111111112

ndash The most significant bit is 1 the number is negative and is in 2rsquos complement form

ndash Converting to its binary equivalent by subtracting 1 from the least significant bit

ndash Then complement all bits givebull FEFF16 = -00000001000000012 = -257

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 22: Microprocessor & Microcontrollers Module 1

24 Data Typesbull The 8088 can also process data that is coded as binary-coded

decimal (BCD) numbersbull BCD data can be stored in packed or unpacked forms

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 23: Microprocessor & Microcontrollers Module 1

24 Data Typesbull EXAMPLE

ndash The packed BCD data stored at byte address 0100016 equals 100100012 What is the two digit decimal number

bull Solutionndash Writing the value 100100012 as separate BCD digits gives

ndash 100100012 = 1001BCD0001BCD = 9110

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 24: Microprocessor & Microcontrollers Module 1

24 Data Types

bull The ASCII (American Standard Code for Information Interchange) digit

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 25: Microprocessor & Microcontrollers Module 1

24 Data Typesbull EXAMPLE

ndash Byte addresses 0110016 through 0110416 contain the ASCII data 01000001 01010011 01000011 01001001 and 01001001 respectively What do the data stand for

bull Solutionndash Using the ASCII table the data are converted to ASCII codendash (01100H) = 010000012 = Andash (01101H) = 010100112 = Sndash (01102H) = 010000112 = Cndash (01103H) = 010010012 = Indash (01104H) = 010010012 = I

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 26: Microprocessor & Microcontrollers Module 1

25 Segment Registers and Memory Segmentation

bull A segment represents an independently addressable unit of memory consisting of 64K consecutive bytewide storage locations 1048729

bull Each segment is assigned a base address that identifies its starting point 1048729

bull Only four segments can be active at a time 1048729 ndash The code segment 1048729 ndash The stack segment 1048729 ndash The data segment 1048729 ndash The extra segment 1048729

bull The addresses of the active segments are stored in the four internal segment registers CS SS DS ES

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 27: Microprocessor & Microcontrollers Module 1

25 Segment Registers and Memory Segmentation

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 28: Microprocessor & Microcontrollers Module 1

25 Segment Registers and Memory Segmentation

bull Four segments give a maximum of 256Kbytes of active memoryndash Code segment ndash 64K 1048729 ndash Stack ndash 64K 1048729 ndash Data storage ndash 128K

bull The base address of a segment must reside on a 16-byte address boundary

bull User accessible segments can be set up to be contiguous adjacent disjointed or even overlapping

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 29: Microprocessor & Microcontrollers Module 1

25 Segment Registers and Memory Segmentation

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 30: Microprocessor & Microcontrollers Module 1

26 Dedicated Reserved and General-Used Memory

bull The dedicated memory (0000016 ~ 0001316) are used for storage of the pointers to 8088rsquos internal interrupt service routines and exceptions

bull The reserved memory (0001416 ~ 0007F16) are used for storage of the pointers to user-defined interrupts

bull The 128-byte dedicated and reserved memory can contain 32 interrupt pointers

bull The general-use memory (0008016 ~ FFFEF16) stores data or instructions of the program

bull The dedicated memory (FFFE016 ~ FFFEB16) are used for hardware reset jump instruction

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 31: Microprocessor & Microcontrollers Module 1

26 Dedicated Reserved and General-Used Memory

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 32: Microprocessor & Microcontrollers Module 1

27 Instruction Pointerbull The instruction pointer (IP) identifies the location of the next word

of instruction code to be fetched from the current code segment of memory

bull The offset in IP is combined with the current value in CS to generate the address of the instruction code

bull During normal operation the 8088 fetches instructions from the code segment of memory stores them in its instruction queue and executes them one after the other

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 33: Microprocessor & Microcontrollers Module 1

28 Data Registersbull Data registers are used for temporary storage of frequently used

intermediate resultsbull The contents of the data registers can be read loaded or modified

through softwarebull The four data registers are

ndash Accumulator register A 1048729 ndash Base register B 1048729 ndash Counter register C 1048729 ndash Data register D

bull Each register can be accessed either as a whole (16 bits) for word data or as 8-bit data for byte-wide operation

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 34: Microprocessor & Microcontrollers Module 1

28 Data Registers

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 35: Microprocessor & Microcontrollers Module 1

28 Data Registers

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 36: Microprocessor & Microcontrollers Module 1

29 Pointer and Index Registerbull The pointer registers and index registers are used to store offset

addresses bull Values held in the index registers are used to reference data

relative to the data segment or extra segment 1048729 bull The pointer registers are used to store offset addresses of memory

location relative to the stack segment register 1048729 bull Combining SP with the value in in SS (SSSP) results in a 20-bit

address that points to the top of the stack (TOS) 1048729 bull BP is used to access data within the stack segment of memory

ndash It is commonly used to reference subroutine parameters

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 37: Microprocessor & Microcontrollers Module 1

29 Pointer and Index Registerbull The index register are used to hold offset addresses for instructions

that access data in the data segmentbull The source index register (SI) is used for a source operand and the

destination index (DI) is used for a destination operandbull The four registers must always be used for 16-bit operations

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 38: Microprocessor & Microcontrollers Module 1

210 Status Registerbull The status register also called the flags register indicate conditions

that are produced as the result of executing an instructionbull Only nine bits of the register are implemented

ndash Six of these bits represent status flagsndash The other three bits represent control flags

bull The 8088 provides instructions within its instruction set that are able to use these flags to alter the sequence in which the program is executed

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 39: Microprocessor & Microcontrollers Module 1

210 Status Registerbull Status and control bits maintained in the flags registerbull Generally Set and Tested Individuallybull 9 1-bit flags in 8086 7 are unused

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 40: Microprocessor & Microcontrollers Module 1

210 Status Registerbull Status flags indicate current processor status

ndash CF Carry Flag Arithmetic CarryBorrowndash OF Overflow Flag Arithmetic Overflowndash ZF Zero Flag Zero Result Equal Comparendash SF Sign Flag Negative Result Non- Equal Comparendash PF Parity Flag Even Number of ldquo1rdquo bitsndash AF Auxiliary Carry Used with BCD Arithmetic

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 41: Microprocessor & Microcontrollers Module 1

210 Status Register

bull Control flags influence the 8086 during execution phasendash DF Direction Flag Auto IncrementDecrement

bull used for ldquostring operationsrdquondash IF Interrupt Flag Enables Interrupts

bull allows ldquofetch-executerdquo to be interruptedndash TF Trap Flag Allows Single-Step

bull for debugging causes interrupt after each op

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 42: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

bull A logical address in the 8088 microcomputer system is described by a segment base and an offset

bull The physical addresses that are used to access memory are 20 bits in length

bull The generation of the physical address involves combining a 16-bit offset value that is located in the instruction pointer a base pointer an index register or a pointer register and a 16-bit segment base value that is located in one of the segment register

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 43: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 44: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 45: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 46: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solution

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 47: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

bull EXAMPLEndash What would be the offset required to map to physical

address location 002C316 if the contents of the corresponding segment register are 002A16

bull Solutionndash The offset value can be obtained by shifting the contents of

the segment of the segment register left by four bit positions and then subtracting from the physical address Shifting left givebull 002A016

ndash Now subtracting we get the value of the offsetbull 002C316 ndash 002A016 = 002316

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 48: Microprocessor & Microcontrollers Module 1

211 Generating a Memory Address

bull Different logical addresses can be mapped to the same physical address location in memory

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 49: Microprocessor & Microcontrollers Module 1

212 The Stackbull The stack is implemented for temporary storage of information

such as data or addresses bull The stack is 64KBytes long and is organized from a software point of

view as 32K words 1048729 bull The contents of the SP and BP registers are used as offsets into the

stack segment memory while the segment base value is in the SS register 1048729

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 50: Microprocessor & Microcontrollers Module 1

212 The Stackbull Push instructions (PUSH) and pop instructions (POP) 1048729 bull Top of the stack (TOS) and bottom of the stack (BOS) 1048729 bull The 8088 can push word-wide data and address information onto

the stack from registers or memory bull Many stacks can exist but only one is active at a time

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 51: Microprocessor & Microcontrollers Module 1

212 The Stack

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 52: Microprocessor & Microcontrollers Module 1

212 The Stack

bull EXAMPLEndash Push operationndash ABOS = 0105016 +FFFE16 =

0110416

ndash ATOS = 0105016 +000816 =

0105816

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 53: Microprocessor & Microcontrollers Module 1

212 The Stack

bull EXAMPLEndash Pop operation

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 54: Microprocessor & Microcontrollers Module 1

213 InputOutput Address Spacebull The 8088 has separate memory and inputoutput (IO) address

spacebull The IO address space is the place where IO interfaces such as

printer and terminal ports are implementedbull The IO address range is from 000016 to FFFF16

ndash This represents 64KByte addressesbull The IO addresses are 16 bits long

ndash Each of these addresses corresponds to one byte-wide IO portbull Certain IO instructions can only perform operations to addresses

000016 thru 00FF16 (page 0)

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 55: Microprocessor & Microcontrollers Module 1

213 InputOutput Address Space

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 56: Microprocessor & Microcontrollers Module 1

213 InputOutput Address Space

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 57: Microprocessor & Microcontrollers Module 1

Addressing Modes

bull Addressing mode indicates a way of locating data or operands

bull Sequential control flow instructions

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 58: Microprocessor & Microcontrollers Module 1

Immediate

bull Immediate data is a part of instruction and appears in the form of successive byte or bytes

bull Example MOV AX 0005Hbull The immediate data may be 8-bit or 16-bit in

size

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 59: Microprocessor & Microcontrollers Module 1

Direct

bull A 16-bit memory address (offset) is directly specified in the instruction as a part of it

bull Example MOV AX [5000H]bull The effective address here is

10HDS+5000H

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 60: Microprocessor & Microcontrollers Module 1

Register

bull The data is stored in a register and it is referred using the particular register

bull All the registers except IP may be used in this mode

bull Example MOV BX AX

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 61: Microprocessor & Microcontrollers Module 1

Register Indirect

bull The address of the memory location which contains data or operand is determined in an indirect way using the offset registers

bull Example MOV AX [BX]bull The effective address of the data is given as

10HDS+ [BX]

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 62: Microprocessor & Microcontrollers Module 1

Indexed

bull Offset of the operand is stored in one of the index registers

bull DS and ES are the default segments for index registers SI and DI respectively

bull MOV AX [SI]bull The EA in this case is computed as

10HDS+ [SI]

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 63: Microprocessor & Microcontrollers Module 1

Register Relative

bull The data is available at an effective address formed by adding an 8-bit or 16-bit displacement with the content of any one of the registers BX BP SI and DI in the default (either DS or ES) segment

bull Example MOV AX 50H [BX]bull EA=10HDS+50H+ [BX]

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 64: Microprocessor & Microcontrollers Module 1

Based Indexed

bull Add content of a base register (any one of BX or BP) to the content of an index register (any one of SI or DI) The default segment register may be ES or DS

bull MOV AX [BX] [SI]bull EA= 10HDS+ [BX] + [SI]bull BX-base reg SI- Index

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed
Page 65: Microprocessor & Microcontrollers Module 1

Relative Based Indexed

bull The EA is formed by adding an 8-bit or 16-bit displacement with the sum of contents of any one of the bases and any one of the index registers in a default segment

bull Example MOV AX 50H [BX] [SI]bull EA=10HDS+ [BX] + [SI] + 50H

  • SOFTWARE ARCHITECTURE OF THE 8088 AND 8086 MICROPROCESSORS
  • Slide 2
  • Slide 3
  • 21 Microarchitecture of the 80888086 Microprocessor
  • Slide 5
  • 21 Microarchitecture of the 0888086 Microprocessor
  • Slide 7
  • 22 Software Model of the 80888086 Microprocessor
  • Slide 9
  • 23 Memory Address Space and Data Organization
  • Slide 11
  • Slide 12
  • Slide 13
  • Slide 14
  • Slide 15
  • Slide 16
  • Slide 17
  • Slide 18
  • 24 Data Types
  • Slide 20
  • Slide 21
  • Slide 22
  • Slide 23
  • Slide 24
  • Slide 25
  • 25 Segment Registers and Memory Segmentation
  • Slide 27
  • Slide 28
  • Slide 29
  • 26 Dedicated Reserved and General-Used Memory
  • Slide 31
  • 27 Instruction Pointer
  • 28 Data Registers
  • Slide 34
  • Slide 35
  • 29 Pointer and Index Register
  • Slide 37
  • 210 Status Register
  • Slide 39
  • Slide 40
  • Slide 41
  • Slide 42
  • 211 Generating a Memory Address
  • Slide 44
  • Slide 45
  • Slide 46
  • Slide 47
  • Slide 48
  • Slide 49
  • 212 The Stack
  • Slide 51
  • Slide 52
  • Slide 53
  • Slide 54
  • 213 InputOutput Address Space
  • Slide 56
  • Slide 57
  • Addressing Modes
  • Immediate
  • Direct
  • Register
  • Register Indirect
  • Indexed
  • Register Relative
  • Based Indexed
  • Relative Based Indexed