20
INTEL i3 PROCESSOR AMOL T. BAREWAR. M. Tech ( 1 st sem). ID no.=120151

DocumentI3

Embed Size (px)

Citation preview

  • 1. AMOL T. BAREWAR.M. Tech ( 1st sem).ID no.=120151

2. 22 3. Introduction of a processor Before discussing about i3 processor, let a smallintroduction of processor. A processor is the logic circuitry that responds to andprocesses the basic instructions that drive a computer. The term processor has generally replaced the termcentral processing unit (CPU). The processor in a personalcomputer or embedded in small devices is often called amicroprocessor. 3 4. Brief introduction about i3 processor The only question I have is if theres any advantage tousing a Core i3 over a Core2Duo. The Core i3 is a 3.2 GHz dual core chip, and its quite a bigimprovement over the Core2Duo. Its a good 700 MHzfaster, much faster bus with significantly faster RAM. The first Core i3 processors were launched on January 7,2010.4 5. the single core5 6. Multi-core CPU chipThe cores fit on a single processor socket .Also called CMP(Chip Multi-ProcessorTask level and Tread level parallelism.6 7. 7 8. Some features of i3Intel Hyper-Threading Technology (Intel HT Technology).Intel Virtualization Technology (Intel VT).Intel Smart Cache.Intel Smart Memory Access.Execute Disable Bit.8 9. Intel Hyper-Threading TechnologySingle core can run multiple thread.Simultaneous multi threading.Increase throughput and efficiency.Turbo Bust Technology.Thermal Design Power(TDP) 9 10. L1 D-Cache D-TLBL2 Cache and ControlInteger Floating PointSchedulers Uop queues Rename/Alloc BTB Trace Cache uCode ROM Decoder This scenario is impossible with SMTBus BTB and I-TLB on a single core Thread 1 Thread 2 (assuming a singleIMPOSSIBLE integer unit)10 11. L1 D-Cache D-TLB L1 D-Cache D-TLB Integer Floating Point IntegerFloating PointL2 Cache and Control L2 Cache and Control SchedulersSchedulers Uop queuesUop queues Rename/Alloc Rename/Alloc BTBTrace CacheuCodeBTBTrace CacheuCode ROMROM Decoder DecoderBus Bus BTB and I-TLBBTB and I-TLB Thread 1 Thread 3Thread 2 11 Thread 4 12. Speeding up the transfer of platform control between the guestoperating systems (OSs) and the virtual machine manager(VMM)/hypervisor.Enabling the VMM to uniquely assign I/O devices to guest OSsOptimizing the network for virtualization with adapter-basedacceleration 12 13. Server Virtualization Intel VT Flex Priority Intel VT Flex MigrationDesktop VirtualizationTypes of HypervisorType 1: oracle VM server for SPARCType2:VMWare workstation , Virtual BoxIts also provide help to run 32bit O.S. on 64 bit13 14. 14 15. Smart Cache is a level 2 or level 3 cache method for multipleexecution cores invented by Intel.It shares the cache among coresIt decrease the cache miss rate.It provide peak transfer rate of 96GB/sec .15 16. 16 17. Improve the performance.It aim to locate data as close as possible to reduce memorylatency time.It also include Memory disambiguation.17 18. 18 19. Malicious buffer overflow attacks pose a significant securitythreat to businesses.These attacks cost businesses precious productivity time, whichcan equal significant financial loss.It allows the processor to classify where application code can executand where it cannot in the memory.When a malicious worm attempts to insert code in the buffer,the processor disables code execution.19 20. REFERENCEShttp://www.intel.com/content/www/us/en/processors/core/core-i3-processor.htmlhttp://www.intel.com/products/processor/corei3/specifications.htmhttp://www.intel.com/technology/xdbit/index.htmhttp://en.wikipedia.org/wiki/Hypervisorhttp://en.wikipedia.org/wiki/Memory_disambiguationhttp://www.realworldtech.com/merom/9/20