XMC-6VLX
EDK
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XMC-6VLX EDK
Xilinx Tools
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Create New ISE Project
• Xilinx ISE Design Suite 13.2 -> ISE Designs Tools -> Project Navigator
• File -> New Project
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Project Settings
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Project Summary
Select New Source Icon
Leaving ISE to XPS
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Example Project Creation
New Source Wizard
• Add the Processor Subsystem as a module in ISE
• The will start Xilinx Platform Studio
Base System Builder Wizard
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Create System for Custom Board
Add axi_bram_ctrl
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Add DDR3 and UART
Project IP at this point
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XPS View of Project
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Look At IP Provided
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IP Continued
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Add AXI_CDMA
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AXI_CDMA Address
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Select MicroBlaze Connect
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Add AXI_PCIe IP
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AXI_PCIe Address
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Default AXI bus Connections
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Connect the M_AXI of axi_cdma_0 to S_AXI of the axi_pcie_0
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connect the S_AXI_CTL to the AXI4lite bus
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Exit XPS Take Us Back To ISE
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XPS is a sub-module in the ISE project
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Xilinx CORE Generator
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Core Generated QDRii
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XMC-6VLX EDK
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