Mil/Aero LDL 2
A Little History
The following slides show what military and aerospace flows were available from Xilinx for many yearsFeedback from the space industry and recent military satilitte failures indicated the need for more intensive screening for some applicationsOur currently proposed full-V flow will follow this brief history
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Manufacturing Flows: Serving the needs from “Space to Base”
R, V, H, SMD
C, I, N, M, SMD
C, I, N, M, SMD
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Rad Tolerant
Most Select
M&SMD Grade
More Select
N-Grade
Select Products
C&I-Grade
All Xilinx Products
Controlled environments Plastic packages
Supporting the Aerospace and Defense Market
Space environmentRadiation hardened
Harsh environments requiring hermeticity Ceramic packages
Wider temperature range required Plastic packages
(Mil Temp)
(Mil Temp, SMDs)
PLUS
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Manufacturing Flows
“C and I” grade- Commercial or Industrial Temp, Plastic“M” grade
- Military Temp, Ceramic“N” grade
- Military Temp, Plastic“R” grade (for space)
- Radiation tolerant, Military Temp, Plastic, Extended Flow“V” grade (for space)
- Radiation tolerant, Military Temp, Ceramic, Similar to Class-V“H” grade (for space)
- Radiation Tolerant, Military Temp, non-hermetic ceramicStandard Microcircuit Drawing (SMD)
- Military and Radiation Tolerant, DSCC part number
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Extended Flows for Space
Extended burn-in (up to 240 hours)
XRAY
DPA
PIND for hermetic packages
CSAM for plastic packages
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Product Grade ComparisonsFor Critical Supply Chain Issues
C I N M SMD V R/H
Reliability Data Y Y Y Y Y Y YExtended Product Life Cycle N N Y Y Y Y YPCN/PDN Notification Y Y Y Y Y Y YCertificate of Conformance Y Y Y Y Y Y YConfiguration Control N N Y Y Y Y YExtended Temperature N N Y Y Y Y YProcess Baseline N N Y Y Y Y YMask Set Control N N Y Y Y Y Y
Product Grade
Full documentation and controlled extended product life cycle
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Product Grade Summary
Hermetic PlasticMask
Control
Grade Temp Process
C 85°C (T j) Comm X X
I 100°C (T j) Comm X X
IQ 125oC (T j) Automotive N/A X X
N 125°C (T j) QML N/A X X
M 125°C (T c) QML X N/A X
B 125°C (T c) QML X N/A X
V (space) 125°C (T c) QML X N/A X
H (space) 125°C (T c) QML N/A N/A X
R (space) 125°C (T j) QML N/A X X
Hermetic PlasticMask
Control
Grade Temp Process
C 85°C (T j) Comm X X
I 100°C (T j) Comm X X
IQ 125oC (T j) Automotive N/A X X
N 125°C (T j) QML N/A X X
M 125°C (T c) QML X N/A X
B 125°C (T c) QML X N/A X
V (space) 125°C (T c) QML X N/A X
H (space) 125°C (T c) QML N/A N/A X
R (space) 125°C (T j) QML N/A X X
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Where we are going
Many changes are coming from what I will call “acquisition reform II”.Xilinx response to customer needs was to work with industry and customer experts and with DSCC to define screening flows that will satisfy future customer needs in the space and military markets.BUT, an issue arose in that technology developed packages to which traditional full class-S/V flows did not seem to apply.The solution was to work with our partners to develop screening flows for these devices which would demonstrate and the ensure equivalent reliability as standard military screening flows provided.
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CG560 - Ceramic Column Array
Package Attributes
Cavity Down, 42.5mm x 42.5 mm
Ceramic substrate
Interconnect: 90/10 hard solder column, 0.2mm tall attached with 63/37 soft solder.
Column Pitch = 1.27 mm
Thermal Resistance: Theta JA = 14.3 C/Watt, Theta JC = 1.6 C/Watt
Hermetic Product
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CG717-Ceramic Column Array
In Process Configuration - LGA Post Group D & Burn-in Configuration
Package Attributes
Cavity Up, 35mm x 35mm, 1.27 mm pitch, Ceramic Substrate
Interconnect: 90/10 hard solder column 0.2mm tall attached with 63/37 soft solder
Pin Compatible with the Virtex-II BG728
Thermal Resistance: Theta JA = 12 deg C/Watt
Hermetically sealed with Au-Sn Lid
60 microns Bonding Pad Pitch
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CG717 Package X-Section
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CG717 Package Qualification Data
Results/ Due Date
Time FrameResults/
Due DateTime Frame
Results/ Due Date
Time Frame
85/85 (Unbiased) 15 0/15 168 hrs 0/15 600 hrs 0/15 1000 hrs
TC (Condition C) 15 0/15 200 cycles 0/15 500 cycles 0/15 1000 cycles
Bake 15 0/15 168 hrs 0/15 500 hrs 0/15 1000 hrs
Physical Dimension D1 3 0/3
Thermal Shock+Temp Cycle+Moisture Resistance D3
15 0/15
Mechanical Sock+Vibration+ Constant Acceleration D4
15 0/15
Salt Atmosphere D5 15 0/15
Internal Water vapor Content D6 3 0/3
Xilinx CG717 Package Qualification SummaryCum Hours or Cycle Readout Date/Data
Reliability TestSample
Size
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CF1144 - Ceramic Flip Chip
Package Attributes
35mm x 35mm, 1.0 mm pitch, Multi Layer Ceramic Substrate
90Pb/10Sn flip chip solder
90Pb/10Sn hard solder column
Thermal Resistance: Theta JA =10 deg C/Watt, Theta JC = 0.5 deg C/Watt
MSL1 (Non-hermetic) –
IBM technology with 30 years experience (Column)
Lid strength = 1200psi
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CF1144 Outgassing Data CF1144 Outgassing Data
Epoxy ComponentsEpoxy ComponentsUnderfill (0.56% of package weight)
TML%: 0.13
CVCM %: 0.00
Lid attach material (0.31% of package weight) TML%: 0.28
CVCM %: 0.16
Total package weight: 19.3g
Tested by NASA.
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CF1144 Package Qualification Data
Results/ Due Date
Time FrameResults/ Due Date
Time FrameResults/ Due Date
Time FrameResults/ Due Date
Time Frame
High Temperature Storage 22 0/22 168 hrs 0/22 576 hrs 0/22 1013 hrs
TC (Condition B) 22 0/22 300 cycles 0/22 500 cycles 0/22 814 cycles 0/22 1000 cycles
85/85 19 0/19 168 hrs 0/19 600 hrs 0/19 1009 hrs
Physical Dimension D1 3 0/3
Thermal Shock+Temp Cycle+Moisture Resistance D3
15 0/15
Mechanical Sock+Vibration+ Constant Acceleration D4
15 0/15
Lid Torque D8 3 0/3
Reliability TestSample
Size
Xilinx CF1144 Package Qualification SummaryCum Hours or Cycles and Results
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Xilinx/Aerospace full class V flowMil-STD Test Method and Condition
Ceramic, Hermetic Packages Ceramic, Flip-Chip Packages
1Mask Set Revision
ControlMIL-PRF-38535 MIL-PRF-38535
2 Traceability MIL-STD-38535 Appendix B MIL-STD-38535 Appendix B
3Wafer Lot Acceptance
Testing
MIL-STD-883 TM 2018 (App A), TM 5004
(App A), TM 5007
MIL-STD-883 TM 2018 (App A), TM 5004
(App A), TM 5007
4Non-Destructive Bond
PullMIL-STD-883
TM 2023 N/A
4a Package/Die Integrity N/A
In accordance with IBM Specifications:
29L5772 ES70P7830 ES20P3693
J78236 ES06N9026
and Xilinx Specifications:
MAC0123 MAC0117 MAC0120 MAC0118 MAC0108
For Flip-Chip packages, due to package construction, the following tests have replaced non-destructive bond pull:1. Internal visual prior to die attach.2. Die pull, post die attach and prior to underfill. 3. Post underfill CSAM and visual.4. Post lid attach lid shear.
Step # Process Flow Step/Test Comments
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5Internal Visual
InspectionMIL-STD-883
TM 2010A
In accordance with IBM Specifications:
29L5772 ES70P7830 ES20P3693
J78236 ES06N9026
and Xilinx Specification MAC0123
For Flip-Chip packages, a procedure was developed that complies with the allowed SEM and internal visual alternate procedures to address wafer fabrication related defects.TM2018 Appendix A is for the SEM alternate and TM5004 Appendix A is for the internal visual alternate.
6 Temperature Cycling
MIL-STD-883 TM 1010
Condition C (10 cycles)
MIL-STD-883 TM 1010
Condition B (20 cycles)
For Flip-Chip packages Temperature Cycling, Condition B, 20 cycles will be used. Using the Coffin Manson Inverse Power Law with a Beta of 3 shows 20 cycles is acceptable.Note: Condition C will be performed for Group D testing.
7 Constant AccelerationMIL-STD-883
TM 2001 Condition D
N/A
7a Lid Shear N/A
MIL-STD-883 TM 2001 Condition C
and in accordance with IBM
Specification: 2113144
and Xilinx Specification MAC0118
For Flip-Chip packages, due to package construction, an in-line non-destructive lid shear test will be performed on 3 devices per production lot. The minimum shear force shall be 180 lbs. This minimum test force will satisfy TM2001 Condition C.The estimated force on the lid (mass = 4.74 grams) for TM2001 Conditions A thru E is as follows:A: 5000gs: 52 lbsB: 10000gs: 104 lbsC: 15000gs: 156 lbsD: 20000gs: 208 lbsE: 30000gs: 312 lbs
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8 Visual Inspection MIL-STD-883
TM 2009In accordance with IBM
Specification PN 67F4333
9Particle Impact Noise
Detection (PIND)MIL-STD-883
TM 2020N/A
For Flip-Chip packages, due to package construction, this test is not applicable
10 Serialization
11Pre Burn-in Electrical
Test @ 25°C
In accordance with applicable Xilinx Device Test
Specification
In accordance with applicable Xilinx Device Test
Specification
Read & Record all parameters as specified in the applicable Xilinx Test Specification
12 Dynamic Burn-in
MIL-STD-883 TM 1015 Condition D
MIL-STD-883 TM 1015 Condition D
240 hours of dynamic burn-in will be performed at TJ=125°C.
13Post Dynamic Burn-in
Electrical Test @25°C
In accordance with applicable Xilinx Device Test
Specification
In accordance with applicable Xilinx Device Test
Specification
Read & Record all parameters as specified in the applicable Xilinx Test Specification
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14Delta Calculation
(Post Dynamic Burn-in)
15Percent Defective Allowable (PDA)
5% maximum for all tests
16 Static Burn-inMIL-STD-883
TM 1015 Condition CMIL-STD-883
TM 1015 Condition C
144 hours of static burn-in will be performed at TJ=125°C
17Post Static
Burn-in Electrical Testing @25°C
In accordance with applicable Xilinx Device Test
Specification
In accordance with applicable Xilinx Device Test
Specification
Read & Record all parameters as specified in the applicable Xilinx Test Specification
18Delta Calculation
(Post Static Burn-in)
19Final Percent Defective
Allowable (PDA)
Final PDA of 5% includes both Dynamic and Static burn-ins.
20 Final Electrical Test
MIL-STD-883 TM 5005
and in accordance with applicable
Xilinx Device Test Specification
MIL-STD-883 TM 5005
and in accordance with applicable
Xilinx Device Test Specification
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21 Fine & Gross Leak TestMIL-STD-883
TM 1014N/A
For Flip-Chip packages, due to package construction, this test is not applicable
22Radiography
(X-Ray)MIL-STD-883
TM 2012N/A
For Flip-Chip packages, due to package construction, this test is not applicable
23External Visual
InspectionMIL-STD-883
TM 2009MIL-STD-883
TM 2009
For the Flip-Chip packages, the external visual will be performed at the LGA level. There will also be an additional visual inspection after column attach.
24QML V Group A
TestingMIL-STD-883 MIL-STD-883
The Group A tests will be specified in the DSCC SMD or Xilinx document.
25Package Inspection after
Column AttachN/A
In accordance with IBM Specification 67F4333
and Xilinx Specification MAC0121
For ceramic, hermetic packages, due to package construction, this test is not applicable
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26QML V Group B
TestingMIL-STD-883 MIL-STD-883
For the Flip-Chip packages the following Group B tests will be performed:1. Group B, subgroup 12.The in-line tests specified in step #43. DPA
26-B1Sub 1: Resistance to
SolventsMIL-STD-883
TM 2015MIL-STD-883
TM 2015
26-B2aSub 2a:
Bond StrengthMIL-STD-883
TM 2011N/A
For Flip-Chip packages, due to package construction, this test is not applicable. For the Flip-Chip packages, the in-line tests specified in Step #4 and the DPA will be performed.
26-B2b
Sub 2b: Die Shear
or Stud Pull
MIL-STD-883 TM 2019
or TM2027
N/A
For Flip-Chip packages, due to package construction, this test is not applicable. For the Flip-Chip packages, the in-line tests specified in Step #4 and the DPA will be performed.
26-B3 Sub 3: SolderabilityMIL-STD-883
TM 2003
N/A In accordance with Xilinx
Specification MAC0122
For Flip-Chip packages, due to package construction, this test is not applicable. For the Flip-Chip packages, will perform a quarterly monitor.
Note: Removal from the sealed dry pack will initiate oxidation. The solderability is preserved for at least 2 years in a dry pack. Program users should consider storage in dry nitrogen.
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26-DPA DPAMIL-STD-883
TM 1580MIL-STD-883
TM 1580
27QML V Group C
Testing
MIL-STD-883 TM 1005
Condition D
MIL-STD-883 TM 1005
Condition D
1000 hours Dynamic Burn-in @ TJ=125°C will be performed on each wafer lot. The sample quantity # (accept #) = 22 (0). and parameters will be read and recorded before and after the life test.
28QML V Group D
TestingMIL-STD-883 MIL-STD-883
28-D1Sub 1:
Physical DimensionsMIL-STD-883
TM 2021MIL-STD-883
TM 2021
28-D2aSub 2a:
Lead IntegrityMIL-STD-883
TM 2004
In accordance with IBM Specification 10G9252
and JESD22
and Xilinx Specification MAC0119
Will perform a column shear test (3 devices, 15 columns per device, every 26 weeks per the Group D package QCI schedule).
28-D2bSub 2b:
Seal (Fine and Gross Leak)
MIL-STD-883 TM 1014
N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D3aSub 3a:
Thermal ShockMIL-STD-883
TM 1011 Condition BMIL-STD-883
TM 1011 Condition B
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28-D3bSub 3b:
Temp CycleMIL-STD-883
TM 1010 Condition CMIL-STD-883
TM 1010 Condition C
The hermetic package shall receive 100 cycles and the non-hermetic shall receive 500 cycles.
28-D3cSub 3c:
Moisture ResistanceMIL-STD-883
TM 1004MIL-STD-883
TM 1004
28-D3dSub 3d:
Seal (Fine and GrossLeak)
MIL-STD-883 TM 1014
N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D3eSub 3e: Visual
MIL-STD-883 TM 1004
and TM 1010
MIL-STD-883 TM 1004
and TM 1010
28-D3fSub 3f:
End-Point Electricals
In accordance with applicable Xilinx Device Test
Specification
In accordance with applicable Xilinx Device Test
Specification
28-D4aSub 4a: Mechanical
ShockMIL-STD-883
TM 2002 Condition BMIL-STD-883
TM 2002 Condition BThis test will be performed as a Group D3 test
28-D4bSub 4b:
VibrationMIL-STD-883
TM 2007 Condition AMIL-STD-883
TM 2007 Condition AThis test will be performed as a Group D3 test
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28-D4cSub 4c:
Constant AccelerationMIL-STD-883
TM 2001 Condition E, Y1 N/A
28-D4c1 Lid Shear N/A
MIL-STD-883 TM 2001 Condition C
and in accordance with IBM
Specification: 2113144
and Xilinx Specification MAC0118
For Flip-Chip packages, due to package construction, an in-line non-destructive lid shear test will be performed on 3 devices per production lot. The minimum shear force shall be 180 lbs. This minimum test force will satisfy TM2001 Condition C.The estimated force on the lid (mass = 4.74 grams) for TM2001 Conditions A thru E is as follows:A: 5000gs: 52 lbsB: 10000gs: 104 lbsC: 15000gs: 156 lbsD: 20000gs: 208 lbsE: 30000gs: 312 lbs
28-D4dSub 4d: Seal (Fine and
Gross)(TM1014, 15/0)
MIL-STD-883 TM 1014
N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D4eSub 4e: Visual
MIL-STD-883 TM 2009
MIL-STD-883 TM 2009
28-D4fSub 4f:
End-Point Electricals
In accordance with applicable Xilinx Device Test
Specification
In accordance with applicable Xilinx Device Test
Specification
28-D5aSub 5a:
Salt Atmosphere
MIL-STD-883 TM 2009 Condition
AN/A
For Flip-Chip packages, due to package construction, this test is not applicable
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28-D5bSub 5b:
Seal (Fine and Gross Leak)
MIL-STD-883 TM 1014
N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D5cSub 5c: Visual
MIL-STD-883 TM 1009
N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D6Sub 6:
Internal Water VaporMIL-STD-883
TM 1018N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D7Sub 7:
Adhesion of Lead Finish
MIL-STD-883 TM 2025
N/A
For Flip-Chip packages, due to package construction, this test is not applicable
28-D8Sub 8:
Lid TorqueN/A
MIL-STD-883 TM 2001 Condition C
and in accordance with IBM
Specification: 2113144
and Xilinx Specification MAC0118
For the CF1144, Xilinx does perform a head spreader shear testing as a in-line group B test and a Group D, Subgroup 4 test.
28-D9 HAST with Bias N/A JESD22-A110
29Group E Testing for
RHAMIL-STD-883 TM1019 MIL-STD-883 TM1019
30 TCI Data Summary
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