Background: VLSI Courses at Lafayette ECE 425 - VLSI Circuit Design

Original form: “tall thin designer” VLSI Processing CMOS Transistor Characteristics Parasitic Effects Custom Layout Standard-Cell ASICs

(Application-Specific Integrated Circuits) ASIC Design using Hardware Description

Languages (HDLs) and CAD Tools

Student design project: “Tiny Chip” Complete 2.2mm X 2.2mm chip Fabrication by MOSIS (MOS implementation

Service) Educational Program

ECE 426 VLSI System Design Follow-on to ECE 425 More coverage of HDL-based System Design Testing of fabricated MOSIS chips

Extending ECE 425 New focus on Data Conversion

Digital / Analog Conversion Comparators Analog / Digital Conversion

Continued focus on Design Basic cell analysis and layout ASIC-style HDL-based design Full chip design (mixed analog & digital)

Lecture Topic LaboratoryCMOS ProcessingDevice Physics; MOS Transistor Characteristics

Schematic Editing / Simulation

Parasitic ComponentsLayout and Design Rules

Basic Gate Layout

Extraction, Simulation, and Layout VerificationHierarchical Layout

Extraction/Simulation/LVS

Voltage-Scaling D/A ConversionASIC Layout Styles: Std. Cells, Gate Arrays, FPGAsCombinational Logic: Gate Design and LayoutComb. delay and power dissipation; testing

Layout Mini-Project:4-bit Voltage Scaling DAC

Comb. Design with HDLs & Logic SynthesisSequential Logic: Latch & Flip-Flop DesignSequential Circuits and Clocking Schemes

HDL Design (Combinational)

Sequential Design with HDLs & Logic SynthesisSequential Testing & Design for Test

HDL Design (Sequential)

Successive-Approximation A/D ConversionClocked “Auto-Centering” ComparatorsDigital VLSI System DesignAnalog VLSI Overview

Final Project: 4-bit SuccessiveApproximation ADC

New Design Projects D/A Converter

Voltage Scaling design Hierarchical Layout

A/D Converter Successive Approximation circuit:

designed using HDL / standard cells D/A Converter used as building block Uses dynamic analog comparator

supplied by instructor Assembled to complete chip

Introduction and Overview

Motivation - The Digital Paradox Digital VLSI chips & applications are pervasive in:

Computer Systems Telecommunications Consumer Electronics Automotive Electronics

BUT analog concerns more important than ever! Must connect digital chips to an analog world Many chips now combine analog and digital circuits Designers must consider analog effects in digital circuits

Bottom Line: Undergraduate VLSI students need exposure to both analog and digital concerns

Objectives Add analog to “broaden” a digital course Teach concepts as extension of digital analysis and

design methods Focus on data conversion - useful to both

analog and digital designers Maintain strong digital design focus Lay foundation for further study in analog

Mixed-Signal Design Activities

Voltage-Scaling D/A Converter

rs3’

rs3

rs2’

rs2

rs1’

rs1

rs0’

rs0

rs3’

rs3

rs2’

rs2

rs1’

rs1

rs0’

rs0

rs3’

rs3

rs2’

rs2

rs1’

rs1

rs0’

rs0

rs3’

rs3

rs2’

rs2

rs1’

rs1

rs0’

rs0

cs1’cs1cs2’cs2cs3’cs3 cs0’cs0

Analog Output

d3

d2

d1

d0

2-4Binary

Decode r

cs3’

cs3

cs2’

cs2

cs1’

cs1

cs0’

cs0

2-4Binary

Decode r

rs3’

rs3

rs2’

rs2

rs1’

rs1

rs0’

rs0

VRplus

VRminus

Comparator Design (provided by instructors)

ø1

/ø1

/ø1

ø1ø2

/ø2

D Q

V1

V2

OUTø2C

Successive Approximation A/D Converter

SAREstimation

Circuit

D/AConverter

Comparator

Estimate V E

Input VI

VE GT VIRDY

START

+

-

Comparator

Clock Generator Logic

S

R

Q

S

R

Q

S

R

Q

S

R

Q

E[3:0]

E3

E2

E1

E0

SetB3

ClrB3

SetB2

ClrB2

SetB1

ClrB1

SetB0

ClrB0

GT

CLK

FromComparator

SAR FSM

START / SetB3 ClrB2 ClrB1 ClrB0

GT / ClrB3

START’

GT’

INITRDY

TST3SetB2

TST2SetB1

TST1SetB0

TST0GT /ClrB0

GT / ClrB2

GT’

GT / ClrB1

GT’ GT’

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Vin

Vest

Results and Conclusions

Final Chip Layout

Fabrication & Testing Results - Fall 2001 15 students completed 8 student chip designs 7 submitted for fabrication to MOSIS 7 chips worked as desgined

Conclusions Successfully integrated analog concerns

in previously “all-digital” course Students created working mixed signal (A/D)

chips

Future Work Additional analog coverage Better integration of testing and

design-for test

More Information Available at:http://foghorn.cadlab.lafayette.edu/ece425