Wireless Communications Design Handbook Terres- Trial Mobile Interference

WIRELESS COMMUNICATIONS

DESIGN HANDBOOK Aspects of Noise, Interference,

and Environmental Concerns

VOLUME 3" INTERFERENCE INTO CIRCUITS

This Page Intentionally Left Blank

WIRELESS COMMUNICATIONS

DESIGN HANDBOOK Aspects of Noise, Interference,

and Environmental Concerns

VOLUME 3: INTERFERENCE INTO CIRCUITS

REINALDO PEREZ Spacecraft Design Jet Propulsion Laboratory California Institute of Technology

ACADEMIC PRESS San Diego London New York Sydney

Boston Tokyo Toronto

This book is printed on acid-free paper. @

Copyright �9 1998 by Academic Press

All rights reserved. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopy, recording, or any information storage and retrieval system, without permission in writing from the publisher.

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Library of Congress Cataloging-in-Publication Data

Perez, Reinaldo. Wireless communications design handbook : aspects of noise, interference, and environmental concerns / Reinaldo Perez.

p. cm. Contents: v. 1. Space interference m v . 2. Terrestrial and mobile interference m v . 3. Interference into circuits. ISBN 0-12-550721-6 (volume 1); 0-12-550723-2 (volume 2); 0-12-550722-4 (volume 3) 1. Electromagnetic interference. 2. Wireless communication systems--Equipment and supplies. I. Title.

TK7867.2.P47 1998 98-16901 621.382' 24-dc21 CIP

Printed in the United States of America 98 99 00 01 02 IP 9 8 7 6 5 4 3 2 1

Contents

Acknowledgments Preface Introduction

ix xi

x v

Chapter 1 Noise Interactions in High-Speed Digital Circuits

1.0 Introduction 1.1 Microstrip Configuration 1.2 Crosstalk in the Time Domain 1.3 Power Distribution 1.4 Decoupling Capacitance Effects 1.5 Power Dissipation in TTL and CMOS Devices 1.6 Thermal Control in Equipment and PCB Design 1.7 Lossy Transmission Lines and Propagation Delays 1.8 VLSI Failures and Electromigration 1.9 Interference Concerns with Connectors 1.10 Ground Loops and Radiated Interference 1.11 Solving Interference Problems in Connectors 1.12 The Issue of Vias

1 3

11 14 17 21 22 32 35 40 43 47 50

Chapter 2 Noise and Interference Issues in Analog Circuits

2.0 Basic Noise Calculation in Op-Amps 2.1 Op-Amp Fundamental Specifications 2.2 Input Offset Voltage 2.3 The Noise Gain of Op-Amps 2.4 Slew Rate and Power Bandwidth of Op-Amps 2.5 Gain Bandwidth Produced 2.6 Internal Noise in Op-Amps 2.7 Noise Issues in High-Speed ADC Applications 2.8 Proper Power-Supply Decoupling 2.9 Bypass Capacitors and Resonances 2.10 Use of Two or More Bypass Capacitors 2.11 Designing Power Bus Rails in Power/Ground Planes for Noise

Control

52

52 55 61 63 63 65 65 69 72 76 81

83

vi Contents

2.12 The Effect of Trace Resistance 2.13 ASIC Signal Integrity Issues (Ground Bounce) 2.14 Crosstalk through PC Card Pins 2.15 Parasitic Extraction and Verification Tools for ASICs

87 94 98

100

Chapter 3 Noise Issues in High-Performance Mixed-Signal ICs and Other Communications Components

3.1 Analog-to-Digital Converter Noise 3.2 Driving Inputs in ADCs 3.3 Filtering the Switching-Mode Power Supply 3.4 Capacitor Choices for Noise Filtering 3.5 The Use of Ferrite Cores in Switching-Mode Power Supplies 3.6 Shielding Cables of Op-Amp Inputs to Avoid Interference Coupling 3.7 RFI Rectification in Analog Circuits 3.8 Op-Amps Driving Capacitive Loads 3.9 Load Capacitance from Cabling 3.10 Intermodulation Distortion 3.11 Phase-Locked Loops 3.12 Voltage-Controlled Oscillators 3.13 VCO Phase Noise 3.14 Phase Detectors 3.15 Basic Topology of a Phase-Locked Loop 3.16 Phase Noise in DC Amplifiers 3.17 Phase Noise in High-Frequency Amplifiers 3.18 Phase Noise in Phase Detectors 3.19 Phase Noise in Digital Frequency Dividers 3.20 Phase Noise in Frequency Multipliers 3.21 Phase Noise in Oscillators 3.22 Phase Noise in Reference Frequency Generators 3.23 More about VCO Design and Noise 3.24 Modeling RF Interference at the Transistor Level 3.25 RFI Effects on Digital Integrated Circuits 3.26 RFI Effects in Operational Amplifiers 3.27 RFI-Induced Failures in Crystal Oscillators

103

103 108 117 118 124 131 135 140 143 145 148 151 156 159 160 169 169 169 170 170 170 171 171 173 184 189 190

Chapter 4 Computational Methods in the Analysis of Noise Interference

4.1 General Introduction 4.2 The Method of Moments in Computational Electromagnetics 4.3 High-Frequency Methods in Computational Electromagnetics 4.4 The Finite-Difference Time Domain in Computational

Electromagnetics 4.5 The Finite Element Method in Computational Electromagnetics 4.6 The Transmission-Line Method in Computational Electromagnetics 4.7 Computational Methods at Work: Getting Numbers from Your Models

194

194 200 237

265 279 291 307

Contents vii

Chapter 5 Antennas for Wireless Personal Communications 354

5.1 Radiation from Current Sources 5.2 Thin-Wire Antennas 5.3 The Linear Dipole 5.4 Simplest Current Distribution in Wire Dipoles 5.5 Sinusoidal Current Distribution in Wire Dipoles 5.6 The Generalized Thin-Wire Loop Antenna 5.7 The Simplest Small Loop 5.8 The Square Loop Antenna 5.9 Microstrip Antennas 5.10 Array Theory 5.11 Planar Arrays 5.12 Mutual Coupling among Array Elements 5.13 Reflector Antennas 5.14 Offset Parabolic Reflectors 5.15 Helical Antennas 5.16 Designing a Quadrifilar Helix Antenna 5.17 Numerical Methods in Loop Antenna Design 5.18 Using MOM for Designing Cylindrical Arrays for PCS 5.19 Simulation of Portable UHF Antennas in the Presence of Dielectric

Structures 5.20 Other Wire-Type Antennas for Portable Communications 5.21 Modeling a Monopole Mounted on a Moving Car

354 356 358 360 361 361 366 367 369 375 380 381 383 386 390 396 402 407

412 416 416

Index 422


Acknowledgments

I would like to acknowledge the cooperation and support of Dr. Zvi Ruder, Editor of Physical Sciences for Academic Press. Dr. Ruder originally conceived the idea of having a series of three volumes to properly address the subject of noise and interference concerns in wireless communications systems.

Considerable appreciation is extended to Madeline Reilly-Perez who spent many hours typing, organizing, and reviewing this book.

ix


Preface

Before the dawn of the digital age, about 25 years ago, when analog electronics

was still in a commanding lead, the only interference problems of concern

involved transmitters and receivers, in which spurious sidebands from a given

transmitter coupled to a sensitive receiver whose bandwidth was wide enough

to receive the unintentional radiation. As the digital age took off in the 1970s,

the interference problems started to shift more and more to the electronic compo-

nents level and PCB; analog and digital circuits were now coexisting with each

other, and noise coupling between them started to appear. Furthermore, as the

clock frequencies of digital circuits started to increase in the 1980s and 1990s,

the interference problems between analog and digital circuits and among digital

circuits themselves became even more pronounced: the multiple harmonics unin-

tentionally generated by the clocked circuits now extended all the way to the

gigahertz range, exposing the susceptibility of many circuits to these high frequen-

cies. It was then, really out of necessity, that digital designers started to pay more

attention to the "analog effects" of their digital design, and analog designers

started thinking about ways to protect their highly susceptible components from digital interference and noise while improving performance. Designing electronic components and circuits that are highly immune to interference problems became a necessary goal.

In many cases noise and interference control in personal communications

services has to be dealt with eventually at the most fundamental level of electronics

components. We can spend considerable resources at the system and subsystem

level to remedy an interference problem that has surfaced in a given wireless

communications scenario, and still come out empty-handed, meaning that the

problem is still present. We have concentrated only on the periphery of the

problem, and perhaps even tried to eliminate some of the symptoms, but the

interference problem is still there. Why? Because it needs to be addressed and

solved at the electronic component level.

In this volume we provide the electronic designer (both digital and analog)

with an introduction to the fundamentals of noise control in electronic design.

This is indeed a vast field of research at many places, and there is still new

xi

xii Preface

territory to be discovered as we try to understand the physics of interference phenomena--a subject that is often difficult to address because it is embedded in electromagnetic theory. We have decided in this book to combine simple steps with more complicated steps in the identification and solution of interference problems, and to provide a fundamental knowledge of the physics of such interference cases, which the engineer can later use to optimize the design.

This volume looks at noise issues in digital circuits, analog circuits, mixed- signal analog and digital circuits, and computational methods commonly used in the analysis of interference problems. It also provides a good introduction to the design of the most commonly used types of antennas in wireless communications.

In the analysis of interference issues concerning digital logic, the basic factors that contribute to such interference are outlined: crosstalk in the time domain, power distribution models in TTL and CMOS devices, thermal control and the effects of thermal analysis in assessing the reliability of sensitive components, lossy transmission lines and the role of such transmission lines in the propagation delay of signals, electromigration mechanisms, and ground loops and interference consequences. We also look at noise problems arising from interfaces such as connectors and cables. ASIC and FPGA signal integrity issues (e.g., ground bounce) and methods for parasitic extraction and verification are briefly discussed.

In the analysis of interference issues concerning analog circuits, the emphasis is on circuits involving operational amplifiers (op-amps). For example, we cover basic noise calculations in op-amps, input offset voltage when that offset is caused by a noise source, noise gains in op-amps, and slew rate and power bandwidth of op-amps. Internal noises in op-amps are discussed, but also in conjunction with high-speed analog-to-digital converter applications. Considerable space is given to the subject of proper bypass capacitance for analog circuits, especially analog-to-digital converters. Power bus rail design and the design of power/ ground planes are also covered.

In the analysis of interference issues concerning mixed-signal ICs, a great number of subjects are discussed. For example, a more detailed look is given to analog-to-digital converters, switching mode power supplies, and the need for filtering and shielding. Radio frequency interference and the effects of intermodulation distortion are briefly covered. We also cover phase noise in most of the commonly used components of communications, such as VCO, phase detectors, PLL, DC/HF amplifiers, oscillators, frequency dividers, generators, and multipliers. An important section addresses the direct effects of radio frequency interference in transistors and digital ICs.

We thus provide analytical approaches to the study, analysis, and correction of many interference problems in electronic components. However, this volume

Preface xiii

also dedicates considerable effort to introducing computational electromagnetic

methods for the analysis of interference problems that can be modeled from

Maxwell equations. Several numerical techniques are discussed in detail to pro-

vide readers with good foundations in these methods. The theoretical aspects of

these methodologies are put into practice in a discussion of the modeling of a

wireless communications antenna.

The last part of this volume discusses in detail most of the antennas commonly

used in wireless communications services, from simple wire antennas to parabolic reflectors. The material learned concerning computational methods is applied in this area for the design of cylindrical arrays in PCS, portable UHF antennas, quadrafilar helix antennas, and diverse kinds of monopoles.

The student should see this volume as a good introduction to issues of noise in analog and digital electronic systems, and to some methods of improving design techniques that will increase the immunity of wireless communications systems to interference problems.

We wish to acknowledge the valued contribution of Madeline Reilly-Perez in

the typing and editing of this manuscript.


Introduction

The information age, which began its major drive at the beginning of the 1980s with the birth of desktop computing, continues to manifest itself in many ways and presently dominates all aspects of modem technological advances. Personal

wireless communication services can be considered a "subset technology" of

the information age, but they have also gained importance and visibility over

the past 10 years, especially since the beginning of the 1990s. It is predicted that future technological advancements in the information age will be unprecedented,

and a similar optimistic view is held for wireless personal communications. Over

the past few years (since 1994), billions of dollars have been invested all over

the world by well-known, technology-driven companies to create the necessary infrastructure for the advancement of wireless technology.

As the thrust into wireless personal communications continues with more advanced and compact technologies, the risks increase of "corrupting" the information provided by such communication services because of various interference scenarios. Although transmission of information through computer networks

(LAN, WAN) or through wires (cable, phone, telecommunications) can be affected by interference, many steps could be taken to minimize such problems, since the methods of transmitting the information can be technologically managed. However, in wireless communications, the medium for transmission (free space) is uncontrolled and unpredictable. Interference and other noise problems are not only more prevalent, but much more difficult to solve. Therefore, in parallel with the need to advance wireless communication technology, there is also a great need to decrease, as much as possible, all interference modes that could corrupt the information provided.

In this handbook series of three volumes, we cover introductory and

advanced concepts in interference analysis and mitigation for wireless personal

communications. The objective of this series is to provide fundamental

knowledge to system and circuit designers about a variety of interference

issues which could pose potentially detrimental and often catastrophic threats

to wireless designs. The material presented in these three volumes contains a mixture of basic interference fundamentals, but also extends to more advanced

XV

xvi Introduction

topics. Our goal is to be as comprehensive as possible. Therefore, many various topics are covered. A systematic approach to studying and understanding

the material presented should provide the reader with excellent technical capabilities for the design, development, and manufacture of wireless communication hardware that is highly immune to interference problems and capable

of providing optimal performance. The present and future technologies for wireless personal communications are

being demonstrated in three essential physical arenas: more efficient satellites,

more versatile fixed ground and mobile hardware, and better and more compact

electronics. There is a need to understand, analyze, and provide corrective mea-

sures for the kinds of interference and noise problems encountered in each of

these three technology areas. In this handbook series we provide comprehensive

knowledge about each of three technological subjects. The three-volume series,

Wireless Communications Design Handbook: Aspects of Noise, Interference, and Environmental Concerns, includes Volume I, Space Interference; Volume II, Terrestrial and Mobile Interference; and Volume III, Interference into Circuits. We now provide in this introduction a more detailed description of the topics to be addressed in this handbook.

Volume 1

In the next few years, starting in late 1997, and probably extending well into the next century, hundreds of smaller, cheaper (faster design cycle), and more sophisticated satellites will be put into orbit. Minimizing interference and noise problems within such satellites is a high priority. In Volume 1 we address satellite system and subsystems-level design issues which are useful to those engineers

and managers of aerospace companies around the world who are in the business

of designing and building satellites for wireless personal communications. This

material could also be useful to manufacturers of other wireless assemblies who

want to understand the basic design issues for satellites within which their hard-

ware must interface.

The first volume starts with a generalized description of launch vehicles and

the reshaping of the space business in general in this post-Cold War era. A

description is provided of several satellite systems being built presently for

worldwide access to personal communication services. Iridium, Globalstar, Tele-

desic, and Odessey systems are described in some detail, as well as the concepts

of LEO, MEO, and GEO orbits used by such satellite systems.

Introduction xvii

Attention is then focused briefly on the subject of astrodynamics and satellite

orbital mechanics, with the sole objective of providing readers with some back-

ground on the importance of satellite attitude control and the need to have a

noise-free environment for such subsystems. Volume 1 shifts to the study of each

spacecraft subsystem and the analysis of interference concerns, as well as noise

mitigation issues for each of the satellite subsystems. The satellite subsystems

addressed in detail include attitude and control, command and data handling,

power (including batteries and solar arrays), and communications. For each of

these subsystems, major hardware assemblies are discussed in detail with respect

to their basic functionalities, major electrical components, typical interference

problems, interference analysis and possible solutions, and worst-case circuit

analysis to mitigate design and noise concerns.

Considerable attention is paid to communications subsystems: noise and inter-

ference issues are discussed for most assemblies such as transponders, amplifiers,

and antennas. Noise issues are addressed for several multiple access techniques

used in satellites, such as TDMA and CDMA. As for antennas, some fundamentals

of antenna theory are first addressed with the objective of extending this work

to antenna interference coupling. The interactions of such antennas with natural

radio noise are also covered. The next subject is mutual interference phenomena

affecting space-borne receivers. This also includes solar effects of VHF communi-

cations between synchronous satellite relays and earth ground stations. Finally,

satellite antenna systems are discussed in some detail.

The final section of Volume 1 is dedicated to the effects of the space environ-

ment on satellite communications. The subject is divided into three parts. First, the space environment, which all satellites must survive, is discussed, along with its effects on uplink and downlink transmissions. Second, charging phenomena in spacecraft are discussed, as well as how charging could affect the noise immunity of many spacecraft electronics. Finally, discharging events are investi- gated, with the noise and interference they induce, which could affect not only spacecraft electronics, but also direct transmission of satellite data.

Volume 2

In the second volume of this handboook series, attention is focused on system-

level noise and interference problems in ground fixed and mobile systems, as

well as personal communication devices (e.g., pagers, cellular phones, two-way

radios). The work starts by looking at base station RF communications systems

and mutual antenna interference. Within this realm we address interference be-

xviii Introduction

tween satellite and earth station links, as well as interference between broadcasting terrestrial stations and satellite earth stations. In this approach we follow the

previous work with a brief introduction to interference canceling techniques at the system level.

Volume 2 devotes considerable space to base-station antenna performance.

We address, in reasonably good technical detail, the most suitable antennas for

base-station design and how to analyze possible mutual interference coupling

problems. The book also gives an overview of passive repeater technology for

personal communication services and the use of smart antennas in such systems. A section of Volume 2 is dedicated entirely to pagers and cellular phones and

interference mitigation methods. The fundamentals of pagers and cellular phone designs are studied, and the use of diversity in antenna design to minimize interference problems is reviewed.

A major section of this volume starts with the coverage of propagation models for simulating interference. In this respect we cover Rayleigh fading as it relates to multipath interference. Path loss, co-channel, and adjacent channel interference

follows. This last material is covered in good detail, since these techniques are

prevalent in the propagation models used today.

The last sections of Volume 2 deal in depth with the subject of path loss,

material that needs better coverage than found in previous books. The following

subjects are reviewed in detail: ionospheric effects, including ionospheric scintil- lation and absorption; tropospheric clear-air effects (including refraction, fading, and ducting); absorption, scattering, and cross-polarization caused by precipita- tion; and an overall look at propagation effects on interference.

V o l u m e 3

In Volume 3, we focus our attention inward to address interference and noise

problems within the electronics of most wireless communications devices. This

is an important approach, because if we can mitigate interference problems at

some of the fundamental levels of design, we could probably take great steps

toward diminishing even more complex noise problems at the subsystem and

system levels. There are many subjects that could be covered in Volume 3.

However, the material that has been selected for instruction is at a fundamental level and useful for wireless electronic designers committed to implementing

good noise control techniques. The material covered in Volume 3 can be divided

into two major subjects: noise and interference concerns in digital electronics,

including mitigation responses; and noise and interference in analog electronics,

Introduction xix

as well as mitigation responses. In this volume we also address computational electromagnetic methods that could be used in the analysis of interference problems.

In the domain of digital electronics we devote considerable attention to power bus routing and proper grounding of components in printed circuit boards (PCBs). A good deal of effort is spent in the proper design of power buses and grounding configurations in PCBs including proper layout of printed circuit board traces, power/ground planes, and line impedence matches. Grounding analysis is also extended to the electronic box level and subsystem level, with the material explained in detail. At the IC level we concentrate in the proper design of ASIC and FPGA to safeguard signal integrity and avoid noise problems such as ground bounce and impedance reflections. Within the area of electronic design automation (EDA), parasitics and verification algorithms for ASIC design are also discussed. A great deal of effort is put into the study of mitigation techniques for interference from electromagnetic field coupling and near-field coupling, also known as crosstalk, including crosstalk among PCB card pins of connectors. The work continues with specific analysis of the interactions in high-speed digital circuits concerning signal integrity and crosstalk in the time domain. Proper design of digital grounds and the usage of proper bypass capacitance layout are also addressed. Other general topics such as power dissipation and thermal control in digital IC are also discussed. Electromagnetic interference (EMI) problems arising in connectors and vias are reviewed extensively, including novel studies of electromigration in VLSI.

In the analog domain, Volume 3 also addresses many subjects. This section starts with the basics of noise calculations for operational amplifiers. Included here is a review of fundamentals of circuit design using operational amplifiers, including internal noise sources for analysis. As an extension concerning noise issues in operational amplifiers, the material in this volume focuses on the very important subject of analog-to-digital converters (ADCs). In this area considerable effort is dedicated to proper power supply decoupling using bypass capacitance. Other noise issues in high-performance ADC are also addressed, including the proper design of switching power supplies for ADC, and the shielding of cable and connectors. Finally, at the IC level, work is included for studying RFI rectification in analog circuits and the effects of operational amplifiers driving several types of capacitive loads.

We end this volume with the study of system-level interference issues, such as intermodulation distortion in general transmitters and modulators, and the subject of cross modulation. This is followed by the concept of phase-locked loops (PLL) design, development, and operation. Because of the importance of

xx I n t r o d u c t i o n

PLL in communications electronics, considerable space is devoted to the study

of noise concerns within each of the components of PLL. Finally, Volume 3 ends

with an attempt to explore interference at the level of transistors and other

components.

Errata

Wireless Communications Design Handbook: Volume 3 Reinaldo Perez

Page 175, Figure 3.69; page 178, Figure 3.72; page 180, Figure 3.74; page 181, Figure 3.75; page 191, Figure 3.83: J. Tron, J. J. Whalen, C. E. Larson, and J. M. Roe, "Computer-aided analysis of RFI effects in operational amplifiers," IEEE Trans. in EMC, Voi. 21, No. 4, �9 1979 IEEE.

Page 126, Figure 3.25, and page 127, Figure 3.26: Reprinted with permission from Electronic Design, September 5, 1995. Copyright 1995, Penton Publishing Co.


Chapter 1 Noise Interactions in High-Speed Digital Circuits

1.0 Introduction

Several years ago, when TTL logic was still the predominant player in digital design, the analog effects of chip-to-chip interactions were a minor consideration. In today's IC design, the high-speed logic families make the printed circuit board look like transmission lines. Digital designers must become familiar with a series of high-speed effects in PCBs, such as transmission lines stubs, interlayer vias, voltage reflections caused by mismatches, conductor geometry, and printed-board dielectric effects. Designing high-speed logic requires a working strategy to correlate the speed of the system architecture and the interconnect integration level.

To minimize interconnect performance, the following goals should be achieved:

1. Minimize ringing (mismatch reflection) when high-speed signals propagate through impedance discontinuities (such as comers, stub junctions, pins, vias, unmatched loads).

2. Diminish crosstalk between nearby signal lines. This can be achieved by separating the lines and minimizing signal-to-ground distances.

3. Reduce interconnect delays between chips by using the closest path between ICs.

4. Use high interconnect DC resistance and high dielectric loss effect at gigahertz frequencies in order to minimize edge degradations.

5. Minimize power and ground noise by decreasing the impedance of power distribution systems. Use plenty of decoupling capacitors and many power and ground planes.

6. Minimize voltage transition by using proper termination impedance. Improper impedance terminations could result in voltage transitions that are insufficient to develop a logic level transition.

7. Minimize the capacitance loading on signal lines to obtain the largest characteristic impedance and smallest propagation delay.

2 1. Noise Interactions in High-Speed Digital Circuits

As system complexity increases there is a need for automated CAE tools that

would optimize the design using some of these findings, as shown in Figure

1.1. The developed EDA tools should be coupled with design guidelines and

methodologies to handle the thousands of interconnections in a PCB. Desirable

capabilities for such an integrated EDA tool include the ability to perform parasitic

effect analysis and prediction, modeling, and simulation of physical geometries.

One of the most important parameters in the design of PCBs, which has a

direct effect on the electrical performance of the interconnection, is the relative

dielectric constant e r. The term e r is used in the design of the interconnecting

media, in the calculation of impedance, capacitance, and time propagation. In a

transmission line the propagation time is proportional to the square root of e r,

and impedance will vary inversely as the square root of er. A useful term often

Physical Flow

Synthesis

Modeling Flow

VHDL/Verilog

"'-.. Specified Analog Models

IC Design Flow

Function Simulation

t

/

T

Timing Analysis

Gate Level Simulation

Place-and-Route

VHDL/Verilog

II,"

~r Analog Behavioral Models

SPICE Models

Parasitic Extraction

Physical Timing Simulation SPiCE-like Tools

Figure 1.1 IC design flow which accounts for analog effects.

1.1. Microstrip Configuration 3

given is the effective relative permittivity (e~) which is the permittivity experi-

enced by a signal as it is transmitted along a conductive path.

Let us consider some typical electrical configurations of PCBs in which e r plays an important role.

1.1 Microstrip Configuration

The microstrip configuration is shown in Figure 1.2a. An empirical relationship

is available that gives the effective relative expression

e; = 0.475e r + 0.67 for 2 < /3 r < 6. (1.1)

For an embedded or buried configuration microstrip as shown in Figure 1.2b,

the effective dielectric constant is given by

! ~ o e, r = e, r e ( - 1.55 h, /h) (1.2)

The case of a wire over a ground plane is shown in Figure 1.2c. If the dielectric

medium extends from the ground and then beyond the conductor, then Equation

(1.1) can be used. If the dielectric reaches only to the level of the conductor,

then either Equation (1.1) or (1.2) can be used.

How can we assess whether any of these strip lines is behaving as a transmission

line? The critical factor in transmission line effects for a pulse signal is the rise

time, and not the frequency of the clock. The highest frequency or bandwidth

of concern of a pulse signal is given by

BW = 0.35 / t r (nsec) in GHz. (1.3)

The calculated bandwidth can be used to calculate the corresponding wavelength

in free space and, afterwards, the smaller wavelength within the dielectric. A

comparison is then made between the length of the conductor (L) and the wave-

length. The criterion for a transmission line is given by

0.30t r (nsec) L(cm) > - = . (1.4)

7 2.45

Another approach is to conceptually compare the rise time t r with the conductor

length,

L(cm) >- 0.5tr(m) = 0"5[trd(SeC)c(m/sec)] (1.5)


Figure 1.2 Typical configuration of a microstrip line.


where tr (m) is the rise time in question, trd (sec) is the device rise time, c is the

speed of light and e~ is the effective relative permittivity. For conductor length

L (m) greater than 0.5tr, the reflection from a mismatched load impedance will be received back at the source after the pulse has reached its maximum value.

In high-speed digital design it is not uncommon for the clock cycle time to

be smaller than the propagation time t d from one device to another. For a system

to perform properly, the propagation time t d must be well controlled. When the

signal line is considered to be capacitive, then the propagation time is calculated

using the assumption that the loads and the line connecting these lines are purely

capacitive. The propagation delay time of a signal transmitted through a conductor

is given by

t o - . (1.6) C

The characteristic impedance Z o of a line is also important in printed circuit

boards. The amount of current that a circuit driven will need to supply along a

path depends on the characteristic impedance value. The value of Z 0 is also

important in the design of integrated circuits, since it can affect the location of receiver IC along a circuit in a PCB.

The characteristic impedance for an ideal microstrip transmission line as shown

in Figure 1.2 is given by

60 Z o = ~ In in ohms, (1.7)

or it can also be expressed as

Zo = 87 l n [ ~ ] / ( e r + 1.41) 0.5 in ohms, (1.8)

where er is the relative permittivity of the material between the wire and the reference ground plane. Notice that in the preceding equations we have to transform the rectangular cross-section of a microstrip line of width W and thickness t into a round wire using the expression

d = 0.670W [0.8 + t / W]. (1.9)

Combining these equations gives us the impedance Z o and intrinsic line capaci-

tance C o for microstrip circuitry,

[ 5"98h ]/(er+l.41)~ (ohms), (110) Z o = 87 In (0 .8W+ t)

C o = 0.67(e r + 1.41) / ln(5.98h / (0.8W + t)), (pF/inch), (1.11)


for W/h < 1.0 where h is the dielectric thickness, W is the conductor width, and

t is the conductor thickness.

For coated microstrip transmission lines (Figure 1.3), the preceding two equa-

tions can be used if a modified effective relative permittivity is used as given by

/3~ = /3 r [1 + e(-l55*h'/h)]. (1.12)

For striplines the characteristic impedance Z o and intrinsic line capacitance C O

for a fiat conductor geometry are given by

Z o = 60 l n [ 1 . 9 ( ~ ) / ( 0 . 8 W + t ) ] / X / ~ e r (ohms), (1.13)

C o = [1.41Xer] / ln(3.81h / (0.8W + t) (pF/inch) for W / h < 2.

Finally, for the dual stripline the characteristic impedance Z o and intrinsic line

capacitance Co are given by

(0.8W + t) 4(h + t + c) ' (1.14)

C O = 2.82 �9 ~ (pF/inch), ln[2(h - t) / (0.268W + 0.335t)]

where

h = distance from signal layer to reference plane

c = distance between signal layers t = signal conductor thickness W = signal conductor width. h' = distance from reference plane to top of dielectric

Figure 1.3 Embedded or coated microstrip line.

Dual striplines have the advantage that such conductors on one layer are generally

routed orthogonally to those on the other layer, keeping crosstalk to a minimum.

1.1.1 M I N I M U M LOAD SEPARATION

This is defined as the minimum distance at which reflection from load in a trans-

mission line begins to affect other adjacent loads. Let us consider Figure 1.4,

which addresses the capacitive effect in loads and transmission lines. Each of

the loads and all the associated capacitances will reflect a portion of the incident

pulse back to the source. We look for a minimum separation distance between

the loads (Lmin) such that the reflected pulses will not add up constructively to

diminish the contribution from the original signal pulse. The minimum distance

is given by

t m i n - - 0 . 8 5 tr , (1 .15) td

where

,,.._ Incident

tr - 10% to 90% of the edge transmission rate (nsec)

t d = unloaded line propagation delay (nsec/inch).

For example, for a 54SXX IC with an edge transition time of 3.0 nsec and an

FR-4 line propagation of t d = 0.148 nsec/inch, Lmi n = 17.2 inches, which means

Lmin

Reflected

CTL = transmission line capacitance CL = load capacitance

m _1_

CT L

_1_

~ CTL


Figure 1.4 Capacitive effects in loads and transmission lines.


that if the separation between the loads is greater than this, the reflected signals will overlap and diminish the amplitude of the incoming signal.

Most often, however, we find distributed loads as shown in Figure 1.5. In

such cases the transmission line is such that the separation between loads is less

than the minimum separation distance Lmi n. The effective capacitance per unit length experiences an overall increase, and so does transmission line capacitance:

CT = riCE

CTotal-- dLCT L

Z0 -- CTotal 1 ]

(1 + CT / CTotal) "

(1.16)

Here, CT is the total load capacitance, CTota 1 is total line capacitance, Z 0 is the unloaded line impedance, and L T is the total line inductance.

Z; -- Z 0 / ~/(1 -k- C T/fTotal) (1.17)

is the loaded line impedance. The loaded propagation delay time (tdL) per unit length is given by

tdL - t d [ 1 + CT / CTotal] 0"5. (1.18)

Even when reflections are not additive, glitches will still form as a result of

the reflected pulse, as shown in Figure 1.6. The reflective pulse amplitude is

given by

VR - CLZoVo/ 2tt, (1.19)

-

~ ' CTL

CTL = transmission line capacitance CL = load capacitance

_L , ~ cTL

CTL

Figure 1.5 Capacitive effects in transmission lines and distributed loads.

1.1. Microstrip Configuration

CTL = transmission line capacitance

CL = Load capacitance

I ' ~ CTL

Zo

Figure 1.6 Reflections in capacitive loaded lines.

where t t is the edge transition time. If the load has a resistance R E of significant

value, an additional delay must be added to that of Equation (1.19) to give

t T = tdL + RLZoC L /(R E + Zo). (1.20)

One important aspect of time delays is in radial loads. Radial loading occurs if

multiple lines diverge from a common point on a line. The divergence point can

be located anywhere along the transmission line. Radial lines offset the propaga-

tion in a transmission line by developing an impedance Zne t, given by

Zne t = Z~ (1.21) n

where Z o is the characteristic impedance of each radial line (we are assuming

each radial line has the same characteristic impedance) and n is the number of

radial lines. Let us consider Figure 1.7.

The number of radial loads (three as shown in Figure 1.7) divided by the

main line length (n/dm) will provide maximum loading density, and this magnitude

defines the maximum number of loads per unit length that will maintain Z o above

the minimum predefined magnitude. Usually, d m is the distance between the

driver and the most distant load.

For example, in Figure 1.7,

] Co - 1 / (1.22)

CT" _1

d m = 22 inches (main line length)

C o = 4.0 pF/inch (line capacitance per unit length = CTL)

CL = 10.0 pF

d n e t l - - 10 inches; dnet2 ' - 8 inches; d n e t 3 - - 6 inches

t d = 0.15 nsec/inch

Z o = 50 ohms.

10 1. Noise Interact ions in High-Speed Digital Circuits

DRIVER

Figure 1.7

dm

NET1

[ dNe t l

I r- NET3 I

" - I I ~ I . ' - dNet3

.,~-~ - - F b L ~ t I I

dNe~. - - - - I ~

I I

I NET2 ]

Effect of radial lines on propagation through a transmission line.

Using Equation (1.16):

Cx(main) = nC L = (5)(10.0 nF) = 50 pF

Cx(netl) = nC L = (2)(10.0 nF) = 20 pF

Cx(net2) = nCL = (2)(10.0 nF) = 20 pF

Cx(net3) = nCL = (1)(10.0 nF) = 10 pF.


Ctotal(main) = dLCTL = dmC 0 = (22 inches)(4.0 pF/inch) = 88 pF

Ctota](netl) = dLCTL = dmC o = (10 inches)(4.0 pF/inch) = 40 pF

Ctotal(net2) = dLCTL = dmC o = (8 inches)(4.0 pF/inch) = 32 pF

Ctotal(net3) = dLCTL = dmC o = (6 inches)(4.0 pF/inch) = 24 pE


Z~ = (main) = Z 0 / %/1 + C T / CTota 1 -- 50 / V/1 + 50 pF / 88 pF = 41.2 ohms

Z~ = (main) = Z 0 / %/1 + C T / CTota 1 = 50 / V /1 + 20 pF / 40 pF = 42 ohms

Z D = (main) = Z o / %/1 + Ca- / CTota 1 = 50 / V /1 + 20 pF 132 pF = 39.2 ohms

Z~ = (main) = Z o / V ' I + CT / CTotal = 50 / g / 1'"' n L l 0 pF / 24 pF = 42 ohms.

1.2. Crosstalk in the Time Domain

The parallel impedance between Z~(main) and Z~(netl) is given by

Zol (parallel) = (41.2)(42.0)

(41.2) + (42.0) = 20.8 ohms,

and for the other nets we have

Zo2(parallel ) = (41.2)(39.2)

41.2 + 39.2 = 20.1

Zo3(parallel ) = (41.2)(42.0)

41.2 + 42.0 = 20.7.


toE(main) = td[1 + CT / CTotal] 0"5

= 0.18 nsec/inch

1) = td[1 + CT / CTotal] 0"5 tdL(net = 0.18 nsec/inch

- to[1 + C T [ CTotal] 0"5 tdL(net2) = 0.19 nsec/inch

= td[1 + C T [ CTotal] 0"5 tdL(net3) = 0.17 nsec/inch.

= 0.15 nsec/inch[1 + 50 / 80] 0.5

= 0.15 nsec/inch[1 + 20 / 40] 0.5

= 0.15 nsec/inch[1 + 20 / 32] 0.5

= 0.15 nsec/inch[1 + 10 / 24] 0.5

The total propagation delays are given by

td(main total) =

td(netl total) = m

td(net2 total) =

td(net3 total) =

(22 inches)(tdL(main)) = (22 inches)(0.18 nsec/inch)

3.96 nsec

(10 inches)(toL(net 1)) = (10 inches)(0.18 nsec/inch)

1.8 nsec

(8 inches)(tdL(net2)) = (8 inches)(0.19 nsec/inch)

1.52 nsec

(6 inches)(toL(net3)) = (6 inches)(0.17 nsec/inch)

1.02 nsec

11

1.2 Crosstalk in the Time Domain

The subject of crosstalk for transmission lines in the time domain is next. We

now address a more simplified approach concerning crosstalk in the time domain

for simple microstrip lines in the PCB. The noise caused by crosstalk is created

by the adjacent signals from active lines to passive lines. The crosstalk happens


when the lines are close enough so as to have mutual capacitance Cm and mutual

inductance L m as shown in Figure 1.8.

For a microstrip line length that is greater than 2t d, the forward and backward

crosstalk coefficients Kf and K b are given by

K f - - 0 . 5 C o Z o (K L - K c) (1.23) K b = C o Zo (KL + K c) / 4t d,

where

K L = 0.55 exp { - (A 2 �9 % + B 2 �9 w/4,)}

K c = 0 .55exp { - ( A 1 . % + B 1 . % ) }

A1 = 1 + 0 .251n[ e r + 1 1 2

A 2 = 1 + 0.25 ln[/x r + 1)/2] B 1 = 0.1 (8 r n t- 1) ~

B 2 - - 0 . 1 (/.z r + 1) 0.5

d - line spacing.

For an embedded microstrip transmission line, the crosstalk equations are the

same as those given for microstrip lines in Equation (1.23) except that e r is

substituted for e'r given by the equation

g"r - - g'r [1 +" e ( - 1.55h'/h)]. ( 1 . 2 4 )

For the stripline environment, the forward crosstalk is zero (K L = Kc); however,

the backward crosstalk is twice the equivalent microstrip crosstalk in which the

impedances are the same and the capacitances are twice as large.

Two other formulas of importance are the crosstalk for inductive and capacitive

coupling (see Figure 1.8):

Crosstalk = RLCm and Crosstalk = Lm (1.25) t r R s t r "

The terms C m and L m can be calculated analytically within uncertainty by using

2

m-0002,4 [, + ] 126,

and

2

0 7L inches, ln[1 + C m = 2 pF

1.2. Crosstalk in the Time Domain 13

(a)

l [;>- DRIVERS +

(b) Rs

Ivvx,

vs

?

ZO

\ Ro Lm ~- Cm

/ 7 0

I L ~RL

ut

Figure 1.8 (a) Physical representation of two circuits in a crosstalk scenario, separated by a distance d. (b) Mutual capacitance and inductance in PCB microstrip lines.

where h is the height above ground plane, s is the separation between wires, and

L is the length of wires in inches, er(ef0 is the effective dielectric constant and

r is the wire radius. We can use equation 1.9 to convert flat conductions into

round wires for usage of equations (1.25) and (1.26) or through measurements, which would give equations such as

(Area of coupled noise impulse)R s Lm = AV (1.27)


and

(Area of coupled noise impulse) C m - R L A V . (1.28)

Some of these parameters can be observed in Figure 1.9.

1.3 P o w e r D i s t r i b u t i o n

Power distribution is an important factor that is usually of great importance in the design of PCBs. In high-speed digital design the grounding of the PCB provides not only a DC return but also a radio-frequency return plane for all of the IC. There are a series of rules that should be considered:

1. There should be an even and low RF impedance in the DC power distribution. Minimize ground loops in the RF grounding system in order to minimize radiated emissions.

2. Decouple ICs in a PCB using bypass capacitors ranging from 0.1 to 10.0/zF. The capacitor leads should be as short as possible in order to minimize inductive effects. The bypass capacitors should be as close to the IC as possible.

3. Use planes rather than return traces for power and ground in PCBs.

4. Power and ground planes should be kept close to each other to reduce radiated emissions. The best layout to reduce radiated EMI is shown in Figure 1.10.

The power distribution planes used in multilayer PCB do have some impedance. An example of a circuit model for a multilayer power distribution is shown in Figure 1.11. The power supply is shown by its source and ground impedances. The distribution impedances are also shown for the backplane with its inductances, resistance, and capacitance coupling between planes.

From the AC impedance point of view, the power distribution is described in Figure 1.12. The first impedance Z t is the transient impedance, which is modeled

between the Vcc and the decoupling capacitor (Cby). The second impedance in the figure is the bulk capacitance impedance (Zb), which changes the IC decoupling capacitance. The final AC impedance in power distribution planes is the one given by the plane bulk decoupling capacitance. To this impedance (Z t, Z b, Zbulk)

1.3. Power Distribution 15

Voltage . . . . . .

Av

VCrosstalk

V o of driver

: VIA Vcrosstalk

i i

time (nSec)

. . . . . ~ m

pied Noise

Figure 1.9 Crosstalk measurements.

i

time (pSec)

we must also add the DC resistance of copper planes (ground and Vcc), given by

679 Zplan e (DC) = Tp (/z - ohms)square' (1.29)


Gnd 5V

Gnd _ _ l _ . 5V

~~~~ ~ ~~~~l fl~~~~ b I[__----F____F----~__I~I__--IF____F----~__

Figure 1.10 PCB layout for reducing radiated EMI.

Rs "VVk,

Vs

"VVk, Rg

Power Supply

I I

I I

Rb 'VVk,

I !

I Rby

I Backplane

I Lb I RpCB LpCB

& I ~ ~c I Cb I I I z!o

Lby I Rg(PCB) Lg(PCB)

I P C B

Figure 1.11 DC power distribution in a PCB card.

IC

Vcc Cbulk(PCB) I~ ~ ' , 'k/k/k, It /

Zt Cby Zb Cbulk Zbulk(PCB)

Figure 1.12 Power distribution with the AC impedance effect.

1.4. Decoupling Capacitance Effects 17

where Tp is the thickness of the plane (0.025 mm/0.001 inch), as well as the impedance between parallel planes, given by

h Zplanes- - 377 (1.30)

W + X/~e~'

where h is the spacing between planes, W is the conductor width, and t is the plane thickness. The plane inductance Lplan e is given by

h Lplan e "- 0.383 " (nil/inch), (1.31)

W

and the plane capacitance Cplan e is given by

S Cplane --" er /30 ~ pE (1.32)

where s is the surface area in inch 2, h is the plane separation distance, and W is the plane width (inch).

1.4 Decoupling Capacitance Effects

The ICs need to have sufficient current to operate, including high peak-current requirements during switching. The PCB power system must provide this current requirement without the need to lower the supply voltage. To alleviate this problem, capacitors placed near the devices are connected between the power and ground planes. These capacitors provide the charge current needed by the IC and not the power planes. When their current is discharged, these capacitors will recharge quickly from the energy provided by the bulk capacitors and PCB bulk capacitors. A typical use of bypass capacitors (Cby) is shown in Figure 1.13.

vcc

GND

Figure 1.13 Proper use of bypass capacitance in PCB.


The capacitance Cm is the mutual capacitance between planes which are very close to each other. This capacitance is of very low impedance at high frequencies, allowing RF current to cross easily between planes. For lower frequencies, the bypass capacitance helps to short together the power and ground planes. At high frequencies, however, the bypass capacitor, associated planes, leads, and device models can have associated parasitics, as shown in Figure 1.14.

Bypass or decoupling capacitors provide the current needed to the devices until the power supply can respond. In high-frequency switching, bypass capacitors of several capacitance ranges must be used. Bypass capacitors with short leads provide faster current because of the diminished lead inductance. Therefore, in high-speed design, it is highly recommended that leadless surface mount capacitors be used. The best performance is obtained when the capacitors are within the component package.

As shown in Figure 1.14, the bypass capacitor's equivalent circuit is composed of Rsh, the insulation resistance (100 Mohm), which means it has a minimum effect in the operation of the bypass capacitor; R c, the series resistance; C c, the bulk capacitance of the capacitor; and L c, comprising both the lead and plate inductance. The plate inductance is usually small when compared to the lead inductance. The real impedance of the capacitor is given by

Zby---- VRc 2 Jr (X L --Xc) 2 (ohms), (1.33)

Cby Model at High Frequencies Lp

+V Power Leads Model at I / High Frequencies

Rsh I Rp <~

.rYy,~ I Vcc Capacitive Load Model at High Frequencies

:c, I CL .L _ _ _ . ,c , , - . . , ,

Transmission Line Load at Ground Leads ~:Rg 7-0 ZL High Frequencies Model at High I, Frequencies

Figure 1.14 High-frequency effect in IC connections.

1.4. Decoupling Capacitance Effects 19

where

X L = 2 ~ f L c , X c - - 1 / 2 ~ f C c .

The series inductance and capacitance yield a resonant frequency at which the effective impedance will equal the series lead resistance R c. Below resonance,

Z c is dominated by the capacitive reactance. Above the resonance frequency, Z c is primarily an inductive reactance. These scenarios are shown in Figure 1.15.

In addition to the capacitance, inductance, the wiring inductance from the

power source must also be considered, as shown in Figure 1.16. An approximate

expression for the wiring inductance in Figure 1.16 is given by

Lpowe r trace = 10.16 L w l n ( ~ ) (nH), (1.34)

where L w is the wire length, h is the average separation between power trace and ground plane, and d is the wire diameter (see formula (1.9) for conversion

from PCB trace). In Figure 1.16 the maximum dI/dt is given by

dl 1.52 AV Max dt ~ CL, (1.35)

~ Zc 0

Z-i# C \ /' Inductive z-- ~q ~ ~c ~ Z = j ~

C c ~ Is

Zc= l s / j oCc

Lc Z L = J o Lc = Zc at fR

v

fR f

Figure 1.15 Effects of inductance in bypass capacitors.


Lpower trace

A I Cby

Charging Current

CL

Vcc

Figure 1.16 The effect of capacitance in power traces.

Ground

where A V is the drive voltage, t r is the driver rise time, and CL is the load

capacitance. The noise voltage is given by

VL (noise) = Lpowe r trace" Max dl (1.36) dt"

In reference [1] a simple prescription is given to choose the appropriate bypass

capacitance:

1. Obtain the maximum change in supplied current expected on the board:

AV Als = nCL At ' (1.37)

where n is the number of ICs in the PCB, CL is the typical load impedance (it may be necessary to use the worst case), A V is the amount of power-supply noise the logic of the PCB can tolerate, and At is the

switching time.

2. Calculate the maximum common path impedance that can be tolerated

between the ground and power planes:

AV Zma x -- ml s. (1.38)

3. Calculate the frequency below which the power-supply wiring is suffi-

cient:

Zmax (1.39) fps -- 27r Lpowe r trace"

1.5. Power Dissipation in TTL and CMOS Devices 21

4. Find the value of bypass capacitance that has impedance Zma x at frequency fps. Use a bypass capacitor as large as

1 Cby -- 2 r Zmax" (1.40)

Conversely, to calculate the highest frequency at which the bypass capacitor is effective, use the formula

-- Zmax (1.41) fby -- 27rLpowe r trace"

1.5 P o w e r D i s s i p a t i o n in T T L and C M O S Dev ice s

The power dissipation in TTL devices has three main components: (1) the collector currents ICE and ICH (low and high), a steady-state contribution, (2) the output load charging (i.e., through CL), and (3) internal dynamic charging. The collector currents ICE and ICH can be obtained from vendor data sheets. It is important always to calculate the worst-case value in these collector currents. For this

purpose use 10% above typical (nominal) values of ICE and ICH at a 50% duty cycle. The steady-state power distribution would be given by

p c = ( 1 " 0 + 0 " 1 ) 2 [IcL at- ICH] Vcc (1.42)

Pc = 0-55Vcc(nom) [IcL(mA) + Icn(mA)] (mW).

For the case of output load charging, we must also use the worst-case maximum output switching at a given time driving a CL. The maximum or worst-case power dissipated is given by

PCL -- [Vcc(nom) - VOH]IcL N, (1.43)

( V o H - VOL ) ICL = 0.5CL

tr IcE = load charging current CL = load capacitance t r = edge transistor rate PCL = power dissipation of load Von = maximum output voltage high VOL = maximum output voltage low N = number of outputs.

where


The final contributor is the power dissipated due to internal dynamic charging. This term, called PD, is given by vendor data due to the inherited device capacitance as the clock frequency increases. The total power is then given by

Ptotal -- (Pc + PCL + PD) M, (1.44)

where M is the switching frequency multiplier. For CMOS devices the power consumption depends on the power-supply voltage Vcc, the frequency of operation f, the internal capacitance CI, and the load capacitance CL. The quiescent power consumption can be given by

Pc : Ic Vcc. (1.45)

The device's dynamic power can be calculated by

Pa = (CL + CI)V2cf, (1.46)

where CL is the load capacitance, CI is the dynamic internal capacitance, and f is the switching frequency. The total power is given by

etotal --- Pd + Pc. (1.47)

1.6 Thermal Control in Equipment and PCB Design

What do thermal issues in PCB have to do with noise concerns? The relationship is indirect, but nevertheless highly important: thermal problems in PCBs decrease the reliability of electronic parts, having a negative effect on the signal-to-noise ratio of telecommunications electronics. In this section we will cover some fundamental issues in the thermal design of PCBs.

In PCBs the ever-increasing trend seems to be toward increasing power consumption per device. Thus, the greatest threat to thermal management lies in parts that are mounted very close to each other, otherwise called collocated parts. Thermal management will play a role not only in the junction temperature, but also in parts reliability.

If junction temperatures are to be kept to a reasonable level, usually 80-100~ several methods of cooling must be employed, which may include convection cooling and a thermal path from the IC to the PCB structure or heatsink. The dissipation of heat by conduction, convection, or radiation without heatsinks can only be possible if small quantities of heat are involved. The radiation of heat from the ICs themselves, the leads and mounting devices, lugs, etc., is normally

1.6. Thermal Control in Equipment and PCB Design 23

sufficient to maintain the correct operating temperature. If the heat dissipation is sufficient, heatsinks and even coolers are employed to remove heat from the PCB. Packaging designers should know that several factors are involved in the thermal management system: (1) all exposed surfaces of the IC must be kept to

safe temperatures, (2) the overall cooling system must meet the reliability objec-

tives, and (3) the cooling system design must be consistent with the heat dissipa-

tion capabilities. Heat generation within electronic PCBs results from the

interaction of these basic modes of heat transfer: conduction, convection, and

radiation. Most often these interactions happen simultaneously.

1.6.1 CONDUCTION

The conduction heat through material is directly proportional to the thermal

conductivity of the material y. Table 1.1 shows the typical conductivity of several materials commonly used in PCB design.

In the design of PCBs, in order to optimize the transfer of heat by conductivity,

some strategies must be followed:

1. Use materials with the highest thermal conductivity, as long as they are consistent with the structural integrity of the design.

Table 1.1 Thermal Conductivity of Many Types of Materials

Material ~, (Watt~inch~

Air 0.0007 Alumina (99.5%) 0.70 Beryllia (99.5%) 5.0 Silver 10.6 Diamond 16.0 Gold 7.57 Epoxy 0.005 Aluminum alloy 1100 5.63 Copper alloy 9.94 Beryllium copper 2.7-3.3 Titanium 0.2-0.5 Brass alloy 2.95 Stainless steel 321 0.41 Steel, low carbon 1.19 Stainless steel 430 0.66


2. Use the optimum cross-sectional area.

3. Keep the thermal path as small as possible.

The use of copper is usually more practical because of its thermal conductivity,

but aluminum is most frequently used because of weight and cost constraints.

1.6.2 RADIATION

The transfer of heat by electromagnetic radiation is known as thermal radiation.

Most of this radiation occurs in the infrared region. In satellite hardware it is

one of the two main methods (the other being conduction) by which heat can

be transferred between pieces of electronic hardware, since this type of radiation

can also easily occur in vacuum. The rate of heat flow by radiation is a function

of the emissivity of the radiating body. Table 1.2 shows the emissivity factor of

some commonly used material in electronic hardware. The numbers in Table 1.2

can be interpreted as emissivity factors against a "blackbody" which has a

perfect emissivity of 1.0. A hot body, from the radiation point of view, is one that supplies radiant

energy that has been previously absorbed. For example, the radiant energy emitted

by a heatsink is often reabsorbed by an adjacent pin, since radiated energy often

flows on a path that is perpendicular to the surface. The energy flow continues until the heat is absorbed by another cold body. The cold body becomes hotter than it normally would be. The maximum advantage of radiation properties

can be obtained when (1) heatsinks with a maximum surface area are used,

Table 1.2 Emissivities of Several Surfaces

Material Emissivity

Polished AL sheet 0.040 Rough AL sheet 0.055 Anodized AL 0.80 Brass 0.040 Copper 0.030 Oxidized steel 0.657 Nickel plate 0.11 Silver 0.022 Tin 0.043


(2) surfaces are finished to cause maximum emissivity, and (3) heatsink materials are used that conduct the thermal energy to the dissipating surfaces as fast as possible, keeping the temperature difference between the dissipating surface and absorbing surface as high as possible.

We now outline a few general guidelines in the thermal analysis of PCBs for

electronic equipment:

1. Perform thermal analysis as early as possible, especially during the first

phases of design when the component operating temperatures are first

addressed.

2. Establish overall power dissipation limits early in the design.

3. Define the maximum steady-state conditions (temperature) in which the

equipment is expected to operate reliably.

4. Find out the maximum allowed junction temperature and heat dissipating parameters of components.

5. Evaluate packaging overall for such factors as the cooling methodology

to be used at different locations, overall equipment size and external surface types, and assembly size and type.

PCB-level thermal analysis is a necessary step in thermal management. The

heat that is generated within a semiconductor component is transported by thermal conduction to the component surfaces, from which it is transferred to the external heatsink by simple conduction. One of the most common ways to model the heat transport within PCB components is to use internal thermal resistances. The internal thermal resistance represents the temperature rise per unit power dissipation that will occur within the component package. On the other hand, the external

resistance shows the rise in temperature per unit of power dissipation which occurs between the external surface of the components and other surfaces.

The values of the thermal resistances depend on the package geometry, the

materials, and the approach used in assembly. Therefore, these thermal resistances

are controlled by the device manufacturer and usually defined in essence by the

parameters 0jc (theta junction to case) or 0ja (theta junction to air). The other

term of importance is the junction temperature Tj, whose value is dependent on

heatsink temperature, internal thermal resistance, and the amount of dissipated

power. An illustration of the use of thermal resistances in modeling PCB thermal

design is shown in Figure 1.17.

Let us consider the device shown in Figure 1.18, which is surface mounted.

The figure shows not only the heatsink, but also the major parameters such as


C Transistor IC

, ,

. . . . . . . . . . . . ~ . . . • . . . . ~ . . . . . . . . . . . . . . . . . . , , / . , , ' / . . . , g , , . , - , . ~ , i . / ; , . ; . . . , ~ . . . . . . . . . . . . . ~ . . ~ . . . . . . . . . . . . , : . . . . . . . . . . .

"~ ~R~

. . . . . ~ ....... ' ~ , , ..... ' " l

Figure 1.17 The use of thermal resistances in PCB components.

Tj and Ojc. A typical Ojc, for example, can range from 1 to 25~ depending on the device. Another parameter of importance is Oja, which can be computed

as

~ja -- ~jc "+" 0cs + 0sa (1 .48)

Ojc "x Tj I Die

~ ~ / / / f ~ - - " .... Heatsink - ~_>

Package Substrate

Figure 1.18 Heatsink parameters.


where

0cs = the case-to-heatsink thermal resistance 0sa "-- the heatsink-to-ambient thermal resistance 0jc = the junction-to-case thermal resistance 0ja = the junction-to-air thermal resistance.

All devices have a specified maximum junction temperature. The expression used to calculate the junction temperature considers the present operating conditions. Figure 1.19 shows an equivalent thermal circuit representation, which can

be described physically as

Tj = 0jaP d n t- Ta, (1.49)

where Tj is the junction temperature (~ Pd is the total dissipated power (W), and Ta is the ambient temperature (~

Notice that the product of Pd w i t h 0ja gives the temperature rise due to the power dissipation. Finally, the total dissipated power Pd in the device is the sum of all DC and RI input power minus the RF output and reflected power,

Pd -" PDC + P i n - P o u t - Pref, (1.50)

where

Pdc -- the DC power into the device Pin = the input power into the device (if any) Pout = the input power delivered to the load Pref -- the input power that is reflected because of possible mismatch.

Pd 0jc 0 c s 0 s a

Tj T c T s Ta

Figure 1.19 Equivalent thermal circuit representation of heatsink and PCB components.


The formula for calculating the thermal resistance 0 from the structure's

material and physical dimensions is given by

L 0 yA' (1.51)

where

L = length of thermal path

A = cross-sectional area of thermal path

3/ = thermal conductivity of the material.

Finally, for design purposes it is always best to obtain the maximum tempera-

ture for the back side of a PCB, which can be derived from

T~ = T c - 0csP d, (1.52)

where

T s - temperature of heatsink

T c - temperature of case

0cs - case-to-heat sink radiation resistances

Pd -- power dissipation of the device.

A typical way to calculate the power dissipation is by assuming a circuit mode that is switching in every clock cycle. The power dissipated is given by

1 2 Pd = ~ f Vcc CL, (1.53)

where f is the clock frequency of the circuit, Vcc is the power-supply voltage,

and C L is the load capacitance. If there are several drivers N sharing the same

node, the above equation becomes

1 NfV2cc CL" (1.54) P d - - ~

In Figure 1.20 the dielectric constants of several PCB materials as a function

of frequency are given. It is important to notice that for some dielectric materials

there is a great decline in dielectric constant as the frequency increases.

The speed at which a signal travels through a dielectric constant is a function

of the dielectric constant itself. Figure 1.21 shows the signal velocity as a function

of the dielectric constant.

A trace in a power-supply circuit can carry several amps without significant

heating or voltage drop. Therefore, the handling of large currents with insufficient

, 4 - - o r

t~

tO r

O C) r

o ~ t . -

.4==J

O

E3

> ~

= . - .

1.6. Thermal Control in Equipment and PCB Design

5.2

5.0

4.8

4.6

4.4

4.2

4 . 0

3.8

3.6

I I I I I I I - I I I I I I I

I I I I I

- I I ~ I I I

t I I i I - i i I I

I I I

- I I I

i i i

29

I I I I ~ I I I I

I I I I 20 50 100 150 1 2 5 10 MHz

Figure 1.20 Dielectric constant vs frequency of various PCB traces.

O

tl) 09

t -

c -

c - . m

,r

7.5

7.0

6.5

6.0

5.5

5.0

_ m n

i I I I I ! I I I I 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2

Relative Dielectric Constant ~R

Figure 1.21 Signal velocity vs dielectric constant in a PCB.


copper in a trace may result in voltage drops and heating that could degrade

circuit performance. In Figure 1.22 we see the illustration of the trace resistance of copper as a function of trace width and thickness.

Finally, Figure 1.23 shows the conductor heating as a function of width, thickness, and current flow.

One of the most common methods to decrease the thermal resistance and

increase the power dissipation is to use thermal vias. Thermal vias are large-

diameter holes punched into the substrate, aligned vertically. The resultant via

pattern is like a solid metallic plug, and the vias are filled with a high-thermal-

conduction material. With the use of thermal vias, the heat that is generated from

the IC is transported through the interface between the die and substrate to the

thermal vias. The vias will then transfer the heat to other heat conductors such

as heatsinks. The heat removal capabilities are dictated by the size and number

o o t~ E t -

O v

o tO t -

t~ o

r r

!

2 . 5 ~ I I I I I I I I I I I I I

2.0

1.5

1.0

0.5

0 .50Z I I I Copper / I r ~ i / , , , , I-- i "-,%# I ~ i i i _ I I ' ~ I I I I

- I I [ ' ~ I I I I

- I I I " ~ I I I

_ , , , ' ' - L ' ' I I I I I ~ I

F I I/ 20ZCopper~ k I jr ,' , ,

t , ' ----z__. I I

, t T - - 4 6 8 10 12 14 16 18

Trace Width (mils)

Figure 1.22 Trace resistance vs trace width and thickness.

20


0.24

~, 0.20

=o ~" 0.16

0

0.08 g 0 0.04

0.0

i I I I l I I

0~ I l / I / I i 5oc.I 1o -- I rise/I rije I / I 30001/ I / ' I

] I / I r ise/ / 4000[ -- I I / I I / I / I rise I

i ' l J V / ' '

~ / i / I I I - I / ; I I i i

I I / ' 1 I I I J f I I I I

- i i I I I # , .

I I I I I I I ! I I I I

i i i f l I 4 8 12 16 20 24 28

i 32

Current (Amps)

Figure 1.23 Temperature rise vs copper for 2OZ copper.

of vias. Thermal vias should be located close to the hot spots of a PCB only

because they occupy routing space and make the routing of PCB traces more

difficult. A representation of thermal vias is shown in Figure 1.24.

The total heat Q transferred by radiation is given by

Q = k e f l A ( T 4 - T 4 ) , (~.55)

where

k

~3

p A

= the Boltzmann's constant

= emissivity

= the view of the shape factor

= radiating surface area

T h, T c = hot and cold temperature in K.


f

Die i ~ '"'"~,

i ic i ( ) ( ) ( ) ( ) ~ I-! !-I !-1 I 1 ~ \

Thermal Vias

Figure 1.24 Thermal vias illustration.

Solder Substrate

1.7 Lossy Transmission Lines and Propagation Delays

As we go into more dense packaging and more packed ICs, many of the internal

interconnections have significant resistance and therefore must be considered as

lossy transmission lines. We now outline some of the basic parameters of lossy

transmission lines and develop formulas for signal delays. For the microstrip given in Figure 1.25, the DC resistances are given by

Equation (1.56), which is the low-frequency loss factor:

P (1.56) OZ R - - 2 Wt Z o,

W ~ I t ' ,

. _ ~ - - _ - : ,I

h / Sr -f

Figure 1.25 Parameters of a microstrip configuration.

1.7. Lossy Transmission Lines and Propagation Delays 33

where W and h are the conductor width and thickness, p is the material resistivity,

and Z o is the conductor characteristic impedance. At higher frequencies another

factor plays a role in transmission lines: the skin effect, in which the current at

higher frequencies is concentrated on the surface area of the conductor. The skin

depth is given by

6= ~ p (1.57) /

7r/~f' where f is the frequency and/z and p are the permeability and resistivity coeffi-

cients of the material. When conductor thickness is about 2~ or more, increasing

the conductor thickness does not reduce the effective resistance of the interconnec-

tion. The dielectric attenuation constant is defined as

7rV~er f tan ~d (1.58) f f d = C 0 '

where tan 6 d is defined as the loss tangent given by the expression

tan 8d = ~ (1.59) 0)8 r

where o" a is the conductivity of the dielectric material and o) is the angular

frequency (w - 2~f ) . Choosing the dielectric constant correctly minimizes the

dielectric losses. As for the propagation and interconnect delay, consider the model in Figure 1.26.

I I I

I I I Linl

f,y.yy~

I qnll2

T T I Cinl/2 I I I Packaging

Interconnect

I

I Zout I Z.ps Lgs Lin2

l :l :T T i Cou t I Cps/2 Cgs/2 Cin2/2

Cin2/2

I PCBMicros t r ip I P a c k a g i n g I I RECEIVER DRIVER I Transmission Line I Interconnect

Figure 1.26 Electrical modeling of a driver/receiver with transmission line.


A first approximation to the propagation delay is given by

t d = 0.7[Zout(Cin 1 + Cou t + Cus + C L + Cin 2) (1.60) l

§ ~ZusCus § Zus(Cin 2 + CL) ],

where Zou t and Zus are the equivalent resistance of the driver and the characteristic

impedance of the microstrip line, respectively (both in ohms). The term Cus is the

total line capacitance. Cin 2 and Cin 1 are the equivalent total packaging interconnect

capacitances. C L is the load capacitance of the receiver IC. The effect of the line

inductances (i.e., Linl, Lin2, and Lus) is to increase the time delay by 10-30%, as

the terms Zou t and Zus in Equation (1.60) are substituted by the terms (Zou t +

2Lin ) and (Zus + Lus), respectively. The capacitance terms in the preceding equation are given by

W / b Cus = 2ere~ 1 - t / h ' (1.61)

where t is the thickness of the microstrip line, b is the thickness of the dielectric material (2h), and W is the width of the microstrip.

For a stripline as shown in Figure 1.27, the foregoing expression be-

comes

W / b Cus = 2ere~ 1 - t / b "

Often, fringing capacitance must also be considered, as shown in Figure 1.27. The fringing capacitance for the stripline is given by

Cf ~ In 1 + - ~ - 1 In - 1 .(1.62) 1 - t / b 1 - t / b 1 - t / b (1 - t / b ) 2

II h /of cfHO

Figure 1.27 Parameters in a stripline configuration.

1.8. VLSI Failures and Electromigration 35

The characteristic impedance of a stripline is given by

1207re Zus(Stripline) = X/~erCt'

where

(1.63)

C t 4 = 2Cus + 4Cf.

For the microstrip line, the characteristic impedance is given by the following expressions. For Well/h -< 1"

where

Zus = eX/~reff60 ln[8h + Weft] , Wef f 4h J'

- 1 / 2

1 , '{[1+ 12 ] +0.04[ / 3 r ' e f f - - T - 2

2,[h, 1 Weff = W + 1. 1 + In for--W>- h 27r

Weff= W + 125ht[1 + l n ( 4 t W ) ] f o r W < 1 �9 h 27r"

1 (1.64)

For Weff/h > 1"

ZUS -'--

8 r , e f f :

120~" / ~//er, ef f

Weff+h 1.393+ 0.667 ln[~-~eff + 1.444]

- 1/2

8r+ 1 + 8 r - - 1[1 + 12 ~eff ] 2 2

(1.65)

The delay of the transmission line t L in Figure 1.26 depends on the characteristic impedance of the line and is given by

tL = 85X/0-475er + 0.67 (psec/inch), (1.66)

and for a buried microstrip the delay of the transmission line is given by

t L = 85X/~e r (psec/inch). (1.67)

1.8 VLSI Failures and Electromigration

The issue of electromigration refers to the mass transport in metals under high- current and high-temperature conditions. It is a key problem in VLSI circuits


because it can cause open circuits and short-circuit failures in the VLSI intercon-

nections. This is even more important with today's technologies, where VLSI

circuits are fabricated on small chip areas to save space and reduce propagation

delays. In FET devices, as the device decreases in size, the propagation delay

decreases and the power dissipation remains constant, but the current density

increases. In bipolar devices, similar behavior is observed. The problems caused by electromigration can be divided into two categories:

topology-related problems and material-related problems.

1.8.1 TOPOLOGY-RELATED PROBLEMS

These problems result when the interconnection dimensions decrease to the

micron range. Interconnection lines can then fail at different unrelated sites.

Furthermore, as the device contact size decreases, the contacts become comparable

to interconnection lines and are subject to the same current density as the conduc-

tor lines.

1.8.2 MATERIAL-RELATED PROBLEMS

These problems are basically caused by high current densities. Three problems

are associated with electromigration from the materials point of view. The first is Joule heating. As the current inside the IC increases, the heat distribution becomes a serious concern. The temperature rise caused by very thin metal wires generates a great deal of heat that must then be removed through the substrate.

The cooling rate provided by heat sinks and thermal vias must be greater than the heating rate due to the current density. Any imperfection within the substrate may diminish the efficiency of the heat dissipation process and speed up a thermal

runaway process that could destroy the line. The second materials-related problem is current crowding. Because of struc-

tural inhomogeneities, there is an uneven distribution of current along metalliza-

tion conductors. This also causes the atoms in certain metallization lines to

migrate at different speeds, resulting in the formation of voids that will eventually

fail to open. Finally, there is reaction of materials. Because of mass accumulation and

storage and depletion, the mass transport generated is enough to cause stresses

and lead to extrusion in the passive layers. This can also change the electrical

properties of junction contacts.

1.8.3 ELECTROMIGRATION MECHANISMS

Metallization is the process by which semiconductor substrates are joined together

through a metal line. The ions in the metal are held together by the metal line.


The binding force of these metal ions is stronger than any possible opposing

electrostatic force. As the temperature increases, some of the ions escape from

the potential well that binds them in the metal lattice. When these ions reach the

potential well, they become energized and move around. These ions, for example,

can move to vacancies within the metallization line in a process called self-

diffusion. In the absence of an electric field, the self-diffusion process is random.

Therefore, a random rearrangement of atoms occurs with no net gain in mass

transport. When a current is applied, there are two external forces applied in the

metallization: the frictional force and the electrostatic force. The frictional force

is due to the momentum changes within the metallization structure; it is propor-

tional to the current density. The electrostatic force is caused by interactions

between the electric fields created by the electrons and the positively charged

metallic ions. The electric field caused by the electrons will attract the positively

charged metallic ions against the electron flow.

In Figure 1.28 the frictional force and electrostatic force are given by Ff and

F e, respectively. The frictional flow acts in the direction of current flow J. The

electrostatic force acts against the current flow and in the same direction as the

electric field. Because F t- > > F e, the net force will always be in the direction of

current flow.

The induced flux created by the net frictional force is given by

0 = ~ fkT ) (Zeffe)eXp '

where (1.68)

and

Z = electron-to-atom ratio

Pd = defect resistivity

Zef = Z( p ,,m 1) \2pndm

J E ,._

F e Ff

Figure 1.28 Illustration of electromigration.


p = resistivity of metal

n d = density of defects

n = density of metal

m = free electron mass

E = activation energy

T = absolute temperature

K = Boltzmann's constant

D = self-diffusion coefficient

f = correction factor on the lattice structure.

Because of ~pf the original random process changes to a well-directed process

in which metallic ions move opposite to the electron flow of the current, whereas

the vacancies move in the opposite direction. The metallic ions condense to form

whiskers, and the vacancies condense to form voids. This process results in a

change in the density of the metal ions with respect to time. The density change

is given by

dn d--7 = - V(V �9 ~p), (1.69)

where V is the volume and

dO dO dO V" O= gx dz �9

This formation of voids causes the metallization lines to foil. As the current is

diverted to other lines, current density and heating increase, causing the local

temperature at certain locations within the IC to increase and therefore more

lines to fail. Finally, as whiskers form, mass-related stresses could occur that can

cause additional lines to fail. These failure scenarios and processes will continue

until the circuits fail. The mean time between failures is given by

A , e x (1.70)

where J is the current density, A is a constant depending on geometry, k is

Boltzmann's constant, n is a constant ranging from 1 to 7, and T is the temperature

in kelvins.

Two factors are responsible for inducing electromigration. The first is current

density. As current density increases, momentum exchange between the electron

carriers and metallic ions causes large frictional forces and flux to occur along


Table 1.3 MTBF (hours) at a Temperature of 160~ and 10 -7 cm z Cross-section

Current Density Small Large (mA/cm z) Crystalline Crystalline

Glassed Large

Crystallite

0.1 15,500 120,000

0.2 4,000 30,000

0.4 960 7,800 65,000

0.6 450 3,300 29,000

0.8 250 1,900 15,000

1.0 155 1,250 11,000

2.0 40 300 2,700

4.0 10 75 700

6.0 ~ 33 370

8.0 18

the metallization lines, which could eventually make the lines to fail. As can be

observed in Table 1.3, the MTBF decreases as the current density increases.

The second factor is thermal effects. Electromigration develops from a high

temperature to a low temperature. The thermal gradients can induce ther-

mal forces that can cause mass transport in metallization lines. According to

Table 1.4, the MTBF increases with line temperature.

Table 1.4 Dependence of the MTBF on Temperature for Three Kinds of AL Film Conductor Having Cross-sectional Area of 10-7 c m 2 and Current Density of 1 mA/cm 2

MTBF (hours)

Current Density Small Large (mA/cmZ) Crystalline Crystalline

Glassed Large

Crystallite

40 23,000 m m

80 3,000 m

120 580 12,500 n

160 155 1,250 11,000

20O 52 180 800

220 32 80 255

240 21 37 90

260 14 18 34


1.9 Interference Concerns with Connectors

A major source of radiated EMI is connectors, or rather, connector pins. Current

flow tends to couple among connector pins and between connector pins and the

ground plane, and return paths are such that large ground loops are created,

causing even more radiated EMI, but also more noise coupling among pins within

a connector. The most important factors affecting the performance of connector pins are

(1) mutual inductance between connector pins, (2) mutual inductance between

connector pins and groun d , (3) series inductance of pins, and (4) parasitic capaci-

tance between connector pins or between pins and ground. Let us consider the

connector in Figure 1.29. Notice that currents I 1, I 2, and I, (from drivers 1, 2, and n) return through the ground connector pin, creating current loops of different

sizes and loop areas. First, because of current flow between conductors, there is a mutual coupling

between each of the conductors' drivers and the return conductor. This mutual

coupling results from the mutual inductance of current loops. Let us consider

the mutual interaction between loop 1 and loop 2. The contribution to the total

magnetic flux in loop 2 comes from the current flowing out of driver 1 and

CONNECTOR CARD1 I d CARD2

I ' ~ 1 P ~ I

Driver 1 - - - ~ ,vv~,__l~ ~ _ _ I ~V~, - L I T

I1 Loop 1 t_ - - - ~ ' - I

Driver2 _ _12___~ ~ ~ - - - I I

4 - " L

_-- .~

i

Driver ~ . 13 ~ --===m

I

"~176 V I ~7 I I

Loop 3

I I

Figure 1.29 Typical connector with driver and receiver loads.

1.9. Interference Concerns with Connectors 41

flowing through loop 1, and from the returning current flowing through the ground pin. The mutual inductance formula has two terms:

(1.71)

Here, c is the distance between driver 1 and the ground pin; a is the distance between driver 1 and driver 2; b is the distance between driver 2 and the ground pin; r is the radius of the ground pin; and d is the separation between cards. Also, the total magnetic flux in loop 3 gives rise to mutual inductance by

L123 = 5 . 0 8 d ( C ) + 5 . 0 8 h l n ( f ) + 5 .08hln( r -~4)+ 5 .08h ln ( j ) , (1.72)

where b is the distance between driver 2 and the ground pin, f is the distance between driver 2 and driver 3, g is the distance between driver 3 and the ground pin, and j is the distance between driver 1 and driver 3.

Because we are assuming that the source impedance Z o is always present in a driver circuit (electrical length of wire is sufficiently large), the noise coupled due to crosstalk splits half in either direction, and therefore the crosstalk is given by

1 dI EMI crosstalk = ~L12 dt

1 dI EMI crosstalk = ~L12 3 dt"

(1.73)

From this crosstalk equation, several factors can be deduced that could result in a dimensional crosstalk.

First, slowing the rise time of the drivers would result in a diminished dl/dt.

The driving rise time can be reduced by using a capacitor on the source side of the connector as shown in Figure 1.30. Notice that in the figure we are assuming that the receivers can be modeled as capacitive loads; such loads of capacitive nature could make surge currents appear as switching occurs.

Another way to diminish crosstalk behavior is to decrease the mutual inductance. For example, rearranging the layout of pins in Figure 1.31 could diminish the mutual inductance. If the ground pin and corresponding wire are moved away from driver 1 and driver 2, increasing the distances b and c, the mutual inductance L12 will increase. Therefore, decreasing the distance between the driver pins and the ground pin will likewise diminish the mutual inductance.


CONNECTOR

Driver 1

Driver 2

CARD1 ~1 d ,,-- I ~.. I ~ 1 I V -

CARD2

-LC L

CL

Driver

CL

Figure 1.30 Employing capacitances to reduce rise time.

Driver 1

CARD1 CARD2 i

~_~_ I --"

Driver 2 12

Driver 3 \

- . , - . i

~ ---,.., Ig/4

_ . _ _ . . ~ _ _ l

I

+~ ~lg/4 Ig/4 \ I

~-41~

1o/4 ~ " -- ~ - "i- ~-

�9 VV i ~ " ~

Ig/~l

~V,,T---a_ c L

- - - - I ---L I C L

I

,~7 CL

CONNECTOR

Figure 1.31 Adding/rearranging ground pins to reduce interference.

1.10. Ground Loops and Radiated Interference 43

Finally, adding more ground pins/wires would also decrease the overall inductance. The ground pin/wire is responsible for coupling drivers 1, 2, and 3 and their respective wires. Therefore, providing more ground wiring will force the ground current to distribute itself among the different wiring as shown in Figure 1.31.

Notice that in Figure 1.31 there are four ground pin returns and three driver signals, such that every driver signal is "flanked" on either side by grounded pin returns. If we consider driver 2, for example, the total ground return current of 12 can be split in four different ways. Ideally, the figure shows each return pin carrying equal (�88 Ig) current, but in reality the closest pins would carry the greatest return current. Nevertheless, the point is made that the mutual inductance between drivers will decrease, therefore considerably reducing the crosstalk among pin connectors. Furthermore, since the loop area transversed by the ground currents is much smaller, the effects of radiated EMI will also decrease considerably. Imposing even more ground returns between driver signals should decrease the crosstalk by a factor of 1(1 + n2), where n is the number of ground pins between driver signals, as shown in Figure 1.32.

1.10 Ground Loops and Radiated Interference

It was previously stated that ground loops can contribute significantly to the radiated EMI. This is important because such radiated noise can couple into other

Driver

Driver 1

CONNECTOR

CAR01 l I CAR02

Zo

2

n-1 ~7

n~

�9 . m I

J

~7

-LC L

Figure 1.32 Employing multiple ground returns to reduce interference.


sensitive circuits of analog or digital nature. Let us consider, for example, the

scenario depicted in Figure 1.33.

In this figure, two connectors (connector 1 and connector 2) are used to

implement two driver/receiver card configurations. In connector 1, the return

current from driver 1 has the option of returning through its closest ground pin;

some of it, especially at high frequencies, could return through a much more distant grounded pin closest to driver n. The loop area 1 (0) (driver 1 and ground pin 0) formed by the return current of driver 1 through its closest ground pin is

much smaller than the loop area 1 (n) (driver 1 and ground pin n) caused by some of the return current using pin n of connector 1 as its return. Other scenarios for

Driver 1

CONNECTOR CARD1 I I CARD2

""me Ig 1 Loop~ea 1101 d

_ . . . . r

//~ Loop Area l (n ) d 3 dl Ig2

/ ~ . d4 / Driver n /

'vvvT---J-c L

" ' - ' : * /--" *" ,~- Cc4

7- Ccl CARD 3 Cc2- ~ C0nnector 2 _ ~

Zo

// I Ig 4 ,~ C L

I Loop Area /. , - ' 91 - --- -

CARD 4

Figure 1.33 Illustration of ground loops among card connectors.

1.10. Ground Loops and Radiated Interference 45

the return current to use other ground pins within connector 1 are also possible. Because loop area 1 (n) > > loop area 1 (0), the radiated emission from connector 1 could increase greatly, especially at high frequencies, where a significant portion of the return current could choose pin n as a return path. The electric field magnitude from a loop current is directly proportional not only to the current

itself, but also to the loop area traversed by that current.

In the figure we also observe another scenario very common at high frequen-

cies: capacitive coupling between the ground pin n in connector 1 and the

connector metal casing (Cc3, Cc4). Further coupling would capacitively couple both connectors 1 and 2. Some of the ground current from connector 1 would flow into connector 2 and its grounding pins through capacitive coupling. The total loop area now becomes the sum of loop areas, loop area 1 (n) + loop area 2(n), with the potential of creating an even bigger radiated emissions problem.

The amount of radiated emissions created by loop areas of signal/return currents

is given by

E(V / m) = 263 • 10-16 F2(Hz)A(m2)I(amp s) (1.74) R(m)

where F(Hz) is the frequency of interest, A(m 2) is the loop area formed by the driver signal and return curent, I(amps) is the current magnitude, and R(m) is

the distance in meters at which the electric field is to be computed. Assuming, for example, the scenario of Figure 1.33, the total radiated electric

field could be approximately calculated for a worst-case scenario as

I E total (V/m)] = I Elr + ]El(n) I -']- ] E2(n)1, (1.75)

where El(o~, EI(,O, and E2o 0 are the electric fields produced by ground loop areas through pin 0, pin n of connector 1, and pin n of connector 2:

El(o)(V/m) ~ 263 • 10 -16fe(Hz)(l~176 area 1 (0))Igl(amps) R(m) (1.76)

El(n) (V/m ) ~-- 263 • 10 -16fe(Hz)(10~ area l(n))Ig2(amps) R(m) (1.77)

Ez(n)(V/m ) ~-- 263 • 10 -16fz(Hz)(10~ area 2(n))Ig4(amps) R(m) . (1.78)

In calculating Igl, lg2, Ig3, and/84, we know that

I1 : Igl Jr- I g2 - - Igl "1- /g3 -']- Ig4, (1.79)


and the maximum I 1 can be calculated approximately by using the expression

5V I 1 - Zo(ohms). (1.80)

The current in Igl is given by

= ( 5.0V )Lgl(O ) (1.81) Igl \Zo~-O--~ms) Lgl(n )'

where Lgl(O) and Lgl(n) are the inductance of the ground loop through pin (0) in connector 1 (loop area 1(0)) and Lglr is the inductance of the ground loop through pin n in connector 1 (loop area l(n)), respectively. Also, in the same

manner, =( 5.0v r = +

The terms Lgl~,0 and Lg00 o are obtained from the pin inductance given by

where d is the separation in inch of signal to ground. The term d will be either dl or d2 as indicated in Figure 1.33 for Lgo(n) and Lgl(n) calculations, respectively. L is the length of the pin in inches and r is the pin radius. In the same manner, once we have calculated Ig 2 we can calculate Ig3 and Ig4 as follows:

[Lg3]

= 1.84)

Ig4-- Ig2 L~g3j,

where Lg3, Lg 4 can be calculated from Equation (1.84) using d3, d4 illustrated in Figure 1.33.

One of the most trivial conclusions of the preceding analysis is that adding more ground pins to the connector will bring the grounds closer to each signal and will lower the inductance of the overall return path. Other things that can be done are to move the I/O connectors as close to each other as possible, never to route ground returns from the same source on separate connectors, and to provide slower rise time for drivers.

The issue of parasitic capacitance not only affects the return path of ground current, but its cumulative effects from many connectors can distort transmitted

1.11. Solving Interference Problems in Connectors 47

signals. Therefore, conductors with minimum parasitic capacitance are highly desirable. Parasitic capacitance effects on connectors are shown in Figure 1.34.

As the signal is transmitted, the lump parasitic capacitance of the ground at each bus tap will provide some parasitic distortion. This lump capacitance, represented in Figure 1.34, can come as a result of (1) pin-to-pin capacitance

from the connector on the printed circuit board, (2) trace capacitance from the

connector to the local drivers and receivers, or (3) input capacitance of the local

receiver plus the output capacitance of the drivers.

The trace capacitance is given by

= t__d_0 C(pF/inch) Z0, (1.85)

where t o is the trace propagation in psec/inch and Z 0 is the trace impedance in ohms. One example of proper layout of signal and ground pins in a connector

is shown in Figure 1.35.

1.11 Solving Interference Problems in Connectors

There are basically three ways in which a signal line can be made much less

noisy, especially for connectors near a chassis, from which the lines would leave.

1.11.1 FILTERING

Filtering removes the high-frequency content of signals. By removing the high frequencies, we can decrease dramatically the capacitive coupling among connectors. Furthermore, at lower frequencies the current will tend to follow closer return paths, using the closest connector pins rather than pins that are farther away. Therefore, the radiation efficiency of current loops increases greatly at higher frequencies. Most typical filters involved small impedances in series with each driver. The series impedance would then feed into a shunt capacitance to ground, which must be a quiet ground that connects directly to the chassis.

1.11.2 SHIELDING

An example of shielding the connector lines is shown in Figure 1.36. In a shield a continual metal surface is provided around the inner conductors. The returning

signal currents distribute evenly around the outgoing signal wires. The current

loop between signal and ground paths is very small, and a perfectly conducting

and symmetric shield will not radiate.


CARD 1

Z o

Connector

C

Cp Transmission Bus

-LCL

CARD 2 Connector

I

Cp

3_

"1:

Connector CARD 3

Zo

3_

Cp

Cp= parasitic capacitance between connector and bus tap.

-LC L

$ Figure 1.34 Parasitic capacitance effects on connectors.

Ground Plane

1.11. Solving Interference Problems in Connectors 49

Signal Lines Figure 1.35 Proper layout of signal and ground pins (dark) in a connector.

CARD

Zo

Connector

Shielded Cable

zo

Zo

Figure 1.36 Example of shielding a connector line.

When using a shield, make sure that the pigtail connection is as small as

possible, since pigtails, also known as drain wires, work poorly at high frequen-

cies. Furthermore, noisy wires should be used on separate shields; otherwise they

would be sharing the same common return path of the shield. Best of all is to

use specially designed connectors that are metal in their outer structure and

incorporate grounding schemes that are internal to the connector.


CARD 1

Driver Zo

Connector Connector

ferrite beads

I1

,1 cc , lcc 'T I 1

CARD 2

CL ..1_

A

Figure 1.37 Common-mode and differential-mode currents flow among cards.

1.11.3 COMMON MODE CHOKE

This is a series of ferrite beads that are used mostly on I/O cabling to eliminate,

as much as possible, the common-mode current, which is the component of

current most responsible for conducted and radiated emissions. This current

should be distinguished from different-mode current, which is the return current

of driver circuits. This distinction is shown in Figure 1.37.

11 and 12 are differential-mode currents and are therefore of equal magnitude.

I c is a common-mode current which follows a different return path. In the figure, the abnormal return path is facilitated by the parasitic capacitance Cc between conducting wires. The use of ferrite beads with their high inductance will reduce

the magnitude of I c, especially at high frequencies. Ferrite beads' effectiveness

in reducing common-mode current is frequency dependent. Therefore, care must

be exercised in choosing the correct bead material to eliminate the right frequen-

cies, which are embedded in I c.

1.12 The Issue of Vias

The vias in a PCB layout have both parasitic capacitance and parasitic inductance,

shown in Figure 1.38. These capacitances and inductances are usually small, but

their cumulative effects can add significantly in an adverse manner. The value

of such parasitic capacitance and inductance can be estimated to be [1 ]

1.41srtd 1 Cpv= dz-d ,

1] (1.86)

References 51

pad

Z. Lpv

VIA v, Cpv = parasitic via / inductance and

~ capacitance

Figure 1.38 Parasitic effects in vias.

where

D = diameter of via, inches

h = length of via, inches

Lpv = parasitic inductance of via, inches t = thickness of PCB

d 2 = diameter of clearance hole in ground plane, inches d 1 - diameter of pad surrounding via, inches

Cpv = parasitic capacitance of via, inches.

Reference

1. Howard W. Johnson and Martin Graham, High Speed Digital Design, Prentice Hall 1993.

Chapter 2 Noise and Interference Issues in Analog Circuits

2.0 Basic Noise Calculation in Op-Amps

The noise in operational amplifiers (op-amps) is related to the passive and active

components within the circuit. It is also the kind of noise that could induce errors

that could not be detected by DC error analysis. Noise can be random and

repetitive, either of voltage or current form, and can be at any frequency. Noise

can be qualitatively classified as either white noise or color noise. Examples of

white noise are Johnson (or thermal) noise and shot noise, which can exist up

to a frequency of 100 GHz. Color noise has an amplitude that changes over

frequency, such as flicker noise 1/f or popcorn noise. An example of a noise density spectrum is shown in Figure 2.1.

100

N "1-

10 t -

r o ~ , ~

>

01 10

I I I I I I 100 lk 10k 100k 1M 10M

Frequency (MHz)

Figure 2.1 Example of noise density spectrum.

52

I 100M

2.0. Basic Noise Calculation in Op-Amps 53

The noise spectral density is the rms value of the noise voltage V n or a noise

current I n which is expressed as a voltage or current per X/-H~z. The power spectral

density is defined as the derivative of noise power over frequency range"

P(Watts/Hz) - dPn (2.1) d f

The power spectral density for the voltage and current are defined as

Vn(rms) (volts/X/-H-zz)

l~(rms) (amps/X/-~z). In=x@

(2.2)

2.0.1 THERMAL NOISE

Thermal noise in all electronic devices results from the random motion of free

electrons in a conductor as a result of thermal agitation. Therefore, the thermal

noise power is directly proportional to temperature and frequency,

Pn = KTB(Hz) (J/sec), (2.3)

where K = 1.38 • 10 -23 J/K is Boltzmann's constant, T is the absolute tempera-

ture (K), and B(Hz) is the bandwidth of the system. In conductors and semiconduc-

tors the thermal noise is always present. For example, an ohmic resistor can

experience a thermal noise voltage given by

Vn(rms ) = X/4KTRB(Hz), (2.4)

or in terms of spectral noise density,

Vn -- 4KTR ( n V / X / ~ z ) . x/-fiSz (2.5)

R

Vn ( ~ Vn = (4KTRB(Hz)) 1/2

0

m

m

" O

I n = (4KTB(Hz)) 1/2 / R

0

Figure 2.2 Thermal noise representation of a resistor.

54 2. Noise and Interference Issues in Analog Circuits

Noise figures in op-amps not only reflect the noise contributions of the IC itself, but also describe the IC with its feedback network, source, and load resistance. With the use of noise figures, a gain block can be completely characterized and total system noise calculations can be obtained by summing all the noise figures of each stage.

The noise figure for an op-amp is the logarithm of the ratio of the signal-to- noise ratio of the input of the amplifier to the signal-to-noise ratio at the output:

(S/N)in (2.6) Noise figure = NF = 10 log (S/N)ou t"

To calculate the noise figure for an op-amp gain stage, the equation is

NF= 10log (1 + V2+ (InRs)2) (2.7) 4KTR s

It can be shown that the noise figure includes the voltage and current noise from the amplifier. The noise current I n flows through the source impedance R s. An important factor is the bandwidth. In order to calculate the total noise, the total output noise spectral density, which is given in nV/X/-H~z, is multiplied by the square root of the bandwidth. The calculation of op-amp noise in a size- noninverting configuration is shown in Figure 2.3.

In order to obtain the total output noise, each term is multiplied by its gain and taken to the output as a voltage. Finally, all the terms are squared and added together, taking the square root of the sum of the squares. The individual terms are

Rs___)__)X/4KTRs(1 +R_~gg)

'nl 'nl s(1 (1

In2 -')"-) In2Rf Rf Rg --->---> X/4KTRg R--gg

Rf ---)---) X/4KTRf

Vout = [(4KTRs + (ln2Rs)2 + V2) (1 +-~gg) 2

( .f)] + 4KTRI 1 +-~g .

+ (In~ Rf) 2

(2.9)

(2.10)

2.1. Op-Amp Fundamental Specifications 55

Vn

as

(~(4KTR s ) 1/2 Rf

C+)---- In2 I Rg (4KTRf)1/2

2

vol

Figure 2.3 Intrinsic op-amp noise for an inverting amplifier.

2.1 Op-Amp Fundamental Specifications

A block diagram of a basic op-amp is shown in Figure 2.4. The input stage is basically a differential input. Op-amps with a differential input as well as a differential output have very good common mode rejection ratios. The op-amp contains a high-gain stage with a single-pole frequency response. The output is a single-ended output stage.

A(s) in the figure, known as the open-loop voltage gain, is the gain with

respect to the differential input voltage V = (V+ - V_). A(s) is a dimensionless

quantity and is expressed in decibels in some cases, but usually as a plain number

(100,000 is typical). Because of their tremendous gain, op-amps are not useful

in the open-loop mode, since a small input voltage can quickly make an op-amp

saturate, producing an output gout = gcc" The most useful configuration, of course, is the closed-loop configuration, when a negative feedback from Vou t is fed back to the inverting input ( - ) using a feedback network as shown in Figure 2.5.


v+ O

v- O~__.__

Differential Input

High Gain Single-Pole Output Frequency Stage Response

Vout - -<3

V+

V-

Vout

Figure 2.4 Basic block diagram of an op-amp.

The feedback factor is the ratio of the output signal to the signal feedback into the inverting input of the amplifer and is given by

Z1 (2.11) /3=Zl +z2"

Z2

Vin Vin O

. O

Vout

;, Z2 Gain(Fig.b) = 1 +-~1 Gain(Fig.a)

- - 1 + a ( s ) f l 1 +

Figure 2.5 Voltage feedback in op-amps with closed-loop gain.

11 1

A(s)fl]

Vout 0


If we invert the feedback factor/3, we obtain the noise gain, which represents the voltage gain experienced by a noise voltage in series with the op-amp input terminal:

1 z2 Noise gain = f3 = 1 -~ Zj (2.12)

The open-loop gain is given by

Loop gain = A(s)fl. (2.13)

The closed-loop gain for the inverting case is given by

S igna lga in= Z 2 ( 1 ) -z--; 1 +

(2.14)

Notice that as A(s) increases (e.g., A(s) = oo), the signal gain approaches - Z 2 / Z 1.

The value of A(s) at a given frequency will dictate the accuracy of the op-amp of that particular frequency. The optimum frequency is known as the comer frequency fc- If we multiply the noise spectral density by the square root of the noise bandwidth, we can then obtain the total RMS noise. The most practical way to reduce the thermal noise is to minimize the bandwidth when possible.

2.1.1 SHOT NOISE

Shot noise is the noise caused by the quantized and random nature of current flow. The spectral density of the shot noise is defined by

I I,, ]2 = 2q IacB(Hz), (2.15)

where q is the electron charge (1.6 • 10 -19 C) and Iac is the DC current.

2.1.2 FLICKER NOISE

The flicker noise is caused by the contamination and other defects in the silicon lattice. The combination and recombination of carriers in the emitter base of the transistor also results in the flicker noise. This process and noise is associated not only with bipolar transistor, but also with CMOS processes. The current spectral density of flicker noises is given by

2 2q Idcf m B(Hz) Inf = f(Hz) ' (2.16)

where q is the electron charge, Ioc is the DC current, and f is the frequency of interest, fc, the comer frequency, has an exponent between 1 and 2.


2.1.3 POPCORN NOISE

Popcorn noise is also known as burst noise. It carries this name because of the

sound it makes under noise amplification in an audio system. This kind of noise

bursts at random amplitudes and durations. Popcorn noise is found in the low-

frequency mode. This kind of noise can be described as punch-through of emitter

base junctions and contamination in the emitter base region by metallic ions.

The popcorn noise spectral density is given by

KI~B(Hz) Inp -- 2, (2.17)

where K is a constant for a given device, I c is the direct current, fc is the corner

frequency, f is the frequency of interest, and B(Hz) is the noise bandwidth.

A sample of noise in an op-amp is shown in Figure 2.6. This model uses a noise voltage source which is in series with the noninverting input and two noise current

sources between each input and ground. All these noise sources are uncorrelated.

Notice that a designer needs to be concerned not only with the specified voltage noise (given in data sheets), but also with a contribution to the total noise

depending on the kind of op-amp and source resistance (Rs). The total noise

voltage (V,,t) would then be given by

Vnt-- ~ / V 2 -I- (InRs) 2- (2.18)

In the linearity of the op-amp, the spectral gain is shown in Figure 2.7. Another typical and new type of op-amp is the current feedback (or transimped-

ance) amplifier, which is very useful at high frequencies. An equivalent circuit

Vn

(3 ( ) In1

( )In2

Vout

Figure 2.6 Noise models for a general operational amplifier.


Op-Amp Gain (dB)

A(s)

Vin 0

ve

I I I i

fc Spectral gain of a typical op-amp.

Log f Figure 2.7

is shown in Figure 2.8. It differs from the previously outlined voltage feedback in that the two inputs are addressed differently. The noninverting input (+) is a high-impedance node, as it is in a voltage feedback op-amp, but the inverting input is a low-impedance one, a current input node. The signal from the nonin-

verting input goes to the inverting input through a unity-gain buffer. The input

impedance Z s is only a few ohms with an offset between the inverting and

noninverting input, which is also an offset voltage as in a voltage feedback op-amp (hundreds of millivolts).

/VVX,

Z2

Z1

tVVX,

If

Figure 2.8 Inverting current feedback amplifier.

Vou t =-If T(s)


The following are important terms:

Inverting case:

: ( 1 ) 1 Signal gain -Z~ 1 + ~-~

Noninverting case:

where

1 ' Signal gain 1 + ~--

T(s) { Z~ ll Zl } LG = Loop gain Zs{Z~ II (Zl + Z2) }

and T(s) is the open-loop transimpedance. A comparison between the transfer functions of a voltage-feedback amplifier

and those of a current-feedback amplifier is shown in Figure 2.9.

Z2 ~ v v ~

Zl Vin 0

O

Voltage feedback: V~ = -Z2 / Z1

" I+A-- ~ 1 +

Current feedback: V~ -- - Z 2 [ Z1 Vi~ Z2 [ Zs+Zs]

1 + T--~ 1 + Z---~ Z2

Figure 2.9 Comparison between voltage-feedback and current-feedback op-amps.

2.2. Input Offset Voltage 61

In voltage-feedback amplifiers, the close-loop bandwidth is inversely propor-

tional to the noise gain; the product of the noise gain and the close-loop bandwidth

is a constant. Therefore, the main characteristic is a constant-gain bandwidth

product. In current feedback amplifiers, if R~ < < R1 and R S < < R2, the preceding expression becomes

gout __ - Z z / Z 1 - (2.19)

Vsn 1 Jr- Z 2 , T(s)

which means that the closed-loop bandwidth is very much independent of the

gain Ze/Z 1 and depends only on the feedback Z 2. It is usually appropriate for

current-feedback amplifiers to be optimized for maximum bandwidth with a

given value of Z 2. The closed-loop bandwidth of a current-feedback amplifer

remains constant in spite of the closed-loop gain value, provided the gain is

changed by varying only Z 1.

2.2 Input Offset Voltage

In practical terms, in order to get a zero-volt output, a small differential voltage

must be applied to the inputs. This is known as the "offset" voltage Vos. The

Vos voltage can be represented as a voltage source in series with the inverting

input terminal of the op-amp, as shown in Figure 2.10.

In the same manner, ideally no current should flow into the input terminals

of a voltage-feedback op-amp. In practice, however, there is always a bias current,

I b, as shown in Figure 2.11. The value of I b can vary from femtoamps to mi- croamps.

Bias current can be a problem for op-amp users, because this small current flow in inpedances can cause voltage drops that lead to millivolt errors within

�9

0

C ) Vout % s " 0

, , , , ~

Figure 2.10

Vou t - (1 + Z 2 /Z 1 )Vos Offset voltage representation in an op-amp.


O

�9 Ib"

Figure 2.11 Input bias current representation.

Vout

O

the op-amp. If the designer does not use I b and capacitive coupling is used, the

circuit may not work at all. Finally, for some op-amps (e.g., FETs), I b varies sharply, doubling with every 10~ rise in temperature.

In order to reflect all the offset and bias errors to the output of the op-amp, Figure 2.12 must be used:

(2.20)

Normally, the input impedance of a voltage-feedback amplifier is very high, on

the order of 100 megohms. The output impedance is low, on the order of 0-100 ohms.

Z1 Vos

z2

Zf

Ib- Vout

Ib+

Figure 2.12 Integrated bias and offset voltage representations.

2.4. Slew Rate and Power Bandwidth of Op-Amps 63

2.3 The Noise Gain of Op-Amps

The noise gain of a voltage-feedback amplifier is dependent on the feedback configuration, as shown in Figure 2.13. The expression for a closed-loop gain

G is dependent on the noise gain Gn and the open-loop gain of the amplifier A:

G = V~ aGn. (2.21) Vtn G~tA

2.4 Slew Rate and Power Bandwidth of Op-Amps

The slew rate of an amplifier (Figure 2.14) is defined as the maximum rate of

change of voltage at the output. It can be expressed in volts per microsecond:

gout ~ Z2 V~ sin 27rft; V 0 = peak-to-peak input voltage. (2.22) Z 1 2

The maximum slew rate is given by

dv Slew rate = ~-~ Z2 V~ - Z2 V~ "rr f (2.23)

(2 "rrf)= Z1 .

The full-power bandwidth (FPBW) of an op-amp is the maximum frequency at

which slew limiting does not occur at maximum output:

Slew rate f = FPBW = (2.24)

-Z2Vo~ Z1

(a) z2

Z1

4, Vin 0

(b) z2

Zl Vin (~......_.....~VV~ ~ ~ ...__.. 0

Noise gain = 1 4 Z2 Z 1

Signal gain = 1 4 Z2 Z1

Noise gain = 1 4 Z2 Z 1

Signal gain = Z2 Z1

Figure 2.13 Noise gain in voltage-feedback amplifiers.


z2

/vv

Z1

Vin=V o sin2=ft Figure 2.14 Diagram for slew rate representation in op-amps.

Vout

O

The slew rate can also depend on the power-supply voltage and the load the

amplifier is driving. When the load is capacitive, its output voltage can be slowed

down, which can cause instability in the op-amp due to negative feedback. When an op-amp drives a capacitive load, a series resistor (Rs) must be used outside the negative feedback loop, as shown in Figure 2.15. This method, however, reduces the total bandwidth of the op-amp.

Z1

Z2

/X/X/~

~n

O

a s

Figure 2.15 Proper driving of capacitive loads.

RL

2.5

2.6. Internal Noise in Operational Amplifiers

Gain Bandwidth Produced

65

The open-loop gain (dB) of a voltage-feedback amplifier with only one pole is shown in Figure 2.16. The closed-loop bandwidth (fCLBW) is the frequency at which the noise gain intersects the open-loop gain. The gain-bandwidth product (GBW) is given by

GBW = (Noise gain)(fCLBW) (2.25)

GBW= (1 +~12) fCLBW- (2.26)

2.6 Internal Noise in Operational Amplifiers

Noise can enter an amplifier in the form of an input voltage noise or input current noise as shown in Figure 2.17. The input noise V n is bandwidth dependent and is measured in nV/X/-~z, which is its spectral density. In a voltage-feedback op- amp, the noise current (In-, Int) in the inverting and noninverting inputs is uncorrelated and about equal in magnitude. In BJT and FET input stages, the noise current is the shot noise of the bias current and can be obtained from the bias current.

Gain (dB)

Noise Gain = 1 + Z2 / Z1

~ A(s) = Open Loop Gain i ~ dB/decade

I I

f pole f CLBW Log f

Figure 2.16 Open loop gain of an op-amp.


Vn In V n (out)

In+

Figure 2.17 Representation of intrinsic input noises.

Noise current becomes important when the source impedance is significant

such that the induced noise voltage is greater than the thermal noise or voltage

noise. The choice of a low-noise op-amp depends on the source impedance

of the signal; when the source impedance is high, carried noise usually

dominates. Therefore, we should carefully consider the kind of amplifier to

use, which depends on the impedance circuitry used with the amplifier as

shown in Figure 2.18 [ 1].

The noise figure of an operational amplifier in a given circuit is the amount

by which the noise of the circuit exceeds that of the same circuit when a noise-

free amplifier is used. At low frequencies the noise spectral density goes up at

Z s = 10K Z s = 1M-ohms ,oo , o ,

nV/(Hz) 1/2 " " ' ~ . . . . . . . . . . . . . _ ~

10 ~ ~ , 100 B m l ~ ~ m

OP-07.743

I I I I 10 100 1K 10K 100K

Frequency (Hz)

i

OP-07

74 I I I

10 100 1K 10K 100K Frequency (Hz)

Figure 2.18 The effect of source impedance variations vs frequency for different amplifiers. (Used with permission from Analog Devices.)

2.6. Internal Noise in Operational Amplifiers 67

3 dB/octave, as shown in Figure 2.19. The frequency at which it starts to rise is

known as the 1/f corner frequency. In the 1/f region, the RMS noise in the

bandwidth Af = fl - f2 is given by

where k is the noise spectral density at 1 Hz.

To analyze the noise performance of an op-amp, the noise contribution from

each part of the circuit must be assessed as shown in Figure 2.20, where we

have added the capacitors C 1 and C2 to a voltage-feedback op-amp. C1, on the inverting input of the op-amp, is the sum of the op-amp internal capacitance and

any other external feedback capacitance. C 2 is a feedback capacitor for stabilizing

the circuit. The noise voltages Vzs, Vzl, and Vza are thermal Johnson voltages of

the type X/4KTZ s, V'4KTZ l, and ~/4KTZ2, respectively. The terms Int and I n_ are the intrinsic noise current of the amplifier. Finally, Vn is the intrinsic noise

voltage of the amplifier.

The calculation of the total output RMS noise is made by multiplying each

of the noise voltages in Figure 2.20 by the gain and integrating over the frequency

Noise pV/(Hz) 1/2

White Noise

I I

1/f V

Log f Figure 2.19 Noise spectral density in an op-amp at low and high frequencies.


0

0

Vzs Zs In+ ( ~ �9

vz,o C1 Vz2

Vn 0 Z2 in - ( ~ C2

II

Vout

Figure 2.20 Noise contributions from passive and active circuit elements in an op-amp.

O

Table 2.1 Noise Sources and Calculation of Total Output Noise

Noise Source

Expressed as a Voltage

Mufiplication by

This Factor Reflected

to the Output Integration Bandwidth

�9 V"4KTR s

(In+)Zs Vn

M'4KTR s

~/4KTR s

(In-)Z2

Noise gain as a function of frequency

t t

-Z2/Z ] (signal gain)

t t

t t

Closed-loop bandwidth

H

1

27rZ2C2 (signal bandwidth)

1


1


2.7. Noise Issues in High-Speed ADC Applications 69

Gain (dB)

fs = Signal bandwith =

= 1 / ( 2~Z 2 C2)

f BW = Closed-loop bandwidth

1 + Z2/Z 1

Z2/Z1

1+C

Signal Gain

fs f BW Log f

Figure 2.21 Noise gain in inverting feedback amplifier.

range of interest, as shown in Table 2.1. The sum of all the root sum square

contributions will contribute to the total output noise. The noise gain is shown in Figure 2.21. From the figure, it can be observed that the output noise resulting

from the input noise voltage is determined mainly by the high-frequency portion,

where the noise gain is given as 1 + CI/C2.

2.7 Noise Issues in High-Speed ADC Applications

In high-speed and wide-bandwidth analog-to-digital converters, when a wide

range of analog input frequencies are used, usually a wide range of outputs are produced. This is the result of the front and wide bandwidth and other noise

concerns. The correct output shows most of the time, but adjacent outputs also appear, though with reduced probability. This scenario is shown in Figure 2.22.

In the process of driving analog-to-digital converters with wide-bandwidth

op-amps, the output noise of the amplifier driver will contribute to the overall

analog-to-digital converter noise floor. Therefore, the analog-to-digital converter

noise should always be compared with the front-end wideband amplifiers. The

noise model for an op-amp, shown in Figure 2.23, is

Vo.t = X/g-~

2 2 z2 V21+z2 [z2 z2 12 n Z 2 + In+Z3 1 + + + 4KTZ2 + 4KTZI LZJ + 4KTZ3 1 + ,

(2.28)

I I I I I I ll) 0 r F - F - F - F - F - F -

I

F-

~ L

1

~ F

I L

I

i~ ~ F

1 I L_~I~__ L_ L_ L_

' I I ' ' ' s r - I - - [ - - r - r - r - - -

I / I I ~ I _ L _ L _ J I I I " I I ,

_ _ L _ / _ L _ L _ / _ L _ L _

~-' - - F - F - - - F -


y-2 y-1 y y+l y+2 Output

Figure 2.22 Probability of several outputs in the presence of noise.

Z1

VzR1

O vz3

O

Z3

, i

In

Figure 2.23 Noise model of an op-amp.

%ut O

2.7. Noise Issues in High-Speed ADC Applications 71

where BW = 1.57 fBW- The 1.57 is required to convert the single-pole ADC input into an equivalent noise bandwidth, and fBW is the closed-loop bandwidth.

The Johnson noise contribution of resistors in the preceding equation (e.g., 4KTZ2) can often be neglected if the source resistance is less than 1 kohm, and this is often true for high-speed systems. In voltage-feedback op-amps, the input

current noise (In+, In_ ) can usually be neglected. In current-feedback op-amps,

the inverting input current noise (In_) usually predominates; at higher gains, however, the voltage noise Vn becomes significant. An example of noise calculations using a wideband input amplifier into an ADC is shown in Figure 2.24 [ 1 ].

The specification data for the figure are as follows:

AD9632 op-amp input noise specs" 4.3 nV/N/-~z

Closed-loop bandwidth = BW= 250 Mhz

AD9022 effective input noise specs: 285 #V RMS

Input bandwidth = 110 Mhz

The solution is

AD9632 noise output spectral density = 2 • 4.3 nV/X/-H~z = 8.6 n V / X / ~ z

Vni - - 8.6 nV/V'-~z %/(110 • 10 6 Hz)(1.57 Hz) = 113 #V RMS.

Notice that 113 /xV RMS is less than 285 #V RMS. Therefore, we should not be concerned with the wideband op-amp noise affecting the analog-to-digital

converter output data. The bandwidth for integration should be the lower of either

the ADC bandwidth or the op-amp bandwidth. In most high-speed analog-to-digital converter system applications, a passive

antialiasing filter (low-pass for baseband sampling or bandpass for harmonic

274 ohms

50 ohms

O

tVVk , I 274 ohms /

1 ~ /Vk ,

103 ohms Vin

A D C 9022

! fs = 200 M s P s

Figure 2.24 Example of noise calculation using a wideband input amplifier.


fBW J f filter

LPF or BPF

J ~ fs

ADC

fadc

f filter < fs/2 << fadc < f BW

Figure 2.25 Use of low-pass filter to reduce wideband amplifier noise.

sampling) is used between the wideband op-amp and the analog-to-digital converter as shown in Figure 2.25. This approach will further reduce the effects of the driver wideband amplifier noise. The op-amp noise rarely interferes with the performance of high-speed digital-to-analog converter systems. The major contributors to noise in such designs are power grounding and layout, poor decoupling methods, a noisy clock, and an external switching power supply.

2.8 Proper Power-Supply Decoupling

Good power-supply decoupling methodologies must be used on each and every circuit board. The need for power-supply bypass results from the parasitic impedances in supply lines, which degrade the noise and stability performance. The supply-line impedances, mostly inductive, that supply the amplifier current and other circuits feeding from the same power lines provide the power-supply noise current and voltages. The supply-current flow through these inductive impedances produces voltage drops at the amplifier supply connections that are interpreted as noise voltages. This voltage noise causes the amplifier to activate its power- supply rejection ratio, reproducing a portion of the noise voltage at the op-amp inputs. The couple noise combines with the internal noise of the amplifier and then is amplified by the noise gain of the amplification circuit. The portion of the input noise from the amplifier itself constitutes a parasitic feedback signal that could eventually produce oscillations.

In an effort to minimize inductance, wide bus/traces could be used. Further- more, minimizing bus lengths could also help. However, the most significant

2.8. Proper Power-Supply Decoupling 73

contributor is the use of capacitive bypass of the power supply lines. This approach, if properly performed, will ensure frequency stability by minimizing interference, the interconnect length, and the associated inductance between the amplifiers and the capacitors (surface-mounted capacitors work best). Sizing the bypass capacitors is also a consideration, since too large a capacitor can cause internal parasitic impedances to be added to the capacitor lead impedances.

In Figure 2.26 we show how the power-supply line couples noise into the operational amplifier. In the figure, the voltages Vs+ and V s_ provide the bias voltage for the positive and negative power supply in the operational amplifier. In ideal conditions, Vs+ and V s_ correspond to the supply voltage's positive and negative levels. However, the supply line inductances L s react with the supply current I s, producing voltage potential drops along the power-supply lines. The supply current I s is the sum of the supply current drawn by the op-amp of Figure 2.26 and other circuitry powered from the same power-supply lines. The L s inductance accounts for all inherent parasitic inductances that may exist, including trace layout (15 nil/inch). The more complex the PCB and the power- supply wiring, the more inductance we will have, and L s can reach several hundred nanohenries. In the figure we see the addition of bypass capacitors C b.

The bypass capacitor shunts the line impedances to reduce the supply-line voltage drops produced by I s. Therefore, the bypass capacitors Cb attenuate the supply coupling effects. From the electronics point of view, Cb also serves as the main and immediate source of high-frequency current needs. Otherwise, such

Vin

~VVX,~Z2 .... Cb

Z1 V~ ~7

c~ l

Ls

L$

Vs (Power Supply)

C b = Bypass Capacitance (1.0 through 10 ~F) L s = Series Inductance (100 nH through 1000 nil)

Figure 2.26 Coupled noise into op-amp from power-supply rails.


current demands from the op-amp would require serious time delays in their travel from the power supply to the op-amp. The delay would cause phase shifts in the amplifier response which usually increase with frequency. The usefulness of the bypass capacitor is that it supplies much of the high-frequency current demand, eliminating the time delay and the corresponding phase shift.

Though bypass capacitors are of great help, they do not completely eliminate the power-supply coupling problems. A voltage difference still develops with the trace/line impedance Z 0 and the supply current I s, reducing the voltage mag-

nitude at both Vs+ and Vs_ by the amount Is Zo:

Vs+ = V~ - I~Z o (2.29)

V~_ = Vs + IsZo. (2.30)

Therefore, the total supply voltage delivered to the op-amp is given by V+ - V_

= V s - 2IsZ o, which means the supply voltage decreases by 2lsZ o. The decrease causes an activation of the power-supply rejection ratio (PSRR) of the op-amp, producing an amplifier error at its input of magnitude V e = 2I~Zo/PSRR. The op-amp amplifies this error signal with the noise gain An(s) that amplifies the op-amp's input noise voltage. The output noise voltage is given by

where

Vout(noise ) = 2An(s)IsZ~ (2.31) PSRR '

A(s) (2.32) A n ( s ) - - 1 + Aft"

A(s) is the open-loop gain, and fl is the circuit's feedback factor. For the configuration in Figure 2.26,

1 + Z 2 / Z 1 An --~ 1 + f / fc ' (2.33)

where fc is the unity-gain crossover frequency of the op-amp. The supply noise Vout(noise) in the preceding equation is frequency dependent

such that Vout(noise) increases as frequency increases. Supply bypass capacitors reduce the Vout(noise) response from a double zero to the flat response that is usually expected for op-amp noise. For the unbypassed case, a diminished PSRR and an increasing line impedance introduce zeros in the Vout(noise) response. When bypassed, a diminished PSRR and a diminished impedance produce a canceling effect and a flat frequency response.

2.8. Proper Power-Supply Decoupling 75

Another important point concerning bypass capacitor usage is that supply- line coupling produces parasitics feedback. In addition to noise reduction, the power-supply bypass capacitors must try to preserve frequency stability (i.e., prevent oscillations). The bypass capacitor selection should also focus on improvements to prevent oscillation.

Stability requires the use of bypass capacitance to control the parasitic feedback loop established by the voltage supply-line impedances and the amplifier's PSRR coupling. In Figure 2.27, a Vout(noise) voltage supplies a load current (IL) to load Z L. The amplifier draws this current from Vs+ and through Z 0 impedance of its supply line. The resulting line voltage drop produces a component of the error voltage Ve, --IL Zo/PSRR, through the amplifier's finite PSRR. This circuit will amplify this component by the circuit noise gain An(s), producing a Vout(noise) output response. This response is reflected back to the amplifier inputs through the amplifier's open loop gain A(s), creating Vout/A(s ) component of the V e shown. Therefore, the power-supply coupling produces an input signal that in turn would yield an output signal. This output will then produce an input signal. This scenario describes the full circle of the feedback loop which is capable of substaining an oscillation. It can be shown that keeping Z 0 low such that

ZLPSRR Z o < (2.34)

An(s)

where

An(s ) = (1 + Z 2 / Z]) / (I + f / fc) ,

Vin

i ~ IL z~ ~ / T

+ l ZL

Zo ,s

Cb

Cb I Ls

C b = Bypass Capacitance (1.0 through 10 laF) L s = Series Inductance (100 nH through 1000 nil)

vs (Power Supply)

Figure 2.27 Illustration of output noise generated by a wideband op-amp.


PSRR (dg)

0 dB Frequency fc

Figure 2.28 Illustration for obtaining the unity-gain crossover frequency to avoid op-amp oscillations.

avoids oscillation, where fc is the unity-gain crossover frequency of the op-amp and is shown in Figure 2.28.

2.9 Bypass Capacitors and Resonances

Adding a power-supply bypass capacitor produces two LC resonances. The line inductance of the power supply and the basic bypass capacitor itself produce

the first resonance. The bypass capacitor itself produces the second resonance.

The first resonance from C b and L s forms an LC network with an impedance of

sLs Z ~ = 1 + s2LsCb"

At lower frequencies Z o ~- s L s and at high frequencies Z o -~ 1/SCb.

At an intermediate frequency, this impedance displays a resonance maximum

given by

1 f~ = e~r" ~Ls - v ~ (2.35)

2.9. Bypass Capacitors and Resonances 77

At such a resonance, we could imagine the impedance reaching infinity. However,

this actually does not happen because of the power-supply line's parasitic resis-

tance R s. This line resistance dissipates the resonant energy of the LC circuit,

causing a decrease of what could have been a large impedance rise. A typical

PCB trace can dissipate 12 mW/inch of the power-supply energy. The resonance

frequency value should be such that it is less than fc and at a location where

PSRR is higher in order for the amplifier to be able to attenuate the coupling

effects. This can be observed in Figure 2.29.

In the figure it can be observed that the power-supply line impedance varies

from inductive to resistive to capacitive as the frequency goes up. At low frequen-

cies, L S predominates in Z 0, producing an upward slope in the impedance curve.

At high frequencies, the bypass capacitor Cb takes over, producing a down-

ward slope in the impedance curve. Between these two frequency ranges, the

induction and capacitive slopes intersect at a resonance frequency fR. At fR

the phase difference between the upward and downward slope curves transforms

the equal magnitude in both curves into resonance. The resonant current I R

results from the oscillation caused by the energy transfer from the induc-

L Resistive PSRR ZR = (Ls(Rs2 + Ls))l/2 / (Rs Cb) Zo

Z~ ~ 0 ~"-I L s

I Cb , r 1i Rs !nductive zo:s,s / ! X

~ " I \ _Capacitive I R = Resonant current

fR fc Figure 2.29 The first resonance frequency fR formed by the power-supply line induc-

tance and bypass capacitance.


tor L s to the capacitor C b and vice versa. The analysis of the LRC circuit in Figure 2.29 shows that

X/Ls(R Cb + Ls) Z0R = . (2.36)

CbRs

By making Cb large, we can decrease the value of the Z0R impedance to a value given by

Z0R = L~/~b. (2.37)

It was previously stated that the value of the resonance frequency should be such that

1 fR = 27r" /-=s -VLc'b < < fc, (2.38)

which implies that

1 Cb > > _~,2" (2.39)

4Ls( "n'jc)

It has been shown [2] that a general design equation for C b is given by the expression

50 C b = 7rfc. (2.40)

It was previously stated that the bypass capacitor itself introduces a second resonance. The inherent parasitic inductance and resistance of capacitors can also disturb the bypass capabilities. The inductance will introduce a new resonance,

and the resistance will limit the line impedance reduction. At this new resonance

frequency the bypass impedance would drop to zero, except that, as before, we

also have a parasitic resistance that prevents this from happening. Above the

resonant frequency the capacitor's parasitic inductance overrides the capacitance.

Large capacitors tend to introduce a new resonant condition that comprises the

bypass effectiveness at frequencies typically within the amplifier's response range.

This new resonance results from the parasitic inductance L b . All capacitors possess this internal inductance, which depends on the capacitor's intemal conductive

paths and leads. Reducing the total connecting length can diminish the parasitic inductance. This can be accomplished by minimizing the capacitor lead length,

circuit board traces, and intemal path components.

2.9. Bypass Capacitors and Resonances 79

A detailed examination of the bypass capacitor's actual impedance is shown in Figure 2.30. The capacitor parasitic inductance appears in series with the

intended capacitance along with a parasitic resistance. The inductance L b is self-

resonance with C b. The parasitic resistance R b sets the capacitor impedance at resonance. This resistance comes from the same connecting path that produces

the capacitor's inductance.

The parasitic resistance R b causes a voltage drop that limits the impedance

decline caused by the Cb-L b resonance. This parasitic impedance detunes the Cb--Lb resonance, decreasing what could have been a large phase transition in the power-supply line impedance. The transition presents a broad range of phase conditions that could degrade stability.

The resistance benefits the performance of the bypass capacitor as long as it

delivers the resonance. The resonance frequency at which the L b and Cb impedance

becomes equal is given by

1 - - -

fRb 2 rrX/Lb Cbc (2.41 )

V c = I s / s Cbc V L =-I s / s Cbc

Zo ~1,~,,,,--,~-~~=~.~_ Rb > (Lb/Cbc )1/2

Capacitive Z b = 1/s Cbc

I " ~ Resistive I Zb = Rb

Inductive Z b =sLb

Zo

-'~ is Lb

Cb Rb

Cbc

fR fc

Figure 2.30 Analysis of bypass capacitor second resonance.


The minimum resistance required for detuning L b and Cb is given by

Rb = ~/~ Cbc"

(2.42)

The design limit for R b is given by

~/~bc ~ R b ~ 1" (2.43)

We can now summarize the results of Figures 2.29 and 2.30 and develop a single plot of a single bypass capacitor behavior, which is shown in Figure 2.31.

In this case a single capacitor can bypass the parasitic inductance L s of the power supply. In order for this to be effective, the capacitor must be placed very close to the operational amplifier supply lines. The supply inductance dominates the line impedance Z o at lower frequency, which increases proportionally with the line inductance (Z o ~- sLs). At somewhat higher frequencies the bypass capacitance reverses the slope of this response temporarily. First, the impedance

PSRR f RS = 1 /2~: (L s Cb) 1/2 Zo

1/2~ (L b Cbc ) 1/2

.

I s L b

v

f RS fRb f c

Figure 2.31 Composite resonance study of single bypass capacitor behavior.

2.10. Use of Two or More Bypass Capacitors 81

response goes from Z o = s L S to Z o = 1 / sC b, with capacitive shunting diminishing

the effect of the L S inductance. As the frequency increases even further, Z 0 starts

rising again as the capacitor's own parasitic inductance overrides the capacitive

shunting, and the impedance becomes Z o = s L b, where L b is the bypass capacitor's

parasitic inductance. The resonances fRs and fRb indicate the transition points

separating the three Z o regions. It is important to carefully select the kind of

bypass capacitor to be used. The bypass capacitor must bypass the Z o impedance

over the entire amplifier response range. If we pick a capacitor that is quite large

for the purpose of reducing the net line impedance, fR~ will move to the left in the lower frequency range, but the capacitance's own parasitic inductance L b will

increase, causing thefR b frequency to be moved further to the right. A compromise can be reached by letting [2]

50 Cb = ~'fc" (2.44)

2.10 Use of Two or More Bypass Capacitors

More op-amps these days use a wider frequency range. Greater amplifier band-

widths cover more of the high frequency. Because of the higher frequency require-

ments of these op-amps, a second bypass capacitor may be needed to counter the inductance of the primary bypass capacitor. When we add a smaller capacitor

in parallel with the first bypass capacitor, the inductance limit of the first capacitor is bypassed. However, the second capacitor also has an inductance of its own, producing another bypass scenario at a higher frequency. Furthermore, the inductance of the first capacitor provides a resonance when combined with that of the second capacitor.

Adding a secondary bypass capacitor in parallel with the first capacitor provides a low bypass impedance for the full response range of a high-frequency

amplifier. The first capacitor Cbl >> Cb2 (second capacitor). The lower capacitance of Cb2 and its lower parasitic inductance produce a higher resonance frequency.

Therefore, when we add a second bypass capacitor we restore the declining

frequency of the bypass impedance, but there are also some minor complications

with the introduction of two additional resonances: one from the self-resonance of

the secondary capacitor, and the other from the interaction between the secondary

capacitor and the inductance of the first capacitor.

In Figure 2.32 we see an illustration of the new resonance with a circuit model

and the corresponding impedance responses. There are basically two comers in


zo I , 1

" ~ ./ ~ Inductive Lb2 Capacitive I

zo_s.sA f

fRS fRbl fib fc fRb2

Figure 2.32 New and combined resonance for bypass capacitor in an op-amp.

the figure, representing the capacitor impedances Zbl and Zb2. At lower frequencies a declining Zbl (i.e., from Cbl ) provides the lower impedance bypass shunt. At a higher frequency Zbl starts resonating and begins to rise at fRbl. As the frequency increases even further, Zb2 (i.e., from Cb2 ) bypasses the rise and restores the declining bypass impedance. The self-resonance of Cb2 at fRb2 produces a rise, but at a lower impedance than provided by ZCb 1. In Figure 2.32, the Cbl/ Cb2 parallel setup peaks at fib, which is the intercept of the rising Zbl curve and the falling Zb2. For higher frequency amplifiers this peak should fall within the amplifier's response range. At the fib intercept point, the two Zbl, Zb2 curves occupy the same value (Zbl -- Zb2 ). At this point also Zbl -- 27rfibLbi, and the capacitance impedances Zb2 -- 1/27rfibLbl and Zb2 -- 1/2 ~fib Cb2 are equal, which means that, equating these two terms, we have

1 fib = 2 ~ / ~ 1Cb 2" (2.45)

Furthermore, at f,b the Zb2 impedance continues its capacitance rolloff, as shown by Zb2 = l/2rrfi b Cb2. This will result in the design equation

I Cb2 I -- I Lbl [, (2.46)

therefore making the magnitude of the Cb2 capacitance equal to that of the Cbl shifts parasitic inductance control from Zbl to Zb2. The preceding design equation

2.11. Designing Power Bus Rails in Power/Ground Planes for Noise Control 83

requires the measurement of gbl , which is not a hard task with today's accurate impedance analyzers, which can measure the frequency response of a given

capacitor. The rising part of this impedance curve will define the actual inductance

by the equation Lbl -- Zcap/27rf. The dual bypass configuration can produce a critical resonance that degrades

stability at certain frequencies. This can occur at frequencies that could be located

either above or below the amplifier's crossover frequency ft. The Cb2 resonance

in conjunction with Lbl c a n raise the net line impedance well above this level,

producing oscillations. These resonances can provoke oscillation at frequencies

above fc, which can diminish the parasitic feedback loop, but the resonant imped-

ance rise can counteract this limit. Resistive detuning of the bypass impedance

can also detune this resonance. Adding a small resistance series with Cbl detunes

this resonance to ensure stability, as shown in Figure 2.33. In the figure, the Z o

curve now makes a slow, rather than resonant, transition between Zb~ and Zb2 at

the fib intercept. The addition of a resistance R s actually detunes these two

resonances. The first resonance to be detuned is the self-resonance of Cbl, and

then the resonance from Cbl and Cb2 combined. The addition of R s removes the

resonance impedance drop and raises the impedance level to that of R s + R b.

This raises the bypass impedance in the region previously that of fib- The Z 0

curve makes a smooth, rather than resonant, transition to this new limit level.

The reduced Z o response slope provides a greatly reduced phase transition at the

frequency of the previousfbl resonance. This scenario reduces the potential phase combinations with amplifier gain in PSRR that could degrade stability. The value

of R s has been defined as [2]

R s = 1 - Rbl. (2.47)

Rbl is really a very small resistor, and choosing a different capacitor for Cbl that

may contain this parasitic resistance (i.e., R s + Rbl) should be sufficient.

2.11 D e s i g n i n g P o w e r Bus Rai ls in P o w e r / G r o u n d P lanes

for No i se Contro l

Providing power for microprocessor-based systems is becoming an increasingly

difficult job for advanced digital design. The reason is that power-supply rails

have dropped in voltage over the years, from 5 V to 3.3 V and to 1.0 V in the

future. From the IC process, lithography demands lower, better regulated power-

supply rails and higher clock speeds, creating noise and dynamic loads. The ever-


0 Z o ~

Rs

Cbl

Lbl

'Cb2 << Cbl

Lb2

Rb2

Z~ ~ Rbl

~ f x

Rs + Rb 1 fc fb2

Figure 2.33 The effect of adding a small resistance for detuning main resonance in op-amp bypass capacitance usage.

increasing demand for lower power contributes to this layout of power design

problem.

Power-supply rails for microprocessors and other high-speed ICs have dropped

from 5 V to about 3.3 V in order to handle 0.5/xm lithography and reduce total

power consumption. The goal in the near future is to drop to 1 V for 0.35/zm

lithography, which would reduce the power consumption even further. Since

1985, clock rates have risen about 25% per year. If this trend continues, by the

year 2000 the clock speed could easily reach 400 to 600 MHz. Clocks that are

just 50 MHz will convert a supply rail into a transmission line by raising the

supply's source impedance and radiating RF noise. It is not enough that an IC's

basic clock rate switching noise tides on the supply rail; power management

2.11. Designing Power Bus Rails in Power/Ground Planes for Noise Control 85

schemes produce near maximum dI/dt load current transients in just one clock cycle.

When ICs and microprocessors come out of sleep mode, load transients are

easily developed even for low currents such as the 3 to 4.0 mA typical of microprocessors. Such processors can see 300-A//zsec transients (3-A rise in 10-

nsec clock cycle). A typical PC board trace can look like 20 nil/inch in inductance,

as shown in Figure 2.34. Because the voltage drop across the transmission line

equals the inductance multiplied by the rate of change of current (V = L dI/dt),

the results are given by

V = 20.0 X 10 -9 X 300 A]I.0 X 10 -6 = 6 V/inch,

which means that if the processor is located about 1 inch from a typical 3.3-V

power source, the voltage at its pins will drop to zero when the processor is

called out of sleep mode.

Digital switching noise on the supply rail will cause skin effects that will

produce voltage drops even when the DC resistance is quite low. Furthermore,

the RF noise riding on the 3-V rail can couple back through the DC-DC converter

to the power source.

The task facing the power and ground designers in printed circuit boards is

to provide the shortest possible path for the return of common-mode noise

currents. Though noise currents always follow the path of least impedance, in

the frequency range of 10 kHz to 50 MHz it is often difficult to predict which

path the noise current will follow. As a general rule, however, reducing the

inductance and increasing the capacitance of the loop through which the current

Typical PCB Trace ~ I

3.3V

, ,loc,oc il I

luP

FPGA

Figure 2.34 Inductive and resistive representation of PCB power traces.


will flow reduces the overall impedance. The inductance of a wire loop is proportional to the area of the loop. The smaller the loop area, the smaller the

inductance, the greater the capacitance, and the lower the overall impedance.

Capacitors in the range of 0.01 to 0.1/zF can be placed to route conducted noise

away from sensitive ICs and back toward a non-noise return path as shown in

Figure 2.35. If more severe noise limits are imposed, a common-mode inductor

can be inserted into the noisiest circuit as shown in Figure 2.35. This inductor

is typically less than 1 mH, but would still provide enough common-mode and

differential-mode filtering to reduce the conducted noise significantly.

Because the impedance of a wire loop is proportional to its area, reducing the

area enclosed by the loop reduces the impedance. The area between traces can

be minimized by placing the traces closest to each other in adjacent layers of

the printed circuit board. A power bus loop area can also be reduced by decreasing

the distance between the power source (e.g., a DC-DC converter) and the load.

Though this is often impractical, the loop area can also be reduced significantly

by using a good design as shown in Figure 2.36, where the loop area has been

reduced significantly, therefore reducing the RF impedance. It is also less efficient

as an antenna because its smaller loop area generates a smaller magnetic field.

Likewise, minimizing the loop area decreases the noise pickup significantly.

In power converters especially, not only the power leads, but also the two sense-

lead traces must be put as close to each other as possible on opposite sides of

Common Mode Capacitor

Common Mode Inductor

Noisy Power Source

LOADS

GROUND I '11

Differential Source Capacitor

Figure 2.35 Capacitive and inductive placement for routing away conducted noise in a PCB.

2.12. The Effect of Trace Resistance 87

DC/DC Converter

Loop Area

DC/DC Converter

I ZL

Loop Area

Figure 2.36 Reducing loop area in PCB to diminish interference.

ZL

the PCB layer. Any inductance in the loops of Figure 2.36 provides a delay in

the converter's control loop response, which can reduce transient response to

load steps and create an unstable converter.

Not only must loop reduction be pursued in power signal lines, but also signal lines that can control the turning in and turning off of a DC-DC converter must

be protected from coupled noise which could adversely affect the on-off line, the inhibit line, and turn the converter on and off inadvertently. In Figure 2.37

a DC-DC converter is being protected from overvoltage by the use of an overvoltage protection (OVP) circuit, as shown in the block diagram of Figure 2.37. The overvoltage protection circuit consists partially of a series of flip-flops and

NAND gates which generate the inhibit signal once an overvoltage is detected.

Unfortunately, these lines are very susceptible to EMI noise, and it is imperative

to minimize the loop area in the design to reduce the possibility of coupled electromagnetic interference noise.

2.12 The Effect o f Trace Res i s tance

Clear power at the output is dependent on the power supply capacity and its

tolerance, but the loss resistance between the supply and the printed circuit board

output is also an important factor, as shown in Figure 2.38.


32V EMI Filter I I

Shut-Down

Shut-Down

inhibit

I 5V Converter i / , I Jvio av I_:f vout

4 Dr,ver Ove o"aoe Protection -.,,

inhibit

I 5V Converter

[ ' / I ~lvi n 5V I - ll_ ! Vout

Overvoltage .y. D r I

Figure 2.37 Block diagram of an overvoltage protection circuit for the DC-DC converter.

DC/DC Converter

Resistive Losses A /

" V V k , ~ A A , ~VVk,-

-- 'VVk , ~ A A , ~ /VN,

PWR Supply PCB Trace PWR Control Leads Resistance Resistance Switch Resistance

Figure 2.38 Trace resistance in PCB traces.

PCB Card

The system power supply must have enough drive for any other peripherals

plus additional current for the PCB card. The output leads of the converter should

have a very low resistance. Trace resistance can also be minimized by careful

design. The current-handling capability of a trace is proportional to its cross-

sectional area. An insufficiently large trace can act as a fuse with a high current

flow, so trace cross-sectional area should be maximized. Therefore, both minimum


resistance and maximum current-handling capability can be achieved with heavy

traces. Figure 2.39 shows trace widths as trace length for 1 oz/ft 2 and 2 oz/ft 2

copper thickness.

The following three design equations provide a methodology for calculating

the resistance and current density of a PCB trace as a function of heat dissipation:

p[1 + ce( T A + Trise- 20)] Ps(T) = h ' (2.48)

where

ps(T) = sheet resistance at elevated temperature (ohms/square)

P

rA Trise h

= 0.0172 = copper resistivity at 20~ (ohms X #m)

= 0.00393 = temperature coefficient of p (~

= ambient temperature (~

= allowed temperature rise (~

= copper trace height (/zm).

PCB Weight (oz/inch z) Copper Trace Height (ton)

0.5 17.8 1.0 35.6 2.0 71.1 3.0 106.0

100/max

W = ./Trise / 0SA, (2.49)

800 800

600 ~ 600

a D 4oo 4oo

200 ~ 200

1 cm 6 cm 12 cm I cm 6 cm 12 cm

Trace Length (10Z/f t 2- Cu) Trace Length (20Z/f t 2 Cu)

Figure 2.39 Trace width and length for a given thickness of copper in PCB trace manufacture.


where

W

/max Trise ~SA

= minimum copper trace width (mils)

= maximum allowed current for a given Zrise (amps) = allowed temperature rise (~ = trace thermal resistance (~ X inch2/ohms)

ps(T) = sheet resistance at elevated temperature (ohms/square).

WR and I = Ps:--(T)

where

(2.50)

I = maximum trace length (mils)

W = trace width (mils)

R = maximum allowed resistance (ohms)

ps(T) = sheet resistance at elevated temperature (ohms/square).

The preceding equations allow us to calculate the maximum trace width and

the maximum trace length for a given allowed temperature rise for the trace. Using the PCB weight in the table on page 89, we can get the copper trace height. From this information and the allowed temperature rise, we can first calculate the sheet resistance ps(T). The minimum trace width can be obtained from Equation (2.49) if the maximum current the trace can sustain is given. Finally, based on the maximum allowed resistance, the maximum trace length is calculated using Equation (2.50). The table also provides general guidance based upon logic family for situations in which the loaded transmission line delay is unknown or difficult to obtain.

Depending on the logic family, the characteristic source impedance can vary. For ECLs, source and load impedances are about 50 ohms. For TTLs, the source impedance ranges from 70 to 100 ohms. Implementation of transmission lines should try to match the logic-family impedance. There are four implementations

of traces: microstrip, embedded microstrip, centered stripline, and dual off-

centered strip line. The microstrip is the simplest configuration for a transmission

line. The trace is on the outside of the PCB and referenced to a ground plane as shown in Figure 2.40 with its characteristic impedance.

87 In( 5.98h ) Z~ "- V / e r -k- 1.41 \0.ff-W ~ 1 " (2.51)

The embedded microstrip is very similar to the microstrip, but with a pads-only

layer coveting the signal conductor, as shown in Figure 2.41:

K , { 5.98h '~ Z~ = ~/01805e r + 2 'n~0.8--W ~ 1 ) ' (2.52)

2.12. The Effect of Trace Resistance

w - I

91

Figure 2.40

----- Z : t

G r o u n d

Typical PCB transmission line in the form of a microstrip.

where 60 -< K --< 65. The stripline features a trace sandwiched between two

conductors which act as ground planes, one above and one below. In the dual

stripline, there are two levels of signal traces sandwiched between two ground

planes, as shown in Figure 2.42.

For the single stripline of Figure 2.42,

O,n( 4h ) = e--~- 0.677rto (0.8 + t / W) " (2.53)

I l l

G r o u n d

m m

. - . . m

Figure 2.41 Embedded microstrip often used in PCB.


I W I

I I

I L - m

- t

I WI

Figure 2.42 Stripline configuration usage in PCB traces.

For the double stripline of Figure 2.42,

2flY2 Zo =

k+f2 6 0 ( In 8d )

fl (2.54) ~ e r 0.67 7rw (0.8 + t / W)

6 0 ( In 8h ) f2 = v e r 0.677rw(0.8 + t /W)

Figure 2.43 shows an example of a 12-layer board containing some of the kinds of traces just discussed.

When we compare these types of transmission lines, the microstrip is the best solution for clock skew because signal travels faster on a microstrip than on a stripline (7 inch/nsec vs 5.5 inch/nsec), which is about 40% faster than the striplines. This is because the stripline has twice the capacitance of the microstrip line, and the propagation time per unit length is proportional to the square root of the product of inductance and capacitance per unit length. The quietest signal line is the one sandwiched between two planes, but such lines are not used often in PCB design because they require a thicker board. Therefore, it is better to use dual embedded striplines, and in order to avoid crosstalk, such lines should be as close as possible to perpendicular, and certainly not next to or parallel to each other.

Manipulation of trace widths for a given dielectric thickness in a PCB can be used for matching impedances of IC logic, since different logic families have different impedance requirements. Most designs, however, provide separate layers for the signal distribution of a given logic family and use another layer for another class of logic family. Furthermore, instead of changing trace width for matching impedance, the thickness of the PCB layers is changed to accomplish the same objective without affecting the structural integrity of the PCB layout.


F . . . . . . . ]

1 i !

2 [/////////////////////////~//~/~//////~///////////////////////~,/~ Pads Only 75 ~ line

Ground

Embedded Microstrip

28V

Ground

5 I ' l 50 D line

6 1, ! 50 D line ~ Dual Stripline

10

8 ' / m m m m m / m l m v ~

Ground ] Centered Stripline

70 D. line u

11 1 I

12

+5V

Ground &

100 ~ line ~ Centered Stripline

Y///////////////////////////////J////////////////////JJ/~///~/~

I_ . . . . . . . I Pads Only

Figure 2.43 Cross-sectional view of a 12-layer PCB.

To put the finishing touches of impedance matching between the PCB trace

and the load, a novel approach is to terminate the source end as shown in Fig-

ure 2.44. This approach has an EMI advantage because it limits high-frequency

periodic currents. A resistor is added to the transmission line between the driver

and the line. The ideal value of the series resistor would match the impedance

of the transmission line. As shown in the figure, the incident wave on the load


Rs Zo Receiver

ZL

Figure 2.44 Impedance matching of transmission lines for driver/receivers.

will most likely be reflected back, but once the reflection is received back at the source, it is clamped down as the reflected wave is terminated on the series resistor. Once the current transition is complete, very little current continues. The main disadvantage of these series resistors is that if we have to use ones that are large enough to match the trace impedance, this will generally limit the switching time of the line.

2.13 ASIC Signal Integrity Issues (Ground Bounce)

CMOS semi-custom ASICs often perform better than board designs in PCBs with less power consumption. However, these power-consumption advantages also produce some adverse effects. As larger CMOS drivers attempt to match bipolar drivers' speed and current-carrying capabilities, the noise induced by simultaneous switching is becoming a problem for ASIC designers.

Let us consider Figure 2.45, in which there are glitches in the TRBBUS and TRPBUS buses. Such glitches may be the result of grounding problems, including ground bounce. Ground bounce is viewed in the scenario of driving a bus, in which simultaneous switching occurs from high (5.0 V) to low (0.4 V). The inductive ground provides a positive swing up that drives n-channel transistors low to switch on and off, thus yielding false "output highs." Other anomalies in the ground bounce cause a bidirectional buffer output high to feed back into the device, changing the circuit state.

The equation

dVc(switch) (2.55) Ic(switch) = CL~ dt

2.13. ASIC Signal Integrity Issues (Ground Bounce) 95

30 pF 1.2nil 1.2nil 30 pF SQVL ----t I rv'v'v'~ ~ 7 0 . 3 nH ~7 ~ F--- STVL

GRND BUS 0.2 nH i I I I I I I I I I RPBUS

~ ~ " I ~ H CDCTRL A SIC [~ i0.3l~[~ ~4 I I ~ ['~,---.CP~"~ 1"9nil

0.3 nH U10 0 pF

k__l

output ~ 1 40 pF I driver

. ~ 0.3 nH I 40 pF

, , , ,

I I I I I

SPTOVD

-1 outpu ! dr!ver

r

7 0.3 nH

I TRLBUS ~ ,, - i ~ . ~ nH i t i t t e r i i I , ~ . I 40 pF,@

ev~,v~Z) 40 pF HCDCVR 0.3 nH

Figure 2.45 ASIC overview of its output losses and ground connections.

represents the current needed to switch a capacitive load from a given voltage level. The equation

dlc(switch) (2.56) gtran -- - L p i n dt

represents the transient voltage induced by the associated inductance of the switching current. This inductance is shown as pin inductance because of the contribution of the package pins to the overall inductance in the input/output

circuits. If we combine these two equations we obtain an expression for the

transient induced voltage:

dZVc(switch) (2.57) gtran -- Cload Lpin d t 2 �9

This transient voltage is the noise input into the ground paths which would couple

to other pins and connectors. As can be observed, the noise voltage is dependent

on the load capacitance, package inductance, and switching speed. The load


capacitance affects the voltage transition rate of the driver. The package inductance

can include not only the pin inductance, but also all other associated parasitic

inductances within the ASIC package. Notice that if the C~oad increases, the

voltage transition rate slows down, and this may upset the overall gtran because dZVc(switch)/dt 2 decreases as/- ' load increases.

A SPICE analysis simulation shows TRPBUS and TRBBUS outputs from the

ground pins as they experience the transient voltage (Figure 2.46).

In the preceding analysis we have neglected impedance matching of the output

drivers. Mismatched impedances cause reflections that can result in a fault system.

Traces in low-frequency circuits are no more than conduits of currents. As

switching speed increases, traces exhibit new behavior, acting instead as transmis-

sion lines with defined characteristic impedance. In order to control the RF

currents, we must treat longer traces as transmission lines and design these accordingly.

Traces should be designed as transmission lines at high frequencies where the traces are long enough so that the reflection from the far end of the transmission line is delayed, arriving later than the original transition time. A trace can be considered as a transmission line if

T <_ 2Lt L, (2.58)

where T is the output transition time (rise or fall times), L is the length of the

PCB trace, and tL is the loaded transmission delay/unit length.

In Figure 2.45, the system load capacitance of 40 pF is what the device would

see in operation. The 1.9 nH values represent the lead wire inductance from the

IC to the package used in the ASIC assembly. The 0.3-nil and 0.5-nil values

are the inductances of the ASIC peripheral internal ground bus. They will sink

all driving current through the ground pins. The inductance is determined from

the sum of the wire inductance (round wire assumed), which is about 1.27

nil/inch, and the wire inductance over a ground plane,

Ltota 1 -- L W -k- Lwg / . _ \

=1 .27 nH/inch + (0.005)ln(4h] \all

(~H/inch),

(2.59)

where L w is the intemal round wire inductance, LWg is the wire inductance over

a ground plane, h is the height above the ground plane, and d is the wire diameter.

If the lead wires are 1.7 mils in diameter and 35 mils above the ground plane

with a length of 80 mils, the inductance is approximately 1.9 nil, which was the

2.13. ASIC Signal Integrity Issues (Ground Bounce) 97

800

400

Ground Glitches (reVolts)

0.0

-400

-800 I I I I 20 40 60 80 100

(nSec)

TRPBUS

120

800 TRBBUS

400

Ground Glitches _ (reVolts)

0.0

-400

-8oo~ I I I I I 20 40 60 80 100 120

(nSec)

Figure 2.46 SPICE simulation results at ground pins of TRPBUS and TRBBUS outputs.

value used in the lead wire inductance. The ground bus of this ASIC is 180/~m

wide and approximately 1.2 #m thick. We can then calculate the equivalent

diameter:

for 0.1 -< t / W <- 0.8. (2.60)


2.14 Crosstalk through PC Card Pins

In digital systems, as previously stated, the electrical noise is caused by the

coupling of electromagnetic energy from a source circuit into a victim or suscep-

tible circuit. In a digital system, noise can cause the binary state of any given signal to shift involuntarily. These kinds of shifts can be transient (glitches) or may last for a longer time, as in a pulse. Transient noise, for example, may appear as a glitch that shows up as a clock transition in a flip-flop. One of the most important sources of noise is the crosstalk.

Crosstalk is defined as the coupling of voltage to an adjacent line through mutual coupling composed of a mutual inductance, a coupling capacitance, or both. The coupled voltage adds to or subtracts from the actual signal voltage,

thus moving a circuit closer to the switching threshold. Figure 2.47 illustrates

the mutual inductance and capacitance phenomenon.

Mutual inductance is created by a magnetic field generated by a current flowing through a current loop. Mutual inductance injects a noise voltage into an adjacent circuit proportional to its rate of change of current. The noise voltage

can be represented by

. d I ( t ) g n - L, m ~ - . ( 2 . 6 1 )

GROUND PLANE

Driver

I(t)

C m = Mutual capacitance

L m = Mutual inductance

, , , . . ~ CIRCUIT 1 " ' - I

' ! I

Cm I

T ' I

u I

In(t)

Susceptible Circuit ~ ~ , . ~ t Vn(t)

Figure 2.47 Mutual inductance and capacitance between a noisy and a susceptible circuit.

2.14. Crosstalk through PC Card Pins 99

The coupling stray capacitance is created by an electric field generated by a voltage change experienced in the noisy circuit. This time-varying field between the two conductors can be represented by a capacitor connected between the two conductors. This coupling capacitance injects a noise current into an adjacent

circuit proportional to its rate of change of voltage:

c dVc(t) /n( t ) -- m d-t �9 (2 .62)

There are three main noise sources in PC cards: (1) noise through crosstalk due to the mutual inductance and/or capacitance among the connector pins; (2) ground shifts in the connector as a result of the high number of switching

outputs per ground pin on the connector; and (3) Vcc shifts due to the large

number of switching outputs per Vcc. The ground shifts and the Vc~ shifts occur as a result of the large number of outputs on the card switching simultaneously.

Figure 2.48 shows the PC card bus interconnect system.

From Equation (2.62),

c dVc(t) In( t ) = m ~ (2 .63)

and its first derivative is given by

din(t) _ Cm d2Vc(t) d t - d t - - - - - - -T-" (2.64)

HOST SIDE MASTER SIDE

4, GRN

VCC A w

In(t)

DRIVERS - b - ,,

4z

I

In(t)

" \ \ ' ~

\ \ \

,, \

- Vcc W

DRIVERS

<t-

DRIVERS

In(t) ~7

Figure 2.48 PC card bus interconnect system.


The dVc/dt in a circuit is related to the 10-90% rise time and the voltage swing

AV:

dVc(t ) _ AV

dt TlO_9O %

The maximum of In(t) is given by its first derivative:

(2.65)

1.52AV Maximum In(t) = Cm 2 �9 (2.66)

T lO- 9o~

Maximum inductive crosstalk is given by

dl(t) deVc(t) Vn = Lm dt - LmCm dt 2

Vn = Crosstalk = LmC 1.52AV T2o_9o%

(2.67)

Let us consider, for example, the case of Figure 2.47 shown earlier, where the

loop of each circuit is 6 inches long by 0.5 inch in height, running in parallel

(maximum coupling) at a separation of 0.2 inches; the mutual inductance L m is

given by

i 1 I E L m = L 1 + (d/h) 2 = (1.27 nil/inch) 1 + -0.2 2 = 109�9 nil.

If C = 30 pF is the typical load capacitance, A V = 3.7 V, and T10_90 %

= 5.0 nsec (estimated). The crosstalk obtained from Equation (2.67) is 0.73 V.

2.15 Parasitic Extraction and Verification Tools for ASICs

At 0.5/zm the comparison of what is designed with present EDA tools and what

is delivered is not a real challenge, even as the clock frequencies increase�9 At

0.5-/~m design rules, these obstacles are manageable�9 Many existing tools are

showing signs of dealing with 0.35-/zm design; however, the 0.25-#m barrier is

still (as of this writing) out of reach for EDA tools. The deep submicron area,

as 0.25/zm is known, has special difficulties for designers. The main problems

are that such concepts as capacitances and resistance, which were not crucial in

the past, have now become crucial to the success of a good design.

2.15. Parasitic Extraction and Verification Tools for ASICs 101

Parasitic extraction is the part of the design process where parasitic effects

such as capacitance, inductance, and resistance are taken into account. At 0.5/zm

and above, gate delays predominate over the delay that could be experienced by

the interconnects. Work on parasitic extraction may be only on a small portion

of a circuit, and it is only an estimate. The device resistive and capacitive effects

can be viewed in terms of a lumped RC model. These approximations are

acceptable because the overall effects on the parasitics are small and any error

between the lumped RC models estimates and the real parasitic effects is small,

causing no adverse effects in the design. As we move to 0.35/zm, the problems

begin to arise, and by the time we get to 0.25/zm the current methodologies are

of very little use. At this point the interconnect delays are of very little use. At

this point the interconnect delays dominate over gate delays and the physics of

the interactions between the components like metal layers, wires, and transistors

play a major role. Therefore, in the design process we can no longer use RC

lumped parameter models. Interconnects become the major aspect which could

affect a circuit's behavior and can easily account for a great percentage of the

overall performance. Designers need to better assess the values of these parasitics

for paper design. The two most important factors in these processes become, first, a good approximation of parasitics, and second, a methodology for analyzing

the large amount of data.

Tweaking present extraction tools is not as easy as it sounds because parasitic

extraction in deep submicron design is very complicated. For example, metal

cross-sections become an issue because width and height are equal at 0.35/xm

and 0.25 #m. The aspect ratio of height to width is 1:2; this trend will continue in the future. Therefore, the lumped-parameter model no longer works. Determining

interconnect parasitics in a deep submicron design requires two steps. The first step is process technology characterization as models or libraries, to build estimates for the possible parasitics. The second step is full chip extraction, which would determine the location of the parasitics and generate the libraries for network analysis.

Interconnect characterization involves using a variety of field solvers to deter-

mine the magnitude and location of capacitance and resistance. These field solvers

discretize the layout structure in 3D and solve Laplace equations using finite-

element methods, finite-difference time domain, boundary-element methods,

Monte Carlo, moment methods, and fast multipole methods. Unfortunately, such

analyses require a large amount of data and an enormous amount of computer

time; hence the quasi-2D and -3D view of interconnects. The quasi-3D profiles

are stored in libraries with their capacitances. In the extraction process the patterns

of interconnects are matched to the library patterns to calculate parasitics. For


2 " % 5 . 2 V

.,..,.

..~ 2.5 pF

L.5

S _r ~%1%

�9 ! /~i! �84 � 9 ....... ~: : : : ~ i ! : ~ : . : : �84184 , ! . ,: �84184184 �9184 �9

~ 4.5 pF

/ L4.5 pF

7 z /

distorted o u t p u t

�9 ~ i :!:i/iiiii: ~:::i~::! 71ii~/):!:~!~:i::!:i17ii::i::i: ~�84 �84 :!!: :~:; 7 . . . . . �9 � 9

distorted o u t p u t

4 . 9 5 ~ ~ . . _

Figure 2.49 Representation of deep submicron parasitics in ASIC.

example, the nets can be broken and divided into 3D sections, generating a representation library that totals the whole structure in 3D for each process. Closed-form lookup tables can be used to match the values in libraries, providing

extraction times similar to 2D-based solutions. An example of deep submicron

parasitics and their effects on design is shown in Figure 2.49.

Notice from the figure that the output of A2 is corrupted as a result of parasitic

capacitances among rails. The metal-to-metal capacitances are large enough that

many of the interconnects share signals with their neighbors, resulting in irregular

signals like the ones at the outputs of A2 and B2.

References

1. Analog Devices, Linear Design Seminar, Prentice Hall, 1995. 2. Jerald Graeme and Bonnie Baker, "Design Equations Help Optimize Supply Bypassing

for Op-Amps," Electronic Design, June 1996.

Chapter 3 Noise Issues in High-Performance Mixed-Signal ICs and Other Communications Components

3.1 A n a l o g - t o - D i g i t a l C o n v e r t e r N o i s e

Industry today is producing higher performance and wider bandwidth operational amplifiers. New sampling converters can achieve superior dynamic performance when handling high-frequency input signals. Unfortunately, providing a clear analog input signal to an analog-to-digital converter (ADC) does not always guarantee a healthy digital output. That is because an ADC does not just have one input; in reality, there are many. Ground pins, supply pins, and reference pins can also act as inputs and must be treated specially to prevent noise and other interfering signals from corrupting the ADC output. Proper grounding, supply, and reference bypassing are major factors in proper ADC design.

Proper grounding techniques are very important in ADCs. An illustration of this is shown in Figure 3.1. In the figure the analog, digital, reference, and power

i

A N A L O G G R O U N D P L A N E

G R N - 5 V GRN 5V cb,[ Cb2

Analog +[_~ Inputs

~e,. r . ' 4 q I~put ' i I"-~

Cbs ~ ~ Cbb--[

GR

D0-D2

Vss V*dd

Digital Ground

Vdd = analog V dd V*dd = digital V dd Vss = analog V ss

DIGITAL G R O U N D P L A N E

5V II,.-- IGb

TT ~~ igital

IC

~ Digital D0-D2 ~. Ground

1 Only poinl connecting analog and digital PCB grounds

pin connects analog and digital ground planes on top layer of PCB

5V D I 1 I

i ..L Cb Digital T | ~c ~

Digital Ground

Figure 3.1 Proper grounding techniques in ADC.

103

104 3. Noise Issues in High-Performance Mixed-Signal ICs

traces are now on the top side of the PCB. Some PCB traces, such as the -5 -V line, the data line, run under the ADC. The analog and digital ground planes are separated by a gap and connected at only one point, located at the bottom of the board. Multilayer PCB is probably a more practical approach, in which one layer would be the analog ground plane and another layer would be the digital ground plane, with one or more layers for signal planes and additional layers for power rails. All power rails should have about two bypass capacitors for every ADC IC. All power-rail bypass capacitors, reference bypass capacitors, and ground connections for the ADC should be tied to the analog ground plane. The tie points should be located as close as possible to reduce the sensitivity to currents that may flow in the ground plane. The input signal circuitry filter capacitors and op-amp bypass capacitors should also be grounded to the ground plane close to the ADC. Noise from digital circuits should by kept away from the analog ground. As noted earlier, all boards should be designed with separated analog and digital ground planes. All digital logic must be connected to the digital ground plane. Because the ADC covers the analog/digital interface, the two ground planes should be connected at the ADC point, which serves as the ground pin for the ADC output drivers. All the ADC ground and bypass capacitor leads for the digital ICs should be tied to the one lone ground. The two ground planes must be tied together at only one point. This approach allows the digital currents to take another path through the analog ground.

A cross-sectional view of the PCB layers is shown in Figure 3.2.

Layer 1

Layer 2

Layer 3

Layer 4

Layer 5

Layer 6

Power Rails and Signal ADC ICs

Analog Ground

Digital Ground Clock and Highspeed Digital Signals

Power Rail for Digital ICs Noncritical Digital Signals

Figure 3.2 PCB layers for ADC.

3.1. Analog-to-Digital Converter Noise 105

Notice that in Figure 3.1 we have used dual bypass capacitors. Keeping the lead and power-line inductances between the ADC and the bypass capacitor very low provides good bypassing. The objective is to force high-frequency current to flow in the shortest possible inductive loop from the power supply pin through the bypass capacitor and back to the ground pin.

The analog power-supply rail bypass capacitors are placed around the ADC

using the PCB's top power rails. For best results the bypass capacitors must be

located as close as possible to the supply pins and their ground return lines

connected to the ground plane through vias located on an interior layer of a

multilayer PCB. The capacitor must have low inductance. In ADCs, a tantalum 10-/xF capacitor in paralled with 0.1-#F ceramic capacitors would be a good

combination. The effect of poor bypassing on differential nonlinearity (DNL) is best under-

stood by comparing DNL data taken on an ADC with a good layout of bypass capcitors with DNL data taken on ADCs with a poor layout. This is shown in

Figures 3.3a and b. As can also be observed from Figures 3.1 and 3.2, digital and analog circuits

and layout are kept on separate planes, and separate rails for analog and digital

circuits are run in lines as shown in Figure 3.4. There are other important issues related to ground-plane layout. One example

is the use of tree-style grounding networks. Major benefits can be obtained by logging out power and ground networks as shown in Figure 3.5. Different rails of circuits tend to be well isolated from one another. Make sure that the analog branches of the tree share as little as possible with the digital section of the circuit.

Remember that an analog signal can be easily corrupted by digital signals just because of the great difference in energy contact between the two types of signal and the fact that capacitive coupling can couple digital signals into analog signals. For example, analog signals, as shown in Figure 3.6, have all their energy concentrated in a narrow frequency range. On the other hand, digital signals usually contain many harmonics, and such harmonics (any of them, really) can

easily couple into the inputs of analog ICs through capacitive coupling as shown

in Figure 3.6. For higher harmonics the "ease" of capacitive coupling increase

even though the magnitude levels and energy cohort of signals decreases, as

compared to lower harmonics where the magnitude levels are larger and their

energy content is also larger, but capacitive coupling is less pronounced.

Clearly, digital circuits are much more immune to noise than analog circuits.

Consider the inverter shown in Figure 3.7. Notice that even though we have a

noisy input in the inverter, there will be no errors; when the inverter encounters

(a) 1.0

DNL 0.0 Error

-0.5

-1.0

1.0

0.5

0.0

-0.5

-1.0

0.5

Output Codes

DNL Error

(b)


Output Codes

Figure 3.3 (a) DNL of fast ADCs for good bypass capacitor layout. (b) DNL of fast ADCs for poor bypass capacitor layout.

3.1. Analog-to-Digital Converter Noise 107

LAYER 1 �9

Analog Circuits

I I Power Rail for Analog Circuits

I /

LAYER 5 Digital Circuits

Power Rail for Digital Circuits

0 I

j l - -O

�9

1 9 i ! ~

I o

LAYER 3 Analog Ground

Digital Ground

Figure 3.4 Evaluation of mixed analog/digital signal layout to avoid electromagnetic interference.


Ldl /dt

dl/dt

R b

,,,t L

Power Supply

Analog Circuits

Digital Circuits

NOISY SCENARIO

Analog Circuits

dl/dt Digital Circuits

Parasitic inductance isolates analog circuitry from digital noise

Power QUIET SCENARIO Supply

Figure 3.5 Noisy network and tree-style grounding networks to minimize noise.

some noise, it knows that this is supposed to be logic 0, and when the signal is passed along the noise is mostly removed.

In analog signals, however, the output is a faithful reproduction of the input noise. For example, an analog inverter will faithfully reproduce the noise as shown in Figure 3.8.

3.2 Driving Inputs in ADCs

It must be remembered that when driving switched-capacitor ADCs, the ADC tends to draw a small input current transient at the end of each conversion. This scenario occurs when the internal sampling capacitors switch back onto the input to acquire the next sample. In order to give accurate results, the driving circuits at the analog input must settle from this transient before the next conversion is begun. One way to accomplish this (see Figure 3.9) is to use an RC input filter with a capacitor much larger that the ADC input capacitance. The larger capacitor provides the charge for the sampling capacitor and eliminates the transient voltage.

Finally, another important consideration is that sample and hold amplifiers of many new converters have wide input bandwidths, which is suitable for obtaining high-frequency inputs, but for lower bandwidth applications, the converter will pick up any noise that could be present in the input signal. To avoid this problem

dBm

Amplitude

dBm

Amplitude

3.2. Driving Inputs in ADCs 109

-18 dBm

Hz

/ , 0 20/// 40 6 9 2 80 1,00/ 120 140 f(MHz)

In / / " ~ /

_~ ~_~_ " In / / / I n | __j_/ Capacitive coupling of

T digital signal harmonics to analog inputs. The noise current

I couples to analog circuits

0 40 80 120 160 200 240 280 320

Digital Signal Spectrum f(MHz)

Figure 3.6 Comparing energy content of analog and digital signals and coupling scenario.

it is recommended that in Figure 3.9, a filter at the ADC input be used to pass

to only the desired signal bandwidth.

One of the most common input configurations for ADCs is that known as a

coarse-charge buffered capacitive sampler. A sampler with a coarse-charge buffer

uses a two-step sampling cycle. When the coarse switch is on (fine is then off), the

buffer charges the sampling capacitor to a voltage that is a coarse approximation of

the input source voltage Van. The voltage output from the buffer included the

110

k k k k l I~1~1~1

3. Noise Issues in High-Performance Mixed-Signal ICs

k k k k l I~ ~1~1 ~1

k k k k l k k k k l I~l~l~l I~1 ~1~1~1

rkM~ki I 1 1 1 ~1

kKkkl 1 1 1 1

k lkkk l I ~1 ~1~1~1

Figure 3.7 Illustration of noise immunity of digital ICs.

Vn Z2

~ ) Z1 ~Vk/k, VOUt = ~ ~ ~ ~ d ~

Zr

Figure 3.8 Illustration of noise susceptibility of analog signals.

ADC

O Analog Input

C 1 >> C s

50 ohms

analog g r o ~ .o,o

S/H

Figure 3.9 RC filtering for noise elimination in S/H amplifier.

buffer's offset and the input signal. The buffer provides the major portion of the

current needed to charge the sampling capacitor, and this reduces the current demand from the source outside the IC. The sampler then enters into the fine- charge sampling phase. The fine charge bypasses the buffer and will then connect


the external source directly to the sample capacitor. The sampling capacitor is

then charged to a voltage equal to the input voltage.

The basic charge equations are

AQ I = At and Q = C sV. (3.1)

The instantaneous current is I and is equivalent to the charge Q per unit time.

The input current to the buffered sampler of Figure 3.10 is defined as

I CsVos = or I = Vos f C s, (3.2) t

where f - 1/t is the sampling frequency and Cs is the sampling capacitor. The input current in the buffered sampler is a constant as long as the Vo~ of

the buffer, the sampling frequency, and the sampling capacitor remain constant.

It was previously stated that a filter be used at the ADC input to eliminate

possible noise and pass only the desired signal bandwidth. This is shown in

Figure 3.11. The RC filters are usually recommended by manufacturers. The R 1

value should be chosen to isolate the driving amplifier from the transient capaci-

tive load of the sampler. The C1 value (C1 > > Cs) is selected to provide a very low source impedance to the sample transient, while also providing a reservoir

of charge. The RC time constant is chosen to be short enough to allow the sampler

to settle to full accuracy in the allotted sample time. At the PCB level, proper power supply decoupling must be used for every

PCB in the system. An example of decoupling the power lines is shown in

vos

$2

f i n e

I I

$1

__J

c o a r s e !

I i III III

I

S 3 I ,

Figure 3.10 Properly buffered sampler.

Vout

v


VDD

c b

_[_R1

;5 c

Fine s2 J _

I ,,. Coarse

s,_.L."

c ~

. . .L.

Successive Approximation Registers Dout

VDD

Figure 3.11 Properly chosen RC filter in ADC to eliminate input noise.

Figure 3.12. The power supply input is first decoupled to the large-area low- impedance ground plane with a good-quality tantalum electrolytic capacitor. The capacitor bypasses the low-frequency noise to the ground plane. A ferrite bead reduces high-frequency noise to the rest of the circuit.

Low-inductance ceramic capacitors should be used for each power pin on each IC. To minimize inductance, surface-mounted chip capacitors should be used.

Multilayer PCBs with one plane just for ground are required when multiple bypass capacitors are used for bypassing the power path in ICs. When connecting to the backplane, several pins of each connector should be used for connection to ground. In this way a low-inpedance ground plane is maintained between the various PCBs in a multicard system. Furthermore, it is highly recommended to establish separate analog and digital ground planes on each PCB as shown in Figure 3.13. The separation between analog and digital ground planes is stretched all the way to the backplane using a motherboard ground plane. The ground planes are joined together at the system through a single point ground. Schottky diodes are inserted in order to prevent DC voltages from developing between the two ground systems.

Analog components such as operational amplifiers, comparators, and analog- to-digital converters are decoupled to the analog ground plane. All ADCs, DACs, and mixed-signal ICs should be treated as analog circuits with their ground connected to the analog ground plane. This scenario can be observed in Figure 3.14, which shows the internal block diagram of an ADC, with its parasitic capacitances, wire-bond inductance, and parasitic inductance associated with connecting the pads on the IC to the package pins.


+V 0

Backplane Ground Plane

4,

c0,1; L ~~7 Cb2

low frequency noise current

IC Cbl l

PCB Ground Plane

IC

Cbn

Figure 3.12 Decoupling of power bus lines in ICs.

As can be observed in the figure, there is considerable wire-bond inductance (Lp) associated with connecting the pads on the chip to the package pin charging currents in digital circuits to produce voltage at point (2), which will couple into point (1) of the analog circuits through the capacitance Cp. Furthermore, there is also some small parasitic capacitance between every pin of the chip. As was previously stated, the analog and digital ground should be connected at a point outside the analog ground plane using minimum load length. This is necessary because any extra impedance in the digital ground connection can cause more digital noise to be developed at point (2), which will cause more coupled digital noise into the analog circuit. As shown in the figure, it is advisable to place a buffer latch adjacent to the ADC to isolate the converter's digital lines from the


An~ log Grc ~nd Pla le

PCB1 PCB(n-1) PCBn

Figure 3.13

log ]Digital I Analog ~nd ] Ground I ,,, I ,.., I Ground ~ t"lane I P~._~

"//////////~

Digital Ground Plane

~/////////////////~ ~ f / / / / / / / / ' J / / / / / / ~ , .

~ Aroalu:g I G'r

. ~////_~//'//////~ Backplane T

Dil ~ital Gr )und PI~ ne

~/////'//,~

1 / Back0,ane T

Power Supply

Single Point Ground

Separation of digital and analog grounds in mixed-signal ICs.

noise which can be present in the data bus. The buffer latch and other digital circuits should be grounded and also decoupled to the digital ground. The noise that could exist between the analog and digital ground planes can reduce the noise margin at the ADC digital interface. The clock circuit should also be grounded and decoupled to the analog ground plane, since phase noise on the clock signal produces degradation in the system SNR.

If possible (though this is not always likely), separate power supplies for analog and digital circuits should be made available. The analog power supply should be dedicated to the ADC. All DAC power pins should be decoupled to the analog ground plane, and all logic circuit power pins should be decoupled to the digital ground plane. A quiet digital power supply could also be used for an analog circuit. Clocks with low phase noise should be the main characteristic of crystal oscillators, since sampling clock jitters can modulate the input signal and raise the noise and distortion floor. The clock generator should be isolated from noisy digital circuits and grounded as well as decoupled to the analog ground plane.


C b () 5V 5V ( C b VDD ,, +

, , . . .

_1_ ~. Lp Lp VlI///ilII///II/~'/A ~" C Digital GRN

~ Buffer ,~ O ~ Analog Digital Latch Data Bus + ~ ~ ! Circuits Circuit~ 2~ -

Cp

L ] VDD / "lock Digital Ground Plane

Voltage I ~ ~ Z Reference I

Analog Ground Plane Analog Ground v

F////////J/////~/////////////////A Analog Ground

Figure 3.14 Proper grounding of a mixed-signal circuit.

Jitter in an ADC is simply the RMS value of the sample-to-sample variation at the point in time at which the input signal is sampled. The RMS time jitter produces a responding RMS voltage error, which is proportional to the slew rate of the input signal. The consequence of broadband jitter is to degrade the overall

SNR of the ADC. Jitter for an ADC is usually attributed to the sample and hold circuits. The ADC sampling clock unfortunately is a phase and amplitude modulated by external noise sources; the sources can be wideband random noise, oscillator phase noise, power line noise, or digital noise due to poor layout, bad bypassing techniques, and bad grounding methodologies. Phase jitter on the

sampling clock causes the same effect as jitter on the input sine wave.

The consequences of even small amounts of jitter can be observed in Figure

3.15, where the SNR is plotted as a function of full-scale input sine-wave

frequency for various amounts of RMS timing jitter using the formula

['] S N R = 2 0 1 o g 2 ~ f t j ' (3.3)

where tj is the jitter time.


SNR (dB)

0.1 1.0 10 100 MHz

Figure 3.15 Example of jitter in ADC and its consequences.

A reading of the figure shows, for example, that in order to obtain an SNR

of 90 dB on a 10-Mhz, full-scale input sine wave, the RMS jitter can be no more

than 1 psec RMS. The total RMS jitter consists mostly of two frequency factors: narrowband and broadband. The clock will most likely have narrowband phase noise. The narrowband phase noise centered about the sampling frequency produces similar phase noise around the fundamental sinusoid frequency in an FET of the digitized sinusoid. On the other hand, the high-speed logic circuits in the sampling clock path will introduce broadband noise on the pulse edges which by itself can cause broadband jitter due to sample variations in the time at which

the internal logic threshold was crossed. Clocks must have low phase noise. The crystal oscillator for these clocks should

be constructed around discrete bipolar and FET devices. In other applications,

additional filtering is usually needed for certain ADCs. In Figure 3.16, the

bandpass filter after the crystal oscillator serves to remove any frequency noise

around the sampling frequency. The low-pass filter removes any harmonics of

the sampling clock frequency which may not have been attenuated enough by

the bandpass filter. The output drives a low-jitter wideband comparator which

converts the sine wave into a digital signal. The clock circuits should be isolated from the noise generated by digital

portions of the system. It is important that the digital outputs of the ADC not

be allowed to couple into the sampling clock signal. Possible coupling will cause

3.3. Filtering the Switching-Mode Power Supply 117

Low Jitter Comparator

Crystal Oscillator

Bandpass Filter

I

fs

Low Pass Filter

C

I

I

fs

Figure 3.16 Bandpass/low-pass filtering needed for driving a low-jitter comparator.

an increase in the harmonic distortion due to transients coupling into the sampling

clock. Finally, the sampling clock itself, which is a digital signal, should be

isolated from both the analog and digital portions of the ADC.

3.3 Filtering the Switching-Mode Power Supply

Switching-mode power supplies are small and highly efficient power sources,

with high reliability, that are capable of operating with a wide range of input voltages. However, switching-mode power supplies produce noise over a wide band of frequencies. The noise is both conductive and radiated in nature, producing undesirable electric and magnetic fields. When such power supplies are used to drive logic circuits, more noise is usually generated on the power-supply bus. The noise consists basically of voltage spikes in the range of 10 to 300 kHz. These voltage spikes contain frequency components that would extend into the hundreds of megahertz.

Filtering switching-mode power supplies must be tackled primarily by the

power supply itself, but additional external filtering as shown in Figure 3.17

should also be added. Split-core inductors on large ferrite beads should be used

as inductors. Both C1 and C 2 must have low parasitic inductance and must be located as close to the power supply as possible to minimize current loops and

high-frequency magnetic fields.

The filter design is very important, since the power provided to analog devices

must be as clean as possible. Factors that are important are (1) characterization


Switching Mode Power Supply

l L1

ii ol 02= ,ll o3

il

�9

L2

Figure 3.17 Filtering noise out of switching-mode power supplies.

of output noise, (2) identification of the frequency range of interference produced by the power supply, and (3) evaluation of the component used in external filtering. An example of switching noise in the output of a switching mode power supply can be observed in Figure 3.18, where the fast voltage spikes can produce significant harmonics well into the megahertz range.

Because most analog ICs show degraded power-supply rejection at frequencies only above a few kilohertz, some filtering is highly desirable. An example of a block diagram for a switching-mode supply is shown in Figure 3.19. The input voltage is first filtered to remove any input noise that might be present on the power bus. The input voltage is then converted to 30 kHz on a higher square wave, which drives a transformer. The signal is then rectified and filtered at the transformer output. Pulse width regulation to control the duty cycle of the transformer drive is used in a feedback loop.

It is important to realize that noise is being generated at several stages in the switching-mode power supply. The first producer of noise occurs at the inverter stage, where fast pulse edges generate harmonics which can extend for several megahertz. Secondly, the parasitic capacitance between the primary and secondary windings of the transformer will provide a secondary path through which high- frequency noise can corrupt the DC output voltage. Finally, high-frequency noise is also generated by both rectifier stages.

We now look at some defaults concerning the capacitors and inductors used in filtering the noise from switching-mode power supplies.

3.4 Capacitor Choices for Noise Filtering

Capacitors are very useful filter components in switching-mode power supplies. There are many different types of capacitors, and their use in power supplies

3.4. Capacitor Choices for Noise Filtering 119

Switching Noise (mV)

80 mV

40 mV

5V

-40 mV

-80 mV

I_/

Time (laS ec)

80 mV

40 mV

Switching Noise (mY) 5V

-40 mV

-80 mV

I

I I

30 ~tS I

I I

Time (lasec)

Figure 3.18 Example of switching noise at the output of a switching-mode power supply.

must be well understood. There are basically three classes of capacitors useful

in filter design in the 10- to 100-kHz frequency range. They can be classified

depending on their dielectric types: electrolytic, film, and ceramic. Table 3.1 shows a classification of several capacitors.


Vin Input Filter

Inverter rransfo~

I Pulse " Width

Modulator

"ner

Figure 3.19 Block diagram of a switching-mode power supply.

Table 3.1 General Classification of Commonly Used Capacitors

Aluminum

Electrolytic Aluminum

(General Electrolytic Purpose) (Switching)

Tantalum

Electrolytic Polyester Ceramic

Size 100 txF 120 txF 100 txF 1 ~zF 0.1 IxF

Vrate d 2 25 20 400 50

ESR 0.6 ohms at 0.18 ohms at 0.12 ohms 0.11 ohms 0.12 ohms 100 kHz 100 kHz at 1 MHz at 1 MHz at 1 MHz

f(MHz) 100 kHz 500 kHz 10 MHz 10 MHz 1 GHz

Ceramic capacitors are usually the choice for a frequency above several

megahertz. These capacitors are compact in size, low-loss, and are available up

to several microfarads and with voltage ratings of up to 200 V. Multilayer ceramic

chip capacitors are very popular for bypassing and filtering at 10 MHz or more.

These capacitors have very low inductance, which is optimum for RF bypassing.

In smaller sizes, ceramic chip capacitors have an operating frequency range of

up to 1 GHz.

All capacitors have some finite equivalent series resistance (ESR). Sometime

these dielectric losses can help in the reduction of resonance peaks in filters and

provide some degree of damping. For example, in tantalum and switching-type


electronics, a broad series resonance region can be observed in an impedance vs frequency plot when Z falls to a minimum level, which is the capacitor's at that particular frequency. In most electrolytic capacitors, ESR degrades at low temperature by a factor ranging from 3 to 7 times. Figure 3.20 shows the high- frequency impedance characteristics of a number of electrolytic types.

All capacitors have parasitic elements that limit their performance. The electrical network representing a capacitor and its parasitic elements is shown in Figure 3.21. The voltage across the capacitor is proportional to its net impedance, as shown in Figure 3.21, and to temperature.

Capacitors also have parasitic inductance, which determines the frequency where the net impedance of the capacitor changes from a capacitive to inductive characteristic. In the frequency range from 10 kHz to 100 MHz, the parasitic resistance and inductance can be minimized with chip ceramic-type capacitors.

The electrolytic capacitors are of a great variety of types. They include the general-purpose aluminum electrolytic capacitors, which are polarized and cannot support any voltage in the reversed bias direction. Also included in the electrolytic family are the tantalum-type capacitors with an upper limit voltage of 100 V and upper capacitance of 500 ~F. A subset of aluminum electrolytic capacitors is the switching type, which can handle high pulse transients in frequencies of up to

100

10

z ohms, I film 10 ~tF, 20 V

1.0 -

0.1 tantalum 101.tF, 20 V

10

In 10

ceramic 10~tF, 20 V

I 1 I I 1 1 O0 1 K 1 OK 100K 1 M

Frequency (Hz)

Figure 3.20 High-impedance profile of electrolytic capacitors.

10M


100

10

1.0

_ ~ a p a c i t i v e

lOOm

70m

IZl in ohms

_ R e s i s t i v e

I I I I I I I I I 10 1K 1OK lOOK 1M IOM lOOM 1G lOG

Frequency (Hz)

! Rp, R s, Lp are the <~ Rs parasitic resitance and inductance of the capacitor

I c

Rp

P

Figure 3.21 Parasitic elements in some types of capacitors.

several hundred kilohertz. Film capacitors are available in broad ranges of values and several kinds of dielectrics. Because of their low dielectric constant, their volumetric efficiency is low. Metalized electrodes help reduce the size of film capacitors somewhat, but they are still generally larger than electrolytic capacitors. Film-type capacitors, however, have low dielectric loss, on the order of just a few milliohms. Wire-wound-type film capacitors can be inductive, which is a problem in high-frequency filtering. In general, depending on their electrical and


physical size, film capacitors can be useful at frequencies well above 10 MHz. At very high frequencies, a new type of capacitor, known as stacked-film-type,

should be used. Stacked-film-type capacitors are such that capacitor plates are cut as small overlapping linear sheet sections.

At low frequencies, the net impedance is almost capacitive. As the frequency increases, the net impedance is determined by ESR. As the frequency increases

even further, the capacitor becomes inductive.

3.4.1 F E R R I T E S A N D I N D U C T O R S

Nonconductive ceramics which are manufactured from oxides of nickel, zinc, and manganese are very useful for decoupling power supply filters. At low

frequencies (<100 kHz), ferrites are inductive, which is useful for low-pass

filters. Above 100 kHz, the ferrites become resistive. Ferrite impedance is a

function of material, operating frequency, DC bias current, number of turns

around the ferrite core, and temperature. Among the most important ferrite charac-

teristics are that they are suitable for frequencies above 25 kHz; have high

saturation current, low cost, and low DC loss; and ferrite impedance at high

frequencies is resistive, which is good for high frequencies. One of the less common uses of ferrites is to act as high-frequency filters, as

shown in Figure 3.22. This filter for ICs has an impedance of Z L, which ranges

Vcc To Other ICs

Z L, leaded ferrite bead

Vcc

IC

GRN

II

Cb

I .._1

Figure 3.22 Use of ferrites as high-frequency filters in ICs.


with frequencies. The impedance can be between 10 and 100 ohms, up to a few

megahertz. As the frequency increases to near 100 MHz, the impedance ZL could

reach over 100 ohms. The ferrite bead is best used with a local high-frequency

decoupling (or bypass) capacitor.

Another wide use of ferrite inductors is in low-pass filters to filter out noise

in switching-mode power supplies. In Figure 3.23, we observe a filter that is

suitable for use with switching-mode power supplies. This filter is a one-stage

LC low-pass filter that can be designed to cover the 1-kHz to 30-MHz frequency

range with the appropriate parts. The attenuation can be from 40 to 80 dB.

This filter uses a low DC loss input ferrite-core choke L 1. The inductance can

reach several hundreds of microhenries. Most of the filtering is done by the C1

and C2 capacitors. The resistor R 1 is a damping resistor to control any resonances.

3.5 The Use of Ferrite Cores in Switching-Mode Power Supplies

A generic boost switching-mode power supply is shown in Figure 3.24. During

on-time (i.e., when the switch S1 is in the o n state), the inductor current ramps

up from its initial values of 11 and reaches its final value of If just before the

switch $1 turns off. After the switch is off, the energy which is stored in the inductor is delivered to the rest of the power-supply circuits. The inductor current

ramps down from If. Since the converter operates in a continuous mode, the

current ramps down to a value greater than zero. The output voltage is always

Vcc L1 Vcc (out) �9 ~ �9 -2C

Output of noisy Output to -4C switching mode C1 C2 ICs (analog p o w e r supply and digital) -6C

R 1 -8C

O O -I0C

k Vcc(Out ) in dB

m

u

, I i I 1 J , ~ r

10 100 1K 10K 100K 1M

Frequency (Hz)

Figure 3.23 Suitable filter for use with switching-mode power supplies.

3.5. The Use of Ferrite Cores in Switching-Mode Power Supplies 125

0

I 1 V

0

V l L

sl II.- w

C Rest of Power Supply Circuits

J I n l L Figure 3.24 Schematic diagram of a generic switching-mode power supply.

higher than the input voltage, which allows the inductor to continuously supply

current to the rest of the power-supply circuits. In the continuous mode, the value of the ripple noise current in the inductor can be made smaller by increasing the

value of the inductance.

The use of amorphous metal alloy ferrites in the inductor is a way to meet

the operating standards for reduced harmonic currents and reduced noise ripple,

while dramatically cutting the size, cost, and weight of the inductor. In the past,

magnetic cores were adversely affected by the higher switching speeds, which

caused hysterisis and eddy-current losses within the core. Furthermore, energy losses associated with skin effects in the copper windings became a factor as the frequency of switching increased.

Two types of material that are effective in minimizing core losses (this makes

ferrite cores have a very low impedance) are manganese-zinc (MnZn) and nickel-zinc (NiZn) ferrites. NiZn is very much suitable for operations at frequencies greater than 1 MHz, because its higher volume resistivity makes it less vulnerable to eddy current losses. These eddy current losses increase in proportion

to the square of the power supply's operating frequency. MnZn ferrites offer a

higher initial permeability than the NiZn cores and will support higher flux

densities before reaching magnetic saturation. Furthermore, MnZn cores will

work over a much wider temperature range. Ferrite cores, as previously stated,

work well in high-frequency applications because they are made to minimize

core losses at higher temperature ranges.

In Figure 3.25, the difference in core loss performance vs frequency between

PC40 and PC50 MnZn ferrites made by TDK Corp. is shown [1]. The material


150 m'l'

100 mT

75 mT

50 mT

25 mT

,( . . . . . . . . , . fp . . . . . . . . . . IV . 4. v

/ V . . . . . ' ' / ' ,

. . . . . . i . . J # ' i f l

' ' ' , t ' / ' 't" I / /< i il

' I / , c /_ 1 1 . J / r ] [ i �9 i " ]I

X i / ' ~ A ~

/," , / ,[.

/ , ' ;i' , / .1 ,,,., ; j ,) , , . . , ,

f: / S , . ," / " !/ i v- i ~ r I

/ ' / ' ,, / - v / r I e I ' l 11 I

/ / I s /

/1 '~' # , , /

P I 4. i

. , " " - / F . ~ " ., , . / p I

t / ' ' I I I /

/ 1

- y - i

f

PC50 PC40

10 2 10 3 Frequency (kHz)

Typical data: temperature = 80oc Source: TDK Corp.

Figure 3.25 Comparison of core losses between two commonly used magnetic cores. (Published with permission from Electronic Design magazine.)


PC40 is used for lower losses at lower frequencies, whereas PC50 is designed

for higher frequencies. Figure 3.26 shows a graphics profile of core-loss character-

istics in a wide range of TDK Corp. materials at a specified test condition. The

figure shows that MnZn materials do better at frequencies below 1 MHz. The

KGA and K5 materials are NiZn ferrites, whereas the rest are MnZn. Finally,

Figure 3.26 also shows Philip's 3F4 ferrite-core material losses up to a frequency

of 3 MHz at 100~

1o4 [!!! I I!q~,iLil L I l i l t ! I',II I . I I I I ' I I I I I l l l i I I1~ I ~ I I I i i ]1 I I I I I I I I I l I \ I I \ l l l l l l ~ I I 11111 IIII \ 1 I 11,11111'~'1 i I I I I /

, . . . . , . . , . , , , . , . , . . . , , , . . I I I 1~ . % I I I%1 I I ] 11 ~ I I I I I J~q ' l

a.~---IiI~\'~ I I~lllll Nl l L,~ II , , ~ . , . ~ , , , , ~ , , , ~ . ~ , .

110 2 . . . . . , , , , , , ~ , , ~ , Test conditions:

l l',l i i l"cs~"":~xlo~(""z) I l i l l i i i i i i 100~

IIII I I IIIIIII N1iN21= liiiii 0"35'" 102 1 0 3 1 0 4

Frequency ( k H z ) Sou rce : TDK Corp .

; ; ; I 3 F 4 - I I I I I I11 I I I I J IIII

I I I I I I I r l I l l / r I I I I , I l l l , r / I I I I I i I1~/ / / / ' / / ]

/ II1 1 , ; : ' , : ' , , , - - : , ; J

' , ' ; ;~," f / / / / I " ' " ' I I I ,I,, i I f

l ~11 / I I I I ' /1111 I I I I I I

III1' ' " " ' " T : 100~ I I I

101 10 2 1 0 o 1 0 3 i ( m l ) Sou rce : Ph i l l i ps

Figure 3.26 Comparison of core-loss characteristics among TDK products. (Published with permission from Electronic Design magazine.)


The physical characteristics of copper winding around the core inductors also play a large role in determining the efficiency of magnetic components. The current through inductor wires produces an alternating magnetic field which can

cause eddy currents to be induced back into the surfaces of the wires. Eddy currents usually can create significant energy losses. This effect, known as the

skin effect, becomes more pronounced at higher frequencies as the effective skin depth becomes comparable to the thickness of the conductor. The effective skin depth of copper is given by

(6.62 • 10 -2) d(m) = V/f(Hz ) . (3.4)

The current distribution in the conductor diminishes exponentially with the depth

of penetration from the surface.

For the inductor current in the switching-mode power supply of Figure 3.24,

the ripple current/rip in the inductor should not exceed twice the minimum input peak current. The inductance value which guarantees this condition is the critical

inductance L c and is given by

Lc = Vmi n (1 - Vmi n / V~ (3.5) / r ip f

where L c is the critical inductance (H), Vmi n is the minimum DC input voltage (volts), Vou t is the DC output voltage (volts),/rip is the ripple current (amps), and f is the switching frequency (kHz).

Once the critical inductance L c which is needed to maintain the required tipple c u r r e n t / r i p has been calculated, the peak current that the inductor must provide without saturating itself is given by

/inductor(peak)-- ~ Iin(RMS) n t- ~ (3.6) 2 '

where

Pout,max /in(R.lVlS ) --

' /TLVmin(~S)

r/L = inductor efficiency (%)

Vmi n -- minimum DC input voltage, RMS

Pout,max -- output power (watts) maximum allowed.


The total power (PT) which needs to be dissipated for given Pout,max allowed is given by the expression

1 - r &

,T (,out max/ \ T]reg f

(3.7)

where PT is the total power dissipated for a given Pout,max, and '0reg is the preregulator efficiency. The optimum core and copper losses are given by

Pcore -- Pcopper = PT / 2. (3.8)

Based on the value of Pcore and the required temperature range of operation (Tmax), we can choose a given ferrite core from the manufacturer.

The magnetic flux (~) is usually given by the manufacturer in the form of plots like those in Figure 3.26 for 3F4. A formula reflecting the plot of Figure 3.26 is given by

Ploss(mW / cm 3) = 1.5 • 10 -6 f(kHz) 1"3 ~(mT) 2"5. (3.9)

Therefore, the magnetic flux is given by

[ Ploss(mW/cm3) ] �9 (tesla) = 1.5 • 10-6fl3(kHz)

1/2.5

(3.10)

where Ploss -- Pcore (mW)/Vcore(Cm3), and Vcore is the core volume in cubic centime- ters. The next step is to calculate the required core-area product given by

WScore(Cm4 ) __ 2E • 10 4 d p J W ' (3.11)

where ~ is the flux density in tesla, J is the current density (A/cm2), W is the 1 2 window utilization factor, and E = 5(Lc(/zH)I inductor (amps)). The number of

turns required is given by

N = Lclinduct~ 4) ci)Score(Cm2 ) , (3.12)

where Score(Cm 2) is the cross-sectional area of the core (given by the manufacturer) and L c is the conductor inductance. For a given core selection, manufacturers usually provide Score(Cm2), and WScore(Cm4). The next step is to calculate the air gap required, ~gap, using

~g 0"4~Nlinductor(10-4) ~m = ~ /zA' (3.13)


where ~m is the magnetic length of core (cm),/?g is the total air gap, and/zA is the incremental permeability at operating point on the B-H loop.

The next step is to calculate the amount of fringing flux, F. This fringing flux is calculated from the physical core cross-section dimensions a and b, as given in Figure 3.27. The fringing flux is given by

F = (a + ~g)(b + ~g). (3.14) ab

Because of the fringing flux, Score is increased by the fringing factor F. The number of turns N is increased from that previously calculated and given by

x/Lc(/?g + (~m /r /tim)) X 108 N

0.4,rr ScoreF . (3.15)

Finally, the conductor area AconO is calculated by

acon d = e(cm)c(cm)W (in cm2). (3.16) N

v I a

I

. 4

!

/

V

i

I

I

Figure 3.27 Physical core cross-section dimensions.

3.6. Shielding Cables of Op-Amp Inputs to Avoid Interference Coupling 131

3.6 Shielding Cables of Op-Amp Inputs to Avoid Interference Coupling

Interconnection of analog PCBs or analog assemblies can be a real challenge in

higher noise environments. In such cases noise picked up and ground loops can

cause some analog-susceptible circuits to be interfered with by external noise.

Such circuits must be protected using shielded cable, shielded encapsulation, or

both. A cable or wire that is M4, M2, or ,~ in length, where ,~ is the wavelength of

the signal frequency it carries, may act as an antenna picking up interference

signals from radiofrequency sources, either analog or digital. It is often necessary

to shield such wires to avoid noise pickup. Furthermore, the shielded cable must

be properly grounded. Grounding at the wrong end will introduce unwanted

ground loops. An example of shielding wires to protect a susceptible analog

circuit from interference is shown in Figure 3.28. As can be observed in Figure

3.29, a shield that is not grounded can couple electromagnetic energy to center

conductors. Floating a shield (i.e., using a shield that is not grounded) is never recom-

mended, because a floating shield can easily act as a pickup antenna for radiated

electromagnetic energy, which can capacitively couple to inner conductors. A

more detailed scenario is shown in Figure 3.30.

Two acceptable grounding configurations are the ones shown in Figure 3.31.

In the figure, the two ends of the shield are connected to an equipotential ground;

hence, all noise is directed to a ground path. However, such connection is often not possible. Long wires are not a solution, since they form wire loops which

Equipment

0 Twisted Shielded Pair ? I

Vcc

CLl Figure 3.28 Shielding of wires to protect susceptible analog circuits.


Equipment

, L . - - - -

-t-

I Vco

Vout

Incident Electromagnetic Energy

Figure 3.29 An ungrounded shield can couple considerable noise to analog circuits.

can be picked up. Therefore, it is not usually possible to find equipotential points

which can be used to ground both ends of the shield. For such cases, the grounding

configuration of Figure 3.31 minimizes the noise pickup.

Poor power-supply or signal filtering or improperly connected cables are good

conduits for interference. Conductive noise can be encountered when two or

more currents share a common impedance. This common path is often a high- impedance ground. When two circuits share this path, noise currents from one circuit will produce noise voltages in the other circuits. Properly grounded shielded cables can help divert the noise current to ground paths.

Shielding is also an important step in many approaches for diminishing noise susceptibility in analog devices. In the circuit of Figure 3.32, an amplifier is used to amplify low-level signals in the presence of high interference. The entire

circuit is enclosed in a metallic shield.

l T

f

I C L

Figure 3.30 Capacitive coupling to inner conductor from ungrounded shield.

3.6. Shielding Cables of Op-Amp Inputs to Avoid Interference Coupling 133

D

Equipment

- same groun~ - ~ ~

[ - - ~ 1

r

I Vcc

Vout

o J_

Equipment

0 Vcc

Vout

Figure 3.31 Example of properly grounded shielded cables to protect analog circuits.

Notice that in the figure, not only have we implemented shielding, but we have also attempted to filter the input to the operational amplifier. Other filter

implementations are shown in Figure 3.33, in this case with the implementation

of an RC filter (low-pass) to filter noise along the temperature sensor wires. The

filter cutoff frequency can be set lower by increasing Cf. A resistor Rf is used

in series with the temperature sensor as protection in case of contact with a

higher voltage.

So-called Faraday shields are very efficient at eliminating the interference

effects due to electric fields. These shields must be connected to ground or they

will increase, rather than attenuate, the noise coupling. Magnetic fields have a

low impedance and shields of high permittivity. Magnetic materials, such as mu-

metal, have very large impedance for magnetic fields. Magnetic fields are there-

fore much less efficient at suppressing low-frequency magnetic-field interference.


Vin-~ .L

Vinc I

FILTER

.i..

J _

shielded enclosure (Faraday shield)

I

LCL

Figure 3.32 Shielding needed for amplifying low-level input signals.

At high frequencies Faraday shields are effective at attenuating magnetic fields

and electric fields. This is due to the skin effect, which means a high-frequency

magnetic field induces eddy currents near the surface of a conductor, which

prevents the field from penetrating to any great depth. High-frequency currents in a conductor flow near the surface. If a ground conductor is much thicker than

00 Temp. Sensor

_L c~~ 15V C1 C2 10V

Ref t ~/Vk, 04

o I . _ _ 1 Vou t

I Rn , ~ ' , ~

R f RC Filter

Figure 3.33 Shielding and RC filter implementations for low-level input signals.

3.7. RFI Rectification in Analog Circuits 135

its skin depth at a particular frequency, it will behave as an effective attenuator

to magnetic and electric fields. The skin depth for copper is given by

~cm) = 6.6 / X/f(Hz). (3.17)

Finally, electromagnetic radiation can enter a shield through any hole larger

than M10, so at very high frequencies, hole sizes must be considered.

3.7 RFI Rectification in Analog Circuits

A troublesome phenomenon in analog integrated circuits is RF rectification in

operational amplifiers. Besides their capability of amplifying very small signals,

these devices can also rectify unwanted high-frequency signals. The result is DC

errors that appear at the output in addition to the sensor signal. Unwanted out-

of-band signals enter sensitive circuits through the circuit inputs. Conductors in

the circuits are able to pick up noise through capacitive, inductive coupling in

either a conductive or a radiated path. The unwanted signal is a voltage which

appears in series with the inputs.

Operational-amplifier input stages contain emitter-coupled BJT or source-

coupled FET differential pairs with resistive or current source loading. These

differential pairs can behave as high-frequency detectors. This detection process

causes spectral components at the harmonics of the interference and DC. The

DC components shift the bias level to produce errors which can lead to system

inaccuracies. In general, BJT input devices show a greater amount of output voltage shift on exposure to RFI than devices with FET inputs.

High-frequency modulation of the base emitter junction causes rectification.

In Figure 3.34, we observe the base emitter junction I -V characteristics of an

NPN BJT transistor whose collector current lc(t), as a function of the applied voltage Vj(t), is superimposed. The Fourier transform of the current output for

a high-frequency sine-wave input shows that as the device is biased closer to

the "knee" device, nonlinearities start to increase. This makes the detection

process more efficient.

The rectification analysis of an NPN transistor collector current is shown in

Figure 3.34. The analysis shows first the transistor's Ic-Vbe characteristic equation.

If a small voltage g s m a l 1 = g 0 cos Wct is applied to the device, then a Taylor

series expansion of the collector current around the operating point (Ic and Vbe)

produces three predominant spectral components. These spectral components are

the quiescent collector current I c, the linear term of the input frequency cos(2 ~rfct), and a quadratic term at the input frequency cosZ(2crfct). The linear spectral


k Ic(t) Ic

Vbe J _ J .-

,k . ~ "~ Vj (t)='

(

cf

~ time

V o Cos (2rt fc t)

l ic(t )

frequency Fourier Coefficient of I c (t) nf c 21 d I n (V o / Vs)

Figure 3.34 Normal I -V characteristics of an NPN BJT transistor�9

component is filtered, or it could be rectified by other gains within the device. The quadratic term contains the primary rectified information:

I c = I d [ e q V ] / K T - 1]. (3.18)

For a small applied voltage A V, a Taylor series expansion yields

Ic = Ic(Vbe + ZXV) (3.19)

d/ -- /c(Vbe) Jr" A V-j-Tr

a v

A V 2 d 2 I +

2! dv 2 lc

A V n d~I + . . . 4

n! dV n Ic /c

If A V = V o cos(21rfct), then

d/ Ic = /c(Vbe) + V~ c~

V~ .d 21 + -~- cos2(2~fc t)-~v2 (3.20)

The second-order rectification term is given by

V 2 de i AI c = -~-[1 + cos(4~'fc t ) ] ~ - 7

/c

(3.21)

From this equation, the original second-order term can be simplified into a frequency-dependent term AI c at twice the input frequency and DC term. The


DC term can be obtained by evaluating the second derivative of the collector current with respect to the base emitter voltage at the quiescent collector current. The final form of the rectified DC term is given by

2

,c AIc(DC) : ~T 4" (3.22)

This equation indicates that the amount of rectified collector current can be decreased by reducing either I c or the magnitude of the interference (Vo). The latter is more practical and efficient. For FETs, the analysis follows a similar approach. We also obtain an expression for the noise term AIFET(DC) which

depends in the noise amplitude V o and the drain current/ass:

_ V s] Ic FET = Idss 1 -V-pp]

AIFET -- g 2 cos(4~fc t) d21c - 4

AIcFET(DC) -- V 2 d21c 4 dVZs ic

( 0) 'ass \~pp] 2 "

ic (3.23)

_ V 2 21ds s 2

4 gp

In order to eliminate RFI rectification in operational amplifiers, low-pass filters must be used. For the inverting circuit configuration in Figure 3.35, the input resistor was split into two halves with the common point bypassed to ground by C 1. The input resistor is split into two equal values to prevent large values of C1 from appearing directly across the operational amplifier's input terminals. When the capacitance is large, it could lead to loop instability. The input-filter cutoff frequency should be not larger than 100 times the signal bandwidth so as to provide a quick response to changes in the input signal. For noninverting

amplifier configurations, the R1-C 1 combination provides an input filter that prevents noise from coupling directly into the amplifier's noninverting input.

The capacitance C 2 would limit the bandwidth and the wideband noise of an

amplifier, but does not play a direct role in preventing rectification. 1 In both cases just discussed, the filter bandwidth is given by BW = 5"n"RC1,

and R and C 1 should be chosen such that BW > [100 • signal bandwidth], 1 where the signal bandwidth is given by BW = 5,TrRfC 2. These equations for filter

design and signal bandwidth for op-amps are good scenarios as long as C~ and


C2

, II ,, Filter

F . . . . i

I R/2 I R/2

V i n O i 'VVX, ,, I ~ /XA, , ]_' I C1 I

C

Vout

R1

C2

II

4; R1

I - . . . . I R

Vi n o L , % A / ~ I ,

I I I C1 I

�9 - - - - . . . . 0

filter

Vout

O

Figure 3.35 Implemeting filtering to eliminate RFI rectification in op-amps.


C 2 have low inductances and the resistors have low parasitic reactance and are mostly metal-film resistors.

Noise can also couple into an amplifier's input stage through its output as shown in Figure 3.36, especially in low-power circuits where operational amplifier output resistance and external resistances are large.

The output resistance of operational amplifiers increases with frequency and exhibits an inductive behavior. As the output impedance increases with frequency, the high-frequency noise at the output is not attenuated and may couple to the amplifier's input, bypassing backwards through the feedback network. To prevent noise from coupling into the inputs via the feedback network, an input resistor Rin is connected between the sum node and the inverting terminal of the operational amplifier, forming a low-pass filter with the amplifier's input capacitance as shown in Figure 3.37.

Vin R1

C2 II

Vn -I-"

E-field

Vout

Figure 3.36 Noise coupling into amplifier's input.

in

-field

140

Vin R1 �9 ,~/x/x,


C2 I i

+

Rin Vout

Figure 3.37 Preventing high-frequency output noise coupling into input.

3.8 Op-Amps Driving Capacitive Loads

Transmission lines connecting op-amps provide parasitic capacitances which tend to load the op-amp. To these parasitic capacitances, we must add load capacitances, which are predominant in many wide-bandwidth situations. Capacitive loading effects should always be considered in wideband applications. PCB capacitance can increase substantially for long signal runs over ground planes in high dielectrics. For example, it is not unusual for long runs of signal to have capacitance to ground of over 100 pF (e.g., G-10 dielectric at 0.03 inches above ground has a capacitance of 22 pF/foot). Capacitive loading of op-amps can cause the settling time to be greater than desired.

One of the methods to overcome capacitive loading is to use overcompensation of the amplifier. This reduces the amplifier bandwidth so that additional load capacitance does not affect the phase margin. In general, any amplifier using external compensation can be overcompensated to reduce bandwidth, which restores more stability against capacitive loads by lowering the amplifier's unity gain frequency. Capacitive loading of an op-amp reduces phase margin and may cause instability. Another approach to reduce the instability problems is by forcing a high-gain noise, where use is made of resistive or RC pads at the amplifier input, as shown in Figure 3.38.

In this technique, an extra resistor R d is added, as shown in the figure, to work against Rf to force the noise gain of the stage to a level higher than the signal gain (assume unity). If we assume that C 2 in Figure 3.37 is such that it produces a

3.8. Op-Amps Driving Capacitive Loads

Vin 0 , ' ~

Rd=R f / 10 RL ~CL

Figure 3.38 Improving the stability of capacitively loaded op-amps.

141

Vout

O

parasitic pole near the amplifier's natural crossover, this loading combination

could lead to oscillation due to the excessive phase lag. However, connecting Ro

to a higher amplifier noise gain produces a new 1/,8 open-loop rolloff intersection

nearly a decade lower in frequency. This is set low enough that the extra phase

lag from CL is no longer a problem and amplifier stability is restored. A disadvan-

tage of this method is that the DC offset and input noise of the amplifier will

increase. An optional series capacitance Cd can be added to R d, and the noise is ~RdC d. Another approach for capacitive load compen- only confined to a region

sation is shown in Figure 3.39. It is a simple isolation technique, with the use

of an out-of-loop resistor R t to isolate the capacitive load. This method can be applied to any amplifier, with the small disadvantage that there is a reduction in

the amplifier bandwidth as R t and C L work to reduce the bandwidth. In high-speed amplifiers and applications where the lowest setting time is

critical, even small values in the load capacitance can be unfavorable for the

frequency response, as in the case of driving analog-to-digital converter inputs.

High-speed ADC inputs are usually capacitive in nature. The amplifier must be

capable of driving the capacitance, but it must also keep the bandwidth and

settling-time characteristics. In applications requiring the drive of high imped-

ances, as in ADCs, we do not have the convenient back termination resistor to

dampen the effects of capacitive loading. At high frequencies, an amplifier

output impedance is rising with frequency and acts like an inductance, which in

combination with CL causes oscillation. In general a small damping resistor R t

142 3. Noise Issues in High.Performance Mixed-Signal ICs

Rb -Vcc

Rin

Vin 0

Rt

1 CL-]- RL

Figure 3.39 Isolation technique in capacitively loaded compensation.

which is placed in series with C L will help restore response. The recommended

value of R t will optimize response, but C L will also degrade the maximum

bandwidth and settling performance. In the limit RtC L, the time constant will

dominate the response. In any given application, the value for R t should be taken

as a starting point in an optimization process. The example shown in Figure 3.40

provides feedback correction for the DC and low-frequency gain error associated with R t. Active compensation can only be used with voltage-feedback amplifiers.

Cf

I1 Rin

V~n O

Rf

R t Vout j_o

R k ~

Figure 3.40 Feedback correction for the DC and low-frequency gain error.

3.9. Load Capacitance from Cabling 143

In this current, there is the DC feedback from the output side of the isolation

resistor R t correcting for errors. The AC feedback is returned via Cf which

b y p a s s e s R t [ef at high frequencies. With an approximate value of Cf the stage

can be adjusted for a well-damped transient response. We still would have a

bandwidth reduction and slew-rate reduction. However, the DC errors can be

very low. There will always be a need to tone Cf and CL even if this is done

well initially; any change to CL will alter the response away from the flat response.

3.9 Load Capacitance from Cabling

Transmission lines are widely used in wideband operational amplifiers such as

the one shown in Figure 3.41. In the figure, an operational amplifier driver uses

at its output a matched resistive impedance (R t = 93 ohms) to the transmission

line connecting the driver and receiver. In the figure the line is a 93-ohm coax

line. However, twisted pairs or stripline configurations (e.g., in a PCB) could

have also been used. The differential receiver terminates the line also with a

resistive impedance of 93 ohms. The receiver stage recovers a noise-free 1-V

signal which is referenced to system ground.

In this configuration there is only resistive loading to drive the amplifiers at

the source, which provides amplifier stability and minimizes distortion, line

reflection, and other time-domain aberrations. There is a 6-dB loss associated

with the line source and load terminations, but this can be easily made up by a

2• driver stage gain. The most effective way to drive a long line is to use a

transmission line, which has been standard for video signal for many years. A

transmission line which is correctly terminated with pure resistances does not look

capacitive, but instead a controlled capacitance and inductance exist, providing a

Single- Ended Driver Differential Receiver

Vin,, I~Rt-93ohms. ( ) ~ 93ohmsCoax

Rt

Ground A I ' \ L . . . . . I

Vout

Figure 3.41 Properly matching transmission lines to op-amps.

Volts

characteristic impedance of Z o = 1/N/-~. Correctly terminated transmission lines have impedances equal to their characteristic impedance. Unterminated transmission lines (on either the driver or the receiver side) behave approximately as lumped capacitances at frequencies

fc < < 1/tp, where tp is the propagation delay of cable as shown in Figure 3.42.

1.0

Volts

I I

Properly Terminated Line

time (n sec)

1.0

Unterminated Line

I


time (nsec) Figure 3.42 Example of correctly and incorrectly terminated transmission lines.

3.10. Intermodulation Distortion 145

Single- Ended Driver

Uncontrolled Impedance Cable Vin ~ I

_J_

Ground A '~

Differential Receiver (l) , , ,

\ Ground B /

Vout

Volts

1.0

Time (nsec)

Figure 3.43 Bad design with an uncontrolled impedance and resulting ringing.

From Figure 3.42 it can be observed that the preferred method for minimizing

reflections (seen as "glitches" in the figure) is to use both source and load terminations and to try to minimize any other possible reactance associated with the load. Finally, consider the very bad scenario of Figure 3.43 with cable of uncontrolled impedance and with a large capacitance (Cg). The figure shows the output of the driver. Notice the constant ringing on the pulse waveform due to the capacitive loading. This show the importance of using controlled impedance cables which are properly terminated, especially for high-frequency signals.

3.10 Intermodulation Distortion

Intermodulation distortion occurs at frequencies that are the sum and/or difference of integer multiples of the fundamental frequencies. If a nonlinear amplifier is

driving two signals at frequencies fl and f2, the nonlinearity would give rise to

additional output components at f2 + fl and f2 - fl known as the second-order intermodulation products. These second-order products will mix with the original


signals to produce third-order intermodulation products of frequencies 2fl + f2, 2fl - f2, 2f2 - fl. Third-order products are a major problem in radio reception because they fall close to the signals causing them. (See Figure 3.44.)

The intermodulation distortion performance of wideband DC-coupled amplifiers is an important aspect of design using operational amplifiers, especially in the field of satellite communications where the usable bandwidth for each transponder is limited and multiple signals are frequency multiplexed onto one carrier.

In intermodulation distortion, the output contains not only the fundamental frequency, but, as previously stated, multiples of it. Intermodulation distortion results from mixing of two or more signals of different frequencies. The spurious output occurs at the sum and/or difference of integer multiples of the input frequencies. The nonideal characteristics of an operational amplifier can be described using power series expansion

V o u t - - A 0 + A 1 Vin + A 2 V2n n t- A 3 Vi 3 n t- . . . . (3.24)

A one-tone input signal Vin = V 0 sin o)t produces harmonic distortion. A two- tone input signal produces harmonic distortion and intermodulation distortion:

Vin -- V 1 s i n tOlt -t- V 2 sin wet. (3.25)

k Amplitude

f2

2fl "f2 2f2.f1 f2-fl jk f2+fl 2fl +f2 2f2+f1

Frequency Figure 3.44 Second-order and third-order intermodulation distortion.

3.10. Intermodulation Distortion 147

If we combine Equations (3.24) and (3.25), we get

Vou t - - Ao + A1 (V1 sin tOlt + V 2 sin to2t ) 4- A 2 (V 1 sin tOlt + V 2 sin to2t) 2 (3.26)

+ A 3 (V 1 sin tOlt + V 2 sin Wzt) 3 + . . . .

The term A o represents the DC offset of the amplifier. The second term is the

fundamental signal. The other terms represent the distortion of the amplifier. The

second intermodulation distortion can be found by analyzing the third term of

Equation (3.26):

Az(V 2 sin 2 COlt + V 2 sin 2 tOzt + Z V1V 2 sin wit ). (3.27)

The first and second terms of this expression represent DC offset and second-

order harmonics. The third term is the second-order intermodulation distortion.

The above can also be repeated for the fourth term of Equation (3.26) to obtain

third-order effects:

A3(V 3 sin 3 tolt + V 3 sin 3 tOzt + 3V 2 g 2 sin 2 tOzt + 3V1V2 sin 2 mat + sin to2t ).

Again using trigonometric manipulations, we obtain

(3.28)

The first term of this expression shows the amplitude offset at the fundamental

frequencies. The second term shows the third-order harmonics. The third and

fourth terms represent third-order intermodulation distortion.

As observed, intermodulation distortion occurs at frequencies that are the sum

and difference of integer multiples of the fundamental frequencies. If the input

signal has two fundamental frequencies ~o 1 and w 2 (or f l / f2) , distortion products

will occur at frequencies af~ +_ bf2, where a and b = 0, 1, 2, 3 . . . . . Intermodulation

distortion terms of order a + b occur when either a or b is not equal to zero.

Second-order intermodulation frequencies are

f , - f 2 f~ +f2.

sin + sin + sin + 2V Vl sin

+ (V31 sin 3wit + V32 sin 3tOzt ) + (sin(2tOlt - tOzt) (3.29)

~si n(2~olt + ~Ozt)) + ( s in(2a)z t - o)lt ) ~(sin(2o)2t + o)10).


Third-order intermodulation frequencies are

2fl + f2 2fl -- f2 2f2 + f, 2f2 - k .

Most intermodulation products can be filtered out. However, if the two signal

frequencies are similar, the third-order intermodulation distortion

(2fl - f 2 , 2f2 - f l )

will be very close to the fundamental frequencies and cannot be easily filtered.

Third-order intermodulation distortion is of most concern in narrow-bandwidth

applications. Second-order intermodulation distortion is of greater concern in

broad-bandwidth applications.

The relationship of the amplitudes of the intermodulation distortion tones to the

amplitude of the fundamental tones depends on the order of the intermodulation

distortions.

Amplitude of third-order 3A3 V 2 V2

intermodulation distortion tone = 2

Amplitude (dB) of third-order intermodulation distortion of tones = Constant + 2V1 + V2,

where V1 and V 2 are expressed in decibels. This equation shows that if the two inputs are changed by 1 dB, the third-order intermodulation distortion amplitude will change by 3 dB. The desired output of the amplifier and any intermodu-

lation distortion can be represented by two straight lines of different slopes

(Figure 3.45). The desired output line has a slope o f 1. The intermodulation distortion has a slope of n, where n is the order of the intermodulation distortion.

3.10.1 INTERMODULATION DISTORTION IN MODULATORS

The output of a modulator is the instantaneous product of a signal input and the

carrier input, as shown in Figure 3.46. The most obvious application of a modula-

tor is as a mixer or frequency translator, as shown in Figure 3.47.

3.11 Phase-Locked Loops

Phase-locked loops have been in great demand over the past 10 years, because

of the demand for higher performance and lower cost in electronic systems and

the advances in integrated-circuit technology in terms of speed and complexity.

3.11. Phase-Locked Loops 149

Output (dBm)

~L IrTA2'/2"AI

6 0 - intercept point

40 - ideal fundamental ~ / . slope - 1 - ~ ~ 3rd order intermodulation

20 rtion (slope=3)

0

-20 ~" l i i i V I I I I I I I ,.

-20 -10 0 10 20 30 40 50 60 70 80 90 Input Power(dBm)

Figure 3.45 Output slope lines for intermodulation distortion, second- and third-order.

Signal ~ Output Input ' ~-~ '" r

I n p u t

C a r r i e r

Figure 3.46 Simple modulator output.

Phase-locked systems exhibit nonlinear behavior during part of their operation which requires time-domain analysis in almost all applications. At the steady state and during small and slow transients, it is very helpful to study the response in the frequency domain as well. Most of the signals encountered in PLLs are either

periodic, S ( t ) A cos Wct, or phase modulated, S( t ) = A cos (Wct + ~t)) . The total

phase of this signal is defined as ~bc(t) = Wct + ~bn(t), and the total frequency as

f~c(t) = d~b c/dt = w c + d / d t (~bn(t)). Phase-locked loops usually operate on the

excess component of ~b c and 12c(t), that is, ~bn(t) and d[q~n(t)]/dt, respectively. A modulator can be modeled as an amplifier whose gain is switched positive

and negative by the output comparator on its carrier input or as multiplier (see

Figure 3.47) with a high-gain limiting amplifier between the carrier input and

one of its ports. Most high-speed integrated circuit modulators are made up of

a Gilgert cell multiplier with a limiting amplifier in the carrier path.

150

Vin R1 0


C2 I

Rin

Figure 3.47 Representation of modulator as amplifier.

Vout

If two periodic waveforms A s cos(tost) and Ac cos(wct) are applied to the inputs of a multiplier, then the output will become

AsAc[cOS(Ws + Wc)t + cos(w s - Wct)]. (3.30)

In this expression the original frequencies are not present by themselves, but

instead in the form of sums and differences. In this we have made the assumption that the modulator is perfectly balanced. This sum and difference of mixers is the ideal behavior of modulators. If we use a linear multiplier as a modulator, we can observe that any noise or modulation on the carder input appears in the output signal. If we replace a simple multiplier with a modulator, any amplitude variation on the carrier input disappears. If a signal carrier A c cos(tOct) is shopped in a limiting amplifier, the square-wave output has the Fourier series representation

[ 1 1 1 ] A cos Wct - ~ cos(3o&t) + ~ cos(5o&t) - ff cos(7~Oct) + . . . . (3.31)

when A = 4/~. Therefore, if a modulator is driven by a signal A s cos(wst) and a carrier cos(~Oct), the output will be the product of the signal and the squared carrier, giving

[ 1 2As~ cos(o) s + ~ ) t + cos(o)~ - . %)t - ~ { cos(oJ~ + 3 %)t + cos(o)s - 3%)t}

1 1 ] + ~{cos(~o s + 5%)t + cos(w s - 5o)~)t} - ~ {cos(~o~ + 7~o~)t + cos(~o s - 7We)} ] .

The output contains sum and difference frequencies of the signal and carrier and

each of the added harmonics of the carrier. In most cases the difference between

3.12. Voltage-Controlled Oscillators

A

(0

0X3

Figure 3.48 Noise spectrum representation.

151

consecutive periods of the waveform is small and the signal deviates only slightly from its periodic behavior (almost periodic), though small phase deviations accumulate after every period. If in the original equation,

S(t) = A cos[wct + ~bn(t)], (3.32)

I~bn] < < 1, then the equation can be expressed as

S(t) ~- A cos Wct + A~bn(t)sin Wct. (3.33)

The resulting noise spectrum is given by Figure 3.48. Cycle-to-cycle jitter is the difference between every two connective periods

of an almost periodic waveform. Absolute ' f i t t e r " is the phase difference between the same waveform and a periodic signal having the same average frequency. Phase noise is the frequency counterpart of jitter. Phase noise arises from random frequency components as shown in Figure 3.48. In order to quantify phase noise, we consider a unit bandwidth at a frequency offset Aw with respect to w c, calculate the total noise power in this bandwidth, and divide the result by the power of

the carrier. Phase noise is expressed in dB/Hz.

3.12 Voltage-Controlled Oscillators

An ideal voltage-controlled oscillator (VCO) generates a periodic output whose

frequency is a linear function of a control voltage Vct,

O)ou t - - (.Off-k- g v c o V c t , (3.34)


where tofr is the free running frequency and Kvco is the gain of the VCO (rad/ sec/V). Since phase is the time integral of frequency, the output of a sinusoidal

VCO is expressed as

g(t) = A cos tOfr t -t- g v c O Vct dt . (3.35) tx~

If

then

Vct(t ) = V m cos tOm t,

y ( t ) = A cos(tOfrt + KVC~ m sin tOmt). (3.36) tOm

The term Kvc o/tO m is called the modulation index and decreases as the modulating frequency tOm increases. The VCO has a natural tendency to reject high-frequency

components applied at its input.

A fundamental oscillator circuit is shown in Figure 3.49 as the combination of an amplifier with gain A(jtO) and a frequency-dependent feedback loop H(jtO)

= flA. The general expression is

V o _ A( j to ) (3.37) Vin (1 - f lA(to)) '

which means that the system will oscillate if f lA( j to) = 1. At the frequency of oscillation, the total phase shift around the loop must be 360 ~ and the magnitude of the open loop must be unity. The common emitter circuit provides a 180 ~ phase shift. If the circuit is used with feedback from the collector to base, the

Vin

Figure 3.49 Fundamental oscillator circuit.

3.12. Voltage-Controlled Oscillators 153

feedback circuit must provide an additional 180 ~ phase shift. If a common base

circuit is used, there is no phase shift between the emitter and collector signals;

the feedback circuit must provide either a 0 ~ or a full 360 ~ phase shift.

Another model of an oscillator circuit is that shown in Figure 3.50, where the analysis is performed in terms of negative resistive concept. In this model, when

a tuned circuit is excited, it will oscillate continuously if no resistive element is

present to dissipate the energy. It is the function of the amplifier to generate the

negative resistance or maintain the oscillation by supplying an amount of energy

equal to that dissipated. A bipolar transistor with capacitances between the base and emitter and be-

tween the emitter and ground can be used to generate a negative resistance as

shown in Figure 3.51.

An inductor resonator is used also in the parallel resonant oscillator circuit.

The resonator operates at a point where it resonates with the load capacitance.

A more formal oscillator circuit is that shown in Figure 3.52. The input impedance

to the fight of the dotted line is given by

V - I + I + gmVbe (3.38) j t o C 1 jooC 2 '

where Vbe = I / j w C 1. In

V 1 1 gm I j(oC 1 jo)C 2 (.o2C1 C2

k

[q

Figure 3.50 Optional model for oscillator circuit.


L! I l /

C1 _.L L C1

C2 C3 T C2

Type 1 Type 2 Figure 3.51 Transistor models of oscillators.

the term (gm[to2C1C2) is negative, indicating a negative resistance component,

and therefore in order to maintain oscillation we must have

R < gm to2C1C 2, (3.39)

~7 R1 R2 R4

RFC

RFC

L C1__

C3 C 2 i

IC1

IC2 gm I Vb e I T,.

Figure 3.52 Other models of oscillator circuits.

3.12. Voltage-Controlled Oscillators 155

where R is the series resistance of the resonator. The frequency of the oscillation is given by

(~L) = • + • + Z. C1 C2 C3 (3.40)

The ratio of C1/C2 is greater than 1 so that the circuit has sufficient loop gain for startup. A voltage control oscillator is obtained by replacing C3 with a varactor. A bipolar transistor with an inductive reactance between the base and the ground can also generate resistance, which is useful for high frequencies (Figure 3.53).

There are two kinds of varactors, abrupt and hyperabrupt. The abrupt tuning diodes provide a high Q and can operate over a wide tuning voltage range (0 to 60 V). These diodes provide the best phase noise performance because of their high Q. The hyperabrupt tuning diodes provide a more linear tuning characteristic. These diodes are the best choice for wideband VCO. Their disadvantage is that they have a much lower Q and therefore provide a phase noise characteristic higher than that provided by abrupt diodes.

50 ohms

C2 C3 Vcc I I R 3

V c c O , , ~ '

L2

R2 C1 R1

Figure 3.53 Oscillator useful at high frequencies.


For a varactor diode, the capacitance is related to the bias voltage by

A C = (3.41)

(vR + ~)"'

where A is a constant, VR is the applied reverse bias voltage, and �9 is the built-

in potential (0.7 V for Si diodes, 1.2 V for GaAs diodes). The tank circuit of a

typical VCO has a parallel tuned circuit of inductance L, fixed capacitance Cf,

and varactor diode. The frequency of oscillation is given by

1 E

0)2 -- L(Cf + AV -n)

where A is the capacitance of the diode when V is 1 V, and n is a number between

0.3 and 0.6. Let 0)0 be the angular frequency of the unmodulated carrier and V0

and Co be the corresponding values of V and C. Then we have

1 L = . (3.42)

o'2(G + G)

If V o is modulated by a small 8V, the carrier will be deviated by a small frequency

80):

(090 + 60)) -2 -- L ( C f Jr- A ( V o + 8V)-").

The oscillator tuning sensitivity K can be written as

do) -nw~ C~ ) (rad/sec/V). K - dV 2V o Cf + C O

(3.43)

3.13 VCO Phase Noise

Frequency stability is a measure of the degree to which a given oscillator maintains

the same frequency over a period of time. In the expression

V(t) = Vo(1 + A(t))sin(0)ct + O(t)), (3.44)

the terms A(t) and 0(t) represent the amplitude and phase fluctuations of the

signal, respectively. The phase term can be observed in Figure 3.54, together

with spurious fluctuations. The source of phase noise in an oscillator is thermal and flicker noise. The

phase noise of an oscillator is best described in the frequency domain, where

the spectral density is characterized by measuring the noise sidebands on either

3.13. VCO Phase Noise

. • ^ random phase fluctuations

rious signal

~ f

Figure 3.54 VCO phase term with spurious fluctuations.

157

side of the output center frequency. Single-sideband phase noise is specified in dB/Hz at a given frequency offset from the carrier. The frequency domain information about phase or frequency is contained in the power spectral density S(f). Here f refers to the modulation frequency or offset frequency associated with phase noise 0(t).

The RMS phase modulation A0 and RMS peak frequency modulation Af are related by

AORM s = (A/RMS~). (3.45) f

The one-sided spectral distribution of the phase fluctuations per hertz of bandwidth (Figure 3.55) is given by

S(f) (A 0RMS)2 = - - . (3.46) BW

The phase noise generated by a VCO is dependent on the resonator, the Q of the varactor diode, the active device used for the oscillator transistor, the power- supply noise, and the external tuning voltage-supply noise.

The noise dependence can be minimized by minimizing noise in the power supply, which means that the primary contributor is the overall Q of the circuit. In a VCO with a high Q, the tuning bandwidth must be small.


A02RMS Random Phase Fluctuations

~ Discrete Spurious Signal _ I

0 Hz f

Figure 3.55 One-sided spectral domain of phase fluctuations.

The following are recommended guidelines for obtaining minimum noise in VCO:

1. The power supply Vcc and tuning voltage V must be connected to the PCB ground plane. The VCO ground plane must be the same ground as the PCB ground, which means all VCO ground pins must be soldered directly to the PCB ground plane.

2. RF grounding is also needed. A generous number of decoupling capacitors must be provided between Vcc and the ground.

3. A low-noise power supply and DC-DC converters must be used.

4. Output must be correctly terminated with a good load impedance. A resistive pad should be used between the VCO and the extemal load.

5. Connections to the tuning port must be as short as possible and must be shielded and decoupled to prevent the VCO from being modulated by external noise. A low-noise power supply must be used for tuning voltage.

It is always best to provide RF bypassing of power and DC control lines to the VCO, especially when the VCO is located farther away from the power supply. The use of RF chokes is also necessary, as well as good bypassing capacitors in the 0.1-~F to 100-pF range for DC supply lines. Improved bypassing can be provided by also using some power-line filtering. (See Figure 3.56.)

3.14. Phase Detectors 159

Vcc

/ R2 I ~ C1

R3 /

Tuning---~ vco 5;

Output Figure 3.56 RF bypassing of VCO.

Cb

To improve the phase noise performance of the VCO under external load conditions, one or more of these steps should be followed: (1) use a low ESR electrolytic capacitor of about 10/xF on the Vcc line; (2) to enhance the decoupling of goc, use a choke of about 10/xH in series with the Vcc line; and (3) provide active bypassing as shown in Figure 3.56.

3.14 Phase Detectors

An ideal phase detector produces an output signal whose DC value is linearly proportional to the difference between the phases of two periodic inputs,

gout = gpd ~q~, (3.47)

where gpd is the gain of the phase detector (V/rad) and A~b is the input phase difference.


I I I I f l (t)

f2 (t)

t

Phase Detector

Vout

EnUL LFL _

Figure 3.57 Phase detector illustration.

y

The phase detector (Figure 3.57) generates an output pulse whose width is

equal to the time difference between consecutive zero crossings of the two inputs

fl(t) and f2(t). The two frequencies cause the phase difference to be a beat behavior. A commonly used phase detector is a multiplier. For two signals Xl(t)

-- A 1 c o s 0)1 t and X2(t ) -- A 2 c o s (tot + A~b), an amplifier generates

y(t) = ce A 1 cos 0)1 t A 2 cos(0)zt + A~b)

= teA1 A2 c o s [ ( 0 ) 1 + 0)2)t + AqS] -~ aA1A2 c o s [ ( 0 ) 1 - 0 ) 2 ) t - A~b] 2 2 '

(3.48)

where ce is a proportionality constant. Thus, for 0)1 - - 0)2, the phase voltage characteristic is

y(t) ce A1A2 = ~ cos A~b, (3.49) 2

which is equal to Equation (3.47) if

Kpd -- -- ceA1A 2

The average output is zero if 0)1 ~ 0)2.

3.15 Basic Topology of a Phase-Locked Loop

A phase-locked loop is a feedback system that operates on the excess phase of

nominally periodic signals. A simple PLL is shown in Figure 3.58, consisting

of a phase detector, a low-pass filter, and a voltage control oscillator. The phase

detector serves as an error amplifier in the feedback loop, minimizing the phase

f(t)

3 . 1 5 . B a s i c T o p o l o g y o f a P h a s e - L o c k e d L o o p 1 6 1

Phase Detector

Low Pass Filter

VCO Y(t)

Figure 3.58 Basic block diagram of a phase-locked loop.

difference, A~b, between y(t) and f(t). The loop is considered locked if A~b is constant with time, which means that the input and output frequencies are the

same. When we have a locked condition, all the signals in the loop have reached a

steady state, and the phase-locked loop operates as follows. The phase detector produces an output whose DC value is proportional to A~b. The low-pass filter suppresses high-frequency components in the phase detector output, allowing the DC value to control the VCO frequency. The VCO then oscillates at a frequency equal to the input frequency and a phase difference equal to A~b. A

qualitative description is shown in Figure 3.59. The DC voltage at the output of the low-pass filter sustains the VCO oscillation

at the required frequency. If the input frequency (Oin of f(t) were to change to Wfina 1, f(t) would phase faster than y(t), and the phase detector would generate increasingly wider pulses. Each of these pulses creates an increasingly higher DC voltage at the output of the low-pass filter, which eventually causes the VCO

f(t)_~~ ~

I I

m

~ A~ ,

t

t

, I I I I 1 L

Phase Detector t

Low Pass dc voltage=Kpd A~ Filter Output

�9 ".-- t

Figure 3.59 Description of a phase-locked loop.


frequency to increase. As the difference between O/in and tofinal diminishes, the width of the phase comparison pulses decreases, eventually returning to the slightly greater value.

A linear model of the phase-locked loop is shown in Figure 3.60. This model provides an overall transfer function for the phase (~)out(S)l(I)in(S); hence, the phase detector is represented by a subtractor. Thelow-pass filter has a transfer function of Hf (s). The open-loop transfer function of the PLL is then given by

Kvco Hout(S ) = gpd g f (S) ~ , ( 3 .50 )

S

and the closed-loop transfer function is given by

g(s) --" Kpd Kvc~ Hp(s) s +/(pdKvco/- / f(s)"

The simplest low-pass filter is given by

(3.51)

Hf(s) - -~_ m S

@

(3.52)

where to f = 1/RC,

and for this simple low-pass filter case,

2 ton

2' H(s) s2 + 2PtonS + ton (3.53)

where

ton = X/Ktof, P = 2 v K'

where p is the damping factor, to n is the natural frequency of the system, and

/ ( =/(pdKvco.

'~in

I �9 in =r in - r out

Hf (s) �9 out

Figure 3.60 Linear model of a phase-locked loop.

Kvc o / s v

3.15. Basic Topology of a Phase-Locked Loop 163

Other types of loop filter Hf (s) may take the form of a lag/lead network, an integrator combined with a lead network, or an integrator with a lead/lag network. These forms, together with their transfer functions and body plots, are given in

Table 3.2. The filter used in the first row of Table 3.2 allows the use of an independent

choice of K and wf by adding a zero to the transfer function, modifying such

transfer functions to obtain

H(s) = , (3.54)

S 2 n t- O) 1 -~- 1 s + Kw 1

Table 3.2 Different Types of Implementations of H(f) Loop Filters in PLLs

Element Type Transfer Transfer Body Plots

function Hf(s) Constants

R1

' ~ '~ '1C 1

Lag/lead 1 + st 2 t l = C1 (R1 + R2)

1 + st~ t 2 = C 1 R 2

/12 C1 Integrator and 1 + s t 2 t I = C 1 R 1

& ~ ~ lead st1 t2 C,R2 Vin Vout

c 2

Vin Vout

Integrator and 1 1 + s t 2 t~ = C~R~

lead/lag st 1 1 + s t 3 t 2 = R 2 ( C 1 + C2)

I Integrator and 1 1 + s t 2 t I = C 1 R 1

cl lead lag sC~ 1 + st3 t2 = R2 (C! + C 2) /

R2 ~ C2 t 3 = CzR 2 f 1

Gain

Phase

~ n

Gain

\

/ Phase

~ Gain

J ase


where

o9 2 -- I[R2C, 0.) 1 - I /C(R 1 § R2), and

subject to the constraint to 2 > O) 1.

P = " 2 ~/ K \ ~ 2

3.15.1 L O C K A C Q U I S I T I O N

Let us consider the PLL shown in Figure 3.61, where Win = Wrf + Aw and

O)ou t = tOfr The term Wfr is the free running frequency of the VCO, and A to is

a relatively large input frequency step. The loop is initially locked at Wou t = Wfr,

and then experiences the sudden frequency change. The VCO control voltage Vc

varies at a rate equal to Ato, thereby modulating the output frequency.

out = a cos [ fr/ + vcoSacos t' t] I vco ] = A cos tOfrt + - ~ A sin(Awt) (3.55)

Kvco A cos tOfrt § ~ A sin(wfr t)sin(Awt ),

where we have assumed that K v c o A / A w < < 1. The output of the VCO exhibits sidebands at (.Ofr --I- m(.o in addition to the main component of tOfr (Figure 3.62).

When the phase detector multiplies the sideband (.Ofr § A(.O by Win, a DC component appears at position 1, which adjusts the VCO frequency toward lock.

m in = ~ fr + A m

LPF VCO v

o) out

Figure 3.61 Linear model of PLL for lock acquisition illustration.


I o

I'

r ' l

II II 03 fr - Ao3 co fr co fr + Ao3

0 Am 2Am

. . J

Figure 3.62 Normal VCO outputs.

Phase-locked loops are often used in cases where the output frequency is a

multiple of the input frequency. This is known as PLL amplification. In order

to amplify the input, the output signal is divided before it is fed back. Because

the output quantity of interest in a PLL is the frequency, a frequency divider

must be inserted in the feedback loop. When the loop is locked, Wfeedback = O)in

and Won t = Mmin (Figure 3.63). The damping factor p and natural frequency w n are given by

P = 2 (3.56) 1 K~V~---" Wn= ~ (.Of

3.15.2 N O I S E I N P H A S E - L O C K E D L O O P S

Because phase-locked loops operate on the phase of signals, they are susceptible

to phase noise and jitter. We examine two important cases of noise in PLL: when

the signal contains noise, and when the VCO introduces noise.

f ( t ) = A sin(wct + ~in (t)) (3.57a)

g(t) = B sin(wct + (J~out). (3.57b)


Phase Detector

(o in = o) f r + Ao~

LPF

feedback 1/M

VCO T

o) out

Figure 3.63 Phase-locked loop in locked configuration.

As previously outlined, the transfer function (Figure 3.64) is given by

2 (.O n

H(s) s 2 + 2 P WnS 4- (O2"n (3.58)

If ~bin(t) is varied slowly such that the denominator of the transfer function is 2 H(s) remains close to unity, showing that the output phase still close to w n,

follows the input phase, which is the natural PLL definition as a tracking system.

If ~bin(t) varies at an increasingly higher rate, the transfer function equation shows

that the output excess phase ~bout(t ) drops, eventually approaching zero and providing g(t) = B sin w c t. In fast variations of the input excess phase, the PLL fails to track the input. The input phase noise spectrum of a PLL is dependent

on the characteristic low-pass transfer function when it appears at the output.

O,n LPF VCO

out

Figure 3.64 Linear model for transfer function calculation.


3.15.3 PHASE NOISE IN VCOs

The phase noise in the VCO can be modeled as an additive term ~bnvco, as

shown in Figure 3.65. We are assuming ~bin and ~bnvco are uncorrelated. We set

~bin(t) = 0, which means the excess phase noise of the input is zero: 2

q~out(S) _ (.O n - (3.59) 2" ~bnvco(S) s 2 + 2 p WnS + W n

This transfer function has the same poles as before, but it contains two zeros at

Wzl = 0 and Wz2 = - w f, characteristics of a high-pass filter. The zero at the

origin means that for slow variations in ~bnvco, ~bout is small. The rationale is

that in lock, the phase variations in the VCO are converted to voltage by the

phase detector and applied to the control input of the VCO to accumulate phase

in the opposite directions. Because the VCO voltage phase conversion has nearly

infinite gain, for slowly varying V c, the negative feedback suppresses variations

in the output phase.

Let us now assume that we experience a rate increase in ~bnvco. Then, the

magnitude of Kvc 0 /s and the loop gain decrease, allowing the virtual ground to

experience significant variations. As the rate of ~bin approaches wf, the loop gain

is reduced by the low-pass filter. As s ~ co, q~out ~ Q~nVCO, which is to be

expected because the feedback loop is essentially open for very fast changes in

~bnvco. If we apply a small step to the power supply and find the time required

for the input-output phase difference to settle within a certain error band, since

such a step affects mainly the VCO output, we can use Equation (3.59) to predict

the circuit's behavior. For a phase step of height, the output assumes the form

p q~out(t) = 05l cos X//1 -- p2 Wnt + V' I - p2

O,n LPF

sin N/1 - p2 Wnt] e-POint.

VCO

nvco 1 1t) out

Figure 3.65 Adding phase noise to the VCO linear model.


This means that the output initially jumps to r and subsequently decays to zero with a time constant (pWn)-1. It is therefore desirable to maximize pw n for fast

recovery of the PLL. We can conclude that to minimize the VCO phase noise

contribution, the loop bandwidth must be maximized. Unfortunately, this may

conflict with the case where the PLL input contains noise. In cases where the

input has negligible noise, the loop bandwidth should be maximized to reduce

both the VCO phase noise and the lock time. Other noise sources can be considered

as shown in Figure 3.66.

In the figure, a frequency synthesizer and a divider provide the input to the

PLL. The noise sources in the figure are the phase detector noise t~pd,n, frequency

divider noise ~boq,n, low-pass filter noise ~bf, n, voltage-controlled oscillator noise

~VCO,n, and feedback loop divider noise ~bdi,n. An IF filter is also used in the feedback loop to limit even more possible noise that could have been generated

by the VCO.

3.15.4 LOW-PASS FILTER NOISE

If the low-pass filter is a passive one (i.e., a simple RC lag or lag/lead network),

there are two major sources of noise: First, basically some types of capacitors

and carbon resistors can generate a substantial amount of 1/f noise. As a result,

the low-noise design would require the individual selection of low-noise capaci-

fr Synthesizer

$ dq,n $ pd,n $ f,n

~._rn ~ ~ (~~~,,~~ Divider by t f,] =fr / Q LPF

~rn/Q ,~

di,n Divider by N

~ vco, n ~ I

IF Filter ]

Figure 3.66 Other additive noises in PLL.

3.18. Phase Noise in Phase Detection 169

tors and resistors. The second source may be the decoupling resistors Rdc, separating the varactor circuit from the loop filter and the phase detector. The respective noise power density is given by

Sf = 4KTRdc = 1.66 • 10 - 2 0 Rdc ( g 2 [ Hz). (3.60)

3.16 Phase Noise in DC Amplifiers

As shown in Table 3.2, in several cases we may need to introduce either an active lag/lead filter or a DC amplifier. The design of a low-noise amplifier is somewhat complicated. Typical equivalent input noise voltage is only several nV/X/-H-~z, with the comer low frequency between 10 and 100 Hz. Similar performance is also achieved with some modem IC operational amplifiers.

3.17 Phase Noise in High-Frequency Amplifiers

It has been found that the power spectral density of the flicker noise close to the

carrier is approximately given by

10-11.2 S ( f ) -- ~ -~ S(fJwhite (3 .61)

f

for the range of 5 to 100 MHz, quite independent of the transistor type and even of the multiplication factor. Experiments proved that the intrinsic direct phase modulation of the RF carrier by transistor was responsible for the phenomenon. The improvement has been achieved by applying local RF negative feedback using a small unbypassed resistor in the emitter, typically from 10 to 100 ohms. Low amplifier currents and high voltages help to keep the 1/f noise current low.

3.18 Phase Noise in Phase Detection

The best phase detectors are double balanced mixers with Schottky barrier diodes

in the ring configuration. A further improvement may be achieved by placing

two diodes in each arm. Measurements performed reveal that

10-14+1 Spd( f ) ~ n t- 10 -17 (3.62)

f


On the other hand, it has also been found that noise properties of popular digital phase frequency detectors in the range from 0.1 to 1 MHz can be modeled as

1010.6+--0.3 S(f) = . (3.63)

f

3.19 Phase Noise in Digital Frequency Dividers

Since the frequency or phase modulation index decreases proportionally to the division factor N, the ideal noise figure is

Fdivide r -- - -20 log N.

However, additional noise is generated in the divider itself. The output phase noise is given by

Sdi,in(f) 10 -14 Sdi(f ) : N2 + f + 10 -16"5. (3.64)

3.20 Phase Noise in Frequency Multipliers

The noise for properly designed transistor frequency multiplier is given by

10 -14 Smu(f ) ~" ~ - 1 - 10 -16"5. (3.65)

f

In diode frequency multipliers the flicker noise level is higher, given by 10-12.9/f.

3.21 Phase Noise in Oscillators

In accordance with several models, any oscillator can be simplified into a loop containing a resonator and an amplifier limiter. As a result, its output spectral density is given by

Svco,n(W) = Sa,n(W)[1 + (090/2QL~O)2], (3.66)

where the amplifier limiter noise is given by

Sa,n(f) = a _ 1 / f + ao,

3.23. More about VCO Design and Noise 171

and the magnitude of the flicker noise constant a_ 1 has been found experimentally in the range from 5 to 100 MHz to be

a-1 = F-1 • 10 -112 (rad2).

The white noise constant is the ratio of the noise power ~b 2 noise(t) to the oscillator power Po reduced to 1-Hz bandwidth and multiplied by a noise factor Fo:

a o = F o K T / P o ~ 4.0 • l O - 2 1 F o / P o (rad2/Hz).

A power law relation can also be established:

[ h-l h~ hl ] 7 5 - - J -~o Svco,n(f) = f2 + 7 ~ + + h2 �9 (3.67)

Here,

h 1 = a 1/4Q 2 - - L ,

_ / 2 hl=a l f o ,

h o = a o / 4Q 2 L, / 2

h2 -'- ao fo,

where QL is the oscillator quality factor andfo is the oscillator resonance frequency. Finally, the general oscillator noise equation is

1 10 -11"6 Svco,n(f) = f 2 f-3 Q2L- -~- - - ~

1 10 -15"6 1 10 -11 10215 ] f2 Q 2 -~ f f2 t- fo " (3.68)

3.22 Phase Noise in Reference Frequency Generators

The reference generator in low-noise PLL systems (frequency synthesizers) is a spectrally pure crystal oscillator. A low close-to-carrier noise requires the use of resonators with the highest possible Q. For an average crystal oscillator, the following noise equation is applicable:

Sosc n(f) 1 37.25f~ 72 39.4f2 1 10 -12"15 10 -14"9 fo 2 - f ~ 1 0 - + 10- + ~ ~ + f2 �9 (3.69)

3.23 More about VCO Design and Noise

In the VHF region, the fabrication of VCOs using hybrid elements is still very

common. Unfortunately, this approach can result in stray capacitances and parasit-

ics which could cause problems in circuit development. The control of the output


frequency range is not an easy task in such VCO designs. For example, the

equivalent series self-inductance in ceramic multilayer capacitors introduces a

series resonant frequency which affects the tuning bandwidth. As the self-resonant

frequency is exceeded, the reactance of the ceramic capacitors changes polarity, resulting in increased oscillation.

In the circuit of Figure 3.67, a Colpits oscillator with the emitter in series

with a capacitor connected to ground is shown. The reactive elements consist of

capacitances C1, C2, and Ct along with inductance L 1. Ct can be realized with two varactors placed back-to-back for better AC performance. The series combi-

nation of L 1 and the varactors behaves like an inductor. The varactors are used

to reduce the inductance from L 1 in order to vary the oscillation frequency. C1 is a forward-biased base-to-emitter junction capacitance that is approximately

equal to

C 1 -- Cje o "k- gm'/'f,

where Cjeo is the base-to-emitter capacitance in the zero-biased depletion region, grn = Ic/Vt, Ic is the collector current, V t is the threshold voltage, and zf is the base transmit time.

Notice that in Figure 3.67 C 2 has a series of parasitic inductance. This related

self-resonance frequency is generally an inverse function of the capacitance. The

oscillating frequency is roughly equal to

fosc = 1 / [277"L1C1C 2 / ( C 1 + C 2 ) ~ (3.70)

V 2

V Figure 3.67 Colpits oscillator.

3.24. Modeling RF Interference at the Transistor Level 173

whereas the negative resistance is

Rneg = gm / w2C1 C2, (3.71)

where w is the operating frequency.

A series inductor L 2 from a nonideal ground introduces an additional critical frequency given by

f c r - - 1 / [2~(L2C2)~ (3.72)

The circuit could not sustain oscillation above fcr as a result of the change in

polarity of the effective reactance in the emitter branch. Therefore, the series

resonance frequency acts as the upper bound of the tuning range:

f~ = 1 / 2 77"(L2C2) 0"5. (3.73)

3.24 Mode l ing RF Interference at the Transistor Level

In electronic circuits, the RF energy is first picked up by cables and associated

wiring and then conducted directly into the circuits. In essence, the RF signal is

envelope detected by the nonlinear characteristics of the semiconductor junctions.

The interference problem can be modeled as the low-frequency components that

are produced when high-frequency RF-induced currents flow through a nonlinear

device. The low-frequency components which are dependent on the modulation

of the RF signal are often within the passband of the low-frequency circuits and are processed as if they were the required signals. With the understanding of this

rectification process, the interference effects in semiconductors can be simulated and circuit susceptibility in different environments can be assessed. Using a time

domain approach in which RF waveforms are corrupted is very time-consuming

and is more suitable to SPICE models. The approach discussed here is to develop

models of semiconductors in which the low-frequency components resulting from rectification of an RF signal are included [2].

The parameters of the rectification components in the models depend on the

characteristics of the semiconductor device itself and also on the external circuit

of the device. Of primary importance are the device capacitances and the fre-

quency, power level, and equivalent impedance of the interfering RF source

models. These are discussed, dealing with PN junction transistors which include

rectification effects. Parametric studies involving ideal diodes are described in

which the expected range of each of the rectification parameters is estimated, as

well as their dependence on capacitance, frequency, RF power, and equivalent


RF impedance. Reference [2] describes the use of these models in analyzing

interference in integrated circuits with a SPICE-like analysis program.

3.24.1 RECTIFICATION IN PN JUNCTIONS

Rectification is the mechanism by which out-of-band RF and microwave signals

are converted to in-band signals. This process is very much an envelope detector.

In such cases the unwanted signals are detected by electronic devices intended

to process other signals. The detected response varies with the envelope of the

RF signal, which will depend on the characteristic of the RF source. These low-

frequency signals may be very similar to those normally present in a circuit.

Once the RF signal is rectified and mixes with the data from the desired signal,

it is difficult, probably impossible, to remove the interference effect even with

additional processing. The only way to avoid this problem is through adequate

shielding, preventing the interference signal from entering the rectification pro-

cess. Rectification is the result of the nonlinearities inherent in semiconductor

devices. Most semiconductor devices are built of PN junctions which have non-

linear current voltage characteristics. Figure 3.68 shows how this nonlinear behav-

/ Normal Diode Characteristic

Characteristics _.

current waveform

I I ~ Voltage Waveform

Figure 3.68 Illustration of rectification in an PN junction. The AC component of voltage causes an offset in the DC component of current flow.


ior is used to rectify an AC signal. In the figure, a continuous sinusoidal voltage

is applied to the junction with a DC bias voltage. The current flows in series of

nonsymmetrical pulses. The average value of the current pulses is higher than

the DC value of current that would flow if only the bias voltage were present,

so it appears as if the signal has caused a DC offset current to flow. As the bias

voltage level is changed, the offset current also changes; thus, a locus of average

current vs DC bias voltage can be obtained and plotted as shown in Figure 3.68.

This can be interpreted as an RF-induced diode l-Vcharacteristic. This is probably

what a low-frequency circuit sees of the diode. At a given bias voltage, the DC

current flow is given by RF-induced characteristics if RF is present.

In general, a biased diode or transistor junction will experience an increase

in average current when exposed to RE The circuit in Figure 3.69 models the

diode characteristics under RF conditions [3].

Ix Rx

D2 Id2

(~ Id

~ld

D1 ~

Idl

Figure 3.69 Circuit model of a diode including rectification effects.


The model of Figure 3.69 is composed of two diodes, a current source, and

a resistor. The diode D1 models the diode with no RF energy on it and follows

the standard diode equation

,o (exp q 1) where

I D 1 - '- current through diode D1

V a = voltage across D1

Ias = diode reverse saturation current

q = electron charge

K = Boltzmann's constant

T = junction temperature in kelvins

n = emission coefficient.

(3.74)

The elements D2, I x, and R x model the offsets in the device characteristics due

to RE The current source I x depends on the RF power level, frequency, and RF

source impedance. For large RF signals, I x is proportional to the square root of

the RF power PRF by the relation

I x = K VPRF, (3.75)

where K is a constant with power, but is dependent on the frequency and source

impedance of the interfering signal. The value of the resistor R x is also dependent

on the frequency and source impedance of the RF signal, but it is independent

of the power level of the RF energy. In general, R x increases with frequency or

increased source impedance. Figure 3.70 shows a piecewise linear approximation

of RF-induced diode characteristics.

3.24.2 I N T E R F E R E N C E OF RF E N E R G Y IN TRANSISTORS

Diode transistors go through a change in DC characteristics when exposed to

RF. A low-frequency circuit unable to respond directly to the RF energy will

exhibit changes in transistor bias points caused by RF-induced changes in transis-

tor characteristics. The change is due to current and voltage offsets resulting

from rectification of RF signals in the transistor junctions.

In Figure 3.71 we see an oscillation of the DC characteristics for a 2N2369A

transistor. When the transistor is stimulated by 90 mW of RF power at 220 MHz

[3] on the collector lead, the characteristic curve appears to shift to the fight by


A

i d / cN h ramaa~t eDi~

Ix -- I . . . . . . . . .

I I

i ~ I

current waveform Vd

Voltage Waveform

Figure 3.70 Piecewise linear approximation of RF-induced diode characteristics.

4.5 V. Different responses occur for different transistors at different injection

points. Figure 3.72 shows the change in DC characteristics of a 2N2222A transis-

tor stimulated on its collector with 90 m W of RF power at 220 MHz. In general,

for an NPN transistor with RF conducted on its collector, the collector current

will increase at voltages near saturation. The 2N2222A transistor shows this

~_ lc(ma) (a) j[~ Ic(ma ) (b)

/._ F 28

21 21

14

0 2 4 6 8 10 12 VCE (volts)

Figure 3.71

I

I I / I / I I I I i ,~

0 2 4 6 8 10 12 VCE (volts)

Characteristic curves for a 2N2369A transistor (a) without an interfering signal and (b) with a 90-mW 220-MHz signal entering the collector.

~ lc(ma) 2 8 ! -

21

(a)

14 14

7

~ lc(ma ) (b)

21


0 2 4 6 8 10 12 0 2 4 6 8 10 12 VCE (volts) VCE (volts)

Figure 3.72 Characteristic curves for a 2N2222A transistor (a) without an interference signal and (b) with a 90-mW 220-MHz signal entering the collector.

effect as a rounding of the characteristics at voltages near zero. These effects

can also be observed at higher frequencies, but the magnitude of the effects

decreases.

When an NPN transistor receives RF energy on its base or emitter leads, these

effects are usually accompanied by a fl decrease, and it is more pronounced at

low RF power levels. Furthermore, it has been observed that the base-emitter

voltage decreases as the RF power increases. If the transistor is biased in the

forward region, the normal base emitter voltage is usually around 0.7 V for a Si

NPN transistor. RF power on the order of 1 mW can reduce this to zero. In

general, significant base-emitter decreases can occur at very low power levels,

which is a great degradation in sensitive analog circuits that respond to small bias

voltages. Significant voltage offsets in feedback amplifiers have been observed at

power levels as low as 1 /zW [3].

The Ebers-Moll representation of a transistor model is now modified to

account for RF effects. Figure 3.73 shows the standard Ebers-Moll model for

an NPN transistor. The diode characteristics which represent the base-emitter

and base collector junctions are given by

If:Iof(expCqV e 1) x fqVbe~ )

IR = /OR ~e p ~ - ~ - j - 1 , (3.77)

3.24. Modeling RF Interference at the Transistor Level

C

? ; c

Ifo~f 3~ IR

Ib B C) V

179

Figure 3.73

If IR o~R

The standard Ebers-Moll model for an NPN transistor.

where /Of and /OR are the diode forward and reverse saturation currents. The

transistor forward and reverse betas, flf and fir, are related to the values of af

and a r by

af (3.78)

ar (3.79) f i r - 1 _ ar"

In order to account for the rectification in the transistor junction, the rectification

model for diodes previously illustrated in Figure 3.69 was substituted for

each diode in the standard Ebers-Moll NPN transistor model of Figure 3.73.


Figure 3.74 shows the modified Ebers-Moll model after the substitutions. Using

this approach the rectification in each junction is treated separately. The current

sources Ixe and Ixc are dependent on the RF level power, frequency, and RF

source impedance. For large signal, they are proportional to the square root of

the RF power level,

Ixe-- Ke'V/PRF (3.80)

lxc = KcX/PRF, (3.81)

B 0

C Ic

.c :; ']

Ib V

~ IR

IR o~R 'xe Re

E ~ I e

3

Figure 3.74 The Ebers-Moll model for an NPN transistor modified to include interference effects.


where Ke and Kc are constants with power but depend on the frequency and

source impedance of the interfering RF signal. In general, K e and K c decrease

with increasing RF frequency. The values of R e and R c are constants with RF

power at a given RF source impedance and frequency, and, of course, they

increase with increasing source impedance and frequency.

3.24.3 WORST-CASE CALCULATIONS

It is often required just to get the worst-case response of a circuit under certain

environmental conditions. This scenario calls for a worst-case analysis for which

the Ebers-Moll transistor is well suited. The procedure calls for varying the

values of components I• Re, I• and R e until a combination is found that

produces the worst output response. The analysis done in [3] produces the model

shown in Figure 3.75, where r includes the lossy elements within the diode itself,

Ix

II

II D2

Id r

I

I

Rx C._~_ T

I

I

D1

+

Figure 3.75 Model of a diode or transistor junction.


such as bulk resistance, and those external to the diode itself, such as losses associated with cables and printed wiring. C is a shunt parallel capacitance

across an ideal diode D1. The worst-case parameters are given by

Kmax 8~-~[ /~x (1 + R 2 ) - ~ ( 1 - R2)2 (1 +472)1/2] 1/2 - /}x 4/}x? + (1 + ~ x ~ l - + 4r2) 1/2

kx(min ) = 27 [1 + (1 + 4~2) 1/2] (3.82)

�9 ,~ Js = [1 + (1 + 4~2) 1/2] 2?

Ix(max ) = KmaxV/-PRF,

where

Rx = ~oCRx ~" = ooCr.

3.24.4 CALCULATING MAGNITUDE OF OFFSET VOLTAGE AT EMITTER-BASE JUNCTIONS

Measurements and calculations have shown that rectification in a bipolar transistor

operating in linear mode occurs principally at the emitter base junction. Further- more, as long as the RF voltage at the junction is not significantly greater than 26 mV, the rectified offset voltage A V follows a square law relationship and is proportional to the absorbed power [4]. The offset voltage is given by

1/2

AVpa 2KTq[ RsaeogC.n. P2el] (V/W), (3.83)

where C.,r/A e is the base emitter junction capacitance per unit area, R s is the base sheet resistivity, Pe is the emitter perimeter, and Pa is the absorbed power in the

emitter base junction.

The preceding equation is correct for the limiting case where there is severe

crowding of the AC signal near the edges of the transistor emitter and the device

may be viewed as a distributed circuit. At low frequencies or where the emitter

width 2L is so small that sufficient crowding does not occur, the equation takes

the limiting case

AV 4A e Pa VTWC~ P2, (3.84)

where V T = KT/q = 0.026 V.


3.24.5 R F I R E C T I F I C A T I O N I N JFETs

For a given DC bias and a given frequency, the JFET exhibits an increase in the

drain current as the absorbed RF power increases. For low levels of RF power, the

drain current is proportional to the power absorbed in the device. Empirically, this

phenomenon can best be explained through the use of a standard hybrid r small-

signal FET model with the addition of an RF-induced noise current source in the

drain, as shown in Figure 3.76. This source generates an offset current AI d .

The rectification effect can be modeled in terms of the nonlinearity of the

gate voltage drain current characteristics in order to calculate Ia, the average

value of the drain current. An analysis done in this respect shows that

V 2 dg m I d ~ Id(Vo) +---s ~ (3.85)

4 dVg'

where gm is the device transconductance and at bias point Vo, Vo is the quiescent

gate source voltage, Vg is the gate voltage, and Vp is the amplitude of RF noise

source Vp sin wt.

The preceding equation shows that for low levels of absorbed RF power where

Vp is small, the rectified offset current appearing in the drain is proportional to

the square of the RF voltage at the gate source junction, which is proportional

to the absorbed microwave power. In terms of absorbed power P~, the induced

RF voltage at the junction is given by

AI d _ 1 dg m (3.86) 2 2 Pa 2w C g R i dVg

G O D

gmV 9

$

Figure 3.76 The standard hybrid "rr small-signal FET model with an induced RF noise current.


where Cg is the gate-to-source capacitance, and R i is the real part of the FET device input impedance.

Finally, from the above last two equations,

my__ V__~ dgm 4 gmdVg"

The term gm is given by the expression

(3.87)

O0[1 1/2

I , (3.88)

where G o is the conductance of the metallurgical channel, discounting the presence of depletion regions; 453 is the PN junction built-in voltage (about 0.6 V); Vp is the pinch-off voltage = N d d2/(8eeo + ~ ) ; Vg is the gate voltage; d is the channel thickness; and N d is the doping concentration in the channel.

By taking the derivative of this last expression, we finally obtain

A V = 2co 2C2 Ri 1/2 1/2 " ( 3 . 8 9 )

2 ( q ~ - Vp)(q~B- Vg) 1 - ~ - Vg

Operation of this FET device near the pinch-off voltage drives the denominator of this expression toward zero and increases the nonlinearity. Therefore, the amount of equivalent offset voltage increases. This situation becomes more serious with the higher capacitive reactance of the gate junction as its reversed bias is increased.

3.25 RFI Effects in Digital Integrated Circuits

In the previous section, the modified Ebers-Moll model for a bipolar transistor was developed for predicting RFI effects in bipolar integrated circuits. We now show that the modified Ebers-Moll model can be used with SPICE to provide useful information about RFI in bipolar integrated circuits [3].

The basic situation of interest is illustrated in Figure 3.77. Electromagnetic energy incident on the outer enclosure of an electronic system is coupled through the apertures in the skin to the interior of the electronics. The electromagnetic field inside the enclosure will couple and induce RF voltages on the system cables. The RF voltages are conducted to the semiconductor devices such as the

F-

I

I

I

I

I

I

I

L

3.25. RFI Effects in Digital Integrated Circuits

@ r

Cable

APERTURE

I \

Susceptible Electronics

I V

Incident Electromagnetic Energy Figure 3.77 Incident RF energy on susceptible electronics.

185

I

I

I

I

I

I

I

_1

IC electronics. This scenario is shown in Figure 3.78. The RF voltage induced

on a system cable is modeled by the Thevenin equivalent voltage s o u r c e Vgen

with impedance Rgen. The bipolar IC is a NAND gate. The case that is being modeled is the one in which the NAND gate input voltages are high and the NAND gate output voltage is low in the absence of RF energy. The RF signal is injected into the output terminal.

The electronic circuit analysis program SPICE is used for analyzing ICs and has been used in the past to predict normal IC operation. Most ICs can operate in an ideal environment in which no RFI signal is present. However, in most

cases there is no ideal environment, and the IC must operate in the presence of

strong RFI. Standard SPICE models can be used for all IC components not

affected by RFI. The transistors into which RF is injected are modeled using the

modified Ebers-Moll model previously described. The modified Ebers-Moll

model is implemented by using the external model function available in most

SPICE programs. Similar procedures can be applied to other cases where an RF

signal is injected into the terminals of a small-scale bipolar IC. Results

show that NAND gate operation can be affected significantly by RF injected

into several of its terminals. However, the most susceptible case is that of

Figure 3.78, in which an RF signal is injected into the output terminal when the


GATE

NAND

Vin V vnl

Vn:

I Thevenin I

I

Rgen

Vgen]

Figure 3.78 Modeling noise sources in a gate.

normal output voltage is low (Vou t < 0.4 V), which is when both inputs to the

NAND gate are high (Vin > 2 V). When both NAND gate input terminals are

high, the RF injected noise into the output terminal can cause the output voltage to change from its normal low value (Vou t < 0.4 V) to an RF-induced higher value (Vou t > 0.8 V). This is the situation that can be simulated using SPICE. Shown in Figure 3.79 is a circuit schematic of an NAND gate (7400). The 7400 NAND gate includes four resistors (R1-R4), four transistors (T1-T4), and three diodes (D1-D3). The dual emitter transistor T1 can be modeled by a single

emitter transistor, and the diodes D1 and D2 can be modeled by a single diode

Din. The RF interference can be accounted for by assuming that all the incident

RF power is absorbed in the output transistor T4. One result is that the standard

component models available in SPICE can be used for all NAND gate components

except the transistor T4. The transistor T4 is modeled using the modified

Ebers-Moll model shown in Figure 3.79.

The modified Ebers-Moll model is shown in Figure 3.80. To implement the

current-dependent current sources Ife and/re in the modified Ebers-Moll model,

current-sensing resistors Re,sens e and Rc,sens e are placed in the emitter and collector circuit as shown in Figure 3.80. The current sources Ife(CeFIF) and IRC(CeRIR) are made to depend upon the voltage drops V12-V13 and V12-V11 across the

resistors Re,sens e and Rc,sense, respectively. The result is that Ife = AF(V12-V13) and Ifr - AR(V12-V11), where the values of AF(aF) and AR(aR) are the forward

3.25. RFI Effects in Digital Integrated Circuits 187

Vin D1

R1

T1

l, D2

NAND

> R2

I ,

R4

- - - - - - I

I I I

R3 I

I I I I i I I I I

}'411, T4 1

I I

' RLL <

,(

Vcc

Figure 3.79 Schematic diagram of a 7400 NAND gate with external connections.

and reverse alpha. The diodes DE1 and DE2 both have the saturation current

IES, and the diodes DC1 and DC2 both have the saturation current ICS. Also

shown in Figure 3.80 is a DC voltage source with a voltage equal to the amplitude

of Vgen of the Thevenin equivalent RF voltage source shown in Figure 3.80. The

DC voltage source controls the voltage V 16-V20, which controls the RF induced

DC current generations Ixe and Ixc.

The DC current generators are Ixe and Ixc from Figure 3.80 and are given by

[3].

Ixe -- (ge[ ege) Vgen (3.90a)

Ixc - (gc/r Rgc)Vgen, (3.90b)


af if~ RCC I xc

Ife 10

C> 5

RBB ~/Vk,

i ..... aRiR~ RC I RE

12

t DC2

Rc sense ,xA/x,

~vN, Re sense

I DE2

14

Ixe

13

l

DC1

~ lf DE1

16

Ix ~ en

2O

Figure 3.80 Modified Ebers-Moll model in an external model configuration.

where Rg e and Rg c are the RF-induced resistors and Vgen is the Thevenin equivalent

RF source amplitude, given by

Pine -'- V2en / 8ggen, (3.91)

where Pin is the RF power incident on the NAND gate and Rgen is the equivalent

impedance of the RF source. The terms K e and K c are emitter and collector

proportionality constants depending on the frequency and operating DC point.

3.26. RFI Effects in Operational Amplifiers 189

3 .26 R F I Effects in Operat ional Amplif iers

Models based on RF rectification effects in a PN junction have already been discussed for predicting RFI effects in bipolar transistors. We now demonstrate techniques for using a modified Ebers-Moll model in conjunction with SPICE

to predict RFI effects in integrated circuits of op-amps. The op-amp configuration

is shown in Figure 3.81. The RF voltages induced within the electronic system are modeled by a

Thevenin equivalent voltage source which contains the voltage generator Vgen

and the impedance Rgen. Work previously done in this area has shown that RFI

effects are more pronounced when RF power is injected into either of the two

op-amp input terminals. The signal input terminals are directly connected to the

base terminals of two transistors in a differential pair configuration. A modified

Ebers-Moll model is used to model the particular transistor into which RF power

is injected. All other IC components are assumed not to be directly affected by

the RFI source and are modeled using standard modeling techniques. For the situation shown in Figure 3.81, in which RF power is incident on an

op-amp's input terminals, a voltage offset model can be used to calculate op- amp RF susceptibility. Shown in Figure 3.82 is a voltage offset model that can

be used to calculate the RFI susceptibility of op-amps. The polarity shown for

the voltage offset model V n is for RF injection into the inverting input. For RF

T h e v e n i n E q u i v . RF Source

--I I I I I I I I I Vgen I i_

Rgen <<

0.5V

V

RF

910

10K

Vout

50

Figure 3.81 Schematic illustrating RF signal being coupled into a 741 op-amp.


IF RF

Rin

( Vin

Vn I I Vout

Rnon

Figure 3.82 Modeling RFI noise in op-amps.

RL

injection into the noninverting input, the V n polarity should be reversed. It is appropriate to notice that the voltage offset generator Vn is a low-frequency source which results from the rectification of RF signals in various PN junctions in the op-amp. For RF voltage amplitudes less than 26 mV, it has been shown

that the offset generator voltage V n is given by V n = K P a, where K is a constant which depends upon the frequency and DC operating point, and Pa is the absorbed RF power [3]. The term Vn is given by

Vn = Ixe RE, (3 .92)

where Pin has been previously identified and R E is from Figure 3.80. The op-

amp is assumed to have a very large loop voltage gain and a very high input

impedance between the two terminals. The relationship for Vou t is now given by

Vou t - - (R F / Rin ) Vin - (1 + R F / Rin ) V n. (3.93)

3.27 RFI-Induced Failures in Crystal Oscillators

Voltage-controlled oscillators are sensitive to RFI, especially in the range of 20

to 100 MHz. It has been shown that when a radiating antenna is placed in the

vicinity of a VCO, as shown in Figure 3.83, failure can occur at several RF

frequencies, and in some cases it was not operational until DC power was recycled.

5V ~'~

3.27. RFl-lnduced Failures in Crystal Oscillators 191

Xtal OSC [ I disturbing/monitoring l o o p /

"b ~ I To S p e c t r u m / "

/ ground plane _1_

0.1gF T

Power Output TTL Load

Figure 3.83 Testing of VCOs. (Published with permission of IEEE.)

Some of these failure modes lead to a permanent transition of the oscillator's

frequency of operations. Errors observed in oscillator failures include microcom-

puter operations being disturbed to the point where computational errors occur;

communication with the microcomputer via its serial port being disrupted by changes in the baud rate; and permanent interruption of the clock signal on the board.

The frequency transition phenomenon just described above can lead to failures in digital systems. However, the probability of inducing such failures should be estimated for the electromagnetic environment in which digital systems operate. For the configuration depicted in Figure 3.83, mode switching was achieved at a fairly low RFI current level, because of the good magnetic coupling between the VCO loop and the source disturbance. This is not always the case in practical

situations where electromagnetic interference sources are far away. Also, the

wire loop formed by the leads connecting the VCO chip to the crystal are usually

kept short in order to reduce emissions and the pickup of electromagnetic fields.

As an example of external EMI, consider the case of a uniform electromagnetic

plane wave incident on a VCO crystal loop forming a 1 cm • 1 cm square. For

a thin wire loop that is small relative to the wavelength of the incident wave, the induced current can be assumed constant around the loop. In this case, it can

be shown that

Effective length = 2L sin(TrL / ~), (3.94)


where L is the length of each of the squared side. At 50 MHz, the effective length

for L = 1 cm is about 1.05 X 10 -4 m. At this frequency an induced voltage of about

100 mV RMS is needed to trigger mode switching in the oscillator. This requires

an incident field of 1347 V/m. Larger structures in a digital system, such as power

and ground lines, are, in general, more efficient antennas than the small loop men-

tioned previously. They could have larger induced currents for the same level of

external electromagnetic field. If such lines are in the vicinity of the VCO crystal

loop, the scattered field they produce may be sufficient to cause an oscillator to fail.

For example, assume that the VCO crystal loop is near a half-wavelength wire as

shown in Figure 3.84, and that all wires are 1 mm in diameter. For a 1-cm squared

loop with its center 1.0 cm away from the antenna, the effective length relating the

incident electric field to the open circuit voltage is approximately 1.5 X 10 -2 m.

This number has been obtained with the modified version of Richmond's MOM

program [5] and is nearly constant for frequencies between 20 and 100 MHz.

Figure 3.85 shows the induced EMF in the loop as a function of frequency for

incident fields of 200, 10, and 5 V/m peak. Also shown is the failure level for the

OSC operating at 22.1 MHz crystal.

The preceding example shows that even though the wire structures connecting

a susceptible device, such as an VCO, can be made very small, the scattered

E H

0.5 cm V

- - - - - - I ~ I

1.0cm i.. ~

Voc 1.0cm

~.12

Figure 3.84 Small square loop located near a half-wave dipole and illuminated by a uniform plane wave. (Published with permission from IEEE.)

References 193

Induced EMF mV rms

2400

2000

1600

1200

800

400

200 Vim incident wave

10 Vim incident wave

I I I I I I I i 0

10 20 30 40 50 60 70 80 90 100 110 Frequency (MHz)

Figure 3.85 Induced EMF for a loop antenna as a function of frequency due to incident wave.

field from neighboring wires can easily lead to a failure threshold for an incident

field that is below existing standards. For a susceptibility threshold of 100 mV

RMS of induced EMF, effective lengths of only 0.7 mm and 28.2 m, respectively,

are required to cause failure at the 200 V/m and 5 V/m incident field levels.

These very low figures emphasize the importance of considering RFI effects

when designing the layout of PCBs.

References

1. J.J. Whalen, J. Tront, C. E. Larson, and J. M. Roe, "Computer analysis of RFI effects in integrated circuits," Proc. IEEE 1978 Int. Symp. Electromagnetic Compatibility;

IEEE 78-CH 1304-5 EMC, pp. 64-70. 2. J. Tron, J. J. Whalen, C. E. Larson, and J. M. Roe, "Computer aided analysis of RFI

effects in operational amplifiers," IEEE Trans. in EMC, u 21, No. 4, Nov. 1979. 3. C. Larson and J. M. Roe, "A modified Ebers-Moll transistor model for RF-induced

analysis," IEEE Trans. in EMC, u 21, No. 4, Nov. 1979. 4. R.E. Richardson, "Modeling of low level rectification RFI in bipolar circuitry," IEEE

Trans. in EMC, u 21, No. 4, Nov. 1979. 5. J. H. Richmond, "Radiation and scattering by thin-wire structures in the complex

frequency domain," Technical Report No. 29002-1, The Ohio State University, Electro

Science Laboratory, July 1973.

Chapter 4 Computational Methods in the Analysis of Noise Interference

4.1 General Introduction

James Maxwell may not have imagined how renowned his name would become when he stated his laws governing the electrical nature of matter and the fields associated with the currents involved. Even more, Maxwell probably could never have imagined that one day computers and associated computational techniques would be used to solve his complex equations under a variety of boundary conditions and provide results which would match experimental data. He would certainly be amazed. It is the purpose of this chapter to discuss briefly the profound effects that computational techniques have had in solving electromagnetic field problems, especially those problems related to the area of electromagnetic compatibility (electromagnetic interference).

Electromagnetics is the physics of electric and magnetic sources and the fields associated with these sources. Maxwell equations provide the foundations of the study of electromagnetics, together with other theorems such as superposition, reciprocity, equivalence, induction, uniqueness, and linearity. Every electromagnetic compatibility problem can be identified as having three main ingredients: (1) a forcing function or input noise, (2) an output consisting of coupled noise, and (3) an electromagnetics transfer function which describes the field propagator and the coupling mechanism. These relationships are shown in Figure 4.1, a particular adaptation of Miller's field propagator concept [ 1 ], which was applied for more general electromagnetic problems.

Most electromagnetic problems involve the analysis of a known input using a derivable transfer function with the objective of determining the output. Synthesis problems are also possible. The easier synthesis problems involve finding the input, given the output and transfer function. A more difficult synthesis problem involves finding the transfer function, given an input and an output. In general electromagnetic problems, the main objective is to study and determine the field propagators for obtaining an input-output transfer function which accurately describes the physical problem.

In electromagnetic interference, however, the topology of the problem is more complex, because besides developing a field propagator, we may also have to develop a coupling mechanism. This can be easily visualized in Figure 4.2, which

194

Input Noise V

4.1. General Introduction

Problem Description (Electrical, Geometrical)

TRANSFER FUNCTION (from Maxwell Equations)

F ie ld ICoupling PropagatorlMechanism

Coupled Noise v

195

Field Propagator

Integral equations

Differential equations

Optical equations

Network equations

Field equations

Description

Green's function for infinite medium or special boundaries

Maxwell Curl equations

Propagation through rays with diffraction coefficients

Wave propagation by transmission line modeling

Wave propagation by using multipole fields

Figure 4.1 The concept of field propagators in electromagnetic interference.

establishes the difference between calculating the field at a point from a radiating

dipole and calculating the coupled noise current due to the field from such a

dipole. The difference between these two scenarios is that in the case of calculating

the coupled noise, we need to develop both the field propagator and the coupling

mechanism. Hence, the transfer function is more complex, making synthesis

problems even more difficult. Coupling mechanisms are not always obvious in

electromagnetic interference problems. In some cases they are easier to identify

(e.g., coupling between two antennas); in other cases they are very difficult to

diagnose, because often more than one such coupling scenario is involved, and

in some cases a few may remain unknown. Thus, the main difficulty with solving

electromagnetic interference problems by computational methods is not in the

(a) /

(b)

Apertur~"~ ~y, E&/H~

/

196 4. Computational Methods in the Analysis of Noise Interference

Vl? Figure 4.2 (a) Field problem and (b) typical interference problem, which uses a field

propagator and coupling mechanism.

physics, but in applying the correct physics, which ultimately means understanding the topology of the problem. That is what was probably meant in the past by the term "black art" for solving electromagnetic interference (EMI) problems.

Coupling mechanisms can be treated analytically or numerically. Analytical approaches for developing coupling mechanism under a variety of typical interference conditions are discussed in the previous three chapters. The electromagnetic computational techniques discussed in this chapter will be useful not only for developing field propagators (e.g., calculating the incident field on the conductor in Figure 4.2), but also for calculating the coupled noise (e.g., calculating the

induced current on the conductor from a known field in Figure 4.2). In computational electromagnetics, algorithms are developed which numeri-

cally model the transfer function and input as well as providing an output. All these steps depend on the type of field propagators used. Furthermore, a computer model must have some minimum set of basic properties in order to be useful. The three most important attributes of any computational electromagnetic model are accuracy, efficiency, and utility. Accuracy will determine the validity of the computer model; efficiency and utility will determine how practical the model

is for wide acceptance. As previously stated, the selection of a field propagator is the first step in the

development of a computer model. We now describe briefly and compare the

4.1. General Introduction 197

three basic categories of field propagators. Details of the different types of field propagators for each of these categories will be given in subsequent sections.

4.1.1 INTEGRAL EQUATIONS

The development of an integral equation field propagator begins with the selection

of an appropriate Green function, which depends on the type of electromagnetic

interference problem at hand. Because of the complex topology of such problems,

the selection of the Green function is one of the major difficulties in arriving at

a solution by integral equation methods. One of the most widely used Green functions is that corresponding to an outward propagation of an electromagnetic

wave into an infinite medium, which is a scalar Green function. Using Green's theorem, surface and volume integral equations are derived. The next step is the manipulation of the source integral, which uses the selected Green function as part of its kernel in order to satisfy the imposed boundary conditions for the behavior required of the electric and magnetic fields at specified surfaces. Alterna- tive options include, for example, the Rayleigh-Ritz variational method and

Rumsey's reaction concept, both of which will not be addressed in this chapter. All of these approaches, however, lead to similar models.

The analytical formulation of an integral equation leads into an integral operator, whose kernel can also include differential operators, which act on the unknown

source or field. There are basically two types of integral equations: one known

as the Fredholm integral equation of the first kind, in which the unknown appears

within the integral; and the other one, of the second kind, in which the unknown also appears outside the integral.

4.1.2 DIFFERENTIAL EQUATIONS

The development of a differential equation field propagator is based on the differential form of Maxwell equations and is conceptually more simple than the development of the integral equation field propagator. Furthermore, its numerical implementation is quite different from that used for integral equations.

For example, the differential operator is local, in contrast to the Green's

function of the integral operator, which is global. This means that for differential

operators, sampling in as many dimensions as possible, as dictated by the problem,

will determine the spatial variations of the fields.

Also, the differential operator allows easier treatment of medium inhomogene-

ities, nonlinearities, and time variations than do integral equations. Finally, the integral operator includes an explicit radiation condition dictated by the chosen Green function.


4.1.3 OPTICAL EQUATIONS

The development of optical ray propagators is useful at high frequencies. At

very high frequencies, scatterers of electromagnetic energy are larger than several

wavelengths. Integral propagators will produce difficulties because of slow con-

vergence. Furthermore, excessively large matrices are involved. An alternative

is on the use of high-frequency approximations such as geometrical optics (GO) and the geometrical theory of diffraction (GTD). Geometrical optics is intuitively

understandable, as in the use of Fermat's principle. However, GO only treats principal contribution terms in high-frequency asymptotics, and it cannot express diffraction in higher order terms. GTD was proposed by Keller, who extended and improved GO by introducing additional rays for diffraction. Diffraction is a phenomenon that depends on the shape of the scatterer and the type of incident waves; hence, it is a local phenomenon. Diffracted ray paths satisfy the extended Fermat's principle, which means that the amplitude and phase of the field in the

diffracted ray varies in the same fashion as the geometrical optics field. It was Fock who first suggested that diffraction is a local phenomenon by

showing that current distribution in the immediate vicinity of the shadow boundary

depends only on the local curvature of the surface. Sommerfeld gave the solution in the form of Fresnel integrals for a perfectly conducting half-sheet. In his

closed-form solution, Sommerfeld showed that diffracted rays emanate from the edge. Pauli extended this work to the wedge with an arbitrary angle. Diffraction from smooth convex surfaces such as cylinders and spheres is obtained using Watson's transforms on the poorly convergent eigenfunction series of the high- frequency solution. Finally, the diffracted fields in the shadow region, as derived by Franz, Depperman, and Keller, decay exponentially away from the shadow boundary and are called creeping waves. Keller utilized these solutions and constructed GTD as a generalized approximation for scattering waves.

4.1.4 NETWORK EQUATIONS

Electromagnetic field propagation is studied in terms of transmission line con-

cepts. In such an approach to field propagators, the modeling space is divided

into a number of blocks with shapes and dimensions that fit the geometry and

frequency requirements. Each block in the modeling space is replaced by a

network of transmission lines, which are interconnected to form a node. Transmis-

sion lines of adjacent nodes are interconnected to form a mesh describing the

entire problem. Voltage and currents on these transmission lines are calculated;

these represent the electric and magnetic fields corresponding to the particular

4.1. General Introduction 199

problem configuration. Information is available in the time domain. The user can incorporate different material properties by adjusting the capacitance/inductance of lines representing particular blocks of space.

4.1.5 MULTIPLE FIELD EQUATIONS

Field propagation is strictly based on Maxwell equations. Results are simply full

electromagnetic fields; hence, the two complex space functions E(r) and H(r)

of the position vector r are the primary results of a multiple field propagator. Other parameters of interest, such as the currents and voltages, are obtained from the field equations. Electric and magnetic fields are expressed in terms of multiple

expansion functions whose coefficients can be "tuned" to satisfy the boundary conditions of the problem using point matching. The multiple set of expansion

functions is solved for the coefficients using the least-squares method. In this chapter we will describe briefly the fundamentals of field propagators

corresponding to each of the five categories just outlined. In the area of integral equations we will devote considerable effort to discussing the method of moments

(MOM) as it applies to modeling electrical geometries composed of wire seg-

ments, surfaces and apertures. We will only address the method of moments as

it applies to frequency domain calculations. Method of moments in the time

domain will not be addressed, but the reader is advised to consult reference [8].

In the area of differential equations, we will review two fundamental techniques:

the finite-difference time domain (FDTD) method and the finite-element method (FEM). In the area of optical equations we will discuss a variety of techniques such as geometrical optics (GO), the geometrical theory of diffraction (GTD), the uniform theory of diffraction (UTD), physical optics (PO), and the physical theory of diffraction (PTD). In the area of network equations we will cover the transmission-line method (TLM). Finally, in the area of field equations we will review the generalized multiple multipole (GMM) method. A few other computational techniques have been used in the past but will not be covered here, such as the boundary element method, conjugate gradient method, and

finite-difference frequency domain method. The boundary element method is a

method of moments technique in which basis functions and expansion functions

(both to be defined later) are defined only on boundary surfaces. The conju-

gate gradient method also resembles the method of moments, except that it

uses an iterative procedure (known as the method of conjugate gradients)

for solving a system of matrix equations (to be defined later). Furthermore, it uses the Hilbert inner product to originate the matrix equations. Finite- difference frequency domain is a strict application of Maxwell curl equations.


However, we will refer in this chapter to the more popular version of such equations, in the time domain, which is popularized by the FDTD technique. A comparison of the capabilities of the modeling techniques to be covered in this

chapter is shown in Table 4.1. Figure 4.3 shows how these computational techniques relate to each other and to Maxwell equations.

The material covered for each of these field propagation techniques will be

at the introductory level because of space limitations in this book. However, enough discussion of these techniques will be contained for the reader to gain a good fundamental knowledge of these computational methods. Furthermore, considerable references are also provided for more in-depth study.

4.2 The Method of M o m e n t s in

Computat iona l Electromagnet ics

4.2.1 INTRODUCTION

Of all the methods used in computational electromagnetics, none has had such

an evolutionary history, wide use, and acceptance as the method of moments

(MOM). From its early conception in the 1960s until the present, the method of moments has been used in a variety of electromagnetic problems, such as antenna analysis and design, microwave networks, bioelectromagnetics, radiation hazard, microstrips, and electromagnetic interference. In the area of electromagnetic interference, the method of moments provides an advantage over all other computational techniques: it gives a direct and very accurate solution for the current distribution, which is often the most important parameter that electromagnetic interference engineers want to know (e.g., calculating noise currents and voltages). Propagated fields may be of secondary importance in many electromagnetic

interference problems.

The material described in this section regarding the method of moments is

based on the contributions of many pioneers in this field, such as R. Harrington

(the "father" of MOM) [9], J. Richmond [21], A. T. Adams and B. J. Strait [2],

R. Mittra [3,4], J. Perini and D. J. Buchanan [5], E. K. Miller and G. J. Burke

[12], C. M. Butler [30], M. M. Ney [6], H. H. Chao and B. J. Strait [7], and D. R.

Wilton, S. S. M. Rao, and P. W. Glisson [28]. Other references on related subjects

will be cited in this section as we proceed to more specialized subjects, such as

Table 4.1 Comparison of Capabilities of Several Electromagnetic Computational Methods

MOM GTD/PTD MMP FDTD FEM TLM

Advantages

Effective in modeling antennas, wire and surface structures, wires attached to large surfaces.

Detailed modeling of current distribution on structures of any shape.

Radiation condition allows modeling E and H fields anywhere outside radiating structure.

Calculate antenna parameters: input impedance, gain, radar cross- section.

Effective in Fields are calculated modeling large directly; no need (with respect to A) for intermediate electrical steps [5 1-54]. structures.

Very effective in high-frequency scattering problems, including radar cross-sections.

Saving in computer resources (execution time and memory).

Simple approach to solving Maxwell equations.

Does not require storage for modeling space.

Can model inhomogeneous media easily.

Effective for modeling interior problems.

Explicit two-step procedure.

Electrical and geometric properties can be defined separately.

Does not need staircase modeling space as in FDTD.

Effective for modeling interior regions.

Can model inhomogeneous media.

All field components can be calculated at the same point.

Can model inhomogeneous media.

Effective for modeling interior regions.

Less dispersion error than FDTD.

(continued)

202 4. C

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4.2. The Method of Moments in Computational Electromagnetics 203

I --- EM Problem

I Exact Solution I

I Maxwelrs Equations "l

Integral Differential Representation I Representation l

Trans. Finite IiF~~tee Diff" Line Elemen Domain Method Method

I Approximate Solution~

4,,

~- EMqaat ,e/in s I I 'n'e~'a' Representation ] , ,

i Geometrical G'[;~i~setrical ] [Theory i Diffraction

:oO"

iffraction Physical 1 Theory Diffraction

Figure 4.3 Overview of techniques available in computational electromagnetics.

electromagnetic interference. The reader is advised to consult these and other

related references for a more in-depth study of the method of moments.

4.2.2 MATHEMATICAL THEORY OF THE METHOD OF MOMENTS

In the realm of functional analysis, the solution of functional equations is addressed by interpreting such solutions in terms of projections onto subspaces of functional spaces, as shown in Figure 4.4. The general concept of solving func-

tional equations by projection onto subspaces has had different names through

the years" method of moments, method of weighted residuals, and method of

projections.

Fapprox-- (gl(x),F(x,y)) gl(x) + (g2(x),F(x,y)) g2(x)

Fapprox = Flgl(x ) --- Fege(y)


F

f l 2 ( x ~ ' ~ . . . . / ' - \

\ \

\ \

- ~ _ . . \ /

- - _4k/ F approx Figure 4.4 Approximate solutions by projection methods using functions.

where

Fl= (gl(x),F(x,y)) = f g,(x) . F(x,y) dx og

F 2 = (g2(x),F(x,y)) = f g2(x) .F(x ,y )dx . oz

Consider the functional equation

LF = g, (4.1)

where L is a linear operator, g is a known function, and F is an unknown function

which we need to determine. We can represent F by a set of functions {F 1, F 2,

F 3 , . . . } in the domain of L in a linear combination that will take the form

N

F = ~ otjFj, j = l

(4.2)


where c~j are scalars to be determined. Fj are called expansion functions or basis functions. Notice that j has a limit of N; hence, for computational purposes Fj

must be finite, which means that we get an approximate solution when we

substitute Equation (4.2) into Equation (4.1) to get

N

e~jLFj -~ g. (4.3) j=l

The objective now is to solve Equation (4.3). Notice that we have N unknowns.

This equation can be solved if we transform Equation (4.3) into a system of N

linearly independent simultaneous equations with N unknowns. Thus, we multiply

both sides of Equation (4.3) by a set of N weighting functions { W 1, W 2, W 3, . . }

in the range of L, and then take the inner product of (4.3) with each W i. Because

of the linearity of the inner product, this transformation yields

N

Z ~j <Wi, LFj) = <Wi, g), (4.4) j=l

where i = 1, 2, 3 . . . . . N. The inner product of two functions g and w is defined

as

(w,g) = f w ( x ) �9 g(x) dx, o~

which has the following properties:

1. (w,g) = (g ,w)*--conjugate symmetric

2. (a lw + a2w, g ) = a 1 (w,g) + a 2 (w,g)-- l ineari ty

3. (w,w) > 0 if wl0 and (w,w) = 0 if w = 0 - -pos i t ive definite

This set of equations can be written in linear form as

[C]~ = g,

where [C] is the matrix

[C] - [<Wi, LFj>] and ~ and g are column vectors

= [ a j]

g = [<W/, g>].

(4.5)

(4.6)

(4.7a)

(4.7b)


If [C] is a nonsingular matrix, its inverse exists, and ct can be expressed by

[O~j] --" [C] -1 [(We, g)] . (4.8)

The solution for F is given by Equation (4.2) once the coefficients ctj are found

from Equation (4.8); hence, we can now obtain

N

F = ~ [C] -1 [(Wi, g)] Fj. (4.9) j = l

The term method of moments derives from the original terminology that fx n f(x) dx is the Nth moment of f(x). When x n is replaced by a function W,, we have

an expression similar to the inner product. We have continued calling the integral

a moment off(x). The method of weighted residuals derives from the following interpretation. If Equation (4.3) represents an approximate equality, then the difference between the exact and approximate LFs is

r/

g - ~ otjLFj= R, j = l

(4.10)

where R is called the residual. The inner products (Wi, R) are called the weighted residuals. Equation (4.10) is obtained by setting all weighted residuals equal to

zero. The method of projections can be visualized as follows. The weighting function

Fj generate a subspace from which we can approximate F. The weighting function W i generates a subspace into which we project LF. The method of moments then sets the residual equal to the null vector in the weighting subspace. The inner

products with each Wi in Equation (4.4) are proportional to the Fj components of (4.3). We can then say that each component of the residual is zero in the weighting subspace, or that the residual is orthogonal to every Wi.

When the domains of W i and Fj are the same, we can choose Wi = Fj, and

this special case is known as Galerkin's method. When L is self-adjoint, the

matrix [C] is a symmetric matrix. Symmetric matrices have several theoretical

advantages. However, for computational purposes the evaluation of the elements

in [C] may be difficult when a Galerkin method is used. If the domains of Wi and Fj are different, then the weighting functions must be different than the basis

functions. This is known as the Petrov-Galerkin method. The simplest way to simplify the computation of the integrals used in the

inner products of Equations (4.6) and (4.9) is the use of point matching (or the

collocation method). This technique consists of satisfying Equations (4.6) and

(4.9) at discrete points in the region of interest. For the method of moments, this


is equivalent to choosing the weighting functions to be Dirac delta functions. The integrations outlined by Equations (4.6) and (4.9) are now trivial. This is the main advantage of the point-matching method. The solution, however, is sensitive to the points at which the equations are matched, which is the major disadvantage of this method. Only when care is taken in choosing the points of

match are answers with good accuracy obtained. Another choice for solution is that of minimizing the length or norm of the

residual given in Equation (4.10). This procedure is called the least-squares method. It can be observed from Equation (4.10) that minimizing R is similar

to finding the shortest distance from g to the subspace generated by LFj. By the

projection concept, the least norm is obtained by taking Wi = LFj in the MOM.

4.2.3 THE METHOD OF MOMENTS IN ELECTROMAGNETICS

The method of moments has found important applications in the area of computational electromagnetics. Rather than pursuing a generalized approach to this subject [10], we will address the application of the method of moments to the

solution of three main types of problems: (1) those where the topology can be

represented by thin-wire geometries, (2) those where the topology can be repre-

sented by surfaces (including hybrids of thin wires/surfaces), and (3) those where

the topology include apertures (including hybrid thin wires/surfaces/apertures).

It turns out that problems of these types of topologies are the most common in

electromagnetic interference (e.g., EMI resulting from wire/cable emissions, field- to-wire coupling, penetrations due to holes/seams/joints, or reflections from sur-

faces).

4.2.3.1 Modeling Electromagnetic Problems Using Wire Geometries

Early in its development the method of moments was first used for treating scattering problems (in the frequency domain) of arbitrarily bent, perfectly conducting, and interconnected thin wires and rods. For radiation (antenna) types

of problems, the method of moments can be used to calculate the current distribu-

tion on the wires, the near- and far-field patterns, and input impedances corres-

ponding to feed points. In electromagnetic interference, for example, the method

of moments can be used to calculate the near and far fields produced by wires

and cables, which are notorious conductors of common-mode currents [ 11 ], and often the major sources of radiated EMI. For scattering problems the method of

moments can calculate current distributions on scattering surfaces, scattered

fields, and radar cross-sections. In electromagnetic interference, for example, the


method of moments can be used for modeling field-to-wire coupling problems, especially when wire size L _ h in which lumped-parameter network representa-

tions of coupling scenarios are not accurate. In all these problems mutual coupling

and retardation effects are taken completely into account; hence, there is no need

to make unrealistic assumptions regarding current distributions along wires and

rods.

The method of moments can consider two-dimensional and three-dimensional

conducting structures that can be represented by wires having different shapes

and radii. The effects of ground, whether perfectly conducting or imperfectly

conducting, can be included. Both lumped and distributed loading can be taken

into account, and the wires can be excited at any arbitrary point along their

length.

We will consider in this section thin-wire problems. The term "thin-wire"

implies that L/a > > 1 and a < A, where L is the length of the wire and a is

the radius. For thin-wire problems, Equation (4.1) is an integro-differential equa-

tion with current distribution along the wires. Thin-wire problems are modeled

using the electric field integral equation, or EFIE (to be derived). However, the

method of moments can also be used for modeling volume geometries, and the

magnetic field integral equation, or MFIE, is the best suited for these types of

problems. The MFIE will not be treated in this chapter, but can be reviewed in

reference [12]. The problem of finding the current distribution on wire antennas or scatterers

is addressed by first stating the boundary condition at the surface of each perfectly conducting wire to be

fi X E T = 0, (4.11)

where n is a unit vector normal to the surface of the conductor, and E x is the

total electric field consisting of both incident and scattered fields, as shown in

Figure 4.5 for a general scatterer. Hence, E T can be expressed as

E T = E s + E i. (4.12)

The scattered field E s is defined as the field produced by all currents and charges

present on the conductor. The boundary value problem represented in Figure 4.5

can be characterized by

E s = - j w A - Vcb (4.13a)

A = ~ f J(r ' ) e j~R

s

(4.13b)


(a)

(b) i

t 2a I I

I h ~

Figure 4.5 Boundary value problem for (a) general scatterer and (b) thin wire.

= 1 f e-jkR 4ere P R ds (4.13c)

s

1 p = - _ V s �9 J(r ' ) , (4.13d)

jw

where the time-dependent term e j~ is suppressed. The term R is given by

R = Ir - r ' I, where r and r ' are defined in Figure 4.5a and k = 2~r/,~. Because

of the condition expressed by Equation (4.11), Equation (4.12) can be expressed

as

n x E s = - n x E i, (4.14)

which holds true at the surface of each conductor. In Equation (4.13), A is the

magnetic field vector potential, �9 is the scalar electric vector potential, p is the

charge density, J ( r ' ) is the current distribution on the conductor, R is the distance

from the current source point to the point at which the field is to be evaluated,

and S is the surface of the conductor. For thin wires, we assume the following:

1. Current flows only in the axial direction for each wire. This means that

circumferentially directed current radiates very little.

2. Current and charge densities are approximated by a filamentary current

I and charge p along the wire axis.


3. With the help of Figure 4.5b, Equation (4.14) is satisfied along a path L parallel to the wire axis. This path (L') is displaced a distance equal to one wire radius a from L'. Furthermore, Equation (4.14) is only applicable to the axial component of E i along L.

Points along L' are denoted by the length variable f ' while those points along L are denoted by f. Using the previously stated assumptions (1) through (3), Equation (4.13a) reduces to

-jkR ES _ -jwlZ47r f l(f')e-JknR dr' 47tel V f p(f,)e R dr' (4.15)

L' L'

where R is now the distance between a source point at f ' (e' would be the unit vector) on the wire axis L' and a field point at f along L (e would be the unit vector). Using Equations (4.13) through (4.15), we can write

~ . E i j,o f ,) e -jc~ 1 O f O e -jkR = - ~ e~.r R d~' jw4creO~ 0-~ -7[I(~')] R d~'. (4.16)

L' L'

This is the desired integro-differential equation known as the electric field integral equation (EFIE) for current distribution along thin wires. By comparison of this equation with Equation (4.1), the known function g is shown to be I t . E i. The current 1(2') is the unknown function to be determined, i.e.,

N

l(f ' ) = ~ ajFj(/?'), j = l

(4.17)

and the linear operator is given by

jw/z f ,) L(l(e')) = - ~ t" t ' I ( t ' )G(t , t de' L'

1 o f o ,1 jw4we Of ~ [I(/?')]G(~,f d/?',

L'

(4.18a)

where

G(f ,s = e -jkR

is known as the free-space Green function for a radiating source in an unbounded region.


A frequently used modified form of Equation (4.18a) is obtained by integrating

the second term by parts. We can then obtain

Jwlz f ~' e" E = ~ e" I( f ' )a(f , f ' ) df' L' 1 o f o ,)

jw4we Of [l(f ')] ~ G( f , f dr ' . L'

(4.18b)

Then, under certain conditions, we can rewrite the preceding equation as

418c) L'

which is known as Pocklington's integral equation.

If a wire terminates, the additional boundary condition I = 0 at the open ends

must also be satisfied.

For scattering problems which involve an incident field E i impressed on a

perfectly conducting and completely specified wire configuration the term/?. E i

can be easily evaluated. For radiation problems, the excitation can be specified

as either discrete or distributed. For a discrete excitation a voltage V/is given

over an infinitesimal gap (delta gap) as V/8(/? - fi). For several of such excitations,

g = Z V i ~ ) ( ~ - ~i)" (4.19) i=1

For distributed excitations in radiation problems, the known function g is similar

to the one used for scattering, except that E i exist only over several partitions

of the wire junctions.

In Equation (4.17) the basis functions Fj are chosen to be linearly independent

and cej are the complex coefficients to be determined. By using the same procedure

leading to Equation (4.4), inner products with weighting functions W i are imple-

mented. The resulting set of equations can be written in matrix form as

[Zij ] [lj] = [Vi], (4 .20 )

where

[zi~] =

(W1,L(F1)) �9 . . (W2,L(F1)) �9 . .

�9 ~

( W N , L ( F 1 ) ) �9 . .

( W 1 , L ( F N ) )

(WN, L(FN))

(4.21)


where i, j = 1, 2, 3 . . . . . N and

j " - -

m

if2 O~ 3

~N

(4.22)

For the scattering problem,

[~.] =

(W1,E i- e) (W2,E i" ~)

(WN, E i" e)

(4.23)

For radiating problems the typical element of [V i] is obtained by replacing the term E i. ~ in Equation (4.23) by Equation (4.19).

The desired solution for the current is obtained by

[/j] = [Zij]-I[v/], (4.24)

which allows calculation of the unknown coefficients c 9 in Equation (4.17).

Choosing Basis and Weighting Functions The basis functions Fj in Equa- tion (4.17) for the current should be linearly independent, should lie within the domain of L, and should be capable of approximating the current distribution along the wires. Collectively, they should also satisfy Kirchoff's current law at a wire junction. Fj functions can be classified into two groups: entire and subsectional. Subsectional functions exist only over a small portion of a wire

structure and are the ones commonly used in MOM codes. Most MOM computer codes are based on one of four commonly used sets of

subsectional current basis functions: (1) pulse functions which result in a staircase approximation of wire currents; (2) triangle functions; (3) sinusoidal functions (the latter two being piecewise linear approximations of wire currents); and (4) a set of three-term (constant, sine, and cosine) basis functions which offer several analytical advantages. Pulse, triangular, and sinusoidal basis functions are de-


scribed in Figure 4.6 as they are distributed over several wire segments (1 through

6). Notice that if we apply Equation (4.17) to Figure 4.6 we would only have

the contribution of six segments (N = 6); hence, Equation (4.16) would only

have six terms with six unknown current coefficients (al-a6). The three-term

basis function will not be addressed in this section, but extensive discussions of

F1 F2 F3 F4 F5 F6

0 1 2 3 4 5 6 7 Pulse Functions

F1 F2 F3 F4 F5 F6

u B g g g g u

0 1 2 3 4 5 6 Triangular Functions

I1F1 12F2 13F3

w w g w

0 1 2 3 4 Piecewise Sinusoidal

Figure 4.6 Different types of basis/weighting functions used in MOM codes.


it can be found in reference [ 13] for the Numerical Electromagnetic Code (NEC),

which is a very popular MOM code.

Pulse Functions As shown in Figure 4.6, the current is expanded in a series of pulses; each pulse is nonzero only over a single segment length of one wire.

Each pulse function is characterized by a complex number representing the current amplitude over a given segment. The boundary condition I = 0 at open ends of wires is fulfilled by using half-segments to which zero current is assigned at each open end of each wire. The weighting functions comprise a set of N weighted impulse functions. Each of these is defined at the midpoint of the segment to

which the corresponding expansion function is assigned. For example, if ~3

denotes the location of point 3 along the wire (and the midpoint of F3), then the weighting function W 3 is defined to be

W 3 = @ ~ - f3)Af, (4.25)

where Af is the length of the segment. The excitation matrix [V] is calculated as in Equation (4.23), with each element V1 through VN representing the complex excitation in volts that is applied to the corresponding segment length by means

of either an incident field (scattering problem) or a local source (radiation prob-

lem). In the radiation problem, the term e. E i in Equation (4.23) is replaced by Vi/DAf,, where V/is the locally generated voltage applied over a small gap A/? centered at point i. In typical radiation problems, many of the elements of [Vi] will be zero. Elements of [Zij] are calculated using Equation (4.21) with the typical element Zij representing the voltage induced on the ith segment due to a unit current pulse along the jth segment. The matrix [Z/j] is known as the generalized impedance matrix. This matrix includes all self and mutual interaction terms of the wire structure.

The matrix [Z/j] is of order N and is nonsingular so we can evaluate the current

using Equation (4.24). For radiation problems, once the voltage and current

matrices [/fl, IV/] are known it is very simple to calculate the input admittance

(Y in) at the pth feed point. That is,

yi p _ Ip. (4.26)

In order to take wire losses and loading into account, it is only necessary to add

a load impedance [Ze] to the generalized impedance matrix [Z/ft. The matrix [Ze] is a square N • N matrix with nonzero elements on the diagonal. Thus, if a


segment j is loaded with some Zej in ohms, then the jth term on the diagonal of [Ze] is Zeg. Using a totally generalized impedance matrix ZT such that

[ZT] = [gi j ] n t- [gf] , (4 .27)

the current can be found to be

[6 ] -- [ZT] -1 [Vi]. (4 .28)

From the current distribution on the various wires, several quantities can be easily computed, including near fields, far fields, radiation hazards, EMI coupling, scattering, and quantities related to good design [14-16]. Electric field calculations can be made using Equation (4.15) for each wire segment. The total field is the vector sum of contributions from all segments in the wire.

Pulse functions are used for point-matching techniques. The boundary condition of the tangential component of the total electric field at the surfaces of wires is applied only at discrete points along the length of the wires. The popular NEC code uses pulse functions as weighting functions.

Triangular Functions When triangular functions are used, the result consists of a piecewise linear approximation of the current in the wires. Often the weighting functions used are also triangular, giving rise to the Galerkin method. The matrix elements are calculated using Equations (4.21) through (4.23). The elements of [lj] can be calculated from Equation (4.24). For radiation problems and discrete excitation, the elements of [V i] are obtained by replacing the term E i. f in Equa- tion (4.23) by Equation (4.19) as before. The fields are calculated using Equation (4.15) as before. Loading follows the same approach described by Equations (4.25) through (4.28). For more information concerning triangular functions, especially those used by the WIRE code [17], the reader is advised to consult references [ 18-20].

Sinusoidal Functions

by Richmond [21]: The piecewise sinusoidal functions were first introduced

sin k(e - ~ j -1)

sin k(e,j - s /?j-1 <- f <- fj (4.29a)

i j ( e ) = e sin k(fj+l - f)

sin k(s , - s ~j -< ~ -< ~j+ 1, (4.29b)


where k = 2r In Richmond's method of moments, weighting functions are also piecewise sinusoidal. Richmond's method, which is based on Rumsey's reciprocity theorem, is not discussed in this chapter but can be reviewed ade- quately in reference [21]. The matrix elements are calculated using Equations (4.21) through (4.23). The elements of [Ij] are calculated from Equation (4.24) when there is no loading and from Equation (4.28) when there is loading. For radiation problems and discrete excitation, the elements of [V/] are obtained by replacing the term E i- ~e in Equation (4.23) by Equation (4.19) as before. Loading follows the same approach as described by Equations (4.25) through (4.28). Fields can be calculated by using Equation (4.15) as before.

4.2.3.2 Modeling Electromagnetic Problems Using Surface Geometries

Wire-grid modeling has been successful in many problems requiring the prediction of far fields, radiation patterns, and radar cross-sections. In electromagnetic interference, wire-grid modeling has been successfully applied to model radiation from dipole antennas used in electromagnetic interference testing, wires, cables, and printed circuit boards. Wire-grid models not only can be easily input in a computer file, but have the numerical advantage that all numerically computed integrals (e.g., those involved in inner-product calculations) are one-dimensional. It is believed, however, that wire-grid models are not well suited for calculating near fields and surface-dependent quantities such as surface currents and input impedances. Other authors have also reported the presence, in some cases, of ill-conditioned moment matrices and incorrect currents at the cavity resonant frequencies of a scatterer [22]. Most of these difficulties can be overcome using surface-patch modeling for approximating surface currents.

Many approaches to surface-patch modeling have been pursued over the past several years; their review is beyond the scope of this section, but the reader can review them in references [23-27]. We concentrate in this section on a popular technique developed by Wilton, Rao, and Glisson [28], which uses planar triangular patch models in conjunction with the electric field integral equation for modeling both closed and open bodies of arbitrary shape as shown in Figure 4.7. The triangular functions are used for modeling the basis functions in the integral equation and are analogous to the "rooftop" functions defined on planar rectangular subdomains [29].

We are reminded ourselves of the boundary condition given previously by Equation (4.14), which in conjunction with Equation (4.13a) yields

-Eitan = (-jwA - V(I))tan, r on S. (4.30)

4.2. The Method of Moments in Computational Electromagnetics

Field Source

X X ><r"-- . . l

217

Triangular Patch

Face /_ ~ Edge

Figure 4.7 Triangular patches for modeling surface currents.

Equation (4.30) in conjunction with Equations (4.13b) through (4.13d) constitute

the electric field integral equation for surface currents. Let us consider the triangular approach shown in Figure 4.7. Figure 4.8 shows

two triangles, Tj. + and Tf, associated with the jth edge of the triangular surface. The points in T j may be designated either by the position vector r with respect to the center coordinates O, or by the position vector ,oj + defined with respect to the free vertex of Tj +. In a similar fashion we can define the position vector pf, except that the vector is oriented towards the free vertex of Tf. The plus or minus sign of the triangles is prescribed by the direction of flow for a positive current flowing across the jth edge. The flow is assumed to be from Tj + to Tf. We define the vector basis function associated with the jth edge as

ej _ F ( r ) = 2--~-7 p j '

0

r in Tj +

r in T 7

otherwise

(4.31)

where fj is the length of the edge and Aj +- is the area of the triangle Tf (the convention followed is that subscripts refer to edges while superscripts refer to

faces). Some properties of F/r) are as follows"


T j+

+

jth Edge

T j "

Ij

T j§ r j-

2Aj +/I j 2Aj "/I j

Figure 4.8 Parameter definitions for triangular patches.

1. The current has no component normal to the boundary (which excludes the edge) of the triangles Tf and T f; hence, no line charge exists along this boundary.

2. The component of current normal to the jth edge is constant and continuous across the edge as shown in Figure 4.8. The figure shows that the normal component of pj+ along edge j is just the height of triangle T~ with edge j as the j base and the height expressed as 2Aff/fj. This latter factor normalizes Fj in Equation (4.31) in such a manner that its flux density normal to edge j is unity; this assumes continuity of current normal to the edge.


3. The surface divergence of the current basis function associated with the

basis element Fj is given by

[ej r i n T 7

V s �9 F ( r ) = { _ f j , (4.32) r in T f '

0 Aj- otherwise

where the surface divergence in Tj -+ is (+_ l/p~)O(p~Fj)/Opj. The charge density is constant in each triangle, the total charge associated with the triangle pair Tj -+ is zero, and the basis functions for the charge have the form of a pulse doublet.

~l~avg 4. The moment of Fj is given by (A S + A~,-j , where

t" F a v g - - / c - (A~- + A~-).j Vjds = - e j (r; + - r) ), J

r7

(4.33)

c + where p) is the vector between the free vertex and the centroid of +

T 7, with p~- directed toward and p~+ directed away from the vertex as shown in Figure 4.9, and r j - is the vector from center coordinate O

+

to the centroid of T j-.

The current on surface S(Js) can now be expressed in terms of the basis functions F; as

N

J~-~ Z cej Fj(r), j = l

(4.34)

where N is the number of edges (excluding boundary edges). A basis function is assigned to each nonboundary edge of the triangulated structure. Hence, up to three basis functions may have nonzero values within each triangular phase. At a given edge only the basis functions associated with that edge have a component of current normal to the edge. From property (1), all other basis currents in the adjacent faces are parallel to the edge. Furthermore, since the normal component of Fj at the jth edge is unity, we conclude that coefficients c 9 in Equation (4.34) can be interpreted as the normal components of current passing the jth edge. At surface boundary edges, the sums of the normal components of current on opposite sides of the surface cancel to satisfy current continuity.


(a)

t j ~

1/2(pj c+ + pj c-)

t j "

C+ i ,rjC- \ /

0

(b)

/ \ /

\ / (Top View) \ / \ /

\ /

Figure 4.9 Local coordinates and geometry representation associated with edges.

We now apply a weighting function F i to Equation (4.30) using the inner product procedure described by Equation (4.4). This yields

(E i, Fi) = jw (A, Fi) + (~rcI), Fi)" (4.35)

F i has the same form as Fj, which means this is a Galerkin procedure. The last term in Equation (4.35) can be written as

(V~, Fi) = - f dPVs . F i ds. (4.36) S


Using Equation (4.32), the integral in Equation (4.36) can now be approximated as

1 ] +) _ (C~S " F i Ms -" ~i _I.,.A ~- ( r K s - -~-- f (~ Ms : ~ i [ ( I ) ( r c -- ~( r c )]. zl i Q /

s T + (4.37)

In Equation (4.37), the average of �9 over each triangle is approximated by the value of �9 at the triangle centroid. In the same manner of approach, we have

that

~i c+ c - c - {E i, Fi} ~ - ~ [ E i ( r C + ) . p i 4- E i ( r i ) - P i ] (4.38)

~i + ) c+ - <A, Fi) ~- -~ [A(r~ " Di -Jr- A(r c ) �9 p~-], (4.39)

where the integral over each triangle is eliminated by approximating E i or A in

each triangle by its value at the triangle centroid and carrying out the integration

similar to those in Equation (4.33). Using Equations (4.37) through (4.39), we

can rewrite Equation (4.35) to be

j o ~ i c+ A(ri )" 2 + A(rc-) + ~i ~ ( r ~ - ) - ~(r~-)

= fi E(r~+) " + E ( r ~ - ) - ~

(4.40)

which is enforced on each triangle edge, i = 1, 2, 3 . . . . . N. By substituting the surface current expansion Js in Equation (4.34) into Equa-

tion (4.40), we obtain an N • N system of linear equations which, as before, can be represented in matrix form:

where the elements are

[Zij ] [lj] = [V/], (4.41)

Z i j - - e i 03 A~" --~- + A//"pi-~ 4- (I)~ -- (~)ij+ (4.42)


where

Aij+- = -~P" f Fj(r') e-JkRFR~ ds' S

(4.44)

1 f w " Fj(r') e-J~:Rr d's 41rjooe R ~

S

_y_ Re = Iv - r ' l

E~ = Ei(r cT- i )"

(4.45)

For plane wave incidence,

Ei(r) = (EoO + E 4, @)e jk'r,

and k is given by

k = k(sin 0 cos ~ba x + sin 0 sin ~bay + cos 0az),

where (0, ~b) defines the angle of arrival of the plane wave in terms of spherical

coordinates. Once the elements of the moment matrix and the forcing vector Vi are com-

puted, a system of linear equations (4.41) can be solved to compute the unknown column vector [lj]. We now look briefly at this subject.

4.2.3.3 Hybrid Method of Moments for Wire and Surface Currents

Often the types of electromagnetic interference problems that require modeling with the MOM involve the use of thin-wire currents as well as surface currents. Consider the case of Figure 4.10, where the need exists to calculate the scattered

electric field. In electromagnetic interference, for example, this problem could

represent an I/O cable connected to a signal plane and ground plane in computing equipment. We assume that the structure is not small compared to wavelength;

hence, the induced surface currents resulting from the incident field will need

to be considered in addition to the filamentary currents induced on the wire. The

scattered fields required in Figure 4.10 are generated by the as yet unknown

currents on the segments and patches. Even though these currents are unknown,

it is still possible to generate the interactions among all the elements in Figure

4.10. These interactions will give rise to the impedance matrix of the whole problem. The impedance matrix will be known as the total impedance matrix

[Zij]T.

4.2. The Method of Moments in Computational Electromagnetics

, O W,reSe ent �9 - Mode l i ng

/

/ / Zpw

Sur face Patch Mode l ing

zpp

Figure 4.10 Hybrid thin-wire/surface modeling in MOM.

223

The impedance matrix will have the following interactions: among the seg-

ments in the wire, among the patches on the surface, and between the wire

segments and patches on the surface. Figure 4.10 illustrates these interactions

graphically by employing four "submatrices" corresponding to each of the

interactions involved. The subscript " w " refers to wire and " p " refers to patches;

hence, the submatrix Zwp means the interaction submatrix that develops when the wire segments are considered as the source of scattered fields and the patch

elements are the locations where the tangential components of the scattered fields

are computed (observation points). The submatrix Zpw means the interaction submatrix that develops when the patch segments are the sources of scattered fields and the wire segments are the locations where the tangential components

of the scattered fields are computed (observation points). The submatrices Zww

and Zpp contain the interactions that develop when the sources of scattered fields and the computation of the tangential components of such fields occur within

the wire segments and within patch elements, respectively. [Zij] T in Figure 4.10 can now be represented as

Zwp

The total MOM representation can now be shown as

Zww Zpw

Vw] (4.47) ,':p] [',:]:


The submatrices Zww and Zpp are calculated by those previously represented

Equations (4.17), (4.21), and (4.23) for Zww, and by Equations (4.42) through

(4.45) for Zpp. The elements of submatrix Zwp are to be computed using Equations (4.42) through (4.45), but the E i in such equations is not the external incident

field (as it would be for elements in Zpp in scattering problems), but instead is

the scattered field produced by each wire segment. In the same manner, Zpw can be computed from Equations (4.17), (4.21), and (4.23), but E i in such equations

is not the external incident field (as it would be for elements in Zww in scattering problems); instead, it is the scattered field produced by each patch element. For computational purposes, however, all scattered fields are assumed to be produced

by currents of unit (1) magnitude; thus, all impedance submatrices can be calcu-

lated before Equation (4.47) is solved for I w and Ip.

4.2.3.4 The Aperture Problem in the Method of Moments

One of the most typical electromagnetic interference problems is that in which

apertures serve as conduits for electromagnetic radiation that penetrate into regions where sensitive electronics is located, causing electromagnetic interference. In this section we will cover the fundamentals of modeling the penetration of electromag-

netic radiation through an aperture and how these types of problems can be coupled

with a MOM algorithm to model many types of interference problems. The work herein described is based on the pioneering research in this area by C. M. Butler [30]. Other approaches to the aperture problem can be reviewed in references [31], [32], and [39]. The reader is advised to pursue those references for further details and for related material which is not covered in this section.

Consider screen surface S in Figure 4.11, which contains an aperture of any general shape. The screen is immersed in an infinite homogeneous medium of permittivity and permeability e and/z, respectively. The impressed field acting

on the aperture perforated screen is assumed to be created by the incident source currents (Ji-, Mi-) and (Ji+, Mi+) located in the left (z < 0) and right (z > 0)

half-spaces, respectively, as shown in Figure 4.11. The aperture problem can be

defined as the determination of the total electric field which would result from the interaction of the incident field, created by (Ji-, Mi-), (Ji+,Mi+), and the

aperture perforated screen.

We first need to identify E t as the tangential component of the total electric

field in the aperture. From the uniqueness theorem, since the electric field tangential to the screen must be zero on the screen (on both sides), knowledge of E t in A and the specified half-space source allows one to uniquely determine the

fields in each half-space. The next step consists of formulating an expression for


l ix

s a (aperture) J . S(Screen)

(Front of Screen)

(Behind of S c r e e n ) ~ ~ ) ~ M~

Z v

Figure 4.11 Aperture configuration in the presence of an incident field.

the magnetic field on both sides of the screen in terms of E t. This expression is

constructed by using the electric field vector potential and the magnetic field

scalar potential which assures that Maxwell equations and the radiation condition

are satisfied on both sides of the half-spaces. Image theory is also needed for

the field expressions to satisfy the boundary conditions on the screen. The mag-

netic field in each half-space is written as a function of E t so that the continuity

of electric field through A is readily ensured. Finally, the magnitude field must

be continuous along any path through the aperture. In Figure 4.12 a procedure developed by Butler [30] is outlined for deriving

the expression for H- , which is the total magnetic field in the left half-space.

In Figure 4.12a we see again the original problem of Figure 4.11. In Figure 4.12b

the aperture disappears, making the conducting screen continuous; a surface

magnetic current M = az • Et is placed over the "short-circuited" aperture on

the side of the screen facing the left half-space. The equivalent magnetic current

causes the total tangential electric field to jump from zero at z = 0, on the surface

of the shorted screen, to E t at z = 0 for points (x,y) in the region over which

M is placed. We next claim on the basis of image theory that the model in Figure

4.12c is equivalent in the left half-space to the scenario of Figure 4.12b. In Figure

4.12c all the impressed and equivalent currents reside in infinite homogeneous

space; hence, the left half-space magnetic field H - can be written as

H- ( r ) = HSC-(r) - j w F ( r ) - VO(r), z < 0 (4.48a)

226 4. C o m p u t a t i o n a l M e t h o d s in the Ana lys i s o f No i se I n t e r f e r e n c e

Screen jk X

Aperture

Z (~, E ) - - t ~ (~, E )

Z=O

X (b)

. . . . , . / M = a x E t a

Z

Z=O

l X

(e) Image

I ! ! !

I I

M I M (image) I Z

(~,~) ' ~ (~,E)

Figure 4.12 Modeling impressed currents in the aperture due to incident fields.

o r

H - ( r ) = HSC-(r) -J~22 [k2F(r) + V(V. F(r))], z < 0, (4.48b)

where r is the point of observation; k e = we/ze; and the term H sc- is the shorted

circuit magnetic field [30], which is the field due to the sources (ji, M i) which would exist in the left half-space if the aperture were shorted. The other terms

correspond to the contributions from the equivalent magnetic current plus its image and account for the presence of the aperture in the screen. The vector

potential F(r) and scalar potential 0(r) are given by

F(r) = ~ ~ 2M(r) G(r, r ' ) d s ' (4.49) A

~p(r) = 1 / 2m(r) G(r, r ' ) ds , (4.50) /z

A

where G(r, r ' ) is the Green function

1 e - j k l r - r'l G(r, r ' ) =

47r I r - r'l and m(r) is the surface magnetic charge density, related to M by the continuity

equation

V t �9 M(r) + jwm(r) = O.


The rationale for using a model based on equivalent magnetic sources is based on the fact that it leads to the final equivalence principle shown in Figure 4.12c, which involves only sources radiating in open space and which also allows the calculation of fields from potentials incorporating the free-space Green functions

for any kind of aperture.

In a similar fashion we can model an equivalent problem which is valid for

the right half-space. This model is illustrated in Figure 4.1 3. The right half-space

magnetic field H + can then be written as

H+(r) = HSC+(r) + J~22 [k2F(r) + V(V. F(r))], z > 0, (4.51)

where I-P c+ is the right half-space short-circuited magnetic field due to (ji+, Mi+).

The equivalent magnetic current for the right half-space model is - M .

The continuity of magnetic field along a path through aperture a can be

achieved by

Htan(r), r �9 a. lim=_,o- H ~ ( r ) = lim~_,o+ +

A X

Plane Vacated By Screen

-M (image)

V

-M

j i+, M i+

(image)

( ' I

I

"l

Z=0 V

Z

Figure 4.13 Equivalent problem to that of Figure 4.12.

228 4. Computat ional Methods in the Analysis of Noise Interference

Applying Equations (4.48) and (4.51) to the preceding requirements yields

.to 1 j ~ [/~F(r) + VtV" F(r) = ~ H~C(r), r e a, (4.52a)

where ~7 t is the tangential-to-surface gradient operator, and for ease of expression

we have defined

H sc = H s c - - I-I sc+. (4.52b)

F(r) is tangential to the screen because M = Mxax + Myay, as is H sc (x,y,O) on

the screen because the normal component of the magnetic field is zero at a

perfectly conducting surface. Hence, we do not need to append the subscript " t " to either F(r) or H sc (x,y,O).

The unknown in Equation (4.52) is M. We can then represent Equation (4.51) in a form that exhibits the dependence of M:

y f ' j-~-~ [k a M(r)G(r, r ' )d s ' + V~ �9 V;M(r')G(r, r ' )d ' s = ~ HSC(r) A a

(4.53)

o r

j 2 1 r/k (ka + vt~7 ") f M(r')G(r, r ' ) d's = ~ HSC(r).

a

(4.54)

Equations (4.53) and (4.54) are integro-differential equations which can be solved

by the method of moments. When M or E t is available from the solution of Equation (4.53) or (4.54) for a given aperture problem, the magnetic field on the two sides of the screen can be calculated from Equations (4.48) and (4.51). The electric field can be calculated from

- - 1 E+(r) = E~C+(r) -7- ~ VxF(r). (4.55)

T w o - M e d i a P r o b l e m We now concentrate on developing integro-differential

equations for the aperture problem in which the screen with the aperture in it

separates half-spaces of different electromagnetic materials /x, e (two-media

problem). The screen with an aperture is shown in Figure 4.14a, where the sources

are located one on each half-space with homogeneous materials/z+_ and e+,_. The figure shows a step-by-step procedure for the left half-space z < 0 problem.

The approach is similar to the one leading to Equations (4.48) and (4.51). Using


Screen j X

7=0

(b)

M = a x E t a I

(~-, ~-)' Z=O

i,x

Screen Shorted

. . . .

(c) I x

I ! !

I OlO

~ �9 o

v

Image

I M | M (image)

I Z (~-, ~- )' ~ (~-, ~-)

Figure 4.14 Procedure for analyzing the scattered field from the aperture for two different media.

Figure 4.14c and an analogous one for the fight half-space, we can write the

half-space fields as

E T_ = E s c w u 1 V X F ~ (4.56)

H + = H sc+ u F + -u ~' ~p+ (4.57)

or

D - - O . ) - -

H+ = HSC+ u J-~T [ K z F + u V V " F-V-I, KT_

(4.58)

where

K~ = (.O2/~8_T_.

The potentials are given by

F +(r') = 2e~_ M(r ' )G +(r, r ' ) d's A

(4.59)

-V-(r,) = 2 f m(r,)G ~_(r, r ' ) d's [.Lu a

(4.60)


and the Green function is given by

1 e -jk~-Ir-r'l G +(r, r ' ) =

41r I r - r ' I ' (4.61)

where M and m are related by

V t �9 M(r ' ) + jwm(r') = 0.

The integro-differential equation for solving M in the two-media problem is

�9 t O t o j ~ + [K 2 F + -t- V tV- F +2 - t - j ~ _ [ K 2 F - n t- V t V" F] -- H sc, r c A , (4.62)

where H sc is given by Equation (4.52b). Equation (4.62) can also be solved using

the method of moments.

Slot Apertures Of all the apertures typically found in real problems, slots are

often the most common. Slots are commonly used for venting out the heat

produced in electronic circuits. They are also present as gaps which occur when two materials are not well seamed together. Slots are a common conduit for

electromagnetic radiation and can cause all sorts of interference problems. We

will consider long slots here, because for very long slots excitation is invariant along the slot's axis, and thus computational ease is attained. It turns out that field patterns diffracted by long slots are similar to that diffracted by an infinite- length slot where the observation point is near the slotted screen (which is typical in EMI problems) but not near the slot ends (or points where the field has a

null). This approximation, however, does not hold when the finite-length slot is

an integer multiple of M2 or where the excitation varies along the slot axis.

The vector equations previously derived reduce to two scalar, one-dimensional

equations which can be solved independently; hence, the total field can be easily

constructed. In this simplification one equation is associated with TE excitation

to the slot axis, while the other equation is associated with TM excitation. The

reduction of the vector equations to two one-dimensional scalar equations also

simplifies considerably the integro-differential equations previously derived. Con-

sider the slot shown in Figure 4.15 of uniform width 2W, with its axis along the

y-axis. There are two conditions to consider: (1) the impressed field has only a

y-component of magnetic field and an electric field transverse to the slot axis,

and both are independent of y (TE case); and (2) the impressed field has only a

y-component of electric field with the magnetic field transverse to the slot axis,

and both are independent of the y-component (TM case).

i x Z

(


Figure 4.15 Long slot aperture in the presence of an incident field.

For the TE case, it can be shown [33] that the integral equation for solving

for the term My 09

-~ f M~(x')~o2)(~lx - x'l)d'~ = gC(x), r/ -

0.)

x ~ (-w,w), (4.63)

where/-/~o 2) (-) is the zero-order Hankel function of the second kind and M has

been expressed as M = Mv(x)a r My becomes unbounded at the slot/screen edges.

For the TM case, it can be shown [33] that the integral equation for solving

for M x is

--~ ~ at- k2 Mx(x')H(o 2~ (~lx - x ' l ) d x ' = ~ c (x), - - W

x ~ ( - x , x ) .

(4.64)

By using a procedure similar to the one described in [34] one can show that

the general two-media equations reduce to the following when the aperture is a

uniform slot (2W in width) on very large length. For the TE case,

i k+ 7 - I) + ~ - I )dx '= ~C(x), - - W

x e ( - x , x ) .

(4.65)


For the TM case,

~ x ~ + k ~ M~ (x'~ K ~_ - - W

~o ~ (k_[x - x'l)dx'

+ -2 ~ + k2 Mx(x,) 1 K+ rl+

- - W

/-/~o 2~ (k+ lx - x'[)dx' (4.66)

= ~ c ( x ) , x e ( - x , x) .

The integral Equation (4.63) for the TE excited slot case is the dual of that for a uniform width, very long, conducting strip subject to TM illumination. In the same manner, the TM excited slot Equation (4.64) is the dual of a corresponding equation for the TE excited strip. We can deduce that moment methods for solving strip equations [35] are applicable to the preceding slot equations above.

Furthermore, it can be observed that Equations (4.63) and (4.64) are identical in form to the well-known electric field integral equation for thin wire which is

used in the method of moments. With small modifications, techniques for solving

thin-wire equations are applicable for the TM excited slot equations. Efficient

solution methods are obtained in [36]. Solution techniques for the two-media

slot equations are presented in detail in [37]. The far-field equations for both the single and two-media slotted screen prob-

lems are computed as follows. For the TE case,

w

_ _ f Hy ~--/-Fy c+ u k_z_ ej 4 e -jk~-( r l -z-N/~ ~ My(x,)e-Jk~_x' sinO drx. (4.67)

- - W

For the TM case,

- - e-Jk-v-( i E y ~ E s c + . u k_v_ ej 4 __y ~ COS 0 ~ M x (x') e -jk~x' sin 0 d'x, (4.68)

- - W

where s r is the radial displacement in the xz plane from the slot axis to the far-

field observation point, and 0 is the angle measured in the xz plane from the

positive z-axis to the ray.

Narrow Slots If the slot of interest is narrow relative to wavelength (2W < < ~),

then the Hankel function in Equation (4.63) can be substituted by its small


argument approximation, and the resulting integral equation has an exact solution.

Since Ix - x' I -< 2w in H(o 2) (k lx - x ' l ) ,

- -- Y + In + lnlx - x'l + J , > > 1, 77"

(4.69)

where y = 0.5772 is Euler's constant. Using this simplification in Equa-

tion (4.63) we arrive at the integral equation for the TE excited slot:

2 k - - . j __m My(x ' ) l n l x - x ' [ dx ' + y+j--~+ In My(x')dx' =Hv (x). - - W - - W

(4.70)

The preceding integral equation can be solved exactly to yield

,

My(x) = -2 kw (kw) zr " ~/1 - (x/w) 2" y + ln - -~ - - + j -~ -

(4.71)

A similar narrow-slot analysis can be performed for the TM case to obtain the

solution for Mr(x) in the TM case:

M~(x) = j - f kw H~x c (0) + -2 -~x H~ (x) X/1 - - ( X / W ) 2 . (4.72) x=0

Approximate solutions corresponding to Equations (4.71) and (4.72) but for a narrow slot in a screen separating two different media are available [38]. Far fields can now be evaluated using Equations (4.67) and (4.68).

Hybrid Method of Moments for Apertures The method of moments definition and operator notation which was used for wire segments and surface-

patch modeling can also be used for apertures. Following the approach of

Harrington, one can define a set of basis functions Mj, j = 1, 2, 3 . . . . . N, and

let the surface current over the entire aperture be defined as (see Figure 4.16)

N

M(r') = ~ %Mj.(r'). (4.73) n = l

For an arbitrary shape, aperture Equation (4.73) can be substituted back into the

integro-differential (4.53), for the homogeneous case, or into Equation (4.62) for


n Aperture Surface Elements

/ j . t F "

0

Aperture

~k z Aperture Discretization

~ Jth Aperture Element

/

II I IVl

Figure 4.16 Example of modeling surface currents on an aperture.

the two-media (inhomogeneous) case. We can now use a weighting function

Wi(r) and perform the inner product with both sides of Equations (4.53) and

(4.62). If Wi(r) has the same form as M(r), then we have a Galerkin method.

The MOM expression becomes

[Zij ] [Mj] = [V/], (4.74)

where

[Zij] =

m

(Wl, L(M1)) . - . (W2, L(M1)) . . .

(WN, L(M1)) . - .

m

(W~, L(M N))

(WN, L(MN))

(4.75)

[~] =

a2 Ot 3

.O~N

(4.76)


1 [v~] =

B m

(W 1, H sc (r)) (W 2, H sc (r)>

o

(WN, H sc (r))

(4.77)

and

2 f L(M(r')) = j - ~ (k 2 + VtV" ) M(r')G(r, r ') d's. (4.78) Z

This procedure can also be used for slots using the integro-differential Equations (4.63) and (4.64), or (4.65) and (4.66). The simplification is considerable since now basis function M(r) becomes Mx(x' ) and My(y'), and the Green function becomes Hankel functions; hence, Equations (4.75) through (4.77) are much easier to evaluate.

Method of moments problems that involve apertures are much more complex in topology. Consider the electrical geometry shown in Figure 4.17. Figure 4.17

A I I I

Surface P a t c h Modeling

/

Z w w r ~ . . ~ ~ ~ ~ wire Segment Modeling /

Zap

I a l i a , I Patch, 0 I

v a2

Zpa Zaa

Figure 4.17 Hybrid thin-wire/surface/aperture modeling with the MOM.


is an extension of Figure 4.10, with the addition of an aperture region. Fig- ure 4.17 shows the interaction matrices between wire segments, surface patches,

and aperture elements. We have assumed in this example that M(r') in Equa-

tion (4.73) can be modeled as square patches of area (Af) 2 of constant mag-

nitude given by the expression [39]

N M(r') = ~ [a'ljalj + a2ja2j]Mj(r'),

j=l

where cqj and a2j are constants to be evaluated. Mj(r') = 1 for r ' in patch j or

0 otherwise, a lj = a l(rj) and a2j = a2(rj) are position locations for the center point of patch j.

The interactions between all the elements in Figure 4.17 will give rise to the

impedance matrix of the whole problem Z T. The impedance matrix ZT will have the following interactions: (1) interactions among segments in the wire, (2)interactions among surface patches, (3) interactions among aperture elements,

(4) interactions between segments and aperture elements, (5) interactions between

surface patches and segments, and (6) interactions between surface patches and

aperture elements. Figure 4.17 illustrates these interactions graphically by showing nine submatrices corresponding to each of the interactions involved. The

term " w " refers to wire segments, the term "p" refers to patch elements, and the term "a" refers to aperture elements. For example, the submatrix Zpa is made up of elements resulting from the interactions between patch elements and aperture elements, where the patches are considered as the source of scattered fields and the aperture elements are the locations where the tangential components of such fields are computed. The submatrices Zww, Zpp, and Zaa contain the interactions which develop when the sources of scattered and the computation of the scattered fields occur within the wire segments, patches, and aperture elements themselves,

respectively. The total impedance matrix [Zij] T can be written as [ ww wa] [Zij]T-" Zpw Zpp Zpa . (4.79)

Zaw Zap Zaa

The total MOM representation of the problem in Figure 4.16 can be given by

Zpw Zpp Zpa [p "- gp . (4.80) ZawZapZaa [a ga

The calculation of submatrices Zww, Zwp, Zpw, and Zpp was previously discussed

4.3. High-Frequency Methods in Computational Electromagnetics 237

in Section 4.2.3.3. The calculation of submatrix Zaa can be accomplished using Equations (4.75) through (4.77). Submatrices Zwa and Zpa can be calculated from Equations (4.75) through (4.77), but Ei(r) is computed from the scattered fields of the wire segments and surface patches, respectively. Submatrices Z~w and Zap can be calculated from Equations (4.17), (4.21), and (4.23) for Zaw and Equations (4.42) through (4.45) for Zap, but the incident field E i in those equations is the scattered field calculated corresponding to the field generated by the aperture elements and tangential to wire segments and patch elements. For ease in computational purposes, all submatrices in the impedance matrix are calculated independently by assuming that each wire segment, each patch element, and each aperture element have current densities of unit magnitude. This way all impedance submatrices can be calculated before Equation (4.80) is solved for I w, lp, and I a.

4.3 High-Frequency Methods in Computational Electromagnetics

Although the method of moments can be used to solve electromagnetic interference problems where the electrical structures are small in terms of wavelength, high-frequency techniques should be seriously considered when modeling large electrical structures (L > > A; L is the size of the structure to be modeled). High-frequency techniques allow large electrical structures to be "split" into simpler structural shapes that can be modeled more easily. This approach provides tremendous savings for computational purposes, since large structures no longer need to be discretized as in the method of moments (i.e., wire segments, patch elements, aperture elements), but rather can be subdivided into smaller shapes for which models of electromagnetic wave propagation in the presence of such smaller structures already exist. In this section we briefly review the fundamentals of some of the most widely used high-frequency techniques: geometrical optics, geometric theory of diffraction, physical optics, and physical theory of diffraction. One of the most important objectives of this section is to show how high-frequency techniques can be combined with the method of moments in solving a large number of typical

electromagnetic interference problems. These "hybrid" techniques will receive special attention in Section 4.3.5.

High-frequency techniques can complement the method of moments in analyzing a variety of electromagnetic interference problems. Table 4.2 describes how these two techniques can achieve this cooperation.


4.3.1 G E O M E T R I C A L OPTICS

High-frequency asymptotics of Maxwell equations provide vectorially geometri-

cal terms. Maxwell equations in a homogeneous medium can be written as

V2E + k 2 E = 0

V . E = 0 (4.81)

V • E = j wlzH

where k = w(/ze) 1/e is the propagation constant, which becomes larger as fre-

quency increases. For large values of k the electric field can asymptotically be

expanded in a polynomial of k-1 using the Luneburg-Kline expansion,

co

E(r) = e-J~S(r) ~ ( - j k ) -m Em(r), (4.82) m = 0

where S(r) is known as the phase function and VS(r) points in the direction in

which the rays travel. In geometrical optics (GO), we consider the case when

m = 0. If we substitute Equation (4.82) into Equation (4.81a) and equate like

powers of k, we get

IVS(r)[ 2 - 1 (4.83)

1 [VS(r)] E o = ~ (V 2 S(r)) E o = 0. (4.84)

Table 4.2 How Method of Moments and High-Frequency Techniques Complement Each Other

Computational Technique Capabilities

Method of moments

High-frequency methods

1. Analyzes objects which are small in terms of wavelength

2. Provides numerous types of information concerning radiating elements

3. Can treat electrical structures of arbitrary shape

1. Analyze objects which are large in terms of wavelength 2. Incorporate other solutions into their formats 3. Provide very little information about radiating structures

(especially wire structures) 4. Only have diffraction coefficients for a small number of

structures


From Equation (4.83) it can be seen that the phase velocity of the geometrical

optics term is k/w, i.e., the phase variation along the ray equals the path length

times k. It also indicates that rays in homogeneous media are straight lines. It

can be further shown that geometrical optic fields are TEM waves, that is, the

field vectors are perpendicular to the direction of ray propagation and E and H

fields are perpendicular to each other. Solving Equation (4.84) for the wavefront

in Figure 4.18, which consists of a Gaussian curvature, we obtain

[lS ] Eo(ro) = Eo(o'o) exp - ~ V 2 S(r) do- , (4.85)

where o-is the arc length at observation point Po as shown in Figure 4.18, and

the term within the integral is given by

1 1 72 S(r) -- -t-- (4.86)

pl - o- p2-F or'

where p~ and P2 are shown in Figure 4.18 and E 0 implies E m of Equation (4.82) for m = 0. Substituting Equation (4.86) into Equation (4.85), we obtain

1/2 [ /91/92 ] e -jk(S(ro)+ ~ (4.87)

EG~ = E~~176 (Pl + ~ + o-)

where we have added in Equation (4.87) the phase variation with r being the

position vector of P0 and r 0 being the position vector of O. Figure 4.18 shows

the field strength varying inversely proportional to the o-of the sectional area in

a matter dictated by Equation (4.87). Notice that at o- = - P l and o- = -P2, the sectional area vanishes and the field intensity seems to be infinite; these are

\ pl

\ \

\ \

a=lOPo I

Figure 4.18 Geometric optics ray tube.


called caustics. In Equation (4.87) the positive branch of the square root is chosen.

Therefore, if Pl,2 < 0 and o- > -IP21 or o- > -]Pl [, then a caustic is crossed and (P2 + o-) or (Pl + o-) changes in sign within the square root so that a phase jump occurs at 7r/2.

4.3.1.1 The Incident Field

In considering the incident field, we first need to evaluate Figure 4.19a, where incident rays illuminate an impenetrable surface. Part of the rays are reflected

from the surface, whereas others create a boundary between the illuminated

region and the shadow region. This boundary is known as the shadow boundary,

Reflected Rays Incident

J

/ t

(a)

\

~ / \ Region it I

Wedge Shadow \ Region

Re - - -

(b)

Incident Ray,,

Smooth Convex Surfaces

Figure 4.19 Shadow boundaries: (a) incident shadow boundary; (b) surface shadow.


and GO predicts the presence of no fields in the shadow region. There are two basic types of shadow boundary: the incident shadow boundary, as shown in Figure 4.19a, and the surface shadow boundary, which is associated with smooth, perfectly conducting convex surfaces, as shown in Figure 4.19b. Equation (4.87)

can now be rewritten to represent the incident field as

Go E ] = E~ (r~ (Pil + ~ 2 + ~

1/2

e -jk(s(r~ ~ , (4.88)

where " i " denotes "incident" quantities. Notice that for plane-wave illumina-

tion, f;1 = P'2 = oo and Equation (4.88) reduces to

EiC;O(r) = EoCoi~

The magnetic field HiC~ is simply given by

1 H~~ = -~0(~i • EiC~ (4.89)

where Z 0 is the wave impedance of the medium.

4.3.1.2 The Reflected Field

The reflected GO field is discontinuous across the reflection shadow boundary for edge-type structures as in Figure 4.19a, whereas in convex surfaces the incident and reflected shadow boundaries merge into the surface shadow boundary in Figure 4.19b. GO reflected fields vanish at the surface shadow boundary and also within the shadow region. The GO field associated with the reflected rays

can be expressed as

E~~176 (~ + trr)(fF 2 + o r)

1/2

e -jk(~ (4.90)

where Pr is the point of reflection at the surface as shown in Figure 4.20 and Po

is the point at which the field is to be calculated ( " o " for observation point).

The other parameters are shown in the figure. The reflected field ErG~ is

related to the incident field Ei~~ 0 at the reflection point Pr by the boundary

condition

n x [Eic~ + Erc~ ] - 0 , (4.91)


~ rl

\

J

r P2

Figure 4.20 Reflection ray tube.

where n is a unit vector normal to the surface at Pr" Using the relationship

between incident and reflected fields as shown in Equation (4.91), we can then

say

[ ] ErC~ = Eic~ R ( ~ + O.r)(~ + Or)

1/2

e -jk~ (4.92)

where EGO(Pr) was defined in Equation (4.88) (substitute r o for Pr in the equation)

and R denotes the dyadic surface reflection coefficients at Pr-


The associated reflected magnetic field HGO(Pr) can simply be given by

1 HrC~ = Zoo O'r X Er~~ (4.93)

It can be shown [40] that R can be simplified to a simple diagonal form if the fields are expressed in terms of an appropriate set of unit vectors which are fixed in the incident and reflected rays as shown in Figure 4.21. This transforms Equation (4.93) into the separable form

[1 ~ ]l,: E~ ~ (Po)J - 1 Ei G~ (Pr) ( ~ + O'r)(f~2 + Or) e-Jkcrr' (4.94)

where

EGO(Pr) GO " i/(Pr)e ] -- Eill (Pr)el + Ei

E~~ = E~~ + Eirl Po)e~

13'

ell i I

I I I

In

Pr

ell r

Figure 4.21 Unit vectors for reflection problem.


as can be observed in Figure 4.21. If we further assume that the incident field is a spherical wavefront, it can be shown that

(p~,2)_l = ~ -i+l 1 COS /~i

(4.95) [sinZO2+sin2Ol_T_ ~ 1 [sinZO2+sin201]2 4

R1 R2 COS 2 /~i R1 R2 R1R2 '

where o -i, /~i have been previously defined, R 1 and R 2 constitute the principal radii of curvatures of the surface at Pr, and 01, 2 are the angles between O "i and ul and u2, respectively (see Figure 4.22), where ul,2 are known as the principal surface directions at Pr- A more general formula for (P],2)- 1 (i.e., besides spherical wavefronts) is given in [41].

We can conclude that the total GO electric field at Po in the illuminated region is basically the sum of the incident and reflected ray fields:

[ /0~1~2 ] -jk~ (4.96) ET~~ = Eic~ + Eic~ R (~ + O.r)(~ 2 -4- Or) e .

Similarly,

HTGO(Po) = 1 i Z00er • E G~ (4.97)

Ul t x n = b

02 b

u2 ~ k ' ~ ~ Z ~ - - - - ' . " " ~ V / " " ai �9

Pr

Figure 4.22 Geometric description of wavefront reflection from a convex surface.


4.3.2 GEOMETRIC THEORY OF DIFFRACTION

The geometric theory of diffraction (GTD) is a systematic extension of classical geometrical optics which was proposed by Keller [42] to describe the phenomenon of diffraction at high frequencies in terms of diffracted rays. Besides the usual

rays, which are part of physical optics, diffracted rays are introduced. The need

to introduce diffracted rays in addition to the incident, reflected rays which are

present in geometrical optics is caused by the following:

1. For impenetrable obstacles, the GO rays do not exist in the shadow

region (behind the obstacle).

2. The GO field is incorrect at the incident and reflection shadow boundaries

(SB) where the GO incident and reflected fields will vanish; hence,

highly discontinuous field behavior is observed.

Because GO does not provide a solution in the shadow region, Keller developed

the principles of diffracted fields, which can entirely account for the fields in

the shadow region. Diffracted fields obey the generalized Fermat's principle.

We can now propose that the total field (ET, HT) at a point Po in space consists

of a superposition of the GO fields (incident and reflected) and the fields of all

possible diffracted rays which can reach the observation point Po, that is,

E T = E~ ~ + E GTD (4.98a)

H v = H~ ~ + H GTD, (4.98b)

where E~ ~ and H~ ~ are defined by Equations (4.96) and (4.97), and E Gyp and I-I GTD refer to the corresponding diffracted ray field components as derived by

Keller's GTD. In this section we will briefly review the development of expressions for E GTD and H GTD.

To better understand GTD, we must first outline three basic principles (as

outlined by Keller) which all diffracted rays hold.

1. Diffraction of rays is a local phenomenon at high frequencies; hence, to

study the diffraction that may occur in a complex, opaque, perfectly con-

ducting object, we only need to look at a limited number of diffraction

points on the surface of the object.

2. Diffracted rays satisfy the generalized Fermat's principle; hence, rays

which are diffracted by a line of discontinuity as shown in Figure 4.23

will lie on a cone centered on an imaginary line which is tangent to the

line of discontinuity. The cone half-angle/3 o is the same angle that


0

Diffracted Rays Ah~

Line of Discontinuity

Incident Ray Tangent to Line of Discontinuity

Figure 4.23 Diffracted rays from a discontinuity.

the incident ray makes with the imaginary line tangent to the discontinuity

at the diffracted point. Furthermore, this principle guarantees that rays impacting a geodesic surface will shed along forward tangents, giving rise to surface-diffracted rays as shown in Figure 4.24.

Reflected Rays

Incident Rays

ji

Reflected Rays

i RSB I

I Edge Diffraction

I ISB

Body

Surface-Diffracted Rays

P1

Figure 4.24 Rays incident on a geodesic surface.


3. At distant points from the diffraction point the fields behave as GO fields.

Let us now consider the general form of GTD diffracted fields (E GTD, H GTD) associated with diffraction edges, convex surfaces, and vertices.

4.3.2.1 Diffraction by Edges

Consider the perfectly conducting wedge illuminated by a source as shown in Figure 4.25. The total field E v at point Po outside the wedge is given by

ET(Po) = EG~ + EGTD(Po), (4.99)

where E~~ can now be defined as

ET G~ = Ei G~ t~i + Er G~ Or,

where Ei G~ and Er G~ (defined by Equations (4.88) and (4.92)) exist only in the illuminated region, and 0i and 0r are step functions for the incident and reflected fields. The step functions are used to identify the regions where Ep ~ Er G~ exist. In the case of the wedge, 0i and 0r are defined by (see Figure 4.25)

} 4.,OOa, tgi= if 7r + ~bi < ~b < nTr

Po

Diffracted Ray f

f

n~

~ d e n t R a y ~ ~ Source

Figure 4.25 Side view of edge-diffracted ray.

248 4. Computat ional Methods in the Analysis of Noise Interference

and

) 0i = i f ~ + ~b i < ~b < n " (4 .100b)

The diffracted fields E GTD exist everywhere exterior to the wedge in the region

0 < 0 < n 7r. The diffracted rays reside on a "cone" about the edge as previously

described in Figure 4.23. Away from the edge, E cTD behaves as a GO field.

It can be shown, using the illustration presented in Figure 4.26, that the

diffracted fields can be expressed as

GTD EicO(Pd) k �9 -jko-ed (4.101) Ee (No) ~ .Ded (~, ~1, ~o, k) o.ed(ped n t- o.ed ) e ,

where Ded (~b, ~b', flo, k) is the dyadic edge diffraction coefficient. This parameter outlines how the energy is distributed in the diffracted field as a function of angles

&n I

i ~ \\

Pd

ped

Figure 4.26 Edge-diffraction ray tube.

4.3. High-Frequency Methods in Computational Eiectromagnetics 249

~b, ~b', and/3o- The dyadic also depends on k. ped is the edge-diffraction caustic

distance; O "ed is also defined in Figure 4.26. The magnetic field is given by

1 O" d GTD HGTD(p~ ~ Z0 X E e (Po)" (4.102)

4.3.2.2 Diffraction by Convex Surfaces

Consider now the perfectly conducting convex surface of Figure 4.27, which is

illuminated by a source. As for the case of a wedge, the total field ET at point

Po outside the surface can be expressed as

GO EGO(pL) 0i -4- E r (PL)0r -+- EGTD(PL)

ET(Po) = GTD E (PsH)

if Po = PL, the illuminated] region

ifPo = PSD, the shadow / region j

Notice that t~ i = t? r = 1 if the illuminated region is above the shadow boundary,

or t~ i = t~ r = 0 if the illuminated region is below the shadow boundary. It can r be shown, using Figure 4.28, that the surface diffracted fields ~ s , s for surface)

can be expressed as

GTD EGO(p1) k Es (Po) ~-- " Dsd(P1,P2) e-jkd 4103

3W(P2) J o'sd(p sd + 0 "sd) e -jk(rsd,

where ~W(P1) and ~W(P2) refer to the widths of the surface-ray strips at P1 and P2, respectively (see Figure 4.28). The term [SW1 / 8Wz]e -j~a indicates the energy

Caustic of Surface Ray

P2 P1

Po Surface Ray

Scatterer

oJ

Incident Wavefront Source

Figure 4.27 Scattering from a convex surface.


(b) Po �9 /

~ ......~irect Ray / Reflected Ray ~ /

n d i m Illuminated Region ~ [ (3" i

SSB ~ - Shadow Region P2 P1

Pr ~ a Scatterer Incident

Ps 1 ~ ... . . ._ ~ Source

Figure 4.28 Surface-diffracted ray tube.

flux in the surface-ray strip from P1 to P2- The term e - j k d represents the phase delay along the surface-ray path. Notice that because the rays propagate forward on the surface, in a matter tangential to the surface-ray paths giving rise to

surface-diffracted rays, that energy is lost from these surface rays and the ray

fields attenuate. The term Dds(P1, P2) is the dyadic matrix for surface-ray fields at P1 which also account for the amount of diffraction on the surface-ray field from P2- The magnetic field is given in the usual fashion. The t e rms psd and tr sd

are defined as before and shown in Figure 4.28:

1 trds EGTD HGTD(p~ = Z X (Po). (4.104)

4.3.2.3 Diffraction by Vertices

Consider the perfectly conducting corner in Figure 4.29. A ray which strikes a

perfectly conducting vertex produces a continuum of diffracted rays emanating

from the vertex in all directions, as shown in the figure. In a matter similar to edges and convex surfaces, diffraction by a vertex w cTD ,---v , v for vertex) can be

represented in the form

e --Jktrd GTD EiGO(Pv) Ddv(O.i, o.d,k) O "d ' Ev (Po) -~ �9 (4.105)

where Ddv(O -i, o -d, k) is the dyadic diffraction coefficient for a vertex. It describes

the way in which the energy in the incident field Eic~ is distributed in the

4.3. High-Frequency Methods in Computational Electromagnetics

n

\

251

\ \

d O"

Pr

Pv Corner Reflector

Figure 4.29 Corner-diffracted ray tube.

diffracted rays. Odv depends on the angles of incident, diffraction, 0 5, 0 "d, and on the wave number k. Again the associated magnetic field is given by

1 ~ d HGTD(p~ ~Zo • EGTD(p~ (4.106)

4.3.3 UNIFORM GEOMETRIC THEORY OF DIFFRACTION

In Equations (4.101), (4.103), and (4.105) we did not define the expressions for

Ded, Dos, and Day. We now need to address this issue. In its original form, the GTD is a purely ray optical technique, but it fails at and near caustics. The


modification of GTD which is required to calculate fields near the caustics of diffracted rays is described in [43] in terms of the method of equivalent currents,

which indirectly employs the GTD to calculate these currents. The failure of the

purely ray optical GTD field description at and near the shadow boundaries

results from the fact that within these regions the dominant character of the true

diffracted field must change rapidly but continuously from a purely ray optical

field behavior outside the transition regions to a behavior which allows one to

compensate for the discontinuities in the GO field at the shadow boundary such

that the total high-frequency field remains continuous at these boundaries. To

accomplish such a task, the diffraction coefficients and other GTD parameters

cannot be allowed to be range independent, that is, the field description has to

depart from a purely ray optical one. The uniform theory of diffraction (UGTD)

[44] accomplishes this task in a simple and accurate manner, and it employs the

same ray paths as in GTD. Thus, the uniform GTD field departs from the purely

ray optical character to yield a bounded and continuous total field across the

shadow boundary transition regions, whereas exterior to these transition regions

it automatically reduces to the purely ray optical GTD field description.

4.3.3.1 Uniform Diffraction Coefficients for Edges

Consider Figure 4.30, which contains the diffracted distribution representation

around Keller's cone. Using Figure 4.30, Equation (4.101) can be rewritten in matrix form as

E ~ TD = 0 _Duds [E(t;TDb i _.]l o.ed(ped _[_ o.ed) e -jktred, (4.107)

where E~ TD and E~ TD are the orthogonal components of the uniform diffracted

field. E~ ~ and E~ ~ are the orthogonal components of the incident field Ei G~ as

described in Figure 4.30. The "uniform-diffraction-surface" coefficient Dud s is

given by [45,46] and stated here as

e -J Trl 4

Duds(qS, q~i,/~i) ___ -2n 2X/~sin/~i

cot( + 0 0 i_ + co t (~ r - ( ~ - 4,i)/an) �9 F [ L i ~ a - ( ~ - ~i)] , (4.108) +_ [cot(77" + (~ -4- ~ i ) / 2 n ) f [ L r n k a + (~) + ~i)]]

+ [cot(Tr-- (~b + ~)i)/2n)F[Lr~ + ~bi)]]

where

a-V-(fl) = 2 cos2[(2nTrN T- - fl)/2] (4.109)

4.3. High-Frequency Methods in Computat ional Electromagnet ics 253

(a) f

El3 d

Diffraction ~ l p ~ , . Plane El31

Keller's Cone

Plane

(b)

. , , , .

RSB

. . . _ . . . . - . - . . . _ . . . . , -

ISB

(;ed

= nx ~ Diffraction I Edge

Figure 4.30 Geometry for uniform scattering from a convex surface.

and N + are the integers which satisfy the equation

2n ~" N -v- - ( ~b -T- ~b i) = -T- ~- fl = ~b + ~b i. (4.110)

n defines the exterior wedge angle as in Figure 4.30; hence, n = 2 for a 3

half-space, n = ~ for an exterior right-angle wedge, etc. The two faces of


the wedge are referred to as the " 0 " face for ~b = 0 and the " n " face at

~b = n rr, respectively, as shown in Figure 4.30. For spherical wave illumination

on a straight wedge,

L r~ = L rn = L i = oio "d o -i + o -d sin 2 /~i, (4.111)

where O "ed are defined in the figure. The function F[x] shown in Equation (4.108)

is the Fresnel integral defined by

o o

F(x) = 2 j ~ x e jx f e -j~'2 d T".

v~

(4.112)

4.3.3.2 Uniform Diffraction Coefficients for Vertices

A vertex can be formed by the truncation of at least two edges; often it is the

truncation of several edges. Consider Figure 4.32, which shows a right-handed

vertex in a perfectly conducting planar plate. The uniform diffraction coefficient

to be used in Equation (4.105) is given by [47]

_ e -j'rr/4 X/sinfll sinB: D u a v - . _/=---7 Cuav(PE) F[kLca('rr+ r 2 - ill)i- (4.113)

COS ]32 - - COS 181 V Zc/'k

Source o" ~ Point

~ C

Planar PE Corner ',ll ~ ~

132 Receiver Point

Figure 4.31 Geometry associated with comer diffraction problem.


(a) bl

n2 I n1

b2 P2

P1

(b) Po Q /

, q ~ ~ . irect Ray ! Reflected Ray ~ /

Illuminated Region o i

SSB Shadow Region P2 P1

Pr \ o Scatterer ~ ,

Ps i ~ ..._._ ~ ~ Source

Figure 4.32 Geometry for uniform scattering from a convex surface.

For the case of a comer in planar geometry, Cudv is given by

e-J Tr/4

Cudv(PE) -- 2Xf27rk s in /~ i

I f [ k L a ( ~ ) ~ (j~i)] El kLa(ltb + (]~i)/2,~ 1

+ F[~Ca(4, + 4'1)] F [ ~ ( 4 ' ~ + 4;)/2 ~r " -

(4.114)


Again F(x) is the Fresnel integral; L c and L are defined as

~ o - LC ~rc + or'

0 "v 0 " L = o-' + o" sin2 fl';

and a(4) - ~b i) = 2 cos2(~b __ ~bil2).

4.3.3.3 Uniform Diffraction Coefficients for Convex Surfaces

A uniform GTD solution for the diffracted coefficients Dud s in Equation (4.103)

is given next for the surface scattering shown in Figure 4.32. In Figure 4.32a,

t I and t 2 are unit vectors in the direction of ray incidence at locations P1 and

P2. The terms n 1 and n 2 are unit vectors to the surface at PI and P2, and bl and

b 2 are such that b l = t~ • n 1, b 2 = t 2 • n 2. Notice that when there is no torsion , K on the surface, bl = b2. The 'uniform-surface-diffraction coefficients" Dus d in

Equation (4.103) can be given by [45,46]

~ e-J'rr/4 ] DusdK = -- N/m(P1)m(P2) 2 ~ / ~ { 1 - F (x d) + P(s r) }

1/2

8W(p2) e ,

(4.115)

where P( ( ) is a Fock-type surface-reflection function given by

P(f) - e-J~/4 i QV('r) QW2(T) e-J'~rdz, (4.116)

- - o o

where Q = 1 for the soft-surface case and Q = 0/0r for the hard-surface case.

The terms V(r) and Wz(z) are known as the Airy functions and are given by

2iV(T) = W l ( 7 " ) - - W 2 ( T )

_ 1 i -j277"/3 eft- t3/3 Wl('r ) ~ e dt - - c o

Do

_ 1 f e j2 77"/3 ert- t3/3 dt - - o o


The other terms of Equation (4.115) are defined as

P2

f m(t') ( = O-g(t') dt' P1

xd = k L ( 0 2

2m(P1)m(P2)

o-io -d L = ~ i + ~ d.

For spherical wave illumination,

P2

t = f dt', PI

where O-g(-) is the surface radius of curvature at P1 or P2 and O "i, O rd are shown

in Figure 4.32b.

4.3.4 PHYSICAL THEORY OF DIFFRACTION

In our previous work concerning geometrical optics and diffraction theory, we have treated scattering problems using a " r ay" approach which, as previously stated and derived, is a good approximation for modeling scattering fields at

large frequencies. Notice that none of these approaches requires the calculation

of current distribution on the surface of the scatterer (induced by an incident

field) as a means of obtaining the scattered field. Such an approach would require

the method of moments, which would be highly inefficient at high frequencies

due to the extreme sizes of the impedance matrices involved. Such problems

would require considerable computational resources in terms of memory and

speed. Physical optics (PO) and the physical theory of diffraction (PTD) are

somewhat of a "bridge" between MOM and high-frequency asymptotic tech-


niques (GO/GTD/UTD). PO/PTD are also high-frequency techniques that use a ray approach for calculating scattering fields; hence, they also use diffraction

coefficients, but differ from the other high-frequency techniques in that the diffracted fields are computed based also on current distributions. PO/PTD differ significantly from MOM in that the current distribution is not modeled on the whole scatterer (as in MOM); rather, the only current distribution of significance is that which is present at the scattering "centers" in the scatterer, of which the

edges are the most significant. Consider Figure 4.33, where a source of electromagnetic energy illuminates

a scatterer surface which is perfectly conducting. The total field can be expressed as a superposition of the incident fields E i, a i and the scattered fields (E s, I-IS),

which are scattered by the surface S.

The total electric field E(r) at a point Po (observation point) exterior to S is

given by

where

Ev(r ) = Ei(r) + ES(r), (4.117)

f ES(r) - ~ R • R • Js(r')e-Jl'RR

S

d's. (4.118)

~ z

Y

Scatterer

Source

R = I r - r' I Observation Point

r'~ W -~ . . . . ~ 0 Po F-'i+Es

Figure 4.33 Geometry associated with PO/PTD fields.


Similarly, the total magnetic field H(r) at Po is given by

HT(r ) = Hi(r) + HS(r) (4.119)

jk f R • Js(r ' ) e-JkR HS(r) - 417" R d's. (4.120) S

Js(r ' ) in Equations (4.118) and (4.120) is the induced current density at r ' on

S, and d's is an element surface area at r ' . R is the vector between d's and Po

as shown in Figure 4.33. For near fields it would be necessary to include terms which depend on R -2 and R -3 within the integrals. In physical optics (PO) the

radiation integrals in Equations (4.118) and (4.120) are calculated by employing

a GO approximation for the currents induced on S; hence,

j6o; r, {~n'xHi(r) J s ( r ) ~ s ~ ) =

on the illuminated region on the shadow region of S.

Substituting this last expression into Equations (4.118) and (4.120), we can obtain the total expression for the physical optic field E P~ and ttP~

JkZ~ f d's (4.121) EP~ = EiG~ + - ~ R • R • [2n' • H i] e-YkR R

S

jk f d's. (4.122) HP~ = H~~ + ~ R x [2n' x H i] e-JkR R

S

As can be seen from Equations (4.121) and (4.122), in PO techniques the currents

which are induced on the surface of the scatterer are approximated using GO. However, it is obvious from our understanding of GO that such approximations

are only valid in the area of the scatterer that is well illuminated by the source.

In the shadow region, GO would yield zero for the induced surface current. The

GO approximation for the surface current will also yield erroneous results in the transition regions between the shadow and illuminated regions.

In the Physical Theory of Diffraction (PTD) approach, the GO current approxi-

mation is improved by including a correction which Ufimtsev [48] declared to

be a "nonuniform" component of the current. These components would account

for the insufficiencies present in the GO current approximation of the surface

current. In his original work Ufimtsev developed these "nonuniform" compo-

nents of the current only for smooth perfectly conducting surfaces with edge-

type discontinuities. He neglected the effects of rays on convex surfaces.

PO Ee~ = EiC~ + E s (r) (4.123)

PO HP~ = Hi~~ + H s (r), (4.124)


where PO PO H s (r) are E s (r) and the second terms of Equations (4.121) and (4.122), respectively. Ufimtsev's PTD consists of adding a diffraction "correction" term Edf, ttdf ("d" for diffraction, "Uf" for Ufimtsev) to expressions (4.123) and (4.124). We can then say mathematically that

PO Eem(r) = EiG~ + Es (r) + Edf(r) (4.125)

PO HPTD(r) = HiGO(r) + H s (r) + Hdf(r). (4.126)

It is important to realize that Edf(r), Hdf(r) represent only corrections to the edge diffraction field predicted by PO. Since Edf(r), Hdf(r) are ray optical fields, they become singular at the caustics of edge-diffraction rays; hence, it is more useful to express Edf(r), Hdf(r) in terms of equivalent edge currents as shown in Figure 4.34. Thus,

Eric ~. jkZo R X R X Ie (f ')s + Y0R x Mdf ' )e ' dr ' (4.127a) 47r R

L

[ ] jk .J d~', (4.127b) H~f ~ ~ R x Ie(f ')e' - Yo R x R x Me(f')r e-Jl'RR L

dl'

~i oi ~ (Ei, H i)

Gd(l'

IRI = I r - r'l

Po

r=e

/ /

, ' " I Edge Contour

Figure 4.34 Geometry associated with equivalent edge currents.


Here, Ie and Me are Ufimtsev-type electric and magnetic edge currents on the edge contours given by the expressions

e-J'rr/4] [U " Ei____(~')] u f " ~ i n fl i s in f l DpTD (~b, q~l, i l l , [~) (4.128)

where

-1 - j 77"/4 / e _1

[ u " H i ( ~ ' ) ]

N/sin B i sin B Dr~ D (~b, ~b i, /~i, /~),

(4.129)

Uf = Dds(#9 ' ~bi,/~i fl) PO �9 " DpT D , -- D ds (~b, ~1, B', /3)" (4.130)

The first term of Equation (4.130) can be evaluated from Equation (4.108). The term D~ ~ is given by

DdPO ($, $i, fli, ~) =

e -j ,rr/4 1

2X/2,rrk sin ]~i {tan( : i )

e -j'rr/4 1 { + 2"V/2,rrk sin fli _tan

-+tan(~b+~bi)}2

(~b + ~bi) - + 2 tan( 2 n ~ - (~b + ~bi)) 1 2 (4.131)

_+tan(2n 'n ' - (q~+ qg))} 2

e 1 { ,2X/2crk sin ~i --tan 2

In Equation (4.131), the ~b = 0 face is illuminated (first expression); the second expression means both faces are illuminated; and the ~b = n ~ face is illuminated for the third expression.

4.3.5 HYBRID MOM/GTD METHODS IN ELECTROMAGNETIC COMPATIBILITY

One classic electromagnetic interference problem consists of the analysis of current distribution in wire-type elements such as cables, dipole antennas (and other wire antennas), and microstrip lines which are attached to large (with respect to wavelength) structures, most of which are three-dimensional. At higher frequencies, whether wire grids or surface-patch representations are used, the modeling of both wires and structures explicitly using MOM may require


significant computer capacity, which will make the solution of the problem

cumbersome. The method of moments is a low-frequency technique, since its

practical use is generally restricted to bodies that are not large in terms of the

wavelength. On the other hand, geometrical optics, the geometrical theory of

diffraction, and the physical theory of diffraction, which are known as high-

frequency techniques, cannot provide the level of detailed analysis that is sometimes needed in electromagnetic problems, such as near fields, antenna impedances, and current distributions.

Both MOM and GTD are powerful computational methods in their own right. Both have inherited flexibility in a wide range of radiation and scattering problems. In this section we review a useful technique for combining the MOM

and GTD for the solution of electromagnetic interference problems. In an effort

to take advantage of both MOM and GTD capabilities, a "hybrid" technique

is developed. To do this, we consider the more general problem of how to extend the method of moments to include a class of problems in which a three- dimensional body, on or near which a radiating element is located, may be analyzed. The "core" in this MOM/GTD hybrid technique is to modify the

impedance matrix, which in the MOM considers only the radiating portion of the problem, to properly account for the remaining of the problem to be solved. The MOM/GTD hybrid herein described is based on the work of Thiele and

Newhouse [49] and Burnside, Lee, and Marhefka [50]. As previously stated in Section 4.2.3.1, the surface current Js is expanded

into a series of basis functions J1, J2, ,13 . . . . on the surface of interest and defined in the domain of the L operator. We can express ,Is as

N

Js = ~ cejJj (4.132) j = l

where cej are the unknown current coefficients to be found in the MOM. Since

the L operator is linear, we can form an inner product with Equation (4.132)

using weighting functions W~, W2, W3 . . . . WN to obtain

N

a: (W/, L(J:)) = (W~, Ei). (4.133) j = l

This expression represents the jth row in a system of N equations. The term L(Jj)

represents the electric field from the jth basis function of unit amplitude. Equa-

tion (4.133) can be represented in matrix form as

[Zij][Jj] = [V/], (4.134)

where Zij is the generalized impedance matrix Zij = (W/,L(Jj)).


Because of the linearity of the inner product in Equation (4.134), we already know from Equation (4.135) that

<~J1 + ~ J2, E> : ~(J1, E> -Jr- ~(J2, E> (J1, E) = (E, J1)

(JT, J1) > 0 if J1 4 :0 (4.135)

(JT, J~) = 0 if J1 = 0.

Using Equation (4.135) it can be shown that

(J, aE 1 + bE2) = a(J, El) + b(J, E2), (4.136)

where a, b are complex scalars. Suppose that in Equation (4.136) the term aE~

represents L(Jj) in Equation (4.133), and the term bE 2 represents an additional field contribution to Z 0 that is also due to Jj but arrives at the observation point i by a physical process which is not related to the method of moments formulation. We can then write the new impedance matrix as

ZU. - <Wi, L(Jj)) + <Wi, bL(Jj)) (4.137)

or

or

Z~j-- <Wi, g(Jj)> n t- <Wi, bL(Jj)> (4.138)

Zb = Zij + Z g. (4.139)

where the superscript " g " denotes that Z } is an additional impedance added as a result of physical process " g " that also contributes energy from the jth basis function to the ith observation point. Thus, we may modify Equation (4.134) as

!.l[lj] - [V~], (4.140) [Z,j

where [Z b] is the generalized impedance matrix which has been modified to account for the new process which is not part of the moment method formulation.

The method of moments represents only a portion of the overall problem. The solution of Equation (4.140) can be written as

[ / j l - [Z~1-1 [V~I. (4.141)

Consider now the situation in Figure 4.35 where a monopole of height h is

a distance dl away from a right-angle structure. The current [/j] in Equation

(4.141) will also account for GTD scattering. In Figure 4.35, to properly deter-

mine the term Z g. it is necessary to establish all the various combinations of


Radiating Antenna

\ I \ /

\ I /

12

Z12,4

/ /

Q Observation Point

Structure Figure 4.35 Hybrid MOM-GTD problem.

reflections that occur for rays emanating from the monopole and reflected back

to it, as well as the diffraction from the top edge of the structure. Using GTD, Equation (4.139) can be replaced by

, GTD (4.142) Z i j = Z i j + Z i j �9

In Equation (4.142), the impedance matrix 7. GTD is the impedance matrix modifi- - ij cation associated with the radiation from the current elements Jj, scattered by

the structure in terms of GTD mechanisms and received by the current segment

i. Since the MOM current samples are only needed for the smaller structure,

such as to represent a wire radiator, one can treat large objects using relatively

few unknowns.

In the MOM/GTD problem of Figure 4.35, each MOM element also interacts

with the other MOM elements via GTD reflections, diffractions, etc., from the

structure. These additional ray paths comprise the GTD portion of the interaction Z GTD will be generated on the basis of matrix. For elements 12 and 4, the term 12,4

the GTD interactions shown in the figure, as well as other GTD interactions not

shown to reduce the clutter, such as double plate reflections and edge diffraction,

then plate reflection. The total effects of the MOM and GTD portions of the

problem are then added together to form the complete MOM/GTD interacting

matrix given by Equation (4.142).

4.4. The Finite-Difference Time Domain 265

In the case of the excitation vector u (radiation problem), the division between MOM and GTD can be made on the basis of source type. Voltages are generated by MOM physics as they excite the MOM part of the structure directly; hence, u is identical to the voltage excitation vector performed for MOM-only problems. Field sources must interact with the structure and therefore must be computed

with GTD techniques. We can then conclude that the total excitation vector V( is given by

V( ~- V i @ V GTD. (4.143)

The MOM/GTD method can be quite useful in electromagnetic interference applications, which often require the analysis of small EMI sources in the presence

of large structures. For example, a UHF antenna mounted along the centerline

of an aircraft can be represented by only a few unknown current samples, whereas the aircraft scattered fields can be represented using GTD solutions.

It may have been obvious to the reader that the hybrid MOM/GTD method

is a very powerful technique. However, MOM/GTD hybrid methodology can

only be applied if appropriate GTD solutions are available. For example, the

hybrid MOM/GTD method cannot be used for analyzing the antenna behavior

of a monopole mounted on a ground plane terminated in a curved surface because

no GTD solutions exist for such a surface. It is important for the electromagnetic

interference engineer to realize that a MOM/GTD hybrid problem should always

be modeled using geometries for which GTD solutions are available and it may

be necessary to "convert" (when possible) the real geometries of the problem to one for which GTD solutions exist, even though the obtained results from the modeling will only yield approximate solutions. This point is illustrated in Figure 4.36.

4.4 The Finite-Difference Time Domain in

Computat ional Electromagnetics

4.4.0 INTRODUCTION

For an electromagnetic interference engineer accustomed to working with EMI

problems of complex topology, the first sign of relief when using finite-difference

time domain (FDTD) methods is that there is no need to develop a Green function

or to manipulate and store large impedance matrices (as in MOM), nor is there

a need to use complex diffraction coefficients for analyzing field propagation in


\ I \ / \ I /

Radiating Antenna

/ /

/

Observation Point

Approximate Boundary

Structure Figure 4.36 Tailoring a problem for use of MOM/GTD techniques.

the presence of large (compared to wavelength) unusual geometries (as in GTD/

PTD). Furthermore, FDTD is an excellent technique for dealing with penetration problems (very common in electromagnetic interference) involving structural apertures, curvatures, corners, etc. Finally, FDTD is very versatile in dealing with a variety of media with several degrees of permeability and conductivity. FDTD does have its deficiencies, which were addressed in Table 4.1.

The material presented in this section is based on the pioneering work in this field by A. Taflove and K. Umashankar [55-57]. Other references will be cited as we proceed through this section. The reader is advised to consult such references

for a more in-depth study in FDTD.

The finite-difference time domain method is a direct solution of Maxwell

time-dependent curl equations. The objective is to model the propagation of an electromagnetic wave into a volume of space containing dielectric and conducting

structure. Time stepping is performed by repeatedly implementing the finite-

difference curl equations at each cell of a previously developed space lattice.

The incident wave is tracked as it propagates through the structure and interacts

with it via surface current excitation, diffusion, penetration, and diffraction. An FDTD solution to the problem is achieved when a sinusoidal steady-state behavior

is achieved at each lattice cell. The time stepping for FDTD is accomplished by a finite-difference procedure

developed by Yee [58]. In Yee's procedure the space lattice is three-dimensional


(x, y, z) and is subdivided by cubic cells. Yee's procedure involves positioning the E and H components about a unit cell of the lattice as shown in Figure 4.37.

E and H are then evaluated at alternate half time steps. Using this procedure,

centered difference expressions are used both in space and time derivatives to

obtain second-order accuracy in space and time increments without the need for

solving simultaneous equations to compute the fields at the latest time step.

4.4.1 STRUCTURAL MODELING IN FDTD

The finite-difference time domain method allows the modeling of surfaces and

interiors that contain a variety of dielectric surfaces. The structure to be modeled

is first mapped into the space lattice by choosing a lattice space increment and

then assigning values of permittivity and conductivity for each component of E.

Since Maxwell curl equations generate the boundary conditions there is no need

for the user to establish boundary conditions at media interfaces. Fine details of

the structure can be modeled, the accuracy of which depends on the resolution

of the unit cell. The FDTD method can yield substantial savings in computer

storage and execution time when compared to other techniques such as the method

Hy Ez

Figure 4.37 Yee's implementation of FDTD.

Y


of moments. In FDTD the required storage and running times increase only

linearly with N, where N is the total number of unknown field components.

There are three major areas of concern when adapting the FDTD method to

model real problems.

1. Lattice truncation conditions: The field components at the lattice trun-

cation planes cannot be determined in a direct fashion from Maxwell

equations. The objective is to establish truncation planes (or conditions)

which are as closed as possible to the structure, and yet we must also

achieve the condition that such planes are invisible to waves within the

lattice. Auxiliary truncation conditions must be established with care

so that no spurious reflections of scattered waves are observed. These

objectives can be accomplished using absorbing boundary conditions.

2. Plane-wave source condition: Simulating an incident plane wave or

plane-wave pulse should not take excessive storage or cause spurious

reflections. Excessive storage can be caused when the incident wave is

used as initial condition. Spurious reflections are caused when the inci-

dent wave is used as a fixed-field excitation along a single lattice plain.

3. Sinusoidal steady-state information: This can be obtained either by

directly programming a single frequency incident plane wave, or by

performing a Fourier transform on the pulse-waveform response. Both

methods require time stepping to a tmax equating several wave periods at the required frequency. The second method has two additional require-

ments. First, pulses with small rise time t r tend to accumulate waveform

errors due to overshoot and tinging as they propagate through the space

lattice. The result is the development of a numerical noise component which

needs to be filtered out before Fourier transformation. Second, Fourier transformation of many lattice cell field vs time waveforms (expanded over

hundreds of time steps) will require significant computer storage.

4.4.2 YEE'S IMPLEMENTATION OF FDTD

Using a rectangular coordinate system (x, y, z) and assuming the material parame-

ters #, e, and o-are time independent, Maxwell equations can be written in the

form

(4. 144) Ot /~k Oz Oy /

at /~\ ax az / (4.145)


OH z = I (OE~ OEy~ (4.146) at p, \ Oy Ox /

_ l(OH _ Oily ) Ot - e \ Oy Oz - ~ (4.147)

OEy = I(OH~ OH~ _ trEv) (4.148) Ot e \ Oz Ox

) Ot - Ox Oy ~rE z . (4.149)

Following Yee's formulation, a point in space in the cubic lattice can be denoted

by

(i , j ,k) = (i~,j~, kb') (4.150)

and the function of space and time as

Fn(i , j ,k) = (i&,j~y, k~z, n&), (4.151)

where fi = fix = fly = & is the space increment (sometimes denoted as Ax, Ay,

Az), dt is the time increment (or At), and i, j, k, n are integers. Yee used centered

finite-difference expressions for the space and time derivatives which are second-

order accurate in fi and fit, respectively:

1 . 1

OFn(i,j, k) Fn(i -k- ~,j, k) - Fn(i - 7,j, k) = + O(&2) (4.152a)

Ox &

OFn(i,j,k) F(n+l/z~(i,j,k) - Fn-1/z(i , j ,k) = + O(~t2). (4.152b)

Ot &

Similar expressions to that in Equation (4.152a) can be written for derivatives

with respect to the y and z coordinates. In order to evaluate all the space derivatives in Equations (4.144) through (4.149), using the accuracy of Equation (4.152),

Yee positioned the components of E and H about a unit cell of the lattice shown

in Figure 4.37. To achieve the accuracy of Equation (4.152b), E and H are

evaluated at alternate half time steps. For nonpermeable media a fixed time step and fixed space increment

are sufficient for good results. For such problems, the quantity &/Iz(i, j, k)3

(~ = &, 3y, &) is constant for all (i, j, k) in the lattice. Yee's system of equations

can then be simplified. Taflove and Umashankar defined the following constants

in the process of simplifying Yee's equations:


R = &/2s o ga-- ~t21(~2~0s0 )

R b = &/tZO ~, 1 - - Ro'(m)/sr(m)

Ca(m) = 1 + Rcr(m)/sr(m)

Cb(m ) = Ra

er(m) --I- Ro'(m)'

where ~ refers to &, ~y, or & for calculating E x, Ey, or E z, respectively, and m is an integer which denotes a particular dielectric or conductivity medium in the

modeled space. We also define the proportionality vector

1~ = RbE. (4.153)

Using these simplifications Taflove and Umashankar reformulated Yee's difference equations�9 For cubic cells (& = 8y = & = b'), Yee's implementation yields

1 1 1 1 - n 1 H~+l/Z(i,j+~,k+~) = l-l~-l/2(i,j+~,k+~) + Ey(i,j+-i,k+ 1) (4.154a)

~ n �9 �9 1 - Ey(t,j+~,k) + Ez(i,j,k+�89 - E,z(i,j+ 1,k+�89

n+ 1/2(i+ 1 . ,,-1/2,.+! �9 /~z(i+ 1,j, (4.154b) Hy 5,j,k+�89 = I'ly [l 2,J,k+�89 "k+�89

~ n �9 1 . 1 . ~z(i,j,k+�89 + Ex(t+~,j,k ) - E T ( i + k+ 1) - ~ , j ,

1 . 1 1 . Hz + 1/2(i,j+�89189 ) = Hz +n 1/2(i+i,j+i,k ) + ~7(i +5,: +1, k)

~ F / �9 - - Ex "t+l ~,j,k) + Ey(t,J+~,k)~n " " 1 _ E,y(i+ l,j+~,k)" 1

(4.154c)

m=MEDIA(i+I/2, j, k)

[ Hz+ l/z(i+�89 1 _Hn+l/2" ! . ! I "n . 1 . z (t+z,J-z,k) I

~n+ *(i+�89 = Ca(m)Ex(,+~,J,k) + q(m)|. +.y+ ) ] . ! . ,_

L - H y + 1/2(i+�89189

(4.154d)

m=MEDIA(i, j, +1/2, k)

�9 . 1 , nl_nx + 1/2"i "-r" t ,J 5,k-2) / |

1/2. ! . ! Ey+l(t,j+~,k) = Ca(m)E,z(i,j,k+�89 + Cb(m)~+Hz + ( t -z , j+z,k) I

L H"+m(i+�89189 Z

(4.154e)


m=MEDIA (i, j, k+i/2)

Hy + '/2(i+�89 ~+ 1/2(i-�89189

- n v

E~+l(i'j'k+�89 = Ca(m)JE~(i'j'k+2) + Cb(m) +Hx + t ,J-5, ~)| n 1 / 2 ; i �9 1 k+~'t"

-H~ + 1/2(i,j+{,k+�89

(4.154f)

The MEDIA array will need to be stored. The array specifies the type-integer of

the dielectric and conductivity medium at the location of each E field component.

The preceding rearrangement of Yee's equation eliminates the three multiplica-

tions needed to compute H X, H v, and H z. It also eliminates the need for computer

storage of e and o-arrays. With Equation (4.154), the value of a field component

at any lattice point depends only on its previous value and on the previous value

of the components of the other field vectors at adjacent points.

The choice of ~ and 3t is determined by the need of accuracy and algorithm

stability. To safeguard accuracy, ~ must be small compared to a wavelength,

usually ~ <_ M10. To ensure that the cubic lattice approximation to the surface

of the modeled structure is not too coarse, ~ must be small with respect to the

overall size of the structure. Stability is ensured if 3t is chosen to satisfy the

inequality

1 --< , (4.155)

1 1 C max nt- ~y---5 + ~y---5

where Cma x is the maximum wave phase velocity within the model [57].

Yee's lattice has the drawback that Maxwell curl equations as defined above

can cause dispersion. Dispersion occurs when the phase velocity varies with

respect to modal wavelength. In Yee's algorithm dispersion also depends on

direction of propagation and the lattice discretization. Dispersion can cause pulse

distortion, artificial anisotropy, and pseudo-refraction. This subject is well de-

scribed by Taflove and Umashankar in [59]. The analysis in [59] shows that the

numerical dispersion in the three-dimensional case can be represented by

(c~t)2 sin = ~ x 2 sin2 + ~y-----7 sin2 + ~ z 2 sin2 ,

(4.156a)

where k X, k v, k z are the x, y, z components of the wave number k; w is the

angular frequency; and c is the speed of light in the homogeneous medium.


In the numerical limit of 8t, 8x, 8y, and 8z going to zero, Equation (4.156a) reduces to

O) 2 (4.156b)

which is the dispersion relation for a plane wave in a continuous and lossless medium. This gives the rationale that decreasing the cell size in FDTD gives a better control in the modal phase velocity distribution in order to minimize

dispersion. Numerical dispersion is of critical importance when using variable cell meshes and using pulses having finite duration. Variable meshes can cause

reflection and refraction in numerical modes at the interfaces of cells of different

sizes. This distortion in the modal phase velocity gives rise to the term dispersion.

Pulses of finite duration have higher frequency components that propagate more

slowly in the FDTD mesh than lower frequency components. This causes a

broadening of finite-duration pulses which can cause ringing. This problem can

be minimized by calculating the Fourier transform of the pulse and selecting the grid size so that the major components in the spectrum are resolved with at least 10 cells per wavelength.

4.4.3 B O U N D A R Y CONDITIONS

One of the problems originally encountered in FDTD methods is the fact that scattering problems are usually open problems, that is, the domain in which the fields are calculated is unbounded. A method needed to be developed for limiting the domain in which the fields are computed. To solve this problem, first a lattice of limited size, but large enough to fully contain the outer boundary, is built as shown in Figure 4.38; then, by using a boundary condition on the outer surface

of the mesh such that the surrounding is modeled as accurately as possible, a

medium is established which would minimize possible spurious reflections.

Boundary conditions of this type are called absorbing boundary conditions.

Taylor et al. [60] used a simple extrapolation method in approximating such

conditions for FDTD. Taflove and Brodwin [61] simulated the outgoing wave

and then used an averaging process in an attempt to account for all possible

angles of propagation. Taflove [62] introduced losses in the region that surrounds

the structure to be modeled, thus absorbing outgoing waves as well as waves that are reflected by the boundaries of the mesh. Numerical results showed, however, that a relatively thick conducting layer is needed to obtain good results.

Merewether [63] and Kunz and Lee [64] used the radiation condition at large


Lattice Truncation Plane

,

I structure I I I

_ . . . . . _ ' 2 U _

scattered wave

Incident Plane Wave

Figure 4.38 Wavefront propagation and the lattice truncation.

distances from the center of the scatterer to obtain an absorbing boundary condition.

The absorbing boundary conditions just mentioned have the disadvantages of

causing large reflections when the fields near the boundary of the lattice do not

propagate, either normal to the boundary of the mesh or in the radial direction from the center normal to the boundary of the mesh, or in the radial direction from

the center of the scatterer. Mur [65] introduced absorbing boundary conditions for

two- and three-dimensional electromagnetic field equations which are similar to

the scalar derivatives of Engquist and Majda [66]. Mur's highly absorbing bound-

ary conditions have proved very popular in many FDTD codes and will be described herein.

Mur established that Yee's model only requires absorbing boundary conditions

for the three components of the electric field. Each of the field components

satisfy the three-dimensional wave equation

(020202102 ) ~ x 2 + ~ -t W = 0, (4.157) Oy 2 OZ 2 c 20-~

where W is a scalar field component. Engquist and Majda [66] showed that at

a grid boundary, say x = 0, the application of a radiating boundary condition of


the form given by Equation (4.152) on the wave function W will exactly

absorb a plane wave propagating toward the boundary at an arbitrary angle 0.

Figure 4.39 illustrates a wavefront propagating toward the x = 0 boundary in

the three-dimensional lattice.

The equation

(0070 102 C O 2 CO 2 ) t c 0 t 2 F ~ ~ X 2 + ~ ~ z 2 W = 0 , y = 0 b o u n d a r y , (4.158a)

represents a nearly reflectionless lattice truncation for numerical plane wave

modes which fall on the x = 0 lattice boundary. Analogous analytical radiation

boundary conditions can be derived for the other lattice boundaries in Figure

4.39:

(02102r162 ) + W = 0, x = 0 boundary (4.158b)

&v

Grid Boundary

Figure 4.39

Incident Wave

X

v

Plane wave incident on a left grid boundary in a 2D Cartesian computational domain.


02 1 02 C 02 C 02 ) OxOt -~ = h boundary (4.158c) c Ot 2 2022 2~-22 W--- O, x

-t W = 0, y = h boundary (4.158d) OyOt c Ot 2 2 Ox 2 2

( o 2 l a 2 c a 2 c a~) O-zOt c Ot 2 t- ~ ~ x 2 + ~ W = O, z = 0 boundary (4.158e)

02 1 02 C 02 C 02 ) + = h boundary. (4.158f) OzOt c o t 2 2 0x 2 =2 ~y2 W = O, z

For the simulation of radiating boundary conditions in Equations (4.154),

Equations (4.158) are applied to each Cartesian component of E and H that is

located at, and tangential to, the lattice boundaries. Mur applied the scheme

represented by Equations (4.158) to FDTD. The Mur scheme involves implement-

ing the partial derivatives of Equation (4.158) as numerical central differences n 1 �9 expanded about the auxiliary W component W (~,j, k), located one-half space cell

from the grid boundary at (O,j,k). The Mur scheme is illustrated here for the

x = 0 lattice boundary in Figure 4.39 with individual Cartesian components of

E and H located in lattice plane z = k~z:

W n+ l(0,j,k) = _ W n- l(i,j,k) + c & - f i x

c& + fix [W n+ l(i,j,k) + wn-l(o,j ,k)]

2fix c & + &[w%o,j,~)" - " + Wn(i,j,k)]

W"(O,j+ 1,k) - 2W~(O,j,k)

(c6t)z fix + W ' ( O , j - 1,k) (4.159) + 2(3y2(c& + fix) + W'(1, j+ 1,k) - 2W' ( i , j , k )

+ W ' ( 1 , j - 1,k)

m

W'(O,j, k+ 1) - 2Wn(O,j, k) (c&)e fix + Wn(O,j,k - 1)

2~z2(c& + fix) + W ' ( 1 , j , k + 1 ) - 2wn(1 , j , k ) " + W " ( 1 , j , k - 1)

Analogous expressions for the Mur radiation boundary conditions at the other

lattice boundaries, x = h, y = 0, y = h, z = 0, and z = h can be derived by

substituting into Equations (4.158a) and (4.158c) through (4.158f) in the same

manner.


4.4.4 THE HYBRID MOM/FDTD M E T H O D I N

E L E C T R O M A G N E T I C COMPATIBILITY

In Section 4.2.3.4 concerning the method of moments, we explored modeling the aperture problem, which is very important in the area of electromagnetic interference. The problem of penetration and coupling of electromagnetic energy through apertures has been studied extensively using the method of moments, to characterize the behavior of simple apertures in a conducting screen [67] or scattering body [68]. It must be realized, however, that aperture analyses become very complex if there are other scattering objects present [69,70]. An attempt to simplify such scattering problems appeared in Section 4.3.5 for the MOM/GTD hybrid approach. This approach is valid for high-frequency problems. One alternative approach, especially at lower frequencies, is to use the FDTD method previously discussed. The FDTD method allows internal electromagnetic fields to be computed by directly modeling the objects of interest and internal features. However, the pure FDTD method is best suited for modeling localized regions. When such a region is part of a larger structure, the modeling becomes more difficult, and it is difficult to account for all the physics involved in the different types of coupling problems, especially when a constant lattice cell size is used.

To account better for these types of coupling problems, a hybrid MOM/FDTD technique can be developed which is based on the field equivalence theorem due to Schelkunoff [71]. This technique, first proposed by Taflove and Umashankar [72], allows the analysis of coupling problems into two steps:

1. An analysis of the exterior problem is first performed using the MOM in order to calculate the equivalent excitations in the apertures. These currents will lead to the fields in the interior region. There is no need to model the interior region at all.

2. The FDTD method is used to analyze the interior region in detail, assuming as an excitation the equivalent currents found in step 1.

We first consider the aperture problem of a perfectly conducting scatterer, S c, with an aperture S a as shown in Figure 4.40. In the external region (region 1 in Figure 4.40), the incident fields E i, H i illuminate the aperture and part of the incident field penetrates the cavity into region 2. Remember that when we treated this problem in Section 4.2.3.4, regions 1 and 2 were treated simultaneously by using coupled integral equations needed for the MOM.

Using Schelkunoff's third theorem, a new approach is followed for the solution

of the aperture problem which allows the treatment of regions 1 and 2 in a sequential manner. This theorem is based on an equivalent aperture electric current formulation which decouples the exterior region from the interior region.


Region 1 ~ (El ,,, \ Aperture S a

2, H2) \ \ (E a,H a)

-

Sc Regi

i, Hi)

Figure 4.40 Scatterer with aperture in the presence of incident field.

Schelkunoff's formulation allows the fields in a region as the superposition of the so-called short-circuit fields (E 1, H 1) with the aperture not present plus the aperture field contribution (E a, Ha), maintaining the required continuity of the

total field across the aperture. The partial fields (El, H1) are equal to zero in region 2. The partial fields (E a, H a) are generated by the nonphysical current aperture locus, where J'a = -Joa, the short-circuited aperture current distribution.

In Figure 4.41, the hybrid MOM/FDTD method is illustrated schematically

and is summarized below as a four-step computation.

In region 1, use MOM techniques:

.

The aperture region, S a, is short-circuited, and the single exterior problem is solved via MOM to obtain the induced electric current distribution,

Joa, in the short-circuit aperture region.

The short-circuit current, Joa, is now placed in the open-circuited aperture region with a sign change (Figure 4.41c) in order to account for the continuity of the fields in the aperture region. The electric current, -Joa,

which was fictitiously placed in the open-circuited aperture region,

acts as an equivalent source for the interior fields (E 2, H2) of region 2.

In region 2, use FDTD techniques:

3. Notice that in the MOM technique the equivalent current source

distribution, - Jo , , is in the frequency domain. It is a phasor quantity having a magnitude (relative to the incident field) as well as a phase

(in relation to some phase reference, usually at the origin of the coordinate system). Since the FDTD method is a time-domain tech-


R e g i o n 1 (E 1, H1)

A '\ Aperture sa

E 2,H2) \ ~ (Ea,H a)

(a) ( E i, Hi)

A

(Shorted ~ ~ I MOM Method

(E i ,H i ) (b)

I I

I I I I I / FDTD Method

(c) Figure 4.41 Hybrid MOM/FDTD procedure.

nique, the phase term of -Joa must be interpreted as a time-delay distribution with respect to the original phase reference location. The magnitude distribution remains the same. In essence, the FDTD aperture equivalent current source distribution is of sinusoidal steady-state nature starting at the very beginning of time-stepping, with the proper time delay to account for the phase shift.

4. Using the FDTD method, the interior fields (E 2, 1-12) are computed directly by using -Joa as a source term distribution in the V x H

4.5. The Finite-Element Method in Computational Electromagnetics 279

difference equation. For example, if Jo• is a source term, Equation

(4.154d) can be rewritten for the aperture as:

m:MEDIA (i+i/2, j, k)

~ . n + l �9 1 . ( t + ~ , J , k ) ~ n . I . = C a ( m ) E x ( t + 5 , j , k ) + C b ( m )

. . m

Hz 1 /2 ( i 1 . 1 n - +.5,j +.5, k)

H z + l / 2 ( i 1 . l - + ~ , J - ~ , k )

+ H y + l / 2 ( i I . 1 n + ~ , J , k - j

n - 1 / 2 ( i 1 . 1 - - H y + ~ , j , k + - 5 )

j n + l / 2 ( i 1 . - - + ~ , j , k ) -

(4.160)

Here, specifying Jox in the aperture is equivalent to specifying the addition of a

discontinuity in the z-directed tangential magnetic field, H z, across the aperture

source plane:

Jox : H~ - H +, (4.161)

where Hf and H + are tangential magnetic fields located on an infinitesimal

distance to either side of the equivalent aperture source plane. This procedure is

similar to the partial-field approach discussed by Schelkunoff [71].

Notice that the hybrid MOM/FDTD does not require the computation of

the equivalent aperture electric field excitation, E a. This is because the interior

region FDTD solution can accept the nonphysical aperture electric current

distribution -Joa as the excitation. Thus, there is no need to set up and solve

the mutual interactions of the cavity contents and the aperture, and there is

no need to compute the cavity Green's function. The hybrid MOM/FDTD allows the modeling of cavity interiors that are as detailed as desired, without

any numerical complications. In realistic electromagnetic interference problems

where diverse types of cavities are present, the topology of the electromagnetic

interference problem is difficult for the MOM alone to solve. The MOM/ FDTD may be the only way to calculate the interior fields in a rigorous

manner.

4.5 The Finite-Element Method in Computational Electromagnetics

The finite-element method (FEM) was first used by Courant [74] in 1943. It was

not used in electromagnetics until 1968. FEM has been used in a variety of


problems ranging from waveguides and electric machines to microstrips and semiconductor devices. The finite-element method is very versatile in handling

complex geometries that cannot be easily analyzed using FDTD. Notice that in

FDTD, Yee's algorithm evolves into equations where the lattice of discretization is made up of cubic cells (though the sides of the cell can be of different lengths). Such cells lead to staircasing when modeling convex geometries (such as cylinders and spheroids). The finite-element method allows for discretization of complex

shapes by using a variety of elements of different shapes. Finite-element analysis of a problem involves the following four steps:

1. Discretizing the domain of the solution into finite elements

2. Deriving the equations for a typical finite element

3. Assembling all elements in the solution region

4. Solving the system of linear equations

Discretization means dividing up the domain of solution into finite elements such as those shown in Figure 4.42. For two-dimensional discretization, the most

common shape is a triangle [73,75]. For three-dimensional problems, the most common shapes are the tetrahedron and hexahedron, as shown in Figure 4.43.

Often in finite-element methods, we deal with two-dimensional problems in

which quasi-static approximation suffices. In such cases, the main objective is

~ Y D i s c r e t i z a t i o n I I I I

- 7 - 1 - - I - I - - - 7-- F 7-- F-

- 7-- I- -I-- F -

- 7 - - F T - - F -

- 7-- I- -I-- F -

I _ _ _]_ I_ _I_ I _

_ __J_ L _ 1 _ L_ _

I I I I

Boundary

12

Element Number

Node Number14

/

D II

v

X

13

15

Figure 4.42 Discretization of the solution region in FEM.


Three-Node Triangle L d �9 I

Four-Node Quadrilateral

Four-Node Tetrahedron Eight-Node Hexahedron

Figure 4.43 Elements used in two- and three-dimensional modeling.

to find the electrostatic field distribution, which can be obtained from the scalar potential F(x,y) satisfying the Laplacian equation

021~(x' Y) + 02r Y) = 0. (4.162) OX 2 Oy 2

We seek an approximate expression for the potential ~e of element e shown in Figure 4.44, which shows a typical triangular element for FEM analysis. The

potential must be continuous across the boundaries.

4.5.1 TWO-DIMENSIONAL FINITE-ELEMENT METHODS

Consider now a domain D discretized by N finite elements of the type shown in

Figure 4.45. The approximate solution for the whole region is given by

e=N ~(x,y) ~-- E ~e (x'y)'

e = l


iY ~m (Xm, Ym)

II

Element "e"

(I) i (Xi, Yi) (I)j (Xj, Yj)

X

Figure 4.44 Triangular element used in two-dimensional FEM.

where N is the number of triangular elements into which the solution region is divided. The most common form of approximating fI)e(X , y) for a triangular element is to use a linear combination of local interpolation polynomials of the form

d P e ( X , y ) = a + bx + cy (4.163)

for a triangular element and

d P e ( X , y ) - - a + bx + cy + dxy (4.164)

for a quadrilateral element. The constants a, b, c, and d are to be determined. The potential (I) e in general is nonzero within element e, but zero outside e. Since quadrilateral elements cannot conform well to curved boundaries, triangular elements are most often used instead.

Consider the triangular element in Figure 4.44. The potentials ~i, ~j, and (I) m

at nodes i, j, and m, respectively, are obtained using Equation (4.163), that is

[(I)i ] [1 X i y i ] I ! ] % - 1 xj y j . (4.165) f~km 1 Xm Ym


Boundary for FEM

I \ \ . \ \ 1 \ \ \ i l l ' ~ \ \

~~ , . ~ I # I - . \ / / /

. . . . . ~ ~, /

~ / . v , ,

I / ~ . --- --. .__ , _..."__ __ ._ ,~ / \-"

/ I / \ / > .

/ I / \ / \ - - \ / \ / ~ \ j \

/ I /

\

/ \

/ \ \ / / I

Figure 4.45 Radiating source over ground plane to be modeled using FEM.

The coefficients a, b, and c are determined from Equation (4.165) as [ ]1[ ] a 1 x i Yi fIJi

= l xj yj d~j .

1 Xm Ym f~m

Substituting Equation (4.166) into Equation (4.163), we obtain

[ XmY ' ~e = l x y |(Yj--Ym)

k(Xm - X) (Ym -- Yi) (Yi - Yj) f~lj (Xi - Xm) % -- Xi) f~m

o r

f ~ e - - Z cen(x,y)~ben n=i,j,m

o r

dP e = OZi(x,y)q~ei + cej(x,y)q~ej + O~m(X,y)q~em,

(4.166)

(4.167)

(4.168)


where

1 ai(x,y ) = ~ [ (x jy m -- XmYj) + (y j -- Ym)X + (X m -- xj)y] (4.169a)

1 cej(x,y) -- ~ - [ ( X m Yi - XiYm) -1- (Ym -- Yi) x + (Xi - Xm)Y] (4.169b)

1 Olm(X,Y) = ~ [(xiYj -- x jYi) + (Yi - y j ) x -I- (Xj -- x i ) Y ] , (4.169c)

and A is the area of the element e, that is,

A 1 x i Yi 1 xj 3)

1 Xm Ym -- ( x i y j - x jY i ) + (XmY i - XiYm) + ( x j y m -- XmYj)

or

1 A = ~[(x jy m - X m Y j + X m Y i -- x i Y m + x i Y j -- x jY i ) ] . (4.170)

The value of A is positive if the nodes are numbered counterclockwise (starting from any node) as shown in Figure 4.44. From Equation (4.168), the potential at any point (x,y) can be calculated, provided that the potential at the vertices is known. This is different from finite-difference analysis, where the potential is known at the grid points only. The terms aj, a i, and a m are called element shape functions, and they are linear interpolation functions.

The functional corresponding to Laplace's equation (4.162) is given by

Fe 1 1 12 - ~ f ~lEI2ds - ~ f elVCPe(X,y) dxdy De De

--2 f \Ox: + \--~y] dxdy. De

(4.171)

The functional is the energy per unit length associated with the element e. By doing the algebra in Equation (4.171) using Equation (4.168), we can express

F e in matrix form as

F e -- 2E[f~kelt I f e] [(I)e] , ( 4 . 1 7 2 )


where the superscript denotes the transpose of the matrix

[ ~ e i ] = eJ/

(~emJ

and the matrix C e is given by

C Cii Cij Cim ] Cji Cjj Cjm . Cmi Cmj Cram

The matrix C e is usually called the element coefficient matrix. The matrix elements

of the coefficient matrix may be regarded as the coupling between nodes i, j, and m. The values of such elements are

Cim = - ~ A [ ( Y j - Y m ) ( Y i - yj) + (X m -- Xj)(Xj -- Xi) ] (4.173a)

Cj m 1 = -~[(Ym -- Y i ) ( Y i - Yj) + ( X i - Xm)(Xj -- Xi)] (4.173b)

Cii = ~A[(yj -- ym) 2 -]- (x m -- xj) 2] (4.173c)

1 Cij - -~[ (Ym -- Yi) 2 + (Xi - Xm) 2] (4.173d)

1 Cm m = _4__~[(y i _ yj)2 + (xj - xi)2]. (4.173e)

Also, Cji = Cij; Cmi = Cim; Cmj = Cjm. Laplace's equation is satisfied when the total energy in the solution region is

minimum. Thus, we require that the partial derivatives of F~ with respect to each

nodal value of the potential be zero, that is,

= O F f = = o .


It can be shown using Equations (4.172) and (4.173a-e) that

O F e _ o = e O~)i ~ {[(yj -- ym) 2 + (Xj -- Xm) 2] (~i -- [(Yi - Ym)(Yj -- Ym)

-I- (X i -- Xm)(X j -- Xm)]~ j -- [(Yi - Y j ) ( Y m - Yj) + (Xi - Xj)(Xm -- Xj)]q~m}

(4.174)

and the same procedure can be used to find OFe/O4) m. If the equations for the

three derivatives are assembled in matrix form, the total system of linear equations

minimizing the functional F e can be expressed as

[~liii ~lli j OmmjOiml[ q~ei] 4e, Oji ~jj ~ j m l ~ e J l - ' - O , (4.175)

Omi Omj ~emJ

where

~9ii = A [ ( y j - ym) 2 n t- (xj - Xm) 2]

J/ij = A [ ( y i - Ym)(Yj - Ym) + (Xi - Xm)(Xj -- Xm)]

Oim = A [ ( y i - Yj)(Ym - Yi) + (xi - xj)(Xm - xj)]

and any other combination can be obtained by permuting i, j , and k. The final

system obtained can be written as

[0] [4~e] = [bl, (4.176)

where [b] is the result of replacing the known node potentials with their Dirichlet

values. Equation (4.176) can now be solved for rkei, q~ej, and Ckem, and then Equations (4.168), (4.169), and (4.170) can be used to obtain the solution.

Sometimes we are interested in modeling radiation phenomena and provide field levels at any position. We can use the finite-element method to emulate the

radiation in a homogeneous domain. Figure 4.45 depicts a sketch of a radiat-

ing source over a perfectly conducting ground plane. The modeling space in

Figure 4.45, limited by an absorbing boundary surface S a and the surface of in-

terest S, is discretized with triangular finite elements. The equation modeling

electromagnetic propagation in the homogeneous domain DH is the Helmholtz

wave equation

V2(I ) n t- k2(I ) -- g, (4.177)

where q~ is the field quantity (E or H). For waveguide problems, $ = H z for

TE mode or E z for TM mode. The term g is the source function, and k = w(/xe)1/2

is the wave number of the medium. Notice that for k = g = 0, Laplace's equation


is obtained. For k = 0, Poisson's equation is obtained. For g = 0, the homogeneous, scalar Helmholtz equation is obtained.

We know that an operator equation of the form

LcI) = g (4.178)

can be solved by extremizing the functional F h (h for Helmholtz):

Fh(CP) = (L, c P ) - 2((I),g). (4.179a)

Hence, the solution of Equation (4.177) is equivalent to satisfying the boundary

conditions and minimizing the functional

1 f [IV~I2 - k2(i)2 + 2dPg]ds. Fh (~) = S

(4.179b)

We can express the potential (Peh and source geh in terms of shape functions an over a triangular element e:

dPeh(X'Y) = Z %(x 'y )q~n (4 .180a) n=i,j,m

geh (x, y) = ~ Ce,(x, y)gen, (4.180b) n = i,j, m

where ~eh and geh stand for the potentials to be used for solving the Helmholtz

equation. The terms ~bo, and gen are, respectively, the values of �9 and g at nodal points (i, j, or k) of element e. Substituting Equation (4.180) into Equa- tion (4.179b), we have

k 2 Fh (dPe) = ~_ [dPe]t [C e] [Cite] - -~- [dPe]t [Te] [Cite] + [d~e]t [Te] [Ge], (4.181)

where

[q~e] = [ q~ei q~ej ~em]t; [Ge] = [gei gej gem] t

I C i i C i j C i m l [A/12 fori, j, m4=](4 .182) [C e] = Cji Cjj Cjm ; [T~] = [_A/6 for i = j = m

Cmi Cmj Cmm

The matrix elements of [C e] are given by Equation (4.173). Minimizing the

functional Fh(Fe) means taking all the partial derivatives of Fh(ePe) with respect

to ~b i, ~bj, 4)m and setting them equal to zero in order to solve for the three


potentials ~ei, ej, em" Equation (4.181), derived from a single element, can be applied for all N triangular elements in the solution region. Thus,

N

F(O) = ~ . , Fh(Oe) . e----1

(4.183)

4.5.2 T H R E E - D I M E N S I O N A L F I N I T E - E L E M E N T M E T H O D S

The solution of finite-element analysis of Helmholtz's equations in three di-

mensions can be accomplished using tetrahedral elements of the form shown in Figure 4.46. Assuming a four-node tetrahedral element, the function (I) e is represented within the element by

dPe = a-k- bx-k- cy + d z. (4.184)

The same applies to the function g. Since Equation (4.184) must be satisfied at the four nodes of the tetrahedral elements,

~ e -" a + bx,, + cy,, + dz,,, (4.185)

4

3 Four-Node Tetrahedron

Figure 4.46 Four-node tetrahedron for 3D FEM.


where n = i,j, m,k. We have four simultaneous equations from which the coeffi-

cients a, b, c, and d can be determined. The determinant of the system of equations

is given by

A ___

1 X i Yi Zi

1 xj 3) zj

1 X m Ym Zm

1 x~ y~, zk

= 6V, (4.186)

where V is the volume of the tetrahedron. By finding a, b, c, and d, we can write

an equation of the same form as Equation (4.180) in three dimensions

q~(x,y ,z) = ~ ce n (x ,y ,z) q~e,,, (4.187) n=i,k,j,m

where

1 a/= g-~

1 x y z 1 xj yj zj

1 X m Ym Zm

1 x~ y~ zl,

(4.188a)

1 ~ = ~

1 X i Yi Zi

1 x y z

1 X m Ym Zm 1 x~ y~ z~

(4.188b)

1 1 X i Yi Zi 1 x j y j z j

1 x y z 1 x~ y~ zk

(4.188c)

1 1 X i Yi Zi

1 xj yj zj

1 X m Ym Zm

1 x y z

(4.188d)

We can now express Equation (4.187) in the form

f~Je = Ogi ( x , Y , Z ) ~ e i "-1- Olj ( x , y~Z)~e j + a m (x ,y~z)~)em + Ol k ( x , y ~ Z ) ~ e k . (4.189)


A similar equation exists for ge: ge (x , y~z ) -- Od i (x ,y~Z)gen + Odj (x ,y~Z)gen Jr- O[ m (x ,y~Z)gen + Od k (x ,y~Z)gen .

(4.190)

By inserting Equations (4.189) and (4.190) into Equation (4.179b), we obtain an

equation for Fh(dP e) of the same form as Equation (4.181), except that all the

matrices are augmented by one column (the k column in matrices ~e and Ge) and by one column and one row (the k column and row in matrix Ce). Minimizing

the functional Fh(~e) means taking all the partial derivatives of Fh(Cb e) with

respect to ~b i, ~bj, ~b m, and ~b k and setting them equal to zero in order to solve for

the four potentials ~ei, ej, em, ek" Using Equation (4.183), we can solve F(~) for all N tetrahedral elements involved in the solution region.

The finite elements discussed thus far have been linear in nature. This means

that the shape functions used (e.g., Equations (4.163) and (4.164)) are of order 1. A higher-order function is one in which the shape function or interpolation polyno-

mial is of order 2 or more. The accuracy of a finite-element solution can be improved

by using a finer lattice or higher-order elements. In general, fewer higher-order

functions are needed to achieve the same degree of accuracy when compared to

first-order elements. The higher-order elements are useful when it is expected that

the total field variable will change rapidly. To learn more about the use of second-

order and higher-order elements in finite-element methods, especially as they apply

to three-dimensional problems, the reader should refer to [76]. Another technique used in three-dimensional finite-element methods is that

developed by MacNeal et al. [77] using a time-integrated electric scalar potential. This technique is the one used in a popular code known as MSC/EMAS. It can

be shown that electrical and magnetic energy variation can be expressed as variations (represented here as D) in terms of A (the magnetic field vector potential) and Y (the time integral of the electric scalar potential f ) . This variation

can be expressed as

AF=fd~'fdt((A(VO)+AO--A)'e( v~176 ) O t ~ A - (A(V0) + AA) v to

�9 o- V 0 + ~ A - A ( V • 2 1 5 (4.191)

( 0 ) s �9 V . A) - A ~ 0(P) + AA. (J) + ds dt (AA-(H • fi) - A0fi S to (0)

�9 j - f j d s A O ( f i - D ) S to

4.6. The Transmission-Line Method in Computational Electromagnetics 291

The first volume term in this expression is due to stored electric energy in

materials of permittivity e, the second volume integral is due to power loss in

materials of conductivity tr, and the third volume integral is due to stored magnetic energy in material of reluctivity v = 1//z. The fourth term guarantees uniqueness in the solution by penalizing the square of the divergence of A with the factor

a times reluctivity. The fifth and sixth terms represent charge density (p) excitation

on ~ and current density (J) excitation on A. The final three surface integrals

allow energy of H, J, or D fields to be input through the boundary of the finite-

element model. Setting Equation (4.191) to zero yields the matrix equation

[M][/;/] + [B][/~] + [K][u] = [J] (4.192)

and the electrostatic initial condition

[M][ti] = [Qi] (4.193)

where [u] is a column vector which contains the unknown magnetic vector

potential and time-integrated electric scalar potential of all the nodes. From a

knowledge of A and 9 t (i.e., the solution to Equation (4.192)), we can obtain the

electric and magnetic fields and other parameters related to such fields:

[u] = [A x Ay a z ~]x. (4.194)

The matrix [J] contains current excitations, which may be static, time-dependent,

or frequency-dependent. The excitation vector [Qi] corresponds to the initial

charge distribution. The matrices [M], [B], and [K] are proportional to permittivity,

conductivity, and reluctivity, respectively. In the frequency domain, Equation (4.192) becomes

{--O) 2 [m] + jw[B] + [K]}[u] = [J]. (4.195)

4.6 The Transmission-Line Method in Computational Electromagnetics

Circuits are mathematical abstractions of physically real fields. The representation

of fields using circuit elements is feasible when A > > ~, where ~ is the dimensions

of the circuit involved. The transmission-line method (TLM) is a numerical

technique for solving electromagnetic field problems using equivalent circuits.

TLM is based on the correlation between Maxwell equation and the equations

corresponding to voltages and currents on a mesh of continuous two-wire trans-

mission lines. When compared to the lumped network model, the transmission-


line method is more general and provides better accuracy at high frequencies where the transmission and reflection properties of geometrical discontinuities

cannot be regarded as lumped [78]. The material discussed in this section is

based on the work in this field by P. B. Johns [79], S. Akhtarzad [80,81 ], Wolfgang J. R. Hoefer [83], and P. B. Johns [84]. Other references are cited as we proceed.

The TLM is a discretization technique. However, it differs from FDTD and

finite-element methods in that it is a physical discretization, whereas FDTD and

finite-element methods are mathematical discretization approaches. In TLM, the

discretization of a field involves the replacement of a continuous system by a network of lumped elements. The TLM involves dividing the solution region into a rectangular mesh of transmission lines. Junctions are formed where the

two lines cross, forming impedance discontinuities. The TLM involves two basic

steps: (1) replacing the electromagnetic problem by an equivalent network repre-

sentation, hence establishing an equivalency between field elements and network

quantities; and (2) solving the equivalent network by interactive methods.

In order to show how Maxwell equations may be represented by the transmis-

sion-line equations, the differential length of a lossless transmission line between

two nodes of the mesh is represented by lumped inductors and capacitors as

shown in Figure 4.47 for two-dimensional wave propagation problems. At the

node locations, pairs of transmission lines form impedance discontinuities. The

ix(x + A~ 12)

Iz(z- A e 12)

A~/2

A e/2 Iz(Z + A ~/2)

v

Ae/2

Ix(X- A ~/2) ~ - - 2 A Z C

A~/2

i

�9 "- I

Figure 4.47 Network representation of a 2D TLM shunt node.


complete transmission-line matrix is made up of large numbers of transmission- line building blocks. It is assumed that internodal distance is Af.

Consider Figure 4.47 and apply Kirchoff's current law at node O to obtain

I x ( x - Af/2) - / ~ ( x + All2) + I z ( z - At/2) - Iz(z + At/2) = 2cAt O.,.v,, 3t

(4.196)

Dividing Equation (4.196) by Af and taking the limit Af---)0, we obtain

Ol~ Ol~ OVy - 2c . (4 .197)

Oz Ox at

If we now apply Kirchoff's voltage law around the loop in the x - y plane, we obtain

V v ( x - All2) - L k---= g O l x ( X - All2) _ L A__=g Olx(x + All2) (4.198) - 2 at 2 at

- Vv(x + A t / 2 ) = O.

By dividing Equation (4.198) by Af and taking the limit A/?---~0, we obtain

0Vy = - L LO_,. (4.199)

Ox at

Doing the same for the y - z plane, we have

0 Vy = - L L&~,. (4.200)

Oz at

Equations (4.197), (4.199), and (4.200) can be combined to give the wave equation

__ O2gy 02 Vy -f 02 Vv 2LC ~ (4.201) OX 2 OZ 2 Ot 2 "

Equation (4.201) is analogous to the Helmholtz wave equation in two-dimensional space. This can be seen by considering Maxwell equations

OH V x E = - / x ~ (4.202a)

Ot

0E V x H = ~ . (4.202b)

at


By expressing Equations (4.202) in rectangular coordinates and considering the

TE mode with respect to the z-axis, we obtain

OHx OHz OEy - e (4.203a)

Oz Ox Ot

OEy _ o n z - / . t ~ (4.203b)

Ox Ot

OEy OHx = # ~ . (4.203c)

Oz Ot

Equation (4.203) can be combined to give the wave equation

_ 02Ey OZEY t OZEY fl,~3 . (4.204) OX 2 OZ 2 at 2

By comparing Equations (4.199) through (4.201) with Equations (4.203) and (4.204), we get the following equivalences between the parameters:

I4~ - - I z

Hz=-I~ t . t~ L e = 2C.

(4.205)

The manner in which a wave propagates in a TLM mesh for a two-dimensional problem is dictated by the transcendental equation

sin ( ; sin (4.206)

where Af is the size of the mesh cell, A is the wavelength of the frequency of

interest, and r is the ratio of the velocity Vn of the waves on the network to the free space wave velocity c, that is,

r - Vn_ w _ 2r (4.207) c /~nC aBn'

where fin is the imaginary part of the propagation constant in the network. If we select different values of A~/A, the frequency values of Vn/c (or r) can be obtained

numerically by using Equation (4.206). From Equation (4.206) it can be deduced

that TLM can only represent Maxwell equations over the range of frequencies

from zero to their first network cutoff frequency, occurring at toAr = ~/2 or


Normalized Propagation Velocity (Vn/c)

0.7

0.6

0.5

B

0.05 0.1 0.15 0.2 0.25

Normalized Frequency (A I/X )

Figure 4.48 Dispersion of the velocity of the waves in a 2D TLM network.

1 As = ~. Over this range, the velocity of the waves behaves according to the

characteristics given by Figure 4.48 [83].

4.6.1 THE SCATTERING PROCESS FOR 2D PROBLEMS

If V i and V ~:n are the voltage impulses incident upon and reflected from terminal k n

n of a node at time t = kAY~c, we can derive the relationship between these two

quantities. Consider the case of four pulses being incident on four branches of

a node. If, at time t = kAs voltage impulses Vilk, Vi2k, V~k, and V~,~ are

incident on lines 1 through 4, respectively, at any junction node as shown in

Figure 4.49, the combined voltages reflected along lines 1 through 4 at time t

= (k + 1)As are given by

I V1] r - 1 1 1 1 Vi i

;i] : 2 ' 1 , , V~ 1 1 - 1 1 V~ "

k+l 1 1 1 --1 V~4 k

(4.208)


JL JL

JO~L' ~F

(a) Excitation (b) First Iteration

- a ~ o w -.~r

(c) Second Iteration

Figure 4.49 Scattering in a 2D TLM network excited by a pulse.

Furthermore, an impulse emerging from a node at position (x,y) in the mesh (i.e., a reflected pulse) automatically becomes an incident impulse at the neighboring

node; hence,

v~k+ l~ (z,x + A~) = vr3~+ ~ (z,x) V i 2(k+l) (Z Jr" A~, x ) - - V r 4(k+ 1) (Z,X) (4.209) V~(k+ l) (Z,X -- m~,) -" Vrl(k+ l) (Z,X)

V i (z - A~, x) -- V r 4(k+ 1) 2(k+ 1) (Z,X)

The application of Equations (4.208) and (4.209) allows us to calculate the

magnitudes, position, and directions of all impulses at time (k + 1)Af/c for each

node in the network, provided that their corresponding values at time kAr are known. The impulse response can be found by initially fixing the magnitude, position, and direction of travel of impulse voltages at time t = 0 and then

calculating the state of the network at successive times.

4.6. The Transmission-Line Method in Computational Electromagnetics

~ X

J / ,Z"

/ /

297

Y

Figure 4.50 Transmission line matrix with boundaries.

Figure 4.49 shows the propagation of pulses in which the first two interactions

following an initial excitation are shown for a two-dimensional TLM. The scatter-

ing process is the basis algorithm of the TLM [79].

4.6.2 BOUNDARY CONDITIONS FOR 2D PROBLEMS

To ensure synchronism, boundaries are usually placed halfway between two

nodes. This can be obtained by making the mesh size A~ e an integer fraction of

the structure's dimensions. Any resistive load at boundary (see Figure 4.50) may

be simulated by introducing a reflection coefficient F,

vi4(k+ 1) (X l ,Y l ) -" gr2k (Xl + 1,y) = F[V~4k (xl, Yl)], (4.210)

where F = (R s - 1)/(Rs + 1) and R~ is the surface resistance of the bound-

ary normalized by the line characteristic impedance. For a perfect conductor

R s = 0; F = - 1 , representing a short circuit; and

v i4(k + r 1~ (xl, Yl) = V4k (Xl, Yl)" (4.211)

4.6.3 CALCULATION OF FIELDS

For the TE mode represented by Equations (4.203) and (4.204), we can calculate

the terms Ey, H x, and H z. From Equation (4.205), Ey at any point can be calculated


from the node voltage at the point. H z at any point can be calculated from the net current entering the node in the x direction. H x at any point can be calculated

from the net current in the negative z direction. For any point (x 1, yl) on the grid

of Figure 4.50, we have for each kth transient time

1 Eyk (Xl Yl) = ~ [V~k (Xl Yl) + Vi i i , , 2k (Xl, Yl) + V3k (Xl, Yl) q- V4k (Xl, Yl)]

- Hxk (Xl, Yl) = V~k (Xl, el) -- V~k (x~, Yl) (4.212)

Hzk (Xl Yl) = Vi i (X, Yl) ' 3k (Xl' Yl) -- V lk 1

A series of discrete delta functions of magnitude Ev, Hx, and H z corresponding to time intervals of Af~/c are obtained by the interactions of Equations (4.208)

and (4.209). Any point in the mesh can serve as an output or observation point.

Equation (4.212) provides output-impulse functions for the point representing

the response of the system to an impulse excitation.

If we want to calculate the frequency response due to a sinusoidal excitation,

all we need to do is to take the Fourier transform of the time-domain impulse

response. Because the impulse response is a series of delta functions, the Fourier

transform becomes a summation. The real and imaginary parts are given by [83]

(for Ey(x l, Y l) in this case) as

Re[Ey(zXe/a)] = ~ Eyk(x~, Yl)COS 2~ 'kAf (4.213) k--1 A

N ( 2 7 r k A f ) Im[E~(Af/a)] = ~ Eyk(Xl, yl)sin (4.214)

" k = 1 A "

The same expressions can be written for calculating H~, H:. Ev(As ) is the

frequency response, Ey(Xl, Yl) is the value of the impulse response at time t = kAs and N is the total number of intervals for which the calculation is made.

4.6.4 T L M FOR I N H O M O G E N E O U S MEDIA

In order to account for an inhomogeneous medium (i.e., e is not constant), there

is a need to add more capacitance at nodes in order to represent an increase in

permittivity [82]. This is accomplished by introducing an additional line as shown

in Figure 4.51a. The line is of length Af/2 and open-circuited at the end and

has a variable characteristic admittance Y' relative to the unity characteris-

tic admittance assumed for the main transmission line. At low frequencies, the

effect of this additional line is to add to each node a lumped shunt capacitance

CY' A/?/2, where C is the shunt capacitance per unit length of the main lines that


2

13

2

13

,-on L,C

CY'

I,, '~ Q CG'

1 1

O4 L,C

CY'

(a) (b)

Figure 4.51 A two-dimensional node: (a) node with permittivity stub, (b) permittivity and loss stub.

have unity characteristic admittance. At each node the total shunt capacitance

becomes

C ' Y A f ' - 2 C A t ( 1 + - ~ ) (4.215) C ' = 2CAt -~ 2

For a lossy medium, we also add a power-absorbing single resistor, and this is implemented by a matched line of characteristic admittance G' normalized to the characteristic impedance of the main lines as illustrated in Figure 4.5 lb. The equivalent network now becomes that of Figure 4.52. Applying Kirchoff's current law to node O in the x-z plane and taking the limits as Af--->0, we get

Oz Ox ZoAf + 2C 1 + ~'Ot (4.216)

Expanding Maxwell equations,

OH V x E = - / . z ,~

a t (4.217a)

0E V •

Ot (4.217b)


Ix(X + A e/2)

iz~- a e/2) ~ i ~ ~ / , ~ V ( z +At/2)

G O / Z o 2A Z C

- /2) i Ix(x ,~ c ' l

' I

Figure 4.52 Two-dimensional shunt node for inhomogeneous lossy media.

i~ z

for O/Oy = 0, we obtain

OHx + OHz OEy OZ Ox = o'Ey + 808 , (4.218)

which is the TEmo modes with components H z, Hx, and Ey When we compare

Equations (4.216) and (4.218), the equivalence between TLM and Maxwell

equations can be expressed as

8 F ---

4 + y '

ey-Vy 14~ - - l z

I4z =- I~

80 = 2C

or (y' = 4(8 r - 1))

G !

o" = or (G ' = o'AfZ o) ZoAe

(4.219)

where Z o = (L /C) 1/2. The losses in the network can be varied by changing the

value of G'.


4.6.4.1 The Scattering Process for 2D Problems

If Vnk(Z,X) is the unit impulse voltage reflected from the node at (z, x) into the nth

coordinate direction (n = 1, 2, 3 . . . . . 5) at the time kAf/c , then at node (z, x),

I V~(z,x)] V2(z,x)l ~(z,x)/= 2 v4(z,x) I 1 -f v~(z,~)J,,+

1 1 1 1 Y' V3(z,x -- A ~ ) - i

1 1 1 1 Y' V 4 ( z - A~,x) 1 1 1 1 Y' - [ I ] Vl(z, A e + x ) , 1 1 1 1 Y' V2(Z qt_ A~, x) 1 1 1 1 Y' V s ( z , x + A f ) k

(4.220)

where [/] is a unit matrix and Y = 4 + Y' + G'. The coordinate directions 1,

2, 3, and 4 correspond to - x , - z , +x, and +z, respectively, and 5 refers to the

permittivity line. Notice that the voltage V6 (see Figure 4.51 b) which is scattered

into the loss line is dropped across G' and not returned to the matrix.

If y = ce + j f l is the propagation constant of the medium and Yn = an + Jfln is the network propagation constant, it can be shown that

Yn = 2(1 + -~--) y (for low frequencies) (4.221)

and the network velocity V n of waves on the matrix is obtained from

2

V 2 __ c (4.222) n

4.6.4.2 Boundary Conditions for 2D Problems

In order to account for a lossy boundary we define the reflection coefficients

[80] as

F = Zs - Z~ (4.223) z~+Zo'

where Z 0 = (/x0/8o) 1/2 and Z S is the surface impedance of the lossy boundary

given by

Zs = IX/~ -' (1 + j), (4.224) ~r

where /x and o-are the permeability and conductivity of the boundary. As can

be seen, F is a complex quantity; hence, the impulse functions are altered at the


conducting boundary during reflection, which cannot be accounted for in the

TLM [80]. To get around this difficulty, it is assumed that the imaginary part of

F is negligible and Z s < < Z o to give.

F ~ - - 1 + _/2e-~ . (4.225)

/

x/ o-

Notice that/-" is slightly less than -1 .

4.6.5 THREE-DIMENSIONAL TLM PROBLEMS

In order to represent three-dimensional problems, TLM uses a hybrid mesh consisting of three shunt and three series nodes to describe the six field compo-

nents. Shunt nodes were described previously for two-dimensional problems. The voltages at the three shunt nodes represent the three components of the

electric field (E). The currents of the series nodes represent the three components of the magnetic field (H). In the x-z plane, the voltage-current equations for the

shunt node are

aL aI~_ 2caVy (4.226a) Oz Ox Ot

OVy _ - L &~f (4.226b) Ox Ox

OVy= L.OI~ (4.226c) Oz Ot

and for the series node in the x-z plane, the equations are

OVx OVz_ 2LOly Oz Ox at

air = _cOVz Ox Ox

Oly = _cOVx Oz Ot

The equivalent Maxwell equations for O/Oy = 0 give

aH~ aHz aEy Oz Ox Ot

aEy _ aH~ /.t

Ox Ot

(4.227)

(4.228a)

(4.228b)

a E y = /~

0z Ot (4.228c)


a n d

oE~ OEz oI-Iy = /x ( 4 . 2 2 8 d )

Oz Ox Ot

OHy OE~ = - e ( 4 . 2 2 8 e )

Ox Ot

OHy OEz = - e . ( 4 . 2 2 8 f )

Oz Ot

Similar equations for nodes in the x-y and y-z planes will yield voltage-current

equations and the analogous Maxwell equations. Figure 4.53 shows a three-

dimensional node representing a cubical volume of space Af/2 so that similar

nodes are spaced A/? from each other. If the voltage between lines represent the

E field and the current in the line represents the H field, we can then write the

following Maxwell equations:

OH~ aHz aH~ = e ~ ( 4 . 2 2 9 a )

Oz Ox Ot

Onz Ony _ OE~ - e ( 4 . 2 2 9 b )

Oy Oz Ot

E

Ex

Hx

Ez ~ X

Figure 4.53 A general three-dimensional node.

�9 " z


oily oH~ oEy - e (4.229c)

Ox Oy at

OEz OEy OHx = - ~ (4.229d)

Oy Oz Ot

OEy OEx Onz - - / z ~ (4.229e)

Ox Oy Ot

aEx aEz Oily - - ~ . (4.2290

Oz Ox Ot

A series connected node which is lossless is shown in Figure 4.54. The network

representation is shown in Figure 4.55. The input impedance of the short-circuited

line of Figure 4.55 is given by

�9 3 Z i = j Z 0 tan ~- jwLZ o (4.230)

A W

2 A W

AI/2

I I 3q Y

w

w

Figure 4.54 Lossless series node with permeability stub.

Z y


v Vz+At dVz/dz I ~/2

LAe/2 ~ ,,

T cA~/2 I,x ~ - cA~/~

IA~/2(1 7-o)

~/2 I l

Vy+AI dVy/dz

z v

y

Figure 4.55 Network representation of series node.

This represents an impedance with inductance

L' = L~-f Zo . (4.231)

The total inductance on the side in which the short-circuited line is inserted is given by

L -~ (1 + Zo). (4.232)

Applying Kirchhoff's voltage law around the series node of Figure 4.55 and

dividing by Af, we obtain

Oy Oz --~ (4.233)

for the node oriented in the y-z plane. For the x-y plane orientation, we have

( z0~ OVy OV~ _ 2L 1 + (4.234) Ox Oy 4 ] Ot '


and for the x - z plane orientation,

( Zo O y OVx OVz_ 2L 1 + Oz Ox 4 / Ot"

(4.235)

By comparing Equation (4.235) with Maxwell equations, we obtain

~ - V x Ez-Vz / z = 2 L

_ (4 + Zo) /Zr= 4

(4.236)

A voltage impulse incident on a series node is scattered in a fashion dictated by

I V l ( Z , X ) q r

V2(z, x) V3(z,x) = 2 V 4 ( z , x )

Vs(z,x) ~+

- 1 1 1 - 1 - 1 1 - 1 - 1 1 1 1 - 1 - 1 1 1 + [/]

- 1 1 1 - 1 - 1

-z0 Zo Z o - Z o - z 0

V3(z , X - A~) i

V4(z - Ar x) VI(Z , A~ -~- x) ,

V2(z + Af , x) Vs(z, x + Af)

(4.237)

where Z = 4 + Z 0 and [/] is the unit matrix. The velocity characteristic for the

three-dimensional case in Equation (4.237) is the same as for the shunt node.

In the upper half of the node in Figure 4.53 there is a shunt node in the x - z

plane (representing Equation (4.229a)) connected to a series node in the y - z plane

(representing Equation (4.229d)) and a series node in the x -y plane (representing

Equation (4.229e)). In the lower half of the node, a series node in the x - z plane

(representing (4.229f)) is connected to a shunt node in the y-z plane (representing

(4.229b)) and a shunt node in the x-y plane (representing Equation (4.229c)). A

three-dimensional TLM mesh is obtained by stacking similar nodes in the x, y,

and z directions. It can be shown that for a general node the following equivalences

apply [80]:

E x = common voltage at shunt node E x

Ey = common voltage at shunt node Ey

E z = common voltage at shunt node E z

Hx = common current at series node H x

Hy = common current at series node Hy

H z = common current at series node H z

e o = C (capacitance per unit length of line)

8 r = 2(1 + Y'/4)

4.7. Computational Methods at Work: Getting Numbers from Your Models 307

#0 = L (inductance per unit length of line)

/z r = 2(1 + Zo/4)

o-= G'/(A~(L/C)),

where Y', Z 0, and G' have been previously defined. By interconnecting many of

these three-dimensional nodes, we obtain a TLM mesh representing an inhomoge-

neous medium. The TLM for three-dimensional problems consists of applying

Equation (4.237) to obtain an impulse response. Any field component can be

excited by specifying initial impulses at the appropriate nodes.

The wave characteristics (propagation constant, wave velocity) of the three-

dimensional mesh are similar to those of the two-dimensional mesh.

4.6.5.1 Boundary Conditions

The tangential components of E must vanish in the plane of an electric wall,

whereas the tangential components of H must be zero in the plane of a magnetic

wall. Boundary conditions are simulated by short-circuiting shunt nodes or open-

circuiting series nodes (magnetic wall). The continuity of the tangential compo-

nents of E and H fields across a dielectric/dielectric boundary is automatically

satisfied in the TLM mesh. Finally, wall losses are included by introducing

imperfect reflections coefficients as in Equation (4.223).

4.7 Computa t iona l Methods at Work: Gett ing N u m b e r s

from Your Mode l s

We conclude this chapter with some worked examples of the use of computational electromagnetics in the analysis of certain types of EMC problems. Five examples

are studied. The first three examples use the method of moments and the fourth uses the FDTD method. The fifth example is an overview of several techniques

being applied to a single problem. The material presented is of a tutorial and practical nature. It is intended to provide some insight into how to use computa-

tional electromagnetics to solve simple EMC problems.

4.7.1 METHOD OF MOMENTS USING THIN-WIRE MODELING

Because of its widespread use in the analysis of EMI problems, a more detailed

study of the method of moments is addressed for the case of modeling structures

using thin wires. Thin-wire modeling is useful in EMC because it blends easily

the modeling of cables, wires, microstrips (e.g., in PCB), and antennas, all of

which often serve as major sources of EMI problems in many types of electronic equipment.


It is possible to rewrite Equation (4.18b) in a more compact form

E ie = 47Tjwe • 1_, L Oe2 + kZG(e,#, ') l ( e ' ) d r ' . (4.238)

where k 2 = wz/ze. In this equation I(~') is the current distribution on the perfectly

conducting structure. This induced current distribution will result from either of

two sources: a voltage source, if the metallic structure behaves as a radiator

(antenna-type problem), or a field source, if the metallic structure behaves as a

scatterer (radar cross-section type of problem). Consider the simple case of a

radiating wire as shown in Figure 4.56. This model could represent a radiating

I/O cable from a computing device, whose common-mode current is the major

contributor to radiated emissions. The radiating structure is divided into four

segments. The excitation source creates a current distribution in the wire structure,

represented in this case by three sinusoids as shown in the figure. The complex

coefficients I 1, 12, and 13 of the current expression I(/?') must satisfy the following

conditions:

f l = I(e0) , h h

12 = I(eo) + ~ = I(eo) - ~ = 13 .

The current distribution I(~') can now be represented as

,o) , + / 2 sin k(f' - fo) fo < f ' -< ~ + fo

Ii(~' ) = I1 sin kd sin kd ' -

i2(t ) i2 sin k(h - ( t ' - ~o)) h ' = - + ~o < ~ " -<h + ~o

sin k d ' 2 -

12 I1 13

V1

Figure 4.56 Radiating four-segment wire structure with current distribution.


sin k ( h + (t? ' - fo)) sin k(f ' - t? o) = + ~

~(t?') 11 sin kd sin kd

~sin k(h + (r - ~o)) I4(e')

sin kd - h + fo -< f ' -< ~o

- - +/?o <- ~' <-/?0(4.239 )

The matrix Equation (4.20) can now be represented by

ZllI 1 + Z 1 2 I 2 n t- Z13I 3 = 0,

Z2111 + Z22I 2 + Z23 ~ = 0, Z3111 n t- Z32I 2 Jr- Z33I 3 = V 1.

4.7.1.1 The j-Segment Solution

Let us consider the more general case of an arbitrary number o f j segments along the f ' axis. A general piecewise sinusoidal expansion function covering two

segments is shown in Figure 4.57 and can be written in a general form as

l j(f ' ) = ~ sin k(f ' - /?j-l) sin k(~j - ~ j_ l ) ' ~J-~ <-/?' -< ~j' (4.240a)

Ij(e') = ~ sin k(fj+ 1 - f ' ) sin k(~j+ 1 - ~j) ' ~J <- f ' <- r ~" (4.240b)

1.0

s

-ej-1 s s

Figure 4.57 Generalized current distribution on a j-segment wire structure (j = 2 in this case).


The fields corresponding to this single current distribution are given by

j30 [ (_~_ t. : ~j_l)e-jkR1

p LR1 sin k ( f j - ~j-1)

(~?' - e/)e/~R2 sin k (~_ 1 - / ? j - 1) R 2 sin k(/?j - ~?j-1)sin k(fj+ 1 - f j)

(4.241)

(et -- ej+ l)e -jkR3 ]

R 3 sin k(fj+ 1 - /?j) J"

e-jkR l

Ee = j30 - R1 sin k( f j - f j_ 1)

e/kR2 sin k(fj+l --~j-1) R 2 sin k(s - s 1)sin k(s 1 - s

e-jkR3

R 3 sin kCj+ 1 -

(4.242)

e)]' where Ep and Ee are the field components normal to and parallel to the direction of the current element as shown in Figure 4.58.

If Ej is the vector field generated by the jth expansion function/j, then a general formula for a typical element Zij of the impedance matrix Z is given by

f ei sin k(C - ~i-1) i t Zij=- , , , - V ; i �9 ee'

(e/+l sin k(~i+l -- ~') |aei sin k--~/+l + ~-5 i ' ' Ej d#',

+

(4.243)

where Ej is equal to Ee given by Eq. (4.242). Notice that in Eq. (4.243) we have calculated only two elements of the more general impedance matrix given by Eq. (4.21). Notice also that Eq. (4.243) represents a Galerkin method, where the testing function (subscripts i) is of the same form (sinusoidal) as the basis function (subscripts j). Furthermore, it is important to realize that the field calculation in Eqs. (4.241) and (4.242) assumed a normalized current distribution of coefficient 1 as shown in Figure 4.57; hence, this assumption is also true for the evaluation of Z~/in Eq. (4.243). This technique is usually employed in MOM computer codes to simplify the calculations of the impedance matrix elements, but in reality the coefficients of the current distribution, such as those shown for the segment 4 in Figure 4.56, are implicitly present in Equations (4.241) and (4.242), except


s

I p

l . . . . . . . . . . . . .

~ E~

( 0 , z )

E P v

R2

s [ , / R1

s Figure 4.58 Electric field components from a radiating wire segment.

that they have been removed from Zij calculations in (4.21) and put under the matrix [Ij] in Equation (4.22). Equation (4.243) can be evaluated more efficiently

through numerical integration. However, if fi - fi+l - fi+l - fi - Afi, then Equation (4.243) can be transformed into a simpler expression which can be

simply evaluated analytically.

ir i ZiJ -- �9 ei-~ sin k m~ i J/?i sin k m~ i sin k m~j

Ie -jkR1 e-jkR2 e-J kR3 ]

• R1 2 cos(k A~j) • R2 + R3 d/?'

(4.244)

where

m~i "- ~ i - ~i-1 = ~i+1 - ~i, ~ej = e j - ej_, = e~§


The computed elements are Zij = R 0 + jXij ' where

15 Rq = sin(kAfj)sin(kA~ei ) • [cos k(/?j_ 1 - f / -1)

X {Ci(Vo) + Ci(Uo) - Ci(U1) - Ci(V1)} + sin k(fj_a - ei-1)

X {Si(Vo) - Si(Uo) + Si(U 1) - Si(Vl)} + cos k(~j+ 1 - e i -1)

• {Ci(V4) + Ci(U4) - Ci(Us) - Ci(Vs)} + sin k(fj+l - ei-1)

• {s in(V4)- Si(U4) + Si(Us) - Si(Vs)} - 2 cos(k A~j)cos k ( ~ j - ei_~)

• {Ci(V2) + Ci(U2) - Ci(U3) - Ci(V3)} - 2 cos(k &#j)cos k ( ~ j - e/_l)

• {Si(V2) - Si(U2) + Si(U 3) - Si(V3)} + cos k(ej_ 1 - ei+ 1)

• {Ci(V 6) - Ci(V1) + Ci(U 6) - Ci(U1) } + sin k(fj_ 1 - ei+l)

• { Si(V6) - Si(U6) + Si(U1) - Si(V~) } + cos k(/?j+ ~ - re+ ~)

• { Ci(V8) - Ci(Vs) - Ci(Us) + Ci(U8) } + sin k(fj+ 1 - ei+ 1)

• { Si(V8) - Si(U8) + Si(Us) + Si(Vs)} - 2 cos (k A#j)cos k(#j - re+ ~)

• {Ci(V7) - C i ( V 3 ) - Ci(U3) + Ci(UT)} - 2 cos(k A/?j)sin k ( f j - e/+l)

• { - S i ( U 7 ) + Si(V 7) + Si (U 3) - Si(V3)}]

(4.245)

and Xij can be obtained by replacing Ci(x) by -S i (x ) and Si(y) by Ci(x) in the expression for Rq. Note that Si and Ci denote sine and cosine integrals, respectively, given by the expressions

f x sinT"

Si(x) = dr, (4.246a) 0 7"

Ci(x) = _ f ' cosrT, dz. (4.246b)

Then,

Uo = k

U 1 = k

U3 -- k

U4 = k

Us = k

U6 = k

UT = k

U 8 = k

-N'/a2 + (~j-1- ei-1) 2 + L ( e i - 1 - ~j-1)],

-N'/a2 + ( ~ j - 1 - ei) 2 "-[- L ( e i - ~j-1)],

-X/a 2 + (ej - ei_ 1 - 1 - )2 + L(ei t?j)],

V ' a 2 + ( # j - e/) 2 + L ( e i - #j)],

X / a 2 + ( # j + ~ - e/_~) 2 + L ( e / _ l - #j+~)],

-X/a 2 + ( # j + ~ - e/) 2 + L ( e i - #j+a)],

-~ /a 2 - k - ( e j - e i+l) 2 q-- L(ei+ 1 - ej_l)] ,

-X/a 2 + ( e j - ei+ 1 1 -- )2 + L(ei + ej)],

-V/a 2 _~_ (ej+ 1 - e i+l) 2 + L(ei+ 1 - ej+l)] ,

(4.247)


where L = + 1 and a is the wire radius. The V,. are found in a fashion similar

to Eq. (4.247) with L = - 1 .

4.7.1.2 Wire Mesh (Grid) Modeling of Conducting Surfaces

Wire mesh modeling (also known as grid modeling) is often used to represent

solid perfectly conducting surfaces when using the method of moments. An

example of wire mesh modeling is shown in Figure 4.59, where the top fuselage

of an aircraft is represented using a wire mesh.

Wire mesh modeling is convenient because thin-wire modeling codes are

easily available and are also easy to develop. It is easy to specify shapes in terms

of endpoints. Wire mesh modeling is also convenient for modeling wire antennas,

cables, conductors, and even PCB traces, which are important in interference

control. A mesh can model either open or closed surfaces.

Although wire meshes can model solid surfaces, in many applications there

are some constraints: (1) wire mesh models are accurate for impedance and far

Figure 4.59 Wire mesh modeling of an aircraft's top fuselage.


field, but near-field accuracy is limited by the discrete current, and (2) physical

errors in the modeling can result from mesh size/,~ too large, inaccurate wire radius, direction of current on the grid, segment length/,~ too large, modeling

junctions, and erroneous loop currents. It is important when applying wire mesh

modeling to interference control problems to simulate an EMI effect that a good

physical understanding of the noise problem be obtained first before any modeling

attempt is considered. Believing a wrong answer is worse than having no answer

at all.

Guidelines for Wire Mesh Modeling Consider the partial wire mesh shown

in Figure 4.60. The following guidelines should be observed.

1. Follow the equal-area rule given by the expression d = 2r for the minimum wire radius a needed. Mesh sizes of 0.02 to 0.03,~ 2 are recom-

mended. If possible, a triangular mesh is preferred. Lee, Marin, and

2a �9 �9

O O 0 �9 �9 �9

O O �9 o o o

�9 �9

�9 �9

Figure 4.60 Partial wire mesh and its parameters.


Castillo [118] showed that a mesh has excess inductance (AL) over that of a solid surface as given by the expression

hence, if we use d = 2era, AL = 0, which is what is needed.

2. For edges use rectangular grids of wires oriented parallel to the edges,

with wire along the edges.

3. Make the segment length equal to a/10 at the highest frequency of

interest.

4. Keep the cell area constant, hence segment length constant throughout

the grid whenever possible.

5. Position wires in the locations where the current is supposed to flow.

6. Avoid wire intersection at narrow angles.

7. All meshes in the grid must have peripheries longer than M25.

A wire mesh is a valid representation of a solid surface over a limited band-

width. Based on guideline 7, the frequency at which the mesh path of length

Lshortest is M25 is given by

12 Fmi n - in MHz. (4.248)

Lshortest

Guideline 3, however, requires that the segments be shorter than M10. We can then estimate the best behavior of the grid model to be up to a frequency given by

30 Fmax 1 - ~max in MHz, (4.249)

where Ama x is the longest segment length in the model. In the well-designed grid, the longest Ama x should not be much longer than the average segment

length. In another approach, if the longest mesh periphery in the model is Lmax,

then the model is limited to frequencies below Fma x given by

300 Fmax 2 = Lmax in MHz. (4.250)

At this frequency the longest mesh periphery is one ,~. Above this frequency the

long mesh path can exhibit several resonances and the grid is no longer useful.


The thinness of the wires can also limit the bandwidth of useful frequencies for which the grid would provide good results. If ama x is the maximum radius

in the mesh, the frequency must be less than

10 F m a x 3 - in MHz. (4.251)

amax

4.7.2 ILLUSTRATING COMPUTATIONAL ELE CTR OMA GNE TICS

IN INTERFERENCE CONTROL

4.7.2.1 Example 1: Near-Field Calculation via Modeling

an EMP Simulator [86]

The electromagnetic pulse (EMP) originated at very high altitudes due to nuclear

explosions presents a severe threat to electronic systems. In order to test the

vulnerability of large systems such as airplanes, missiles, or satellites, they are

subjected to EMP simulations which produce a highly peaked transient pulse

with a planar wavefront that illuminates in a uniform fashion the equipment

under test (EUT). Parallel-plate bounded-wave EMP simulators consist of finite-width parallel-

plate waveguides, which are excited by a wave launcher and terminated by a

wave receptor. Usually, conical tapered waveguides are used which match a parallel-plate region in order to excite a plane wave in the parallel-plate region as illustrated in Figure 4.61. The apex of the wave launcher is excited by a

Figure 4.61 Symmetric parallel-plate EMP simulator.


transient source with rise time t r - - 1-5 ns, which is much smaller than the

transient time of the waveguide. The fall time is of the order of 1/zs. For theoretical

calculations the pulse is usually shown as a double exponential waveform and

it is of broadband nature. Using transient pulse excitation, there will be a large

amount of energy distributed throughout a broad frequency band. Higher-order

TE and TM modes will propagate along the waveguide in the higher-frequency

region.

Using the MOM code NEC [20], the EMP simulation problem is modeled as

a thin-wire scattering problem. The conducting surfaces of the simulator are

approximated by a thin-wire rectangular mesh model as shown in Figure 4.62.

Segment lengths are -<M10. The incident field is a voltage source distributed

across the source gap region. Because the interest is in near-field characteristics,

the discontinuities in the vector currents at wire bends and junctions of more

than two wires can lead to nonphysical singularities in the near field, producing

erroneous results. It can be shown through numerical solutions, however, that

the singularities are negligible when sampling the electric field at distances of

at least M12 from the mesh [120].

The source model used in the simulation must be distributed across the

source gap region and capable of exciting a TEM mode. The load model must

also be such as to minimize reflections. An applied field source was used which

distributes a constant E field over the source region as illustrated in

Figure 4.63. Figure 4.64 shows the thin-wire approximation of the load model

used. Purely resistive loads were distributed along the thin wires to establish

the termination. The dimensions of the modeled EMP simulator are shown in

Figure 4.65. This simulator has an operating bandwidth of 450 MHz and is such

that 1 V excitation produces 1 V/m at the center of the ground plane (x = 0).

The E field is computed in the central parallel-plate region (working volume)

due to a 1-V excitation. The simulation is terminated by a characteristic impedance

Figure 4.62 Wire mesh modeling of symmetric parallel-plate EMP simulator.


g \

J �9 f

f

E i

f

E i

Infinite Ground Plane

Figure 4.63 Thin-wire model of the source gap region.

z, j

\ ~ J Ground J f

f

/

Figure 4.64 Thin-wire model of the terminated load gap region.


(a)

0.094 m ~ ' -

I I i

PEC Ground Plane I I I

~ / / / / / / J A ! i

I I I l~q - v- I I~q

4.4m 4.4m

I T- I

1.0m

(b)

0.094~

PEC Ground Plane I I I

x V

Figure 4.65 Dimensions of the modeled symmetric parallel-plate EMP simulator.

which was defined as the resistive load that minimizes the current standing-wave ratio. Two examples were calculated: at 75 MHz with a computed characteristic

impedance of 120 ohms and at 125 MHz with a characteristic impedance of 95

ohms. Figure 4.66a and b illustrate the computed vertical E field (Ez) in the

longitudinal direction. Notice that the fields are quite uniform throughout the

working volume in the longitudinal direction. Figure 4.67 illustrates the longitudi-

nal field Ev at x = o, which represents the propagation of the TM wave. The

longitudinal field is an order of magnitude smaller than the vertical E field.

When an EUT is placed inside the EMP simulator, the induced currents and

the fields coupled within the object, due to various apertures, will determine the

vulnerability of the EUT to such fields. Although the fields inside the working

volume of an EMP simulator resemble those of a plane wave, when an object

is placed within the simulator, the desired environment is distorted because of

mutual coupling. An understanding of the interaction between the EMP simulator


a 1.4

1.2

1.0

0 a > . . . . .

--~ 0.6 U J

0.4

0.2

0.0

_ l '" ] .... I "z , o.~05 m~ers

z = 0.0 meters

RL - 95 Rt lms

x - 0 meters

�9 I I " ' I I

- ~ z - 0.0 meters

_

_ R t ,, 120 o h m s

x = 0 meters

b l . 4

1.2

1.o

~ ' o . 8

ff o.6

0.4

0.2

0.0

_ IEzl IN W O R K I N G V O L U M E (125 M H z ) (MATCHED TERMINATION)

, I . k , I , [ -0 .5 - 0 .3 -0.1 0.1 0 .3 0 . 5 -0 .5

y (meters) (a) MAGNITUDE OF E=

tEz l IN W O R K I N G V O L U M E (75 Ml-tz) (MATCHED TERMINATION)

! , . i ! , i -0 .3 -0.1 0.1 0 .3

y (meters) (a) M A G N I T U D E O F Ez 0.5

Figure 4.66 (a) Magnitude of vertical E z field along the longitudinal direction in the parallel-plate region of the EMP simulator, 125 MHz excitation, unit voltage amplitude. (b) Magnitude of vertical E z field along the longitudinal direction in the parallel-plate region of the EMP simulator, 75 MHz excitation, unit voltage amplitude. From Gedney and Mittra [86].

I Ey j in Working Volume (125MHz) (matched termination)

0.300

I - .

0.250

0.200

v ~ 0.150

0.100

ohms 0.050

0.188 0.376 0.564 0.752 0.940 Z ( m e t e r s )

Figure 4.67 Magnitude of the longitudinal Ey field along the vertical direction at several longitudinal positions, 125 MHz excitation, unit voltage amplitude. From Gedney and Mittra [86].


and the EUT is important. The total fields will be a superposition of the incident field and the perturbed field. This scenario can change not only the pulse environment but also the characteristic of the simulator (e.g., the simulator can no longer

be matched). This happens when the dimensions of the EUT become comparable to half the height of the parallel plate above the ground plane. For the purpose

of studying this problem a cube of half the simulator's height was modeled inside

the parallel-plate region as shown in Figure 4.68 using wire mesh. Figure 4.69

0.235 m

0.47m

\ 1

I "k I , ]',oo4 \ I

o,4 m - ,

PEC Ground

Transition Plane

Figure 4.68 Cubic scatterer within the working volume of a symmetric parallel-plate EMP simulator. From Gedney and Mittra [86].


2.5 �9

2.0

~" 1.5

1.o

0"5 f 0.0

-1.0

/ ' - " x

- / ~ RL., 120 ohms - / \ ,

�9 . OBSTACLE-SIMUI.ATOR INTERACTION ]

(MATCHED TERMINAl"ION, 100 MHz)

,,, I , I , t , - 0 . 5 0 . 0 0.5 1.0

y (meters) (a) MAGNITUDE OF E z

Figure 4.69 Magnitude of vertical E z field along the ground plane. Comparison of fields in the empty working volume with the perturbed fields due to the scatterer.

shows the vertical E field (E z) computed along the ground plane for an empty

working volume as well as a conductive cube in a 100-MHz excitation. In the

presence of the EUT, the fields within the simulation are a superposition of the

incident field, the scattered field, and the fields scattered between the object and

simulator.

4.7.2.2 Example 2: Bistatic Model of a Stick-Model Aircraft

The radar cross section of a target is the fictitious area intercepting that amount

of power which, when scattered equally in all directions, produces an echo at

the radar equal to that from the target. There are two types of radar scattering:

monostatic and bistatic. Monostatic scattering is more common. In monostatic

scattering the field source (e.g., radar beam) and the observation point are at the

same location (e.g., using the same antenna). For example, most radars on aircraft

are monostatic. In bistatic scattering the scattered field is measured (observed)

at a location different from that of the field source. The radar cross section can

be estimated as

O'-- power reflected source/unit solid angle = lim 4 ~R 2 incident power density/4 rr R---,~

E r gr (4.252)

where R is the distance between the observation point and scatterer, E r is the re-

flected field strength at the observation point, and E i is the strength of the incident


field at the scatterer. Let's consider Figure 4.70, which is a stick model representation of an aircraft. More complex configurations could have been considered (e.g., Figure 4.59), this simple model is sufficient to illustrate the concept of bistatic scattering. In Figure 4.70 an incident plane wave illuminates the target. The figure shows the (x, y, z) coordinates (z = 0 in this case) of all the points interconnecting

the wire segments. The NEC code is used again to solve for the scattered field

observed at angles 0 and ~b. The program will then calculate the bistatic scattering from Eq. (4.252). The input data file containing all the needed input parameters is

shown in Figure 4.71. The output file generated by the NEC code is also shown

following in Figure 4.71. The output file shows all the detailed calculation from

the NEC code. The normalized cross sections (o-/A 2) for bistatic scattering are pro-

vided in the radiation pattern sections of the NEC output file.

4.7.2.3 Example 3: Surface Patch Modeling of Man-with-Radio Model [88]

The radiation characteristics of handheld radios, cellular phones, and other personal wireless communication systems are increasingly important because of possible biological effects of electromagnetic radiation. It is also important to

(24,29.9,0)

y &, t (2,13.3,0)

Tail from (6,0,0) to / (0,0,0) (6,0,0) (2,0,1 O) (44,0,0)

(2,-11.3,0)

f I

inc

(68,0,0)

Coordinates in Meters

(24,-29.9,0)

Figure 4.70 Stick model of an aircraft.

a CM Sample Problem for NEC CE Stick Model of Aircraft GW 1 1 0.0 0.0 GW 2 6 6.0 0.0 GW 3 4 44.0 0.0 GW 4 6 44.0 0.0 GW 5 6 44.0 0.0 GW 6 2 6.0 0.0 GW 7 2 6.0 0.0 GW 8 2 6.0 0.0 GE FR 0 1 0 0 EX 1 1 1 0 RP 0 1 1 1000 EX 1 1 1 0 RP 0 1 1 1000

Space 6.0 44.0 68.0 24.0 24.0 2.0 2.0 2.0

0.0 0.0 30.0 30.0

----- Segmentation Data ------ Coordinate in Meters 2

Q. I + and I - ~ndicate the Segments Before and after I (D

z F

Seg. Coordinates of Seg. Center Seg Orientation Angles Wire Connection Data Tag. No. X Y Z Length Alpha Beta Radius I - I I+ No. # 1 3.0000 0.0 0.0 6.0000 0.0 0.0 1.0000 0 1 2 1 3 2 9.16667 0.0 0.0 6.3333 0.0 0.0 1.0000 -24 2 3 2 8

Figure 4.71 NEC (a) input and (b) output files for incident plane wave in the stick model of aircraft. Calculation of normalized cross section.

VI

326 4. C

omputational M

ethods in the Analysis of N

oise Interference

* a,*

c a

*

* o

*

* U

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* *

I: U

*

* -4

C

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U*

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mr

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; *

h*

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U*

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U*

8

m*

*

rl*

* W

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I: *

* d

*

r a

*

* u

*

* .rl *

* h

*

r 5; *

Z*

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OO

OO

OO

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..

..

..

..

0

00

00

00

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rl

rl

xo

oo

oo

oo

o

..

..

..

..

o

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e*

ew

ww

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**

01

4.7. Com

putational Methods at W

ork: Getting N

umbers from

Your M

odels 327

rd rd

6

U

U

U

rd

rd

rd

a a 2

%

C

i*

+

%C

*

CC

*

---- Currents and Locations ----

Distances in Wavelengths

Seg. Tag NO. NO.

Coord. X

of Seg. Y

Center z

0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0

Seg . Length

0.06000 0.06338 0.06338 0.06338 0.06338 0.06338 0.06338 0.06004 0.06004 0.06004 0.06004 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05999 0.05998 0.05998 0.05998

- -

Real

1.49973-03 3.20963-02 3.79663-02 4.42993-02 4.49343-02 5.20343-02 5.16373-02 2.08773-01 1.78443-01 1.28133-01 5.92053-02 -8.32333-02 -8.31063-02 -7.61693-02 -6.25193-02 -4.34903-02 -1.95443-02 -8.32333-02 -8.31063-02 -7.61693-02 -6.25193-02 -4.34903-02 -1.23763-02 -1.01183-02 -4.61763-03 -1.00183-02

---Current (Amps) ----

Imag . Mag.

4.69493-03 4.92873-03 -1.70223-02 3.63313-02 -3.10783-02 4.90643-02 -4.94603-02 6.63983-02 -6.70693-02 8.32643-02 -7.98293-02 9.52903-02 -8.48413-02 9.93203-02 -2.08953-01 2.95373-01 -1.78503-01 2.52393-01 -1.27523-01 1.8077E-01 -5.82763-02 8.30743-02 6.61923-02 1.06343-01 6.56123-02 1.05883-01 5.87263-02 9.61793-02 4.62633-02 7.77743-02 3.02123-02 5.29553-02 1.23763-02 2.31333-02 6.61923-02 1.06343-01 6.56123-02 1.05883-01 6.87263-02 9.61793-02 4.25193-02 7.77743-02 3.02123-02 5.29553-02 1.23763-02 2.31333-02 5.23533-03 1.13923-02 1.78363-03 4.95013-03 5.23533-03 1.13923-02

Phase

72.285 -27.938 -39.303 -48.151 -53.658 -56.903 -58.674 -45.024 -45.010 -44.865 -44.547 141.506 141.709 142.369 143.499 145.213 147.657 141.506 141.709 142.369 143.499 145.213 147.657 152.642 158.880 152.642

- - - - Radiation Patterns - - - -

--Angles-- --Power Gains-- --Polarization-- --E (THETA) - - --3 (PHI) --

THETA PHI Vert. Hor. Total Axial Tilt Sense Mag. Phase Mag. Phase Degrees Degrees dB dB dB Ratio Deg. Volts/m Degrees Volts/m Degrees

0.0 0.0 -2.98 -999.9 -2.98 0.0 -0.0 Linear 2.0002E+01 -133.97 1.07233-12 69.59

* * * * * * Data Card No. 4 EX 1 1 1 0 9.03+01 3.OE+01 -9.OEE+01 0.0 0.0 0.0 * * * * * * Data Card No. 5 RP 0 1 1 1000 9.OE+01 3.OE+01 0.0 0.0 0.0 0.0

- - - Excitation---

Plane Wave THETA=90.0 Deg. PHI= 30.0 Deg. ETA=90.0 Deg Type --Linear-- Axial Ratio= -0.0

Seg . No.

Tag Coord. No. X

of Seg. Y

Center z

Seg . Length

---- Current (Amps)----

Real Imag . Mag. Phase

Figure 4.71 (continued)

Seg. Tag Coord. of Seg. Center Seg . ---- Current (Amps) ---- No. No. X Y Z Length Real Imag . Mag. Phase

--- Radiation Patterns - - -

--Angles-- --Power Gains-- --Polarization-- --3 (THETA) -- --E(PH1) --

THETA PHI Vert. Hor. Total Axial Tilt Sense Mag. Phase Mag. Degrees Degrees dB dB dB Ratio Deg. Volts/m Degrees Volts/m

90.0 90.0 -57.77 -9.79 -9.79 0.0001 89.54 Right 7.2753-02 -52.30 9.1343+00

****Data Card No. 6 EN -0 -0 -0 -0 0 0.0 0.0 0.0 0.0

Phase Degrees

Run Time = 1.271

Figure 4.71 (continued)


the manufacturer how the effective radiated power is affected by such scatterers

as the human body itself, other groups of people present, buildings, and other

nearby structures. In the area of biological effects considerable attention has been devoted to modeling the electromagnetic fields (and current distributions) inside biological tissues with the objective of obtaining estimates of the specific absorption rate (SAR). Such estimates can be compared with safety limits established

by regulatory agencies. These calculations are more effectively done using volume

integral equations in the MOM. Method of moments techniques [89] as well as other techniques like FDTD [90] and FEM [91 ] have also been used successfully.

If one is interested primarily in the input impedance and radiation pattern of

the radio antenna in the presence of a human body, simpler models like surface

patch modeling can be used in the study. Surface integral equations, leading to

the MOM, which assume that the human body is a homogeneous dielectric region [125], should prove satisfactory. Assuming the body to be a lossy dielectric, the

impedance boundary condition model can be used [ 126]. The impedance boundary condition model requires the current distribution to be modeled over the entire

surface of the dielectric body. However, a reduction in the number of unknowns in the models can be obtained by enforcing a known relationship between electric and magnetic equivalent surface current densities.

Consider the case of the man-with-radio model shown in Figure 4.72. The

radio is transmitting at 450 MHz. The man is modeled as a cylindrical geometric

structure with triangular patches. A thin, lossy dielectric shell is used to represent the body surface. The radio body is modeled as a rectangular, perfectly conducting

plate. The wire antenna is modeled as a perfectly conducting thin strip. The radio is excited by an impressed voltage source at the point where the plate and thin strip meet. An equivalent surface current J is assumed to be induced in the model. This current represents approximately the volume polarization current Jv which flows within the impedance shell tangential to the surface [ 127]. J is an approximation of Jv and it has the disadvantage that the model ignores the internal structure of the human body.

Because J exists in a lossy medium, the EFIE given by Equation (4.30) must

be expressed by

-Elan " - ( - j w A - V(i))tan -k- ZsJ , (4.253)

where Zs is the sheet impedance defined by

Z s = [jweo(e ~ - 1)7"]-1 (4.254)

where ~-is the thickness of the sheet. Dielectric loss is included by setting

/ 3 r = / 3 r - - /3 r. Notice that if Z s = 0, Equation (4.253) reduces to Equation (4.30).


Figure 4.72 Surface patch (triangular patches) modeling of human body with radio.

Glisson and Wheeless [ 121 ] used this approach to model the current distribu-

tion on a dielectric cylindrical shell representing the human body. The measured

data for the radiation pattem were obtained using a vertical 14-inch PVC pipe

filled with salt water to represent the human body. The height was 6 feet. The

receiving antenna was fixed and the radiation pattern was obtained by varying

the azimuthal position of the radio around the water-filled pipe. Numerical results

were obtained and compared with measured data at 450, and 470 MHz. The

dielectric sheet had thickness of ~- = 0.07 m, ~r "-- 8 0 , and or = 0.3. The cylinder

radius is 0.173 m and the height is 1.82 m. The plate model for the radio has


dimensions of 0.195 m high by 0.065 m wide and the antenna strip has dimensions

of 0.197 m high by 0.01625 m wide. The model in Figure 4.72 used 12 segments

for both the vertical and azimuthal directions and 577 unknowns. Measured and

numerical results are compared in Figure 4.73. The agreement between the

experimental and numerical data is very good for the two frequencies.

4.7.2.4 Example 4: FDTD Method for Simulating Delta-I Noise [95]

High-speed integrated circuits are becoming of use in VLSI, Application Specific

Integrated Circuits ASIC, and multichip module (MCM) technology. However,

voltage fluctuations in the power supply system, known as Delta-I noise (or

ground bounce), have become a serious constraint for the operation of these

circuits. Because of the fast current flow through vias onto power and ground

planes, transient fields are generated which cause voltage fluctuations between

the power and ground planes. Several methods have been used to model power

and ground planes such as the effective inductor model and the method of

moments [96], using wire grids to obtain the current distribution. In the effective

inductor model no account is taken of the resonance in power and ground planes.

The method of moments cannot be easily adapted to transient circuit simulation

1.0

0.8

0.6

0.4

0.2

0.0

-0.2

-0.4

-0.6

-0.8

-1.0

' I " I I I " 1 0 I I I ] q

o § "%. . ] i

I I i ,I _ I I ! 1 I

Figure 4.73 Final right-hand half-space equivalent model. Numerical results: 450 MHz, solid line; 470 MHz, dashed line. Measured data: +, 450 MHz; 0, 470 MHz.


which models lumped circuit elements on strip/microstrip lines between electronic

packaging and power/ground planes. In the work of Fang et al. [95] the FDTD method was used to compute the

fields between power and ground planes as shown in Figure 4.74. The power and ground planes and all the lumped circuit elements are modeled together by

linking the FDTD method and circuit simulators. The electromagnetic fields between the power and ground planes (except at the vias) are mostly invariant

in the z direction as shown in Figure 4.74. The two-dimensional fields between

the power and ground planes can be represented by the following transmission

line differential equations:

VV(x , y, t) = - L 0Js(x' y' t) at ' (4.255a)

a V(x, y, t) V �9 Js(x, y, t) = C ~ , (4.255b)

Ot

where V(x, y, t) is the voltage between power and ground planes, Js(x, y, t) is the current density on the power plane, L is the inductance per square, and C

is the capacitance per unit area. Notice that Eqs. (4.255) are of the same form

as the TLM Equations (4.226b, c) and (4.227b, c) in Section 6.5 [except that

Eqs. (4.226) and (4.227) are for the x - z plane]. Furthermore, such equations are dual to the Maxwell Equations (4.228b, c, e, f). Previously we learned how the differential form of Maxwell equations can be used in establishing the FDTD

xJ Y

TO CHIPS

A I

Power Plane

Ground Plane

Figure 4.74 Two-dimensional view of power and ground planes (with vias) for Delta-I noise FDTD analysis.


method. We can conclude that the FDTD method can also be applied to

Equations (4.255). Fang et al. established such a procedure to obtain (assuming zkx = Ay = Ah)

W+~(k, 1) = W(k, 1) At 1/2( k + 5, 1) - I x 5, 1) C(Ah)2 X [Ix"+ 1 ,+ 1/2( k 1

+ Iyn+ 1/2(k ' 1 + ~) - I n+y 1/2(k, 1 - �89 + C(Ah) 2 A t in + 1/2(k, l),

1 1/2( k ~ At Ix+l/2(k -I- 5, 1) = I~ - + 5, 1) - - -~[V"(k + 1, 1) - V"(k, 1)],

At - + '/2(k, 1 + ~ )= U - ' / 2 ( k, 1 + �89 - T iv"(1,, 1 + 1) - v"(k, 1)], I y

(4.256)

where I x = ,Ix Ah and ly = Jy Ah. Because there is a need to link the FDTD

method with a circuit analysis program in order to analyze the lumped parameters

representing the vias, the matching of impedances is necessary. The impedance

of the vias can be represented by

j~Td H~o2)(ka) Z~ = 2 ~ra n]2)(ka)

where d is the distance between the power and ground planes and a is the radius

of the via. H~o2)(ka) and H~2)(ka) are Hankel functions. The input impedance of the

FDTD grid (Z 0 FDTD) depends on the grid size Ah. These two impedances are

generally not equal. If one adds an impedance transformer Z d = Zo(a) - Z o FDTD between the FDTD and the circuit analysis program as shown in Figure 4.75,

A W

Z0 FDTD

Connected to Circuit Simulator

A W

Z d = Z0(a ) - Z o FDTD

ZO FDTD

Connected to Circuit Simulator

W(t)

Figure 4.75 Impedance transformer model between FDTD tool and circuit simulator.


the input impedance of the FDTD grid is transformed to the input impedance

Zo(a ). The term W(t) in Figure 4.75 represents the fields reflected from the edges

of the finite-size power and ground planes and/or the fields which are generated

from currents in other vias between the power and ground planes.

Fang et al. considered 6 • 6 cm power/ground planes separated by d =

150/zm and filled with dielectric /3 r - - 4.0. The source with a sine waveform

as shown in Figure 4.76 is applied across a pair of vias of radius a = 75/zm.

Figure 4.77 shows the voltage waveforms at the junction of the via and power/

1.5

i l . 0

0 . 5 g.

o

0.0 0 200 400 600

TIME (PS)

Figure 4.76 Voltage source waveform applied in the FDTD analysis across a pair of vias.

~.2

0 100 200 300 400 TIME (PS)

Figure 4.77 Calculated voltage waveform, from FDTD analysis, at the junction of the via and power/ground planes. From Fang et al. [95].


ground planes. It is stated in the paper that when adding the impedance transformer, the numerical results are independent of grid size Ah.

4.7.2.5 Example 5: Modeling Overview of Printed Circuit Boards

Over the past 10 years great interest has been shown in the proper design of

printed circuit boards using EMC design principles in order to comply with

regulatory requirements for conducted/radiated emissions and immunity. It is

believed that meeting the EMC requirements at the system level starts with the

incorporation of the proper EMC design rules at the PCB level.

Much work has been done concerning optimum EMC design rules for PCBs.

We will summarize such concepts in this section and then proceed to review the

role of computational electromagnetics in aiding the PCB design process.

General Design Rules

1. Never use a higher clock than necessary in order to decrease the number

of harmonics. The lower the number of harmonics, the smaller the

number of frequencies needed to comply the regulatory emissions limits.

Never use a smaller rise/fall time than is necessary. For trapezoidal pulse

trains the smaller the rise/fall time, the higher the frequency spectral content.

2. Keep the leads carrying the clock signal as short as possible in order to

reduce the radiated emissions. Remember that as the clock frequency gets higher the wavelength will eventually be short enough to be comparable in length with the microstrip lands, which hence become effective radiators (antennas).

3. In PCBs, where there is more than one clock frequency (either because two or more oscillators are present or because of dividing down a

fundamental clock), make sure that none of the harmonics are closer in frequency than the bandwidth of the receiver to be used in measuring

the emissions; otherwise such frequencies will add in the receiver's

bandwidth, resulting in possible noncompliance in the emissions test.

4. Minimize loop areas of signal and return lands to reduce emissions due

to differential mode currents. This will also reduce the reception of

incident fields. Remember, at a given frequency, a good radiating loop

antenna is also a good receiving antenna.

5. Place the signals with higher spectral content away from off-board con-

nectors to keep harmonics from coupling into I/O cables, which will


then act as radiators. I/0 cables should be shielded and grounded to a quiet ground to prevent the shield from behaving as an antenna from

the common-mode current.

6. Provide blocking inductors or low-impedance capacitors to connector

pins that are adjacent to pins that contain very fast/fall time signals.

7. Make generous use of bypass capacitors with minimum lead/trace lengths

in order to diminish the inductance effect of such leads/traces, which

can lead to a resonance frequency (LC circuit) below the switching frequency of the chip, creating a high impedance that will negate the

bypass capacitor effect.

8. In multilayer boards (highly recommended) use ground planes (or ground grids) adjacent to a signal plane in order to minimize loop area and

reduce the net inductance of the return path.

Modeling PCBs Using Computational Electromagnetic Methods There are

many areas of concern in PCBs that would benefit from good modeling tools. However, in the area of computational electromagnetics the effort has, so far,

concentrated on three topics: emissions from PCB traces and cables, crosstalk,

and signal integrity. We will describe briefly the fundamentals of these three

types of modeling approaches. Other references are given for more detailed discussions.

Emissions from PCB Traces and Cables. The radiation from PCBs has been studied using basically two techniques: the method of moments and transmission

line theory. Method of Moments: In the method of moments the objective is to calculate

numerically the current distribution of microstrip lines (traces) of the type shown in Figure 4.78. The fields can then be accurately estimated from the knowledge

of the current distribution.

Consider the simple example of Figure 4.79, where a microstrip is driven by

a source (e.g., a clock) which induces a current on the microstrip. The microstrip

is terminated by a capacitive load which could represent the input capacitance of a logic gate. Two method of moments techniques have been used to solve for

the radiated emissions from the microstrip of Figure 4.79. In one, a rigorous

approach is used to solve the electric field integral equation in which the Green's function is that which corresponds to a microstrip structure. Notice that the

Green's function used in the electric field integral Equation (4.18) is that of an

unbounded source radiating in free space. Rigorous analysis of PCB traces,

microstrips with complex loads, patch antennas, and printed dipoles requires the


Figure 4.78 Microstrip line geometry.

Figure 4.79 Capacitive loaded microstrip line driven by a voltage source.

use of vector and scalar Green's functions for a dielectric substrate which is backed with a ground plane. Green's functions where the domain is bounded by one or more regions (e.g., dielectrics, ground planes) can be obtained from the

method of images or eigen function expansions. Green's functions for microstrip

structures are Sommerfeld integrals. These improper integrals are oscillatory in

nature and decay very slowly. Their calculation is time-consuming, especially

when used in the method of moments. Small-argument approximations of these

integrals have been developed by Mosig and Gardiol [ 130] using a dyadic vector

potential Green's function and the related Lorentz gauge scalar potential. The

vector potential and scalar potential expressions are of the same form as those depicted in Eq. (4.13), except that the term e-JkR]R (Green's function in free


space) is replaced by the proper Green's microstrip function of the Sommerfeld type. This is shown in Eqs. (4.257).

E s= -jwA- V~,

A(r) = fsJ(r') �9 GA(r, r') ds',

V(r) = fsP(r') �9 GV(r, r') ds',

p(r ' ) = 1 V , . J(r'). jw

(4.257)

Only the surface currents which reside in the air-dielectric interface are considered. The small-argument Green's function approximations are given by

G a = ~xxG a -Jr- ClyyG A,

where in general G A and G v are given by

G A _ /.t o p v (~176 Jo ( ozR ) oz - ~ J0 u o + u coth(uh) dcr, (4.258)

G v = Jo(crR) X a[Uo + u tanh(uh)] 2 [u 0 + u coth(uh)][erU o + u tanh(uh)] dcr (4.259)

and Jo(x) denotes the zeroth-order Bessel function of the first kind with argument x, PV denotes the principal value, and

Uo = X / a 2 - k~, ko = o A / / ~ : o ,

u = X / ~ - / : , /, = o A / / ~ ,

R = Ir - r'l.

The current distribution on the surface of the microstrip conductors is modeled by subdividing the microstrip into rectangular cells, and a Galerkin procedure using rooftop basis and testing functions [98] is then employed to compute the surface current.

Another remedy for the convergence problem, implemented by Aksum and Mittra [99], is to express the spatial domain Green's function in closed forms so that the inner products in the method of moments become two-dimensional integrals over a finite range, and the time-consuming part in the spatial domain, which consists of the evaluation of the Green's function, can be totally avoided.

Problems of microstrip radiation from PCBs can also be evaluated using less rigorous approaches. Such approaches are fairly accurate at low frequencies. Generally, for microstrips at low frequencies or, er, dielectric loss tangent factor tan ~b~, and electrical resistivity are frequency independent. The circuit has very


low loss and the wave traveling on the microstrip is of quasi-TEM type. In the quasi-static approximation, the electric field lines correspond to those of the DC

field between the conductor and the ground plane. The E z field dominates in Figure 4.78. The magnetic H field has the distribution it would have if the

substrate were not present. Furthermore, at low frequencies only the longitudinal

current exists at the stripline upper/lower surface and ground conductor, with the

current on the lower surface higher that on the upper surface of the microstrip.

Transverse current densities are insignificant. As the frequency increases the

microstrip becomes more dispersive. Transverse currents become significant and

so do the longitudinal field components E x and Hx. The microstrip transmission

line becomes dispersive above a cutoff frequency given by

f c > 0.3 / Z , . ( f - 0) 1 09 " V ' e r - 1 X 1 (4.260)

where h is in cm and Zc( f = 0) is the low-frequency characteristic impedance

of the microstrip (to be defined later). For most typical microstrip transmission

lines the cutoff frequency ranges from 1 to 10 GHz.

Using a less rigorous approximation for the current distribution in microstrips

at low frequencies, the method of moments for thin-wire structures, which uses

a free space Green's function, can also be used to calculate the radiated emissions. We can now replace Figure 4.79 by a simpler structure using thin wires as shown

in Figure 4.80. Simpson et al. [100] used this simple approach to calculate the

Vs

Signal Wire

0 I i I ,() I

I

0 I,,, I I I () Return Image Wire

m

C

Figure 4.80 Thin-wire equivalent model of capacitive loaded microstrip line with voltage source.


fields from a single straight microstrip (as in Figure 4.79) line. The microstrip line was replaced with a single wire of equivalent cross-sectional area and the

ground plane was replaced with an image wire. The wires were then subdivided

into a number of segments depending on the frequency of interest. For educational

and teaching purposes, Perez [ 101 ] used the same methodology to model a more

complex circuit obtained from an actual PCB. The modeling included lumped loads representing several chips. Experimental results showed remarkably good

agreement with computed data. As important as radiation from PCB traces may be (an EMI problem that will

become more serious as the industry pushes for higher clock rates in future designs), the major source of radiated EMI from computing devices is that from

cables. It is well known that the common-mode current that may couple into

cables is responsible for such emissions. Because the length of these cables (e.g.,

I/O cables) is comparable in size to the wavelength at many of the frequencies (or harmonics) used by these computing devices, these cables become effective antennas. Modeling the radiated emissions from these cables is an effective tool for estimating the overall performance of the computing device during subsequent emissions testing. In this approach the cable is modeled as a wire structure with an excitation source whose magnitude represents that of the common-mode current present as shown in Figure 4.81. Hubing and Kaufman [102] and Cerri

et al. [ 103] have used this approach for calculating the radiated EMI from cables connected to small tabletop products and PCBs, respectively.

Transmission Line Method: Finally, radiation from finite-length transmission lines has also been studied using a circuit approach. Kami and Sato [104] used the assumption of reciprocity between field-to-wire coupling and radiation phenomena to derive an equivalent three-port network. The impedance matrix of the network is calculated by coupling analysis, which also defines the radiation impedance matrix. The analysis is done analytically for calculating the far fields.

The transmission line approach is feasible for simple geometries (no bends and

discontinuities) of transmission lines and cannot account for dielectric effects in

microstrips.

Crosstalk. One of the most widely studied subjects in the area of EMI is

near-field coupling of electromagnetic waves into conducting wires, cables,

and microstrips, known as crosstalk. The subject of crosstalk, as it relates to

the analysis of transmission lines, has been studied previously in this book.

In this section we concentrate on how the use of computational electromagnetic techniques can aid in the analysis of crosstalk EMI problems. One of the most important tasks in crosstalk analysis has been the calculation of the per

4.7. Computational Methods at Work: Getting Numbers from Your Models

Vs

Illll

343

End-Wire Driven Model

V

Figure 4.81 Thin-wire modeling of radiating wire with common-mode source.

unit length parameters C, L, R, and G for the generalized transmission line

equations

OV(f , t) 0 = - R I ( f , t) - L ~ I(~ e, t),

of (4.261a)

0I(~, t) r~ - - G V ( f , t) - C ~ V( f , t). (4.261b)

O~ at

Lumped-parameter analytical expressions have been used in the past for calculating the network parameters C, L, R, and G. More recently, computational electro-

magnetics techniques, such as the method of moments and finite-element methods,

have been used for calculating the per unit length parameters in a more accurate

manner.


Khan and Costache [ 105] adopted a quasi-TEM approach and used the finite- element method to calculate the per unit inductance and capacitance of several

parallel microstrip conductors as shown in Figure 4.82. The per unit parameters

are given by

fSi - eV t~" ~ dS i

Cij - Vj ' (4.262a)

L - e~176 (4.262b) Co'

where Cij is the mutual capacitance between the ith and jth conductors (Cii is the self-capacitance between the ith conductor and ground), �9 is the static electric potential, C O is the per unit length capacitance matrix in the absence of dielectric(s), and Vj is the static voltage on the jth conductor (only one conductor at a time; the

rest are grounded). The region is subdivided into triangular subregions in which the field is approximated by first-, second-, and third-order polynomial expressions.

The method of moments has also been used to calculate per unit parameters.

Wei and Harrington [106] used the method of moments (free-space Green's function) in conjunction with the total charge on the conductor-to-dielectric interfaces and polarization charge on the dielectric-to-dielectric interfaces.

Signal Integrity. In the past analog and digital circuit simulators were concerned only with the logic flow and the calculations of all voltages and currents at any point within the circuit. The only areas of concern about interconnects (e.g., PCB lands, vias) were the delays between gates and the RC loading of such

Crosstalk ~#1 ~#2 ~#n

L

I

Figure 4.82 Crosstalk among several microstrip lines.


interconnects. The increasing clock speed of chips requires more than just logic delays associated with each gate to be simulated. Transmission line effects in PCBs and multichip modules (MCMs) are becoming of increasing importance in order to avoid design problems which are often detected after fabrication. Transmission line effects in interconnects, backplanes, and connectors need to

be considered if such effects as reflections, ringing, impedance mismatches, and

crosstalk are to be avoided.

Consider the case of a simple driver-receiver circuit as shown in Figure 4.83.

When a clock pulse is present at the input of the driver, it is delayed but it

maintains its waveform if loading is minimal. At low speeds the receiver and

interconnect loading will only distort the waveform. At high speeds, transmission

line effects must be considered, otherwise tinging will appear. As long as the

interconnects are short with respect to the clock frequency, the drivers will see

the receiver as loads. Ohm's and Kirchhoff's laws will be sufficient to determine

the output waveforms. Loading due to interconnects is considered as lumped

capacitance to ground or as an RC network. As the interconnect becomes long enough, the signal rise/fall times eventually matches the propagation time through

the interconnect. The interconnect electrically isolates the driver from the receiv-

ers, which no longer function as loads to the driver. Now, within the time of the

Driver 1 Unloaded Delay Receiver 1 [~ . - , - - - / / / -

Driver 2

Receiver 2

Capacitive Loaded Delay

Receiver 3

Ringing Due to Transmission Lines

Figure 4.83 Transmission line effects in microelectronics.


signal's transition between high and low voltages, the impedance of the interconnect becomes the load for the driver and also the input impedance to the receivers.

The main factors that determine the distortion effects in high-speed circuits

are interconnect length, signal slew rate, and clock speed. The logic levels,

dielectric material, and conductor resistance play a secondary role. Another cause

of problems is the harmonics of trapezoidal clock pulses. The voltage levels of

some of the harmonics can be higher than the threshold voltage noise margin of

some devices at higher frequencies. High-speed digital design methodologies

should be adopted when the propagation delay of the interconnect is 20-25% of

the rise/fall time of the signal. Because long interconnects behave as transmission

lines, many designers have started to use MCMs. MCMs are becoming a packaging technology as important as surface mount devices. The main advantage is

elimination of the chip package with its associated parasitics. MCMs are being

used in telecommunication and optical communication systems. Although the

short run lengths in MCMs tend to reduce interconnect delay and other transmis-

sion line effects, the narrowness of the lines tends to create significant losses

due to resistance and the skin effect, so that signals at higher frequencies tend

to be degraded. Furthermore, because of the high density of microstrips and vis

structures, a higher incidence of crosstalk is observed in MCMs. The speeds,

noise margin, and other electrical properties of the different logic families com-

monly used will determine the critical interconnect length above which transmission line effects are of concern, as shown in Table 4.3.

Table 4.3 Comparing Critical Interconnect Lengths for Several Logic Families

Device Family

Typical Edge Noise Signal Critical Propagation, Speed Margin Swing Interconnect Delay (ns) (ns) (mV) (V) Length (cm)

CMOS 25 15 1000 4.7 10.0 HCMOS 8 6 1120 4.7 4.0 ACMOS 5 4 1250 4.7 2.7 TTL 6, 9, 3 3 300 3.0 3.5 (H, LS, S) ASTTL 2 1.2 300 3.0 1.0 Fast TTL 2.5 1.2 200 1.7 2.0 ECL 10KH 1 1.8 230 1.0 1.2 BiCMOS 1.2 0.7 200 1.0 0.5 ECL 100K 0.8 0.5 200 1.0 0.3 GaAs 10G 0.3 0.15 100 1.0 0.1

References

References 347

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3. R. Mittra (Ed.). Computer Techniques for Electromagnetics. Pergamon, New York, 1973.

4. R. Mittra (Ed.). Numerical and Asymptotic Techniques in Electromagnetics. Springer Verlag, New York, 1975.

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Chapter 5 Antennas for Wireless Personal Communications

5.1 Radiation from Current Sources

Let us consider the radiating structure in Figure 5.1, of volume V and conducting

surface S. The objective is to calculate the radiated fields E and H due to the

currents J and M in the radiating structure. The easiest approach to accomplish

this is to first calculate the intermediate vector potentials A and F that are

generated by the electric and magnetic fields, respectively.

For the case of J : / : 0 a n d M = 0, sinceB = V x A o r H = 1//zV x A ,

using Maxwell equations

V x E = - j w / z H (5.1)

V X H = J + j w e E , (5.2)

where /z is the permeability and e is the permittivity of the medium, we can obtain an expression for the electric field in terms of the vector potential A given

by

1 E = - j w A - j _ - - V ( V . A ) . (5.3)

jtoe

S

J, M

Integration ~ Differentiation

A, F E ,H

Figure 5.1 Computation of electric and magnetic fields from current sources.

354

5.1. Radiation from Current Sources 355

Once we know A, the electric field E can be found, but in order for that to

happen we need a good representation and distribution of J over the surface of

the radiating body. As in the case of J = 0 and M = 0, since V �9 D = 0, we thus have

E = l v x F , (5.4) E:

and, using Maxwell equations,

V x H = j w e E (5.5) V x E = - M - j w / z H .

We arrive at a similar expression for the magnetic field H in terms of vector

potential F, given by the expression

H = - j o F J V(V. F). (5.6) r

Solving Equations (5.1) and (5.2) requires the calculation of A and F, given by

f e-jkR A = ~ J R dv ' (5.7)

v

~" f e-jkR F = - ~ M R dv ' . (5.8)

If the current distributions can be approximated to those on only the surface of

the radiating body, the preceding integral becomes a surface integral. Furthermore,

if the current can be modeled such that it will mostly flow in a linear direction, the integrals in Equations (5.7) and (5.8) become line integrals:

A = dE' (5.9) R

C

f e-jkR B = ~ I R de'. (5.10)

C

In wireless communications we basically deal with the far-field region, and for

that case Equations (5.1) and (5.2) become, for the case of J 4 :0 and M = 0

in spherical coordinates,

E r =0 , H r = 0 Eo

E o ~- - j w A o ' H o = rl

Eo E 4: , ~- - j wA d, ' H d, = - - ,

~7

(5.11)

356 5. Antennas for Wireless Personal Communications

and for the case of J = 0 and M 4= 0,

H r = 0 , E r = 0 H o ~- - j w F o , E o = _ rlH,b

H 4) ~- - j w F 4) ' E 4) = _ ~7H 4) ,

where r / = %/(/x/e) is the intrinsic impedance of the medium. If A and F are in rectangular coodinates, Equation (5.11) becomes

E l" ~ O ,

E o = - j~o(cos 0 cos ~bA x + cos 0 sin ~bAy - sin OA z)

E4, = - j w ( - s i n OA x + cos qbAy),

and Equation (5.12) becomes

Hr = 0 H o = -jo)(cos 0 cos ~bF x + cos 0 sin ~bFy - sin OF z)

H4, = - j w ( - s i n ~ F x + cos OFy).

(5.12)

(5.13)

(5.14)

5.2 Thin-Wire Antennas

General thin-wire antenna structures are widely used in wireless communications. They come in the form of wires (e.g., monopole, dipole, helix, and sleeve antennas) and loops. In wireless communications, linear antennas can transmit from

low to very high frequencies. A thin-wire antenna structure which has radius a and length 2h is shown in

Figure 5.2. We assume that the wire antenna is perfectly conducting and satisfies

the condition

a < < ,t and a < < h,

where ,t is the free-space wavelength of the plane wave. Because of a thin wire, J becomes l ( f ' ) and the integral in Equation (5.7)

becomes a line integral along f ' . The electric field given by Equation (5.1) using

Equation (5.7) along a single axis/? becomes

Ei(~ ') = f I(f ') - j 7r I.d/? + k2 G(e,e'), - h

(5.15)

5.2. Thin-Wire Antennas 357

~ " ~ h - L

y

+

i(l')

~-' 2 a

Vo

~ h = - L

Figure 5.2 The general form of a thin wire antenna.

where

h

G(f,f ') = f e-jkR kR d~b, R - - [(~ -- ~ , )2 + 4a 2 sin2(~b/2)]l/2, - h

where k is the wave number. In the case of a transmitting antenna, the antenna is excited by a source potential Vo maintained across an infinitesimal gap:

{ [d2 ]} -VoW( f - ~o) = f I(r - j 1 5 �9 r ~ + 1,2 c(e ,e ' ) . - h

(5.16)

Equation (5.16) is an integral equation that can be solved numerically for I(f '),

from which the fields can then be calculated. The most common method of solving

Equation (5.16) is the method of moments, a numerical technique discussed in detail in Chapter 4.


5.3 The Linear Dipole

Consider the linear dipole antenna shown in Figure 5.3. In the transmitting

antenna case the source voltage Vo is applied at the gap ~ = ~0, which excites the currents in the dipole. As the current propagates along the dipole, the current

does attenuate, because at the end caps of the dipole the current experiences a

discontinuity which causes the radiation of the antenna. Though the current

distribution could be calculated using the integral Equation (5.16) by the method of moments, an approximate expression for this current can be stated as

-J e-jkl•- eol In Id( le - C o l ) =

j27r 1 + [ ] - 2 ln(ka) - , / - j ~ + In kle -eo l + ( ~ l e - eol ~ + e 2~/2

(5.17)

,•1 , I I E i

zs

"~ C 3 / I=L o Vo I=Lo

- - - - t~

-h=L

2a - - - - - I~

-h=L ,'-"

2a

Transmitting Dipole Receiving Dipole

Figure 5.3 Transmitter and receiver dipoles.

Zs

5.3. The Linear Dipole 359

277" where y = 0.577 and k = 2-. This expression gives an accurate value for the

real part of the input current.

When the initial current arrives at the end of the wire antenna dipole, some

of it is reflected. The current distribution of the reflected wave is given by

JR(f) = 120~ --2 ln(ka) - y - jTr/2 + ln(2kz) + e j2ke Ee(j2kf) ' (5.18)

where Ee(j2k~) is the exponential integral of the first kind. Because there are

reflections from both ends of the dipole wire antenna, two reflected currents are

present. This process continues, leading to two sets of infinite, though summable,

series of multiple reflected currents. The total current distribution can be defined

as

l t o t a l ( ~ , ~ 0 ) = Id( I ~ - - ~ l ) - - Qd(h)RId( h -- ~') -- Qd(--h)Rld(h + ~) (5.19)

for - h < / ? < h, and where

R = Reflection coefficient = 6 0 ( - 2 ln(ka) - 2 y - j I7") / (1 + or 2,

, ) 1 / ( - 2 ln(ka) - 2 y - j 3 7 r / 2 ) - 2 ln(ka) - 2yjTr + In 2

Qd = [ld( h ----- ~0) -- Id (h _+ ~o)RUd(2h)]/Ah

Ah = 1 - R21 2(2h).

Using the current distribution in Equation (5.19), the far-field pattern of a thin

wire antenna is given by

E(O,~o) ( ) [eJke~176 )

_ j ~ _ R[eJkhcos 0 Qd(h)Td(2h;O ) + e-Jkhcos 0 Qd(_h) ,

- ~ { T d ( 2 h ; ~ r - 0 ) ]

(5.20)

where

Td(e, 0) = 1 + cos 0

e-Jk~(1 + cos 0)

- 2 ln(ka) - 2 y - jcr/2 + y + P( O,~) 1

- 2 ln(ka) - 2 y - jTr - 2 cscZ(0/2)ln cos (0/2)

P(O,~) = ln(2k~) + csc2(O/2)e jke(l+c~ o)El(jkf(1 + cos 0))

- cotZ(o/2)e jzke El( j2kf ).


The current distribution given by Equation (5.19), though not as exact as the

one that could be obtained using numerical methods, is a very good analytical approximation for the current distribution in a wire antenna. Let us now consider

some more simple approximations of the current distribution, and then derive

the resultant field.

5.4 Simplest Current Distribution in Wire Dipoles

If the dipole is very small, then we can assume that the current is constant, say

/ t o t a l - - I ( ~ ) "-- I 0 , and R is constant also. Therefore, A can be easily evaluated

as /zloL A = a z ~ e -j~R,

where L is the length of the small dipole along the ( = a z also be shown that

(5.21)

direction. It can then

E r - - ~ I ~ c~ 2 /9[ 1 +~kR] e-jkl~

E~ = j~Tkl~ sin O [ jkR (kg) 21] e-jkR

E r

and since H = 1/be (V • A), the resultant magnetic fields are

H r = H o = O

Hr = jkI~ sin47rR /911 + ~kR]e -jl'R.

(5.22)

(5.23)

The radiated power is calculated to be

Brad = /7 --~ . (5.24)

The far-field region can be calculated for the case kR < < 1 to produce the

following fields:

kI~ sin 0 E o = jr/ 47rR

E r -- E o = H r = H o = 0 kl~ sin /9.

H~ = J 4 ~rR

(5.25)

5.6. The Generalized Thin-Wire Loop Antenna 361

5.5 Sinusoidal Current Distribution in Wire Dipoles

Let us now assume that the current distribution can be represented by a sinusoidal expression

, Ia 'o sin('( L a z l o s i n ( k ( ~ + z ' ) )

f o r 0 < - z ' <- h /2

for - h / 2 <- z' <- 0 (5.26)

which means that the antenna is center-fed and the current vanishes at the end

points. The far fields can be evaluated to give

'oe'~ cos(~cos O)cos(~) E~ = J rl 2 rrR sin

,oe ~ cos(2~ cos o ) c o s ( 2 ) H~ = j 2~R sm 0 '

(5.27)

and the radiated power is given by

erad = ~ I/4~ r + ln lk t l - C(kt) + �89 - 2S(kt)]}

1

+ ~ cos(kL)[y + ln(kL/2) + C(2kh) - 2C(kh)]}, (5.28)

where C(x) and S(x) are given by

x

C(x) = - f (cos y / y)dy oo

x

S(x) - f(sin y/y)dy. 0

5.6 The Generalized Thin-Wire Loop Antenna

Another common type of antenna found in wireless communications products is

the loop antenna (most commonly the square loop antenna). These types of


antennas, for example, are found in pagers and other personnal communications hardware, including direction-finding systems and UHF communications.

As with the wire antenna, an integral equation of the type shown in Equa- tions (5.15) and (5.16) is first stated (see Figure 5.4).

The integral equations are given by

- V o 8(~b) = - j 30 kb cos(~b - ~b ') + + G(~b - q~ ')l(~b ') d~b', - - 7 7 "

(5.29)

where

77" jkbR

0 ( , r 1 6 2 = I f e ~ R

- - ' W

dr

with

R = [4 sin2 ( ~ - q~ ') + (2a/b)2 + sin2(~/2) 1/2

The current l(~b ') can be expanded using a series of expansions

osnO) Vo 1 + 2 l(~b') = - j 1207r A " (5.30)

The Green function G(~b - ~b') can also be expressed using a Fourier series

expansion, giving

oo

G(q~- ~ ' ) = K o + 2 ~ K n cos n(4~- ~b). n = l

(5.31)

Substituting Equation (5.31) and (5.30) into Equation (5.29) and equating coeffi-

cients, we obtain

kb n 2 A n = -~-(Kn+ 1 + Kn_ 1) - ~ K n , K_~ = K~. (5.32)


Vo

Zs I R

2a

E i

f f

2a

Figure 5.4 Parameters for transmitting and receiving loops.

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

364 5. Antennas for Wireless Personal Communicat ions

The coefficients Kn can be expressed in terms of integrals involving Bessel and Lommel-Weber functions. For the case of kb -< 1.0, the coefficients A o, A 1, and A 2 are the dominant ones and can be approximated as

Zo '~ {'n(~)~ ~]+~~0 66~,,~)~ 0 ~6~,,~)~ - j [0.167(kb) 4 - 0.33(kb) 6]

ao-(~ ~ ) l [ ,n (~)~] ~ + ! ~ 0 66~,,~ 0 ~0~,,~)~ - j [0.333(kb) 2 - 0.133(kb) 4 + 0.026(kb) 6]

ao-('~-;~)'['n(~)~ ~66~]+1~ 040,,~)+0~,,,~)~ - 0.086(kb) 5] - j [0.050(kb) 4 - 0.12(kb)6].

An example of the current distribution for the case of 2 lnl2"rrb/a] = 10 and kb = 2rrb/a = 0.8, 1.0 is given in Figure 5.5.

The far-field radiation of the small loop antenna for the case of kb <- 1.0 and a voltage source at ~b = ~b 1 can be expressed as

2b E(O, ~b, ~bo)= - j

120r

]_If~ + A o 2fl(0)c~ ~bl)+ 2f2(0)-~2 cos 2(q~- ~bl)]a4, 1

[ l j + cos 0 2 G1 (0) sin(~b - ~b 1) + 2 G2(0) sin 2(~b - ~b 1) a o A 1 " A2

(5.33)

where

fn( O) = (j)n-1 j,n(kb sin 0)

G,,( O) = (j)n-1 nJn(kb sin 0) kb sin 0

, l , m (~) J,,(kb sin 0 ) = ~ m!(m + n)~ sin 0

m = 0

2 m + n

J',,(kb sin O) = ~ ~ ( - 1) m sin 0 m--O m!(m + n)

2re+n- - 1


IT(Real ) 0

-2

-4

1.0 Kb

0.8

-6 I I 20 40

I I I I I 60 80 100 120 140

degrees

6 4L 2

IT(Real ) 0

-2

.4[ -6 I I I I I

20 40 60 80 100 120 140

degrees

Figure 5.5 Example of current distribution computed for small loops.


For the receiving loop, if the incident field is given by

E i --- E i ( - s i n r cos Oia x + cos ~tiay .-b sin /Pi sin 0ay),

the received current on the loop is given by

[fo(0i) q_ ,-f,(0i) -- , ,-,f2(Oi) ,-, -- ] cos 0il,_ Ao z A1 cos ~1 • Z A2 COS Z~I/

2b , , , ,d l

[ a~10i a~ : i ] " IR(0i'~bl) = Ei = J 1207r _ sin ~ cos 0 i 2 ) sin ~1 + 2 ) sin 2~1

(5.34)

5.7 The Simplest Smal l Loop

If the current in Figure 5.6 for the loop is constant such that 14, = Io, and dU = bdc/b' with R = X/r 2 + b a - 2br sin 0 cos(~b- ~b ') as shown in the

figure, then the potential function A given by

tx f lr(~, ) e -j~R Rde' C

I~= Io

Vo Observation Point

ZS

ds b d( h ~ .~

R=r in the far field

Figure 5.6 Modeling a small loop and its parameters.

5.8. The Square Loop Antenna 367

can be replaced for the loop to be

2"n" -jkN/rZ+bZ-2br sin 0 cos(q~- q~,)

b/z f d~b'. A4,= ~ I4~cos(~b- ~b') e 0 ~//r2 + b 2 - 2br sin 0 cos(~b- ~b')

From this equation, after some extensive mathematical manipulations, the following field equations are developed:

Hr = j kb2Io c~ 2 0[ 1 + j ~ ] e -jkR

Ho = (kb)2 Io sin O [ l _~ 1 1 ] - 4R jkR (kR) 2 e-jkR

H4~ = 0 E r = E 0

E4" - -77 (kb )21~ 0[ 1 +j-~R] -jkR 4R e .

(5.35)

The radiated power by the small loop is given by

e R a d -- 77 ~- (kb)41Iol 2 1 + j z

(5.36)

and the radiation resistance R r is given (for a single loop) by 4 20 2( ) (5.37)

In wireless communications, the far field (kR > > 1) is the predominant field of interest. For the case of kR > > 1, the dominant term in Equation (5.35) is the first one within the parentheses. For the far-field approximation, Equation (5.35) becomes

H r = H 4 , = E R = E o = O

k2beI~ sin 0 H~ = - 4R

keb2Ioe-J kR E4' = 77 4R sin 0.

(5.38)

5.8 The Square Loop Antenna

Square loop (or polygonal) antennas are typical in pagers, as shown in Figure 5.7.

1 st Downconverter

L~~176 Antenna I ' F i l t e r 1 1

~7 _t_ r--] osc


J LNA

I I Filter !

FSK Mod. ASIC

I " ' I Filter ..... i , , I LNA I I I J

2nd Downconverter

Figure 5.7 Small loop antenna as part of a pager device.

Pagers can operate at UHF or VHF frequencies. The 930-MHz pager is most typical in the United States, but 150 MHz and 450 MHz can also be used. Receivers for the UHF frequency band are commonly implemented with a double- conversion superheterodyne design.

Signals from the receiving antenna are boosted through a low-noise amplifier and then filtered to remove unwanted harmonics generated by the nonlinear behavior of the low-noise amplifier. The filtered signal is then translated to the pager's first intermediate frequency (IF) using a frequency downconverter. The

first IF is translated to the lower frequency, a second IF, via a second-stage

frequency downconverter or discrete mixer/oscillator combination prior to signal

processing. The double-downconverter version provides good image rejection

between the RF port and the local oscillator and IF ports.

The square loop is the simplest loop configuration after the circular loop. The

far-field pattern of the small square loop can be obtained by assuming that each

of its sides is a small linear dipole of constant current I o and length L as shown in Figure 5.8. The worst-case field is generally given by

E4, = r/ 47rR sin # sin . (5.39)

5.9. Microstrip Antennas 369

Io

/ /

Z

/

/

/ r 3

/ /

/ /

/ r2

/ /

/

/

/ /

rl

Y

X 10

Figure 5.8 A square loop antenna.

For the case of L < < M50, the preceding equation reduces to

(kL) 2 I 0 e -J ~R E,r = r/ 4~R sin 0. (5.40)

In these equations we have made the approximation that in the far field, the

length L is the largest length of the square loop even if each of the four sides is

of different length.

5.9 Microstrip Antennas

Microstrip antennas have become fashionable in some wireless communications

systems, such as in the use of arrays with parabolic reflectors or even in the use

of a patch antenna in the back of a cellular phone, as shown in Figure 5.9.

There are several reasons why microstrip antennas are so popular:

1. Easily conformable to nonplanar surfaces

2. Low-profile antennas


Microstrip Patch Antenna

Figure 5.9 Cellular phone with a patch antenna.

3. Inexpensive to manufacture using printed circuit board techniques

4. Flexible so as to produce a wide variety of patterns with different polar-

izations

5. Mechanically robust.

A typical patch antenna is shown in Figure 5.10. Most often, microstrip

antennas are made by etching the patch from a printed circuit board with conductor

on both sides. The top metallic flat region, which is called the patch antenna,

sits on a dielectric substrate. A feed system supplies the RF power, and a ground

plane is at the bottom of the patch antenna, sustaining the substrate. Typical sizes of a microstrip patch range from M2 to M3, and the dielectric

thickness for such antennas is usually in the range of 0.003A to 0.05A. The

relative constant/3 r is in the 2.5 to 3.2 range. The main disadvantage of the microstrip antennas lies in their quality factor

Q. Microstrip antennas have high Q (Q > 100 is common), which means that

they have small bandwidths. The bandwidths can be increased by increasing the

thickness of the dielectric, but as this is done, surface waves (instead of transverse

waves) use more and more of the delivered power, which could be considered

as a power loss. Furthermore, as the size of the microstrip increases, it can

allow resonant frequencies of two or more resonant modes to exist, leading to

instabilities. When a current is injected into a microstrip antenna, a charge distribution

becomes present at the microstrip surface and ground plane. For thin microstrips,

most of the current resides at the bottom of the microstrip and on the top surface

5.9. Microstrip Antennas

Patch Antenna

371

Substrate

Feed

Ground Plane

Figure 5.10 A typical circular microstrip antenna.

of the ground plane. Therefore, the component of the magnetic field which is

tangential to the patch edge is small. The input impedance of the microstrip antenna has both reactive and resistive

components. Its resistive components account for the power radiated by the antennas. The presence of complex poles means that the imaginary parts of these

poles account for the power loss by radiation and by dielectric and conduction

losses. The real part and antenna poles are dependent on the shapes of their

modal distributions. If the dielectric within the cavity has a dielectric loss tangent given by 8~,

then at a frequency f near a resonance it has a quality factor of

1 1 WRe (5.41) O-- ~ 2Wlm

where WRe and Wim are the real and imaginary part of the poles. This means

that to properly choose the dielectric loss tangent 8~, we must use the reciprocal

of the antenna quality factor. The magnetic and electric surface currents in the

presence of the grounded dielectric slab are shown in Figure 5.11.


Jt

microstrip Js

~ , , ~ n d plane

Figure 5.11 Modeling the source current in a microstrip antenna.

The magnetic surface current density M is related to the electric field in the

surface between the patch microstrip and the ground plane by

M = - n x E - ( - 2 n x E) if ground plane removed, (5.42)

where n is the unit vector pointing outward. The electric surface current density

Js is given by

Js = n • H, (5.43)

and the current Jt is the tangential surface current on the top surface of the

microstrip. In reality both currents Js and Jt are small compared to M, which is

the dominant current.

The radiated fields can be obtained by treating the antenna as an aperture.

Let us first consider the rectangular microstrip shown in Figure 5.12. The rectan-

gular patch is one of the two most popular microstrip antenna types in wireless

design (the other being the circular patch).

5.9. Microstrip Antennas 373

Figure 5.12 Rectangular microstrip patch antenna parameters.

Substrate

Let us assume that Eaperture =axEo is a constant (we are neglecting Ey). From Equation (5.42), we can say that

M = - 2 n • E t = - 2 a X X ayE 0 -- - 2 a z E o. (5.44)

The far fields components of the electric field are given by

E r = E O = O

sin(-~-sin 0 cos ~ b ) [ s i n ( ~ cos O) bhkE~ sin 0 . . . . . . . . .

~ = - ~ ~=~ L~sin0cos~ [(~cos0) (5.45)

For small values of h (h < < ,~), the preceding equations reduce to

si.( cos 0) E4, = - j - - sin 0

~R cos 0 (5.46)


Notice that in both of these equations, V s = hE o, where V s is the voltage across

the feed point. The resonance modes (or resonant frequencies) can be obtained

by solving the Helmholz equation

[77.2 .+_ 2 K m n ] E m n - O, (5.47)

yielding

_ 1 ~(~_~)2 (~_~)2 Kmn = (fR)mn -- 2r + ,

m = 0 , 1 , 2 , 3 . . . . n = 0 , 1 , 2 , 3 . . . .

(5.48)

The radiated power is given by

27r 7r/2 PRad-- L f f }E4~N R2 sin e d8 d4~.

r/~ o o (5.49)

The typical radiation pattern of a rectangular microstrip antenna is shown in

Figure 5.13.

~ h

f" l

-Z 'V\

-X~ E~

J I

Feed

Substrate

Figure 5.13 Typical radiation pattern of a rectangular microstrip antenna.

5.10. Array Theory 375

5.10 Array Theory

Arrays of radiating elements provide high directivity, narrow beams, low side lobes, steerable beams, particular pattern characteristics, and more efficient use

of radiated power. In wireless communications, array antennas are used mainly

in satellite communications systems. Array antennas together with reflector anten-

nas are the most widely used types of antennas in satellite telecommunications.

The design of an array involves mainly the following factors:

1. The selection of elements and array geometry. For example, rectangular

and circular patches are the most frequently used array elements; circular

and square geometries are also the most frequently used array geometries.

2. The determination of the element excitations required for a given per-

formance.

3. Detailed knowledge of element input impedance and mutual impedance

between any two elements in the array.

As with other types of antennas, we are only interested in far-field theory for

wireless communications. Consider the generalized array in Figure 5.14.

Array Elements

P (Observation / Point)

R n '

Y k

Figure 5.14 Array of identical elements.


For any element in the array of Figure 5.14,

A(r) = tz e-JZ'R f "rr R j(R,)e-J,R' cos ~ dv',

V

(5.50)

where

J(R') = dielectric current distribution of the array element

R = observation point vector

R' = source element position vector

V = volume of source element

cos ~ = R' �9 R' , k = 2'n/A, is the free space number, and jkR' cos ~ = j k - R' .

The far fields are given by

1 E(R) = - jwA + 7-:---VV- A -~ jw (~0 + ~)~)). A

1 %/tz/e,. H(R) ~ - R X E, where q7 = 17

(5.51)

For an array of N elements, the far field can be expressed as

E(R) ~_ --i tt~jO.)r..~ -jkR F ( O , ~ ) ,

4 7rR (5.52)

where

N

F ( 0 , ~b) = E Fn (Oq~) = ( ~ + $ $ ) f Jn(ern)e -jkk'(R'-Rn) dV r n. n = 1 nth element

Here,

Rn = reference point in the nth element

R',, = nth element

Fn(0,~b) is known as the nth element pattern function.

If all the elements are the same,

F,,( O, ck) = I,,Fo( O,4,), (5.53)

where I,, is the complex excitation of the nth element. Fo(0,~b) is the pattern

function of any single element.

5.10. Array Theory 377

Equation (5.53) becomes

E(R) = --Jt~ N 4"n'R F~ O'~) ~ Ine-J~R'R"" (5.54)

n = l

If the array is linear as shown in Figure 5.15, with array elements separated by

a distance d, then for the nth element R n = fiz nd, and for an array of N elements,

N

F(0, ~b) = F(0) = ~ Ine jkncl cos 0. n = l

The far-field equation becomes

E(R) = --Jt~ 4erR

N

Fo( O) ~ Ine -jknd cos o. n = l

(5.55)

f

d I

R4 1 /

f

R 3 ' I I f

f f f

R2] i f

f

Figure 5.15 Linear array of dipole antennas.

If all the excitations I,, are equal and if the reference point is the physical center

of the array, then

N

F( O) = I n ~ e j#'nd cos o = iN n = l

sin( Nkdc~

sin( kd c~ 0 ) 2

(5.56)

1.0

and again the far field for a linear array of N elements with the same excitation

for each array element is given by

E(R) = -J~ sin[(Nkd cos 0) / 2] (5.57) 4~R F~ O)IN sin[(kd cos 0) / 2] "

A normalized pattern of the array factor as a function of kd cos 0 is shown in

Figure 5.16 for several values of N.

The term sin[(Nkd cos O)/2]/sin[(kd cos 0)/2] is known as the array factor.

The beam maximum appears at 0 = 7r/2. Therefore, the array is called a broadside

array. When 0 = 0, the main beam will be along the array axis, and the array

is called end-fire.

Some important formulas, such as directivity D, half-power beamwidth, beam-

width between first nulls, null angular position, side-lobe maximum position, and far broadside and end-fire uniform arrays are given in Table 5.1. Table 5.1

0.5

0.0 " v

0.12 0.16 0.20 0.24 0.28 0.32 0.36 0.40 0.48 0.04 0.08


kd cos O

Figure 5.16 Normalized pattern for an array of N linear elements.

Table 5.1 Formulas for Several Linear Arrays

Hansen- Woodyard Uniform Broadside Uniform End-Fire End-Fire

Directivity - (Nd >> A) 2N (&A) 4N ( d A ) 1.79 X [4N (dA)]

Half-power beamwidth - (%-&A << 1)

Beamwidth between nulls

Null angular position n = l , 2 , . . . . n # N , 2 N , . . . .

Side-lobe maximum position (2s + l ) A - (%-&A<< 1 ) ( s = 1, 2, . . . .)


also shows the respective formulas for the Hansen-Woodyard end-fire arrays. It was found [1] that for long uniform end-fire arrays when element spacing is

small, the directivity in the 0 = 0 direction can be increased if the phase shift

per element is

5.11 Planar Arrays

In addition to placing radiating elements along an axis as was done in linear

arrays, radiation can also be placed in a rectangular grid as shown in Figure 5.17

in order to form a rectangular or planar array. Planar arrays provide additional

beam patterns to control and shape the overall pattern of the array.

In planar arrays, the antenna factor is given by

1 sin(M~O x / 2) 1 sin(N(py / 2) (5.58) F(0,4,) = ~ sin(Ox/2) N sin(Oy/2) '

I I I---I

Z

I l I

F~ i I ]

I I I I

I l

/

dx y /

I "l -

I , I /

Figure 5.17 Rectangular grid of array elements.

v

5.12. Mutual Coupling among Array Elements 381

where M and N are the numbers of elements along the x and y axes, respectively, and

0x = 27rd~ (sin 0 cos 0 - sin 0o cos ~bo)

Ox = 27rd,. (sin 0 sin ~b- sin 0 o sin ~bo).

Therefore, the far-field is given by

Jwlze-JkR {M sin(MOx/ 2) l sin(Nd'{Y/ 2)} E(R) = 47rR F~ q~)lmn sin(0x / 2) N sin(~. / 2) " (5.59)

0o and ~bo are the observer angles. Notice as before that the maximum value of

IFo(0,~b)[ is 1. The steering angles 0 and ~b are given by

d)= tan-l [sin Oosin cko +- nA / dy] sin 0 o cos Cko +- mA / d x

(5.60)

o=sin_~[sin~ sin ~b

(5.61)

Most arrays are designed using phase shifters. A phase-steered array establishes a progressive phase front to match a wave at a single frequency (Figure 5.18).

The beamwidth determined by the array illumination is proportional to the

inverse of the normalized array length A0 = kML with A0 in radians; K is a

constant (0.886 for uniform illumination) and L is defined to be Nd, for N elements in the 0 plane.

5.12 Mutual Coupl ing among Array Elements

We have assumed thus far that all elements patterns are equal if we are dealing

with a uniform array. However, in reality array mutual coupling leads to unequal

element patterns. Consider the feed pattern of dipoles shown in Figure 5.19. The

solution of wire antenna problems such as the dipole array is solved by satisfying

boundary conditions at the surface of the wire.

The vector potential is given by

['60 f r r Ay(x,y,z) = -~ ~ I~(y )G(r,r') dy ,


~=fo \

\ \

\

phase ~ = 0 shifters

A~ = Kd Sin 0 = (2n / X) dx Sin 0 o

= constant phase increment

i Oo/ -.Y

N ~ \ wavefront \

\

dx

Figure 5.18 Phase shifters in a steerable array.

i z

/ I

h h

Figure 5.19 Feed pattern and array of dipole elements.

5.13. Reflector Antennas 383

where

e-jklr-r,,I G(r,r ') = Ir - r l ' r = axx + avy + azz

[r - = X / ( x - 2 + (y - yn)2 + (z - h) 2.

(5.62)

The set of integral equations equating the tangential E to zero at each dipole

radius is written for the nth dipole as

Ey(xn,Y,h) = - V~ 8(y - y . ) = - j - ~ I OY 2 -k- k2Ayl, (5.63)

where V n is the potential across the source antenna. These integral equations

are best solved using the method of moments, which is described in detail in

Chapter 4.

5.13 Reflector Antennas

Reflector antennas have been in use since World War II. Their main purpose is

to converge the energy in a given direction, and therefore they tend to provide

higher directivities. The most popular reflector antennas are (1) comer reflectors,

and (2) parabolic and paraboloid reflectors.

A comer reflector is shown in Figure 5.20. Most comer reflectors have an

angle of 90 ~ , but other angles are also used. The feed element of the comer

reflector is almost always a dipole or an array of cylindrical dipoles placed

parallel to the vertex at a distance d, as shown in the figure. Often, if the

wavelength/1 > > L, the surface of the comer reflector can be replaced by a

wire grid, thus reducing weight and wind resistance; in that case, the wire grid

separation (i.e., the separation of wires in the grid) should be no more than

M10. The aperture of the comer reflector S would range between one and two

wavelengths (/1 < ~ < 2/l). The length L is usually such that L ~ 2d. The feed-

to-vertex distance d is usually taken such that/1/3 < d < 2M3. For a reflector

with L -< 90 ~ the sides L are made larger. Finally, the height h of the reflector

should be about 1.2 to 1.5 times greater than the length of the dipole feed element.

The distance d cannot be made small, or the radiation resistance decreases,

decreasing the antenna efficiency; on the other hand, if d is too large, the antenna

produces undesirable side lobes.


Z

I L~~ 0 OP I S

._ _ j - - "

u

Figure 5.20 Configuration and geometry of a comer reflector.

by

It can be shown that the radiated far field of a 90 ~ corner reflector is given

e-jkR E(R,8,ck) = 2F(8,$) [cos(kd sin 8cos ~b) (5.64) R

- cos (kd sin 8 sin ~b)],

where F(8, ~b) is the form factor of a single isolated element of the radiating feed

element (most likely a cylindrical dipole), 0 -- ~b -- cd2, 0 --- 8 -< ~r, and 27r -

cd2 -< ~b -- 2~r. The pattern of a comer reflector antenna is shown in

Figure 5.21.

The array factor (AF) for the a = 90 ~ reflector is given by

AF(8,r = [cos (kd sin 8 cos ~) - cos(kd sin 8 sin ~)]. (5.65)

For other angles (a = 60 ~ a = 30~ the array factor (AF) that can be used with

Equation (5.65) above is as follows. For a = 60 ~

AF(8'$)=4sin( kdsinSc~

[ cos (kd sin 28 cos ~ b ) _ COS

sin sin 0)] 2

5.13. Reflector Antennas 385

270

"d" chosen correctly

chosen incorrectly

90

180

Figure 5.21 Pattern of a corner reflector antenna.

For ce = 30 ~

AF(O,~) - ( )I .s osino) ~ kd sin 0 sin ~b cos

cos(kd sin 0 cos ~b) - 2 cos 2 2

( )(X/3kdsinOsin~b)" 2 kds in Ocos ~b cos - c o s ( k d sin O sin ~b) + 2 cos 2 2

5.13.1 PARABOLIC REFLECTORS Geometrical optics shows that if a beam of parallel rays are incident on a reflector

antenna whose geometrical shape is a parabola, the array beams will converge

at a spot known as the focal point. In the same manner, a radiating feed point


at the focus of the parabola will produce rays that, when bounced off from the parabola, will travel in a parallel beam. Two examples of parabolic reflectors

are shown in Figure 5.22. In the figure, the feed point (a dipole and a horn) is located at the focal point

of the parabola; such antennas are known as front-fed. This arrangement, though

typical, can use long transmission lines, with the accompanying losses. Another

arrangement, known as the Cassegrain feed, which is shown in Figure 5.23, has

a dual reflector. The main reflector is a parabola, the secondary reflector is a

hyperbola, and the feed is placed along the axis of the parabola at or near the

vertex. The rays that emanate from the feed illuminate the secondary reflector,

which is located at the focal point of the paraboloid. The rays are then reflected by the primary reflector and are converted to parallel rays. Some diffraction

occurs at the edges of both reflectors. The Cassegrain feed arrangement is much

easier for servicing and adjustment, since both the transmitting and receiving

equipment can be located behind the primary reflector.

Some formulas of interest in the design of a paraboloidal reflector like the

one shown in Figure 5.24 are as follows:

R' - 1 + cos 0" O < 01, ~ = cos , 0 2 = cos1 �9

l(i) 01 = tan -1 2 ~

Directivity = D = (~_~)2

i

(cot2( ) 01 tan( )do 0

2)

where G(0') is the gain of the feed element, also known as the feed pattern;

Aperture eff iciency= cot ( )I iv (0, tan(@) d0' [ 0

5.14 Offset Parabolic Reflectors

An offset parabolic reflector follows the general features of conic sections. The

geometry of an offset parabolic reflector with focal length f, diameter D, and

5.14. Offset Parabolic Reflectors 387

m n ~ ~ l P

x - X - - - -I~ \ - - -

\ \ \ 1 - - ~

- - I ~

- - - - ~

Figure 5.22 Parabolic types of antenna.

Figure 5.23 The dual reflector Cassegrain antenna.


S

a l

~02

I

I

I

r I I

v

/R~ I ,

Figure 5.24 Parabolic reflector.

Feed Point

offset height h is shown in Figure 5.25. Other parameters used for characterizing

offset parabolic reflectors include the following:

S = (d/2) + h

01 = 2 tan -1 {(d + h)/2f}

02 = 2 tan-1 { (d/2 + h)/2f }

03 = 2 tan-1 { h/2f }

04-- O1- 03[2.

In some cases fl , 02, and 04 are given, and from these the terms d and h can be

defined as

d = 4f sin 04/(cos 02 + cos 04)

h = 2f (sin 02 - sin 04)/(cos 02 + cos 04).

For most offset parabolic antennas, h/d varies between 0.1 -< h/d <- 0.3.

5.14. Offset Parabolic Reflectors 389

_V

S

\ ....--k

\ \

\ i \ Rc k RL

i \ \ X \ 01 \

. , , , . . - ----2

h 03

Figure 5.25 Offset parabolic reflector.

Another interesting type of offset reflector antenna is the dual-offset reflector

antenna shown in Figure 5.26. As previously shown, a large reflector fed by a

single feed (e.g., one horn) or a cluster of feeds is an efficient radiator which

can produce a directive beam in the far field if no beam steering is required. For

beam steering, it could be highly impractical to mechanically steer a large reflector.

Furthermore, because of the complexity of the feed system, it is normal to assume

I

I

Main Reflector

focal point

f

Array of Horns

Subreflector

O I �9 .q �9

' n I ~ a b

Figure 5.26 Dual-offset parabolic reflector.

1121

!il:


/

Feed Horns ~, /

Figure 5.27 Pyramidal horns in feed configuration with a reflector.

that the system cannot easily move to generate scanned beams. A good alternative is to use a dual-reflector antenna. Cassegrain system, where the smaller reflector is a hyperboloidal surface and the larger main reflector is a paraboloidal surface. An offset Cassegrain system can help minimize aperture blockage and help in

beam steering. Beam steering is feasible if the main paraboloidal reflector is kept

fixed, and only the smaller hyperboloidal secondary reflector is moved. Pyramidal

horns are often used as the feed elements. The synthesis of a highly directive

pencil beam by a dual-reflector antenna is shown in Figure 5.27. A sample field

distribution is given in Figure 5.28.

5.15 Helical Antennas

The helical antenna (Figure 5.29) is composed of a conductor or multiple conduc-

tors wound into a helical shape. The monofilar type is minimal and most typical,

but bifilar and quadrifilar types also exist. Helical antennas can radiate in many

5.15. Helical Antennas 391

Feed

0 Subreflector

E (dB)

-25

I I I I I I i~ -25 -20 -15 -10 -5 0 5 10 15 20

Figure 5.28 Sample of field distribution for feed-horn arrays and reflector.

25

modes depending on the helix diameter. If the helix circumference is on the order

of one wavelength, the axial mode is excited; this is the most suitable mode for

low-gain antennas having maximum radiation along the helix axis. In most cases,

the helix antenna is used with a ground plane, and the helix is usually connected

to the center conductor of a coaxial transmission line.

The geometric configuration of a helix consists usually of N turns, diameter

D, and spacing S between each turn. The total length of the antenna is L = NS, and the total length of the helical wire is L r = NX/S 2 + C 2, where C = 7rD is

the circumference of the helix. The pitch angle, which is the angle between the

line tangent to the helix wire and the plane perpendicular to the helix axis, is

defined by

o tan

392 5. Antennas for Wireless Personal Communicat ions

0

D I

- -~ r - I

k - " - - - I

I

S

V

r

Figure 5.29 Helical antenna.

The radiation modes of the antenna can be changed by controlling its size

and geometrical properties when compared to wavelength. The input impedance

of the helical antenna is dependent on the pitch angle and the size of the conducting

wire. The general polarization of the antenna is elliptical. The helical antenna

operates in basically two modes: broadside and axial. The axial mode is the most

practical because it can use circular polarization over a wide bandwidth. A helix antenna can easily receive a signal from a rotating linearly polarized antenna.

approximated by

Therefore, helix antennas are usually used over a ground plane for space telecom-

munications of signals that have experienced Faraday rotations in the ionosphere.

In the normal mode of operation, as shown in Figure 5.30, the dimensions of the helix are small compared to wavelength (NL < < ~).

The far fields of the helical antenna in broadside radiation mode can be

(5.66)

jrlklSe-J~:R sin 0 E~ ~ 4 7rR

~Tk2(D / 2)Ie-J~R sin 0. E4' ~ 4R

o

D I

I I


Ground Plane

Figure 5.30 Field pattern of helix antenna.


For the cases where

C = ,rrD= N / ~

and

tan a = 7rD

2 a '

the radiated field is circularly polarized in all directions except for 0 = 0, at which

the field vanishes. The broadband mode of operation is not often used because the

bandwidth of the beam is very narrow and the radiation efficiency is very small.

As previously stated, this mode of operation is achievable if NL < < ~.

The most practical mode of operation is the axial mode. In this mode there

is only the main lobe and the maximum intensity of the radiated field is at the

helix axis, as shown in Figure 5.31.

To excite the axial mode, the following conditions must be met:

3 4 1. ~ < c/a < -~ (c/A = 1 is preferred)

2. S ~ M 4

3. 12 degrees < a < 18 degrees (a = 14 ~ is preferred)

4. Ground plane size = M2

5. Antenna fed by coaxial line

The input impedance of the helix antenna in the axial mode is given by

140

which is purely resistive. The directivity is given by

C2S D ~ 15N a 3 . (5.68)

The half-power beamwidth is given by

52h. 3/2 BW (degrees) ~ CX/-~" (5.69)

The beamwidth between nulls is

(degrees) BW nulls

l15A 3/2

cx/ (5.70)


Figure 5.31 Helix antenna configuration and end axial mode pattern.

The normalized far fields are given by

E = sin cos

where

0sin(N/2)~ (5.71) sin(~p/2) '

Is 1] All of these formulas are applicable, provided N > 3 and conditions 1 through 3 are complied with. Notice that the third term of the electric field equation is the array factor. The peak gain can be empirically expressed by

_ ~ ) (tan 12.5 ~ G = 8.3 \ t a n ~ / " (5.72)


Figure 5.32 Bifilar conical spiral antenna.

A variation of the helical antenna is the bifilar conical spiral antenna shown

in Figure 5.32. This antenna is independent of frequency, and its radiation mechanisms can be modeled by assuming the two spirals as transmission lines. When

the two conductors' arms are fed in antiphase at the cone apex, waves travel out

from the field point and propagate along the spiral without radiating until a

resonant length is reached. A strong radiation occurs at that point, and very little energy is reflected by the spiral. Because of this mechanism, broadband radiation patterns can be produced.

5.16 D e s i g n i n g a Q u a d r i f i l a r He l ix A n t e n n a

A quadrifilar antenna is a special kind of helical antenna which is becoming

popular for personal communication services via low-earth-orbit satellites.

The fractional-turn resonant quadrifilar helix produces a cardioid radiation

pattern with a very good circular polarization over a wide angle. This type

of antenna has found many applications in spacecraft, satellites, and personal

communication networks. Its small size and lack of a ground plane and its

insensitivity to nearby metal structures has made the quadrifilar helix a very

popular antenna. Although quadrifilar antennas are similar in type, these antennas

may show widely differing radiation characteristics depending on the particular design chosen as well as the quality of construction.

The quadrifilar helix antenna consists of four tape helices which are equally

spaced circumferentially on a cylinder and fed with equal amplitude signals with

5.16. Designing a Quadrifilar Helix Antenna 397

relative phases 0, 90, 180, and 270 ~ Figure 5.33 shows a right-handed quadrifilar helix with a ground plane and feed system.

The four tapes are formed by photoetching on a plastic sheet. The sheet is wound on a polystyrene tube of small thickness. The feed system is constructed

of stripline hybrids, subminiature connectors, and rigid subminiature coaxial

lines. The feed system output consists of subminiature connectors soldered to

the ground plane. The antenna tapes are tapered to the center conductor of the

output connectors. In Figure 5.34, we observe a schematic representation of the

feed system of a right-handed quadrifilar helix antenna.

At the feed region, opposite elements are fed in antiphase to produce two

independent bifilar helices. The bifilar helices are fed in phase quadrature to

produce the quadrifilar helix. The helix can be described by its pitch distance P,

P = ~~-7 (L - 2r) 2 - 4r 2, (5.73)

where N is the number of turns and the beamwidth 0BW is shown in Figure 5.35.

The quadrifilar helix antenna operates in the axial mode when the helix

circumference is about C = 7rD = 0.4,t to 2.0A and the bandwidth of the

\

\ \

k L \ j J

\ \ \ \

\

\ / J ' ~ \

\

elements shorted together

0-270 ~ Phase

Figure 5.33 Right-handed quadrifilar helix antenna.


7

Q -90

I -270 0 18o

~l--~l/ i 01o 80

-270

!

-90 I

Figure 5.34 Feed system of quadrifilar helix antenna.

i

I L.._ OBW

3dB

Figure 5.35 Beam pattern for quadrifilar antenna.

5.16. Designing a Quadrifilar Helix Antenna 399

quadrifilar helix antenna spans that of the unifilar helix antenna. In reality, the

quadrifilar helix antenna has two advantages over the more simple helix antenna:

(1) increased bandwidth, and (2) a lower frequency for axial mode operation. However, we must consider what is called the "scanning" mode, which means

that in the frequency range of 3fed (fed is the frequency at which broadband end- fire patterns begin, which is somewhere between C = 0.4A and 0.45A), there is

an increased tendency for the beam pattern to begin deteriorating, though this

can be improved somewhat by adjusting the ground plane. In the frequency range

of 1.6A < C < 2.7A, the beam patterns begin to deteriorate slowly, and one mode

of radiation is favored over the others. Complete pattern breakup will appear when

2.7A < C < 3.0A. Characteristic impedance is satisfactory for C < 2.7A. Beam

patterns for antennas of different lengths are shown in Figure 5.36 [2].

Through experimental work it has been found that the pitch angle 9 t primarily

affects the bandwidth. The optimum angle is about 350-45 ~ . The optimum ground-

plane diameter Dg is about 35 times the antenna diameter D, but ground planes

as little as five times the antenna diameter are acceptable. Small ground planes

tend to show poor beam patterns. Directivity tends to increase with length L, but

as L increases considerably, the side lobes also increase. Shorter antennas can

have lower side-lobe levels at certain frequencies and less beam splitting at the

higher frequency limits. However, in general lengthening the antenna while

maintaining the same number of turns increases the beamwidth and produces

reduced phase center variations at low elevation angles.

5.16.1 PHASE VARIATIONS

In the preceding analysis of quadrifilar helix antennas, we have paid attention only to the amplitude pattern, not to the phase pattern, which is of great importance in satellite communications that employ such antennas in personal communications services.

A quadrifilar antenna to be used for wireless communications via satellites

must provide a uniform response over the entire hemisphere over which the

satellites are visible. This region of coverage usually excludes the region specified

by an elevation angle of 10 ~ or less due to multipath problems and atmospheric

effects. In all other regions of coverage, the antenna must provide a uniform

response in both amplitude and phase. The gain of the antenna must be enough

throughout the coverage area that it can easily receive signal levels at all desired

view angles and with the desired signal-to-noise ratio. The pattern cutoff must

also be sharp enough with no backlobes, so that no signal is received outside

the coverage area.

270 90 270 90

180

C= 0.88 0

C= 0.56 0

180

270

180

L......rT,,,~_2

180

270

90 270

C= 1.28 X 0

C= 1.92 k

0

90

90

270

C= 1.60 0

180

C= 2.40 0

270


180

90

C= 0.44

180

90

C= 2.56 0

270 90

180

Figure 5.36 Beam pattems for different kinds of quadrifilar antennas.

5.16. Designing a Quadrif i lar Helix Antenna 401

There is also a need for a uniform phase response over the coverage area.

The phase response of the antenna weights the arriving signal and produces a

response that is directly proportional to the phase. This response is a function

of the angle of arrival of the satellite signal.

Because of the importance of phase response in the design of quadrifilar

antennas, computational techniques such as the method of moments can be used

in their design. A representation of the modeling is shown in Figure 5.37.

The details of the method of moments modeling can be obtained from

Chapter 4. The ground plane is modeled as a series of wire mesh elements that

Top View

vo<oo, vo< 0o, I

V o (-270 ~

Side View I

2a

X/101 -- -

)

d = 2 r t a a max (m) = 10 / Fma x (MHz)

Figure 5.37 Modeling the quadrifilar antenna design using the method of moments.


model surface currents. The quadrifilar helices, composed of copper metal strips,

can also be modeled by a very thin wire mesh as illustrated in the figure. The

dimensions of the mesh elements and the constraints for the mesh size and wires

are given in the figure. Each of the four filament tapes is fed by an independent

source with a phase angle of 0, 180, -270 , or - 9 0 ~ as shown in the figure.

The resulting fields produced by each quadrifilar element are added vectorially

by the computer program. The method of moments reduces an integral differential

equation involving the currents on wires to a set of matrix equations of the form

[Z][/] = [V], (5.74)

which can be solved for [/] by matrix inversion. The column vector [/] is a set

of unknown current coefficients; [V] is the voltage excitation matrix; and [Z] is

the generalized impedance matrix. Sinusoidal expansion functions and testing

functions are used. The matrix [Z] is a 4N X 4N symmetrix matrix, where N

is the number of sinusoidal expansion functions on each of the four wires.

Computational results for a quadrifilar antenna at 1.2 GHz of L = 0.5,~, D =

2.0 cm are shown in Figure 5.38. The figure shows the computed polar amplitude response. Notice the presence of the backlobe, which could be eliminated by

"fine tuning" the design. The phase performance for both linear polarized compo-

nents (0 and ~b) is also presented in the figure.

For transmitting and receiving operations, a single quadrifilar antenna is not sufficient. The quadrifilar helix is a narrow-bandwidth antenna and cannot really support both transmitting and receiving frequencies. Dual operation can only be achieved through the incorporation of two antennas into a single structure. It has

been shown [3] that the most convenient way of mounting the two antennas is for one antenna to enclose the other, as shown in Figure 5.39 for the cross- sectional area.

For the case of L = 0.5,~ in both antennas and D 1 = 2.0 cm, with a transmitting

frequency of 1.2 GHz and D 2 = 3.0 cm for the receiving frequency of 1.5 GHz,

Figure 5.40 shows the amplitude and phase response of this dual-antenna scenario.

5.17 Numer ica l Methods in Loop Antenna Des ign

Designing loop antennas beyond the circular and square rectangular types we

have already discussed, for which analytical expressions exist, may require the use of computational methods. Electromagnetic numerical methods such as the

method of moments (MOM) and the finite-difference times domain (FDTD)

method allow flexibility in analyzing loop antennas that are circular, elliptical,

5.17. Numerical Methods in Loop Antenna Design 403

-270

180

r plot

~ " ~ " ~ ~ R x polar plot

0

-90

150

100

Phase 50 (degrees)

0

-50

-100

m

0 Polarization

- - ~ Polarization Rx _

Tx I I I I I I I

-30 0 30 60 90 120 150 180 210 Figure 5.38 Calculated results of a quadrifilar antenna pattern using method of moments.


i--~ D1 ' v l

I I I I

a n t e n n a 2

a n t e n n a 1

I I

["~1 j r - ,

J D 2 I

Figure 5.39 Cross-sectional area of dual quadrifilar antenna.

or rectangular. These techniques are very useful in analyzing coupled loops at arbitrary positions which are often used for arranging diversity antenna schemes.

It is often the case that because of packaging considerations, loop antennas

cannot take either a pure rectangular or a cylindrical shape; instead, irregular- shaped loop antennas must be used. Furthermore, the need to address the effects of multipath fading without requiring increased bandwidth has spurred the use

of mutiple elements arranged in a variety of configurations. In order to design

such antennas, it is important to address the effects of loop geometry and mutual

coupling among antenna elements on the antenna impedance, radiation character-

istics and performance. The method of moments can be used in the design of

such loop antennas in the presence of a ground plane. FDTD can also be used

for loops which are in the presence of a ground plane or finite-sized conducting

objects. The easiest way to model a loop antenna using MOM is to use a piecewise

linear representation of the curve shown in Figure 5.41. Piecewise sinusoidal

subsectional basis and weighting functions are used in a Galerkin form of the

moment method to compute the axial current distributions along the loop. This

current is then used to compute the antenna radiation pattern, directivity, and

input impedance.

5.17. Numerical Methods in Loop Antenna Design 405

0 o

270 ~

Tx Pattern

RX Pattern

90 ~

180 ~

Figure 5.40 Amplitude response of dual quadrifilar antenna.

< k / 10 (segment length)

I t , - , f " \

\<X/IO .

Figure 5.41 Piecewise linear representation of loop antennas for MOM modeling.


There is often a need to evaluate the performance of a loop antenna in the

presence of a scattering body, such as might be used in a pager; the effect of

other conducting surfaces (such as the pager case) must be included in the analysis

(Figure 5.42). In order to address this problem, the finite-difference time domain

algorithm is used with Yee's cubical cells and a second-order absorbing boundary

condition at the outer grid truncation surface. To account for the finite sizes of

wires on the loop antenna, a special subcell method is used. Using a properly

shaped excitation function for the antenna feed allows the antenna behavior over

a wide frequency range to be obtained.

The far-field patterns of a circular loop antenna with circumference size

C = 3.0,t and diameter d = 0.2,t are given by Figure 5.43 in its directivity

pattern using the method of moments.

In designing antennas for small wireless products, there is special interest in using the right location, angle, and polarization to protect the wireless product

from short-term or Rayleigh-type fading in a multipath environment. Loop an-

tenna diversity scenarios in which multiple elements are used in the wireless

product to reduce the effect of fading are of great importance in this increasing

environment of ever-more-reliable products. It has been shown, for example, that

the use of cross-loop antennas as in Figure 5.44 can provide a high directivity

performance.

An example on the use of the finite-difference time domain method to predict the performance of a strip loop placed upon a handheld transceiver case appears in Figure 5.45. The geometry of the receiver and antenna system are shown in

Loop Antenna

RF IC - r--i r--I r3 i-lr-i PCB

ASIC I ___~atrNler I ~

Figure 5.42 Loop antenna inside a pager.

5.18. Using MOM for Designing Cylindrical Arrays for PCS 407

I O

90 90

Figure 5.43 Far-field pattern of circular loop antenna.

the figure. It is observed that at lower frequencies, the impedance changes rapidly with frequency; a difficult feat of broadband performance is needed. For narrowband applications, good impedance values are observed between resonant peaks. The directivity pattems are also provided in the figure for f = 915 MHz. The asymmetries in the directivity pattern for the x - z plane are due to the loop's

off-centered condition with respect to the receiver box in the x direction to allow room for positioning the feed circuitry.

5.18 Using MOM for Designing Cylindrical Arrays for PCS

In the fast-growing areas of advanced mobile phone systems (AMPS) and personal communications services (PCS), section antennas on multiple beams have been


~ Z

I 0 EO

E~

9 90

180

I E I d B

X

~ Z

1 Feed Pattern = 90 off phase h = 0.2 ~. above ground plane C = 0 . 8 t

90

180 0

I E I d B

Figure 5.44 Field pattern and configurations of cross-loop antennas.

A Z I

5.6 cm

8OO i A A A i resistance

400 1"- / , reactance

5.6 cm -400 !

--/" -- ~ , f(GHz) 2.5 cm Z ~ ~ Z EO

IEI dB IEI dB

/

~'x

Figure 5.45 Performance of a strip loop antenna in a handheld transceiver.


used lately instead of omnidirectional antennas. There is a persistent interest in

acquiring better base-station antennas for cellular communications, due to con-

stant increases in system capacity and the high cost of acquiring property for the installation of cellular station antennas. The improvements sought in base-station

antennas would increase gain, diminish side lobes, and lower interference.

An illustration of AMPS is shown in Figure 5.46. Many stations have this

form of prototype.

The construction of an earth station as shown in Figure 5.47, demands a

substantial capital investment in equipment and property values. Wireless service

typically divides coverage around a cell site into three 120 ~ sectors. Each sector

has at least one or two transmitting antennas and a greater number of receiving

antennas. Spatial diversity schemes are often implemented in which two antennas

are used to receive the same signal with different fading envelopes. In the process

of combining two or more fading envelopes, the overall fading is reduced,

providing improved system performance.

The antennas that cover a section are usually mounted on one of the faces of

a triangular platform structure at the top of a tower, as shown in Figure 5.47. At

,T Dedicated Voice and elephone /Data Lines I [ ~-1 I Ntetw~

Processing and ...... " "

CELL 3 Figure 5.46 The AMPS PCS configuration.


Figure 5.47 Typical earth station for an AMPS PCS system.

the ends of such a face, two or more antennas are mounted, usually separated

by at least 10 wavelengths.

Sector antennas typically have 60 ~ , 90 ~ , and 120 ~ beam widths and are

used for spatial diversity. Such directional antennas have a high gain, but

have the disadvantage that, in mobiles, they must hand over coverage to

another sector antenna as the mobile moves out of the coverage area of one

beam and into the coverage area of another beam. The sectored antenna

concept can cover the 360 ~ azimuth, but the task of tracking mobiles becomes

somewhat more complicated as mobiles move in and out of multiple beam

patterns. For example, as shown in Figure 5.47, above the 9-antenna dipole

configuration, each of them providing 40 beams, can cover the entire 360 ~

azimuth plane. Although the 9-beam (or the more widely used 12-beam, with

4 dipole antennas per sector) design can provide distinct benefits, it also

suffers from scan loss, which is inherent in planar arrays. In order to diminish

scan loss and to provide an aesthetic look for ground mobile towers, cylindrical

array antennas have been proposed [4]. Such an array configuration is shown

in Figure 5.48.

The cylindrical array is composed of 12 cylindrically symmetric array

elements of half-wave dipoles placed ,~/4 above a cylindrical shape conductor.


Cylindrical Multibeam Antenna and Tower

II

II

L / 4 I I - ~ - - . 1 ~ I i ~ 1 - ~

I I

Y / ~ 1 1 - - - - ~ - i I

/

�9 �9 0

Top View (Z-axis) of Cylindrical Array (12 elements )

I Side View (y and x axis I of each array element I made up of 4 dipoles) I

I I I I

Figure 5.48 Cylindrical array antenna configuration for PCS.

In Figure 5.49, a schematic representation of the cylindrical array is shown. The array possesses four horizontal rows of dipole elements with ,t spacing between

rows; the columns are circumferentially spaced M2 apart. Each beam is generated by four adjacent columns of elements, with the inner two columns delayed by

90 ~ relative to the outer two columns. This spatial realization yields a beam with

its axis centered relative to the columns. A method of moments code can be used

to fine-tune the design based on this concept. In the MOM model, the Green

function used does not need to account for the dielectric. The dipoles are oriented

vertically. The ground reflector can be represented either by cylindrically arranged

vertical wires or by a surface-patch model. The wires are spaced approximately

M10 apart and have a segmentation of ,U5. Figure 5.50 displays far-field plots

of one beam of the antenna generated by the MOM model.


1

2 m _ _ ~

3

i i I i

I t I i

I ire i i , , 1 MOM Wire Grid Representation of Cylindrical Shape Conductor

5 segments ~. / 5 length

follow the equal area rule

MOM wire Grid for Surface Patch Modeling of Cylindrical Shape Conductor

Figure 5.49 MOM wire grid model for representing the cylindrical array.

5.19 Simulation of Portable UHF Antennas in the Presence of Dielectric Structures

In this section a method of moments code is used for modeling wire-type radiating

structures in the presence of dielectrics. As is well known, MOM codes are useful

in modeling conducting structures of complex geometries. However, MOM has

difficulty in incorporating arbitrary dielectric bodies with conducting structures.

The FDTD and FEM codes are more suitable for analyzing complex 3D dielectric

structures, but are limited in the analysis of complex conducting geometries, and

the algorithms are computationally intensive and time-consuming.

One of the most widely used antennas in PCS and cellular system is the helical

antenna. After a helical antenna is wound on a dielectric support, the structure

is not very suitable for MOM simulations because of the presence of the dielectric.

However, a method can be developed to simulate a dielectric core. Any two

parallel nearby allocated turns of the coil can be considered as a two-conductor

transmission line, which can easily be described as an LC series circuit model.

The presence of the dielectric can be modeled by using an additional capacitive

5.19. Simulation of Portable UHF Antennas

OdB

413

14 dB

Figure 5.50 Far-field plots of antenna beam generated using MOM in the cylindrical array antenna.

shunt lumped loads along the transmission line. In a MOM code these shunt

loads can be easily placed as lumped loads on the shunt wire segments connecting the turns.

The value of these loads can be obtained experimentally or by using FEM/

FDTD method solvers, which can accurately determine the characteristics of the

structure. These modes can be observed in Figure 5.51.

The capacitive loads could also be approximated by the expansion

i i64i 1 ,n (pF) (5.75)

as a first approximation in case more accurate data is not available, where L(m)

is the segment's length (in meters) from which the lumped load is connected, as

shown in Figure 5.52, d is the diameter of the dielectric core, and r is the wire

radius used in the MOM model.


Die lec t r ic c r = 3 .0 tO 4 .0

Whip Antenna

Source Model

7

Helical Antenna

MOM Model

(Loops exaggerated)

~ = 1/~oC L

i" Segme

Capacitively Lumped Loads to Model �9 Dielectric Effects o

Prad (mW)

12~ t 100

8c

60

40

20

70 900 1100 1300 1500 170o 1900 2000 f(MHz)

vs

Figure 5.51 Modeling a dielectric-filled helical antenna using MOM.

In case of a lossy dielectric (such as a human body), a wire-grid model can

still be used in the method of moments, except that resistive loaded wire-grid

surface modeling should be used. This is illustrated in Figure 5.53, where an

attempt has been made to model a cellular phone in the proximity of a human head.

5.19. Simulation of Portable UHF Antennas

\ ~L(m) I

b Ii CL

L(m) ~ ,~~ "t

Figure 5.52 Modeling of loaded segments in helical antennas.

415

I

/

Human Head (only one plane of three-dimensional structure shown)

2 cm

RL '----! I

X+jW resistive load for every wire segment

, )

. . . .

Cellular Phone

Figure 5.53 MOM modeling of PCS receiver near a human head.


5.20 Other Wire-Type Antennas for Portable Communicat ions

We now outline briefly a series of antennas that can be modulated using the

method of moments. It is assumed that such antennas are placed at the center of

the top side of a conducting box which can be modeled as a grid model.

The quarter- and half-wave monopoles and the quarter-wave helix are all well-

known antennas used in mobile communications. There are several papers devoted

to an investigation of the characteristics of a monopole antenna mounted on a

conducting box [5-7]. Mobile applications of various helical antennas have been

considered. As shown in Figure 5.54, there is a deep null in the vicinity of

0 = 90 ~ The resonant M4 antenna excites strong RF currents on the portable

case which is part of the radiating system. This is the most negative feature of

this antenna, because the standard operating angular range for the handheld

radiotelephone system is from 40 ~ to 140 ~ .

The quarter-wave resonant monopole antenna has very good input impedance

characteristics, as shown in Figure 5.55.

The classic sleeve dipole antenna contains a M4 coaxial resonant choke which

isolates the dipole from the feeding coaxial line. However, the resonant nature

of the choke leads to rapid radiation pattern deterioration for even a small

frequency detuning.

A model of a sleeve dipole is shown in Figure 5.56. The modified sleeve

dipole consists of a M4 sleeve helical monopole fed by a coaxial line and a M4

sleeve formed by four wire arms placed in parallel to the coaxial line. The

diameter of the helix is 1 cm and the antenna length is 10 cm. The distance

between the opposite sleeve arms is 1 cm.

5.21 Model ing a Monopole Mounted on a Moving Car

The radiation pattern of a M4 monopole antenna mounted at the center of the

roof of a car is shown in Figure 5.57. The effects of the earth ground are included

using the Fresnel reflection coefficients. The relative complex dielectric constant

of the earth is eg = 10 - 0.1j. The car was modeled using a wire grid as shown

in the figure. More than 55,000 wire segments were used in the total model for

a frequency of 400 MHz, and the run time was over 1.5 h on a 200-MHz Pentium

PC with 32 MB of RAM. The radiation patterns of the monopole antenna mounted

on the car model are given in Figure 5.58.

5.21. Modeling a Monopole Mounted on a Moving Car 417

/S "7 / /

/ / / / /4

!

Wire-Grid Model of X / 4 Monopole Antenna

\ \

Wire-Grid Model of ;L / 4 Helical Antenna

270

X / 2 Monopole \ .X /4

~ 3 0 \ 0 ~ 6 \ 3 / helix

-6 \ / 0 I ~ \\ i i

90

180

Figure 5.54 Radiated pattern of monopole and helix antennas mounted on conducting box.

4 1 8 5. Antennas for Wireless Personal Communicat ions

Zin (ohms)

1800

1400 - - --

1200 - - --

800

400

-400

Re Im

-2

I I I I I I I I I I I I I I

I _ _ 1 _ - - I - - _11

I I I I I I I I I

" 1 " . . I _ - - . _ J

I I

i I 8 7 5

I I I

I I I

I I-- 900 925 950 975

i

I

I I _ _ 1 _ _ I I I _ _ 1 _ _ I I I _ _ 1 I I l _ . . J I I

I--I--F 1000 1025 1050 f(MHz)

/ 2 monopole

Re . . . . . Im

Zin (ohms)

150

100

50

-50

-100

-150

| ,

I I I I I I I

. _ . ._1 I I I I _ . _ l . _ _

I I I I i m I I

_, ' ' d ~ ' - - , - _ _ , _ I

i _. J - - - I ~ ~ I i i m

" i _ i i I i _ _ l _ _ I I I I I I

_ _ 1 I I R e l I I _ _ 1 _ _

I I I I I I

I I I I J _ _ I _ _

I I I I I

I I I I ~ I

875 900 925 950 975 1000 1025 1050 f(MHz)

X / 4 helix

Figure 5.55 Calculated input impedance characteristics of monopole and helix antennas.

5.21. Modeling a Monopole Mounted on a Moving Car 419

270 9O

Calculated Radiation Pattern

Wire Model

Zin (ohms)

60 Re Im

30

I I I I s I !,,

f J......~

875 950 975

J , , i

9O0

[ j

f

I I

f I

925

f(MHz)

Figure 5.56 Modeling of the sleeve dipole antenna.

4.2 m

5. Antennas for Wireless Personal Communications

wire grid model. Using equal area rule

Earth Ground

420

0.55 m

m

Figure 5.57 Modeling monopole antenna on a car.

-90 90

-10 dB -20 dB -20 dB -10 dB

Figure 5.58 Radiation pattern of a monopole antenna mounted on a car.

References

1. C.A. Balanis, Antenna Theory: Analysis and Design. Harper & Row, New York, 1982.

2. A.T. Adams et al., "The Quadrifilar helix antenna," IEEE Trans. on Antennas and

Propaga. 22(2), 173-177 (March 1974).

References 421

3. J.M. Tranquilla and S. R. Best, "A study of the quadrifilar helix antenna for global positioning system (GPS) applications," IEEE Trans. on Antennas and Propaga. 38(10), 1545-1550 (October 1990).

4. G.A. Martek and J. T. Elson, "A 12-beam cylindrical array antenna for AMPS and PCS applications," 13th Annual Review of Progress in ACES, March 17-21, 1997, pp. 457-465, Monterey, California.

5. A.A. Efanov, M. S. Leong, and P. S. Kooi, "Numerical investigation of antennas for

hand-held radio telephones using NEC code," 12th Annual Review of Progress in

ACES, March 18-22, 1996, pp. 644-670, Monterey, California.

6. K. Katsuhara et al., "The improvement of NEC-2's out-of-core operation and the analysis of VHF monopole antenna mounted on a car model," 12th Annual Review of Progress in ACES, March 18-22, 1996, pp. 679-686, Monterey, California.

7. R.J. DeGroot et al., "Simulation of portable VHF antennas in the presence of certain dielectric structures using the numerical electromagnetic code," 13th Annual Review

of Progress in ACES, March 17-21, 1997, pp. 839-844, Monterey, California.

Index

A Abrupt varactors, 155 Absolute jitter, 151 Absorbing boundary conditions, 272 ADC converter noise, 103-108

high-speed, 68-72 Advanced mobile phone systems, 407-410 Airy functions, 256 Amplification in phase-locked loops, 165 Amplifiers

current feedback vs. voltage feedback, 60-61 overcompensation, 140

AMPS. See Advanced mobile phone systems Analog signal corruption, 105 Analog-to-digital converters. See ADC converter Analytical approach to coupling mechanisms, 196 Aperture problem, 224-237

hybrid method of moments, 233-237 in MOM, 224-237 perfectly conducting scatterer, 276

Array mutual coupling, 381-383 Array theory, 375-380 ASIC signal integrity, 94-97 Automated CAE tools, 2 Axial mode helical antennas, 394

B Bandwidth

calculation in microstrip configuration, 3 filtering in ADCs, 109

Basis functions, 205 choosing, 212

Bias current in op-amps, 61 Biological tissue SAR, 331 Bistatic radar scattering, 322-323 Boundary conditions

in FDTD, 272-275 perfectly conducting wire, 208 three-dimensional TLM problems, 307 two-dimensional TLM problems, 297, 301-302

Broadband mode of operation, helical antennas, 394

Buffer latch in ADCs, 113-114 Burst noise, 57-61 Bus interconnect system PC card, 99 Bypass capacitance, choosing appropriate, 20-21 Bypass capacitors

multiple, 81-83 in power-supply decoupling, 73-76 resonance production, 76-81

C Cable-radiated EMI, 342 CAE tools, automated, 2 Capacitance

decoupling effects, 17-21 effect in power traces, 20 loop area size, 86

Capacitive loading, op-amps, 140-143 Capacitors, choices in ADC, 118-124 Cassegrain feed, 386 Ceramic capacitors, 120-121 Characteristic impedance

logic family, 90 microstrip configuration, 5 microstrip line, 35 stripline, 35

Circuit analysis program, SPICE, 185 Clocks in ADC, 116-117 CMOS devices and power dissipation, 21 CMOS processes and flicker noise, 57 Collocation method, 206 Color noise, 52 Common-mode current choke, 50 Compatibility problems, 194-195 Computational methods, comparisons, 201-202 Conduction, 23-24 Connector pins, performance, 40-41 Connector interference, 40-43, 47-50 Cooling systems in PCBs, 23 Core loss in switching-mode power supplies,

125-127 Corner-diffracted rays, 250-251

422

Index 423

Comer reflector antennas, 381-383 Coupled noise calculation, 194 Coupling mechanism, calculating, 195 Coupling problem analysis using MOM/FDTD

method, 276 Crosstalk

analysis for PCBs, 342-344 definition, 98 diminishing, 41-43 EMI, 41 PC card pins, 98-100 in time domain, 11-14

Crystal oscillators, RFI-induced failures, 190-193 Current

common-mode, 50 control in PCB by capacitors, 17-21 density and electromigration, 38-39 differential-mode, 50 in ground loops, 45-46

Current distribution microstrip, calculation, 340 microstrip lines, 338 wire dipoles, 360

Current feedback amplifier, 58-61 voltage feedback amplifier vs., 60-61

Cycle-to-cycle jitter, 151 Cylindrical arrays for PCS, 407-412

D DC amplifiers, phase noise, 169 DC errors

in analog circuits, 135-137 feedback correction of, 142

Decoupling capacitance effect, 17-21 exterior/interior region, 276 power supply, 72-76

Decoupling power lines in ADCs, 111-113 Delta-I noise simulation, 333-337 Design of array antennas, 375 Detectors, phase, 159-160 Dielectric attenuation constant, 33 Dielectric constant

PCB design, 2 signal velocity vs., 28

Dielectric structures and portable UHF antennas, 412-415

Differential equations, 197 Differential nonlinearity, effect on bypass design,

105 Different-mode current, 50 Diffracted rays, 245-247 Diffraction

by convex surfaces, 249-250

by edges, 247-249 geometric theory, 198, 245-250 physical theory, 257-261 uniform geometric theory, 251-264 by vertices, 250-251

Digital frequency dividers phase noise in, 170

Digital integrated circuits, RFI effects, 184-188 Diode characteristics under RF conditions, 175 Discretization, 280 Dispersion in Yee's lattice, 271 Distortion effects in high-speed circuits, 346 Drain wires, 49 Driving inputs, ADC, 108-117 Dual embedded stripline trace resistance, 92 Dual offset reflector antenna, 389

E Earth station AMPS PCS system, 409-410 Ebers-Moll transistor model, 178-181 EDA tools, 2, 100 EFIE. See Electric field integral equation Eigenfunction expansions, 339 Electric field integral equation, 208 Electrolytic capacitors, 121-122 Electromagnetics, definition, 194 Electromigration, 35-39 Electrostatic force in metallization, 36 Embedded microstrip trace resistance, 90 EMC design rules, 337-338 EMI crosstalk, 41 Emissivity values for materials, 24 Emitter-base junctions offset voltage, 182 EMP simulator ion problem, 316-322 Equipment under test (EUT), 316 Extraction tools for ASICs, 100-102

F Faraday shields, 133~'135 Far-field equation

array antennas, 377 helical antennas, 395

Far fields circular loop antenna, 406 helical antennas, 393 theory in array antennas, 375

FDTD. See Finite-difference time domain Feed point in parabolic reflectors, 386 FEM method. See Finite-element method Fermat's principle applied to diffracted rays, 245 Ferrite cores in switching-mode power supplies,

124-130 Ferrite inductors, 123-124

424 Index

Field calculation, TLM problems, 297-298 Field propagator calculations, 194 Film capacitors, 122-123 Filter bandwidth and RFI rectification, 137-139 Filters, 47

in ADC, 117 H(f) in loops, 163

Finite-difference time domain, 265-279 interference problems, 279 loop antenna, 406

Finite-element method, 279-288 three dimensional, 288-295 two-dimensional, 281-288

Flicker noise in op-amps, 57 Focal point of array beams, 385-386 Forcing function, 194 Fredholm integral equations, 197 Free-space Green function, 210 Frequency, dielectric constant vs., 28 Frequency multipliers, phase noise in, 170 Frequency response in high-speed amplifiers, 141 Frictional force in metallization, 37 Fringing capacitance, stripline, 34 Fringing flux, switching-mode power supply, 130 Front-fed antennas, 386 Full power bandwidth (FPBW) in op-amps, 63-64

Hankel function, 231 Hansen-Woodyard end-fire arrays, 380 Harmonic distortion, 146 Heat. See Thermal problems Heatsink parameters, 25-27 Heat transfer calculation, 31 Heat transfer optimization

by conductivity, 23 by radiation, 24

Helical antenna, 390-396 dielectric core simulation, 412-413

Helmholtz wave equation, 286 High-frequency

amplifiers, phase noise in, 169 asymptotic techniques, 238-257 effect in IC interconnection, 18 methods, 237-261

High-order elements in FEM, 290 High-speed ADC converters, 68-72 Hybrid method of moments

for apertures, 233-237 in electromagnetic problems, 222-224

Hybrid MOM/FDTD method, 275-279 Hybrid MOM/GTD methods, 261-265 Hyperabrupt varactors, 155

G Gain bandwidth in op-amps, 65 Galerkin's method, 206, 310 Geometrical optics, 198, 238-244 Geometrical theory of diffraction, 198, 245-250 Geometry

physical optics, 258 physical theory of diffraction, 258

Glitches, 94 definition, 98

Green function, 197 microstrip, 339-340

Grid modeling, 313-316 Ground bounce, 94-97, 333-337 Grounding

mixed-signal circuit, 112-114 shielded cables, 131-132 techniques in ADC, 103-108

Ground loops, 43-47 Ground pins and crosstalk reduction, 41-43 Ground plane layout

ADC design, 105 in ADC PCBs, 112

Ground towers AMPS PCS system, 409-410

H Half-wave monopoles, 416

I IC. See Interconnect IC interconnection, high frequency effect, 18 Impedance, 9

actual bypass capacitor, 78-80 loop area size, 86 in multilayer PCB, 14-17 parallel, 11 power-supply line, 77-78

Impedance matching, 92-94 Impedance matrix

in hybrid MOM, 223 MOM/GTD method, 264-265

Incident field in geometrical optics, 240 Incident RF energy, 184 Incident shadow boundary, 241 Inductance

effect in bypass capacitors, 19 loop area size, 86 mutual, in current loops, 41

Inductor current in switching-mode power supplies, 124-125

Input configurations in ADCs, 109-111 Input noise. See Forcing function Input sources (ADC), 103 Integral equations, 197 Integro-differential equations for aperture problem,

228-230

Index 425

Interconnect characterization, 101-102 delay in lossy transmission lines, 33-35 electrical performance, 2

Interference and connectors, 40-43 control, 316-337 problems in connectors, 47-50 of RE energy, 176-181 in wire-type elements, 261 See also Crosstalk

Intermodulation distortion, 145-148 Internal noise in op-amps, 65-68 Intrinsic line capacitance, stripline, 6 Irregular-shaped loop antennas, 404 Isolation technique of capacitively loaded op-amps,

141

J JFET devices and RFI rectification, 183-184 Jitter, 151 Jitter in ADC, 114-116 Johnson noise. See Thermal noise j-Segment solution, 309-313 Junction temperature, 25

K Keller's cone, 252 Kirchoff's current law, 293 Kirchoff's voltage law, 293

L Laplacian equation, 281 Large electrical structures, modeling, 237 Lattice truncation

conditions in FDTD, 268 and wavefront propagation, 272

Lead wire diameter in ASIC design, 96-97 Least-squares method, 206 Linear dipole antenna, 358-360 Line capacitance, total, 8 Line failure, 38 Load capacitance

from cabling, 143 minimum, 7-11

Lock acquisition in phase-locked loops, 164-165 Loop antenna design, numerical methods, 402-407 Loop area, effect on noise, 86 Loops

phase-locked, 148-151 phase-locked topology, 160-169 See also Ground loops

Lossy dielectric modeling, 414

Lossy transmission lines, 32-35 Low-pass filter noise, 168-169

M Magnetic compatibility problems, 194-195 Magnetic field integral equation, 208 Magnetic flux, switching-mode power supply, 129 Manganese-zinc (MnZn) ferrites, switching-mode

power supplies, 125 Man-with-radio problem, 323, 331-333 Material-related electromigration problems, 36 Mathematical discretization, 292 Mathematical theory, method of moments, 203-207 Maxwell equations, 194, 197

homogeneous medium, 238 MCM. See Multichip modules Metallization, 36-37 Method of moments, 200-237

aperture problem, 224-237 basis of computer codes, 212 cylindrical arrays for PCS, 407-412 loop antenna, 404 mathematical theory, 203-207 PCB modeling, 338-342 quadrifilar antennas, 401-402 thin-wire modeling, 307-313

Method of projections, 203, 206 Method of weighted residuals, 203 MFIE. See Magnetic field integral equation Microstrip antenna, 369-374 Microstrip line, 3-11

characteristic impedance, 35 configuration, 3-11 current distribution, 338 trace resistance, 90

Microstrip trace resistance stripline trace resistance vs., 92

Minimum load separation, 7-11 Modeling electromagnetic problems

using surface geometries, 216-222 using wire geometries, 207-216

Modeling large electrical structures, 237 Modeling RF interference, 173-184 Modulators

distortion, 148 ideal behavior, 150

MOM/GTD methods, 261-265 Monopole on moving car, 417-420 Monostatic radar scattering, 322-323 MSC/EMAS, 290 Multichip modules, 345 Multilayer PCB in ADC design, 104 Multiple bypass capacitors, 81-83 Multiple field equations, 199-200 Mur radiation boundary conditions, 275

426 Index

Mutual capacitance, 99 Mutual coupling of arrays, 381-383 Mutual inductance, 98

formula, 41

N NAND gate operation, 185-186 Narrow slots, 232-233 Network equations, 198-199 Nickel-zinc (NiZn) ferrites, switching-mode power

supplies, 125 Noise

analog circuit vs. digital circuit, 105-106 in phase-locked loops, 165-166 switching-mode power supply (ADC), 117-118 types of, 52

Noise calculation in op-amps, 52-55 Noise gain

in op-amps, 56-57 voltage feedback amplifier, 63

Nonlinear behavior of semiconductors, 174-175 Nonuniform component of current correction, 259 Numerical approach to coupling mechanisms, 196

O Offset parabolic reflectors, 386-390 Offset voltage, 61-63

at emitter-base junctions, 182 Op-amps (Operational amplifiers)

RFI effects, 189-190 specifications, 55-61

Optical equations, 198 Oscillation prevention, 75 Oscillators

circuit, 152 phase noise in, 170 voltage-controlled, 151-156

Output calculation, 194 Overcompensation of amplifier, 140 Overvoltage protection (OVP) circuit, 87

P Pager antennas, 367-369 Parabolic reflector antennas, 385-386 Parallel impedance, 11 Parasitic capacitance, effects on connectors, 46-47 Parasitic extraction for ASICs, 100-102 Parasitics

associated with bypass capacitors, 18 feedback, control of, 75

Patch antenna, 370 PCB. See Printed circuit board PC cards, noise sources, 99

PCS. See Personal communications services Penetration problems, 266 Permittivity, 3 Personal communication devices, 407-410 Personal communications services, 409-410 Petrov-Galerkin method, 206 Phase detection, phase noise in, 169-170 Phase detectors, 159-160 Phase-locked loop, 148-151

linear model, 162 topology, 160-169

Phase noise, 151 in DC amplifiers, 169 in voltage-controlled oscillators, 156, 167-168

Phase variation in quadrifilar helix antennas, 399-402

Physical discretization, 292 Physical Optics/PTD vs. MOM, 258 Physical theory of diffraction, 257-261 Pigtail connection in shields, 49 Planar arrays, 380-381 Planar triangular patch models, 216 Plane-wave source conditions in FDTD, 268 PN junctions, rectification in, 174-176 PO. See Physical optics Pocklington's integral equation, 211 Point matching, 206 Polygonal antenna, 367-369 Popcorn noise in op-amps, 57-61 Portable UHF antenna, 412-4 15 Power bandwidth in op-amps, 63-64 Power bus rails, 83-87 Power dissipation

device in TTL, 21-22 worst-case value, 21

Power distribution in PCB design, 14-17 Power rails in ADC design, 104 Power supply

decoupling in ADCs, 111-113 decoupling in op-amps, 72-76 line impedance, 77-78 rejection ratio, 74 separation in ADC, 114

Power tracing, 85-87 Printed circuit board, 337-346

design and dielectric constant, 2-3 design in ADCs, 112-113 layer thicknesses, 92 modeling by MOM, 338-342 modeling by transmission line method, 342-347 reliability and temperature, 22

Projections, method of, 203 Propagation

delay in microstrip configuration, 5 delays, 32-35 lossy transmission lines, 33

Index 427

PSRR. See Power-supply rejection ratio PTD. See Physical theory of diffraction Pulse functions, 212, 214

Q Quadrafilar helix antenna, 396-399 Quarter wave helix antenna, 416 Quarter-wave monopoles, 416

R Radar scattering, 322-323 Radiated EMI

from cables, 342 connectors as source of, 40 and ground loops, 43-47 reduction, 14

Radiation, 24-31 computation from current sources, 354-356

Rayleigh-Ritz variational method, 197 RC filters in ADCs, 111 RC input filter capacitor size, transient voltage in

ADCs, 108 Rectangular grid of array elements, 380 Rectangular microstrip antenna, 372-374 Rectification in PN junctions, 174-176 Reference frequency generators, phase noise, 171 Reflected field in geometrical optics, 241-244 Reflective pulse amplitude, calculation, 8 Reflector antennas, 383-386 Relative permittivity, 3 Resonance

and bypass capacitors, 76-81 dual bypass capacitors, 81-83 frequency value, 77-78

RF bypassing in voltage-controlled oscillators, 158 RFI effects

in digital integrated circuits, 184-188 in op-amps, 189-190

RFI-induced failures in crystal oscillators, 190-193 RF interference

modeling, 173-184 worst-case calculations in transistors, 181-182

RFI rectification analog circuits, 135-139 in JFETs, 183-184

Rumsey's reaction concept, 197

S Sampler, buffered in ADCs, 109-111 Scalar Green function, 197 Scattering. See Diffraction Scattering process, two-dimensional TLM prob-

lems, 295-297, 300-301

Schelkunoff's formulation, 277 Second-order elements in FEM, 290 Second-order intermodulation, 148 Self-diffusion process of ions, 37 Semiconductor nonlinearity, 174-175 Series connected lossless node, 304 Shadow boundaries, 240 Shielded cables in analog circuits, 131-135 Shielding connector lines, 47-49 Shot noise, 52

in op-amps, 57 Signal delays. See Propagation delays Signal gains in op-amps, 60 Signal integrity in PCBs, 344-345 Signal velocity vs. dielectric constant, 28 Simplest small loop antenna, 366-367 Sinusoidal current distribution in wire dipoles, 361 Sinusoidal functions, 212, 215-216 Sinusoidal steady-state information in FDTD, 268 Skin effect, 33

definition, 128 Sleeve dipole antenna, 416 Slew rate in op-amps, 63-64 Slot apertures for aperture problem, 230-232 Sommerfield integrals, 339-340 Specific absorption rate of biological tissues, 331 SPICE circuit analysis program, 96, 185 Square loop antenna, 367-369 Stability of capacitively loaded op-amps, 140-141 Stick-model aircraft problem, 322-323 Stripline

characteristic impedance, 35 fringing capacitance, 34 trace resistance, 91-92

Structural modeling in FDTD, 267-268 Subsectional current basis functions, 212 Supply rails (power bus rails), 83-87 Surface geometries in electromagnetic problems,

216-222 Surface-patch modeling, 216 Surface-patch problem, 323, 331-333 Surface shadow boundary, 241 Switching-mode power supply, 117-118

ferrite cores, 124 Synthesis problems, 194

T Temperature. See under Thermal Terminated transmission lines, 144 Thermal analysis of PCBs, 25 Thermal effect on electromigration, 39 Thermal noise, 52, 53-54 Thermal problems in PCBs, 22-31 Thermal resistance calculation, 28 Thin-wire antennas, 356-357

428 Index

Thin-wire loop antenna, 361-366 Thin-wire MOM problems, 208 Third-order intermodulation, 148 Three-dimensional FEM, 288-295 Three-dimensional TLM problems, 302-307 Three-term basis functions, 212 TLM. See Transmission-line method Topology of phase-locked loop, 160-169 Topology-related electromigration problems, 36 Total noise voltage in op-amps, 58 Trace as transmission line, 96 Trace resistance, 87-94

stripline vs. microstrip, 92 Transfer function calculation, 166, 194 Transient voltage in ADCs, 108 Transimpedance amplifier. See Current feedback

amplifier Transistors

Ebers-Moll model, 178-181 interference of RF energy, 176-181

Transmission line criterion, microstrip configuration, 3 effects in microelectronics, 345 matching to op-amps, 143-145

Transmission-line method, 290-307 PCB modeling, 342-347 inhomogeneous media, 298-302

Triangle functions, 212, 215 TTL devices and power dissipation, 21 Two-dimensional finite-element method, 281-288 Two-dimensional TLM problems

boundary conditions, 297, 301-302 scattering process, 295-297, 300-301

Two-media problem, aperture problem, 228-230 Types of magnetic compatibility problems, 194

U Ufimtsev current correction, 259-261 Unhomogeneous media in TLM, 298-302 Uniform diffraction coefficients

for convex surfaces, 256-257 for edges, 252-254 for vertices, 254-256

Uniform geometric theory of diffraction, 251-264

V Varactors, 155 VCO. See Voltage-controlled oscillators Vertex-diffracted rays, 250-251 Vias, 30-31, 50-51 VLSI circuit failure, 35-39 Voltage-controlled oscillators, 151-156

design and noise, 171-173 phase noise, 156-160

Voltage feedback amplifier current feedback amplifier vs., 60-61 noise gain, 63

Voltage feedback factor in op-amps, 56

W Wavefront propagation and lattice truncation, 272 Weighted residuals, method of, 203 Weighting function, 205

choosing, 212 White noise, 52 Wire and surface currents in electromagnetic

problems, 222-224 Wire dipole

current distribution, 360 sinusoidal current distribution, 361

Wire geometries in electromagnetic problems, 207-216

Wire mesh modeling, 313-316 Worst-case calculations, RF interference in

transistors, 181-182

Y Yee's implementation of FDTD, 268-272

Documents

Wireless Communications Design Handbook Terres- Trial Mobile Interference