VOICE PROCESSING SYSTEM KX-TVP50CE KX- · PDF filekx-tvp50ce kx-tvp52ce voice processing system tvp50ceorder no. kms0010528c8. 1 introduction 4 1.1. caution 4 1.2. safety precautions

© 2000 Kyushu Matsushita Electric Co., Ltd. Allrights reserved. Unauthorized copying anddistribution is a violation of law.

KX-TVP50CEKX-TVP52CE

VOICE PROCESSING SYSTEM

TVP50CEORDER NO. KMS0010528C8

1 INTRODUCTION 4

1.1. CAUTION 4

1.2. SAFETY PRECAUTIONS 4

1.3. INSULATION RESISTANCE TEST 4

1.4. FOR SERVICE TECHNICIANS 4

2 SPECIFICATIONS 5

3 OVER VIEW 6

3.1. SYSTEM OUTLINE 6

3.2. SYSTEM PROGRAMMING 7

3.3. SYSTEM CONFIGURATIONS 8

3.4. SYSTEM COMPONENTS 9

4 INSTALLATION 12

4.1. Installation 12

4.2. Wiring 12

4.3. MOUNTING THE VPS 13

4.4. EXTENSION CONNECTION 14

4.5. CONNECTING A DATA TERMINAL 16

4.6. CABLE CONNECTION 19

5 DISASSEMBLY INSTRUCTIONS 20

5.1. HOW TO REMOVE THE UPPER CABINET 20

5.2. HOW TO REMOVE THE MAIN BOARD, FLASH

MEMORY CARD AND POWER SUPPLY BOARD 20

6 HOW TO REPLACE THE FLAT PACKAGE IC 22

6.1. PREPARATION 22

6.2. FLAT PACKAGE IC REMOVAL PROCEDURE 22

6.3. FLAT PACKAGE IC INSTALLATION PROCEDURE 23

6.4. BRIDGE MODIFICATION PROCEDURE 23

7 FUNCTIONAL BLOCK DIAGRAM 24

7.1. BLOCK DIAGRAM 25

7.2. THE FUNCTION EACH BLOCK DIAGRAM 26

7.3. SYSTEM SPECIFICATIONS 27

7.4. CONTROL BLOCK 27

7.5. DSP BLOCK 28

7.6. INTERFACE BLOCK 28

7.7. POWER SUPPLY 28

8 CIRCUIT OPERATIONS (MAIN BOARD/FLASH MEMORY

CARD) 29

8.1. System Resert 29

8.2. CPU 31

8.3. TIMNG CHART FOR DPT TRANSMISSION 58

8.4. DPT INTERFACE CIRCUIT 60

8.5. G/A 61

8.6. APT INTERFACE CIRCUIT EXPLANATION 63

8.7. APT INTERFACE CURCUIT 64

8.8. APT INTERFACE 65

8.9. ANALOG VOICE INTERFACE CIRCUIT 66

8.10. AMPLIFIER GAIN SETTING 67

8.11. DSP 68

9 CIRCUIT OPERATIONS (POWER SUPPLY BOARD) 79

9.1. Circuit Operations 79

10 UTILITY COMMANDS 81

10.1. HELP COMMAND (HELP) 82

10.2. ONLN COMMAND (on line service control) 83

10.3. OFLN COMMAND 83

10.4. PASS COMMAND (Install password) 84

10.5. TIME COMMAND (Installation of Time/Date) 85

10.6. PSET COMMAND (Install report printing out time) 85

10.7. ELOG COMMAND (Display device error) 86

10.8. SAVE COMMAND (Program/Data Back up) 87

10.9. LOAD COMMAND (Program/Data up-date) 88

10.10. VERS COMMAND (To display each card and program

version of Flash memory card) 89

10.11. QSET COMMAND (Quick Setup) 89

10.12. MWL COMMAND (To install the number of Message

Waiting lamp retry) 89

10.13. MRL COMMAND (To install the minimum time of message

recording) 89

10.14. MPLT COMMAND (Display registered user prompt) 90

10.15. CREP COMMAND (Display custom menu information) 90

10.16. CCLR COMMAND (To clear custom menu access

number) 91

10.17. DCLR COMMAND (Initialize parameter, data of Flash

memory card) 91

10.18. DCPY COMMAND (All selector copies between Flash

Memory cards) 92

10.19. PCPY COMMAND (Program copy between Flash Memory

cards) 92

10.20. GCPY COMMAND (System guidance copy between Flash

Memory cards) 92

10.21. XCPY COMMAND (Copy from drive No.2(Flash2) to drive

No.1(Flash1)) 93

10.22. SYSD COMMAND (Install Flash2 to System Flash

Memory) 93

10.23. LMON COMMAND (Circuit condition display) 94

10.24. PUTD (DTMF Information Display) 95

10.25. EMDM COMMAND (External modem setup) 96

11 TROUBLESHOOTING GUIDE 97

11.1. The power indicator does not light up when the power

switch is turned on 98

11.2. The VPS system does not start operating 99

11.3. Blinking does not stop although the VPS system has

already operated 100

11.4. DPT integration connection between Voice Mail and TD

Series PBX fails 102

11.5. APT integration connection between Voice Mail and TA

Series PBX fails 103

11.6. Bell arrival and hooking fails 103

11.7. You are unable to hear the guidance. 104

11.8. Recording and replaying messages fails (APT, SLT

interface) 104

11.9. CPC detection does not operate 105

11.10. DTMF detection does not operate (APT, SLT interface) 105

CONTENTS Page Page

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KX-TVP50CE / KX-TVP52CE

11.11. FAX Tone detection does not operate 106

11.12. How to copy the flash memory card 106

11.13. How to connect the remote modem 107

11.14. How to do a self-diagnosis using the Manufacturing

Examination mode 108

12 CABINET AND ELECTRICAL PARTS LOCATION 112

13 EXTENTION CORD CONNECTING METHOD 113

14 ACCESSORIES AND PACKING MATERIALS 114

15 REPLACEMENT PARTS LIST (KX-TVP50CE) 115

15.1. CABINET AND ELECTRICAL PARTS 115

15.2. ACCESSORIES AND PACKING MATERIALS 115

15.3. MAIN/LED BOARD PARTS 115

15.4. FLASH MEMORY CARD PARTS 120

15.5. POWER SUPPLY BOARD PARTS 120

15.6. FIXTURES AND TOOLS 121

16 PEPLACEMENT PARTS LIST (KX-TVP52CE) 122

16.1. FLASH MEMORY CARD 122

17 FOR THE SCHEMATIC DIAGRAMS 123

17.1. MEMO 124

18 MEASURED VALUE GRAPH (MAIN BOARD) 125

18.1. MAIN BOARD 125

18.2. POWER SUPPLY BOARD 128

19 SCHEMATIC DIAGRAM 129

19.1. Main Board No. 1 129

19.2. Main Board No. 2 130


19.4. POWER SUPPLY BOARD 132

20 SCHEMATIC DIAGRAM (KX-TVP52CE) 133

21 PRINTED CIRCUIT BOARD 135

21.1. MAIN BOARD : COMPONENT VIEW 135

21.2. MAIN BOARD : BOTTOM VIEW 136


21.4. POWER BOARD 138

22 PRINTED CIRCUIT BOARD (KX-TVP52CE) 139

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1 INTRODUCTION1.1. CAUTION

Danger of explosion if battery is incorrectly replaced. Replace only with same or equivalent type recommended by themanufacturer. Discard used batteries according to the following procedure:

Disposal of lithium batteries should be performed by permitted, professional disposal firms knowledgeable in state, government,federal and local hazardous materials and hazardous waste transportation and disposal requirements. Batteries continue tohave no transportation limitations as long as they are separated to prevent short circuits and packed in strong packaging.Commercial firms that dispose of any quantity of lithium cells should have a mechanism in place to account for their ultimatedisposition. This is a good practice for all types of commercial or industrial waste.

Recommend Type Number: CR2032 MATSUSHITA

1.2. SAFETY PRECAUTIONS 1. Before servicing, unplug the power cord to prevent an electric shock.

2. When replacing parts, use only the manufacturer´s recommended components.

3. Check the condition of the power cord. Replace if wear or damage is evident.

4. After servicing, be sure to restore the lead dress, insulation barriers, insulation papers, shields, etc.

5. Before returning the serviced equipment to the customer, be sure to perform the following insulation resistance test to preventthe customer from being exposed to shock hazards.

1.3. INSULATION RESISTANCE TEST 1. Unplug the power cord and short the two prongs of the plug with a jumper wire.

2. Measure the resistance value with an ohmmeter between the jumpered AC plug and each exposed metal cabinet parts(screwheads, control shafts, handle brackets, etc.).*Note: Some exposed parts may be isolated from the chassis by design. These will read infinity.

3. If the measurement is outside the specified limits, there is a possibility of shock hazard.The equipment should be repaired and rechecked before it is returned to the customer.

1.4. FOR SERVICE TECHNICIANSICs and LSIs are vulnerable to static electricity.

When repairing, the following precautions will help prevent recurring malfunctions.

1. Cover the plastic parts boxes with aluminum foil.

2. Ground the soldering irons.

3. Use a conductive mat on the worktable.

4. Do not touch IC or LSI pins with bare fingers.

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2 SPECIFICATIONSPorts : 2 SLT extensions, APT, DPT compatibleDialing Method : Tone duration/Pulse (10/20pps)Flash time : 100/300/600/900 msec (programmable)CPC Detection : 6.5/150/300/450/600 msec (programmable)Type of line : Loop start min. Loop Current : 20 mA, min. Ringing Voltage : 40 VrmsExtension numbering : 2 to 5 digits (programmable)Pause time : 1 to 9 sec (programmable)Message Waiting Lamp : Programmable DTMF sequence, Data line of PT interfaceMain CPU : 16-bit microprocessorCapacity for Flash Memory Card : 2 hoursNumber of Mailboxes : Max. 64 (including System Manager and Message Manager mailboxes)Number of Messages : Max. 100 per mailbox (programmable)Personal Greeting Message Length : 8 to 60 sec (programmable)Message Retention Time : 1 to 30 days, or unlimited (programmable)Maximum Message Length : 1 to 6 min. (programmable)Reports : Mailbox List, Class of Service List,System Service Report, Call Account Report, Port Usage

Report,Mailbox Usage Report, FAX ReportConnections Telephone line : Modular connectors × 2

In case of inband : 2, conductor wire × 2In case of APT : 4, conductor wire with APT interface × 2In case of DPT : 4, conductor wire with DPT interface × 1

Data port : RS-232C interface portPower Source : AC 100 V - 240 V, 50 Hz / 60 HzDimensions (H × W × D): 173 × 318 × 65 mm(6-13/16” × 12-1/2” × 2-9/16”)

Weight: Approx 1.2 kg (2.7 Ib)

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3 OVER VIEWThis chapter describes the hardware overview of the Voice Processing System (VPS).

3.1. SYSTEM OUTLINEThe Panasonic Voice Processing System (VPS) is a voice prompted, menu-driven system which provides fully automated calltransfer (to an extension or mailbox), and voice message receiving and delivery service. Even first-time users can easily reachtheir desired extension or mailbox by following step-by-step voice instructions.The VPS works with a PBX as an extension. It can be expanded to handle up to two simultaneous calls and store up to fourhours of voice data.The VPS attends to incoming calls, then transfers those calls to the respective extensions. When owners of extensions cannotanswer the call, the mailboxes in the system take messages for them. Owners of the mailboxes can record personal greetingmessages with their own voice for callers who enter the mailbox to leave messages.The VPS has up to 62 personal mailboxes for subscribers and two special function mailboxes for the System Manager and

Message Manager.The VPS can be used by any caller, and by subscribers (Mailbox Owner) in your company.Even if the user is away from the office, VPS can be used with any touch tone telephone.Even callers using a rotary telephone can leave messages or be connected with the operator.

3.1.1. Automated Attendant (A.A.) Service

The automated Attendant works as a receptionist would by answering incoming calls without using human intervention.The Automated Attendant plays a list of options (calling extension, calling operator, Deparment Dialing, Dialing by Name) to acaller with a voice prompt. When an option has been selected, the Automated Attendant responds to the command by eitherrouting the caller to an extension or the operator. The Automated Attendant will even respond if the extension is busy or if thereis no answer.One option is to let the caller leave a message in a mail box.

3.1.2. Voice Mail (V.M.) Service

Voice Mail is a voice message receiving and delivery service which allows subscribers (the owner of a personal mailbox) toreceive messages in their mail box whether they are out of the office, on the line, or just unavailable to answer the call.Any caller can leave a message in a subscriber´s mailbox. The subscriber can listen, transfer, and deliver recorded messages

at any time from anywhere in the world.

3.1.3. Interview Service

You can set up a questionnaire mailbox with as many as 10 questions, and obtain specific information from customers callinginto the system. Between each recorded question, the VPS collects a reply from the caller and stores it in a mailbox.This service is ideal for gathering any data from product orders to requests for repairs.

3.1.4. Custom Service

The Custom Service capabilty optimizes the application of the VPS to meet your business needs. Your callers can access theservices or people they need by pressing a single digit on their telephone keypad. As many as two custom service scripts canbe assigned to each VPS port (Day Service and Night Service).

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3.2. SYSTEM PROGRAMMINGThis system can be programmed either by a data terminal (VT100, compatibles, or other ASCII Terminals) through the SystemAdministrator Interface or by telephone (touch tone telephone) through the System Manager mailbox.

3.2.1. Terminal Based Programming

After system installation, it is recommended that you perform "Quick Setup" first.

<Quick Setup>

Provides a fast way of setting up the VPS for basic Voice Mail or Automated Attendant service. This includes mailbox creation,incoming call service assignment for all ports, time setting and several other programming items which must be done initially tostart the VPS operation.

<PBX Integration>

The VPS is a 2 port system . Typically, each VPS port is connected to an extension port of the PBX. Between PBX´s, the VPSexchanges a request to a counterparty or status for itself mutually, then offers a quick and useful service. The VPS works wellwith all Panasonic KX-T series PBX´s and can be programmed to work with most other manufacturer´s PBX´s that fully supportsingle line telephone interfaces.However, because the VPS operation depends on the capabilities and features provided by the PBX, it´s performance will vary

when connected to different PBX´s. In system program, Integration Parameter with a PBX should be installed to achieve aquicker and useful service.

3.2.2. Telephone Based Programming

During daily operation, the person specified as the System Manager can create and/or delete mailboxes, and change Class ofService parameters.

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3.3. SYSTEM CONFIGURATIONSThe most common configuration is the VPS behind the PBX. The VPS ports are connected to PBX extension ports.

Fig.1. System Configurations

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3.4. SYSTEM COMPONENTS

3.4.1. Outside Equipment

Fig. 2. Cabinet Outside View and Equipment Location

1. Power Indicator

Indicates the VPS status. When you connect the power cable, the power indicator lights up. During this period, the VPSexecutes a self diagnostic. When the self diagnostic is successfully completed, the indicator begins a blinking sequence. Duringthis period, the VPS executes the system initialization. When the initialization is completed, the indicator lights up again, andthe VPS starts the incoming service. When the VPS detects an error in the system, the Indicator displays the type of error byusing a specific blinking sequence.

2. AC Inlet

The AC Inlet is an input connector for the AC power source. Attach an AC power cord to an AC Inlet marked "AC IN" on theVPS.

3. Case Lock Screw

The VPS has one case lock screw to open the front cover.

Fig. 3. Inside View and Components Location

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3.4.2. Inside Components

1. DIP Switch

MODE (Dip Switch) provides additional functions as follows. The status of the switch is checked only once after power-up. Theadditional functions are effective when connecting the power after switch changing.

2. EIA (RS-232C) Connector

Allows the VPS to communicate with a Data Terminal or any standard ASCII Terminal for system programming. The terminalis connected to the VPS using a RS-232C cross cable. Attach the 9 pin connector to the jack marked "RS-232C" on the VPS.

3. Ground Terminal

Ground Terminal is an earth terminal.Tie the ground cord to the Ground Terminal marked "GROUND" on the VPS.

4. TEL Jack (Port 1, 2)

These are connection ports to the PBX. KX-TVP50 has 2 ports which can be used to connect to the PBX extension lines. Threetypes of PBX integration (DPT, APT or SLT) are possible for these ports, and switching is performed by the terminal connectedto the voice mail in accordance with the PBX port specifications.

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3.4.3. Basic Components

Fig. 4. Basic Components Location

The basic Components of the VPS are Main Board, Flash Memory Card, Power Board and LED Board. (Refer to Figure 4.)

1. MAIN Board

The next 3 blocks of the main board are explained. All of these VPS functions are generalized.

Interface Block;

This constitutes the interface with PBX and has three kinds of interfaces, SLT/APT/DPT, at two ports. And this has the RS232Cinterface for connecting the PC terminal.

DSP Block;

This has the two-channel DSP. This DSP performs DTMF generation, DTMF detection, TONE detection and voicecompression/expanding.

Control Block;

This consists of CPU and the IDE interface for controlling the flash memory. CPU performs circuit control, peripheral devicecontrol and IDE interface control.

2. Flash Memory Cards

The flash memory cards are connected to the main board by CN105 and CN106. The flash memory card connected by CN105is called the master memory card. It stores the system program, system guidance and 2 hours of message recording area. Theflash memory card connected by CN106 is called the slave memory card: it can be installed as an option. By adding this option,the recording time of KX-TVP50 can be extended from 2 hours to 4 hours.

3. Power Board

Power input of AC 100 V - 240 V, 50Hz/ 60 Hz produces secondary power output of +15 V, +5.5 V or -5 V.

4. LED Board

The LED Board is connected to the Main Board via CN102 and is controlled by the Main Board.

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4 INSTALLATIONPlease read the following precautions before installing the VPS

4.1. InstallationThe VPS needs to be installed on the wall. Improper placement of the system may result in malfunction, noise, or discoloration.Avoid installing the VPS in the following places:

· in direct sunlight; in hot, cold, or humid places

· in new areas where there are thermal springs, etc. (where sulfuric gas may damage the equipment or contacts).

· where shocks or vibrations are frequent or strong.

· in dusty places or places where water or oil may come in contact with the unit.

· on or near computers, telexes, or other office equipment; near microwave ovens or air conditioners. (Ideally, the VPS shouldnot be in the room with these items and should be at least 1.8m 6 feet away from televisions.)

Do not obstruct the areas around the PBX and the VPS. Both require space above for cooling and space on the sides formaintenance and inspection.

4.2. Wiring · Do not wire the telephone cable parallel to an AC power source, computer, telex, etc. If cables are run near those wires, shield

the cables with metal tubing or use shielded cables and ground the shields.

· Use protectors if running cables on the floor. Avoid running wire under carpets.

· Avoid sharing a AC 100 V - 240 V, 50 Hz / 60 Hz AC power supply for computers, telexes, and other office equipment with theVPS. Induction noise from such equipment may interrupt the VPS operation

When making any connections or removing the cover, be sure the power cable is disconnected.

· When installing telephone wiring, basic safety precautions should always be followed to reduce the risk of fire, electric shockand injury to persons, including the following:

· Use protectors if running cables on the floor. Avoid running wire under carpets.

· Use caution when installing or modifying telephone lines.

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4.3. MOUNTING THE VPSMounting the VPS on the Wall

The wall where the VPS is to be mounted must be able to support the weight of the VPS. If screws other than the ones suppliedare used, use the same-sized diameter screws as the enclosed ones.

To Mount on a Wooden Wall:

1. Place the template on the wall to mark the 3 screw positions.

2. Install the 3 screws into the anchor plugs.

3. Hook the unit on the screw heads.

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To connect telephone lines:

4.4. EXTENSION CONNECTIONThe VPS must be connected to extension before using the system. Up to two lines can be connected to the modular jacks: oneline per jack.

1. Loosen screw on the front of the main unit, then slide the front cover in the direction of arrow A .

Note:

The screw is attached to the front cover by a spring so that it will not be lost.

2. Insert the telephone cord into port1 or port2 of VPS.

You can assign one of the incoming call services according to the port number.

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· When your PBX is a Panasonic KX-TD or KX-TA series telephone system:

To utilize DPT Voice Mail Integration, Port 1 of the VPS must be connected to the lowest number jack assigned as a VPSextension. When DPT Voice Mail Integration is activated, a single extension jack on the PBX provides two single lineinterfaces on the VPS.

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4.5. CONNECTING A DATA TERMINALFor the system administration (system setup, mailbox setup, and system diagnosis), the RS-232C terminal must be connectedto a serial interface (EIA port) of the unit. If the VT100 or VT100 compatible terminal is used, the System Administrator can setup system parameters and diagnose the system with the conversational menu-driven program. Other RS-232C terminals canbe also used.If you wish to output reports etc to a printer, it must first be connected to the system using a RS-232C cable. The wiring andparameters are the same as those for a terminal. The communication parameters of the unit have been set to the followingvalues at the factory.

RS-232C parameters

· Baud Rate: 9600 bps

· Word Bit Length: 8 bits

· Parity: None

· Stop Bit Length: 1 bit

Connecting RS-232C cable

Precaution: Before connecting the cable, make sure the disconnect the power cable on both data terminals and the VPS isOFF.

Insert the RS-232C cable into the VPS with the connector indicating the same direction.

Printer Connection

The printer may be connected to the VPS via a cable as shown in the chart. Cables must be shielded and the maximum lengthis 2 m (6.5 feet).

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The pin configuration of the EIA (RS-232C) connector is as follows.

Pin No. Signal Name Dircuit TypeEIA CCITT

3 TXD Transmitted Data BA 1032 RXD Received Data Request BB 1044 RTS To send CA 1056 DSR Ready CC 1075 SG Signal Ground Data AB 102

CF 1094 DTR Data Terminal Ready CD 108.2

(Reference)

EIA (RS-232C)

SIGNALS:

Transmitted Data (TXD)................................................................................................................................ (output)

Conveys signals from the unit to the printer (or terminal). A "Mark" condition is held unless data or BREAK signals are beingtransmitted.

Received Data (RXD)....................................................................................................................................... (input)

Conveys signals from the printer (or terminal).

Data Set Ready (DSR)....................................................................................................................................(output)

An ON condition of circuit DSR indicates the printer (or terminal) is ready. Circuit DSR ON does not indicate that communicationhas been established with the printer.

Signal Ground (SG)

Connects to the DC ground of the unit for all interface signals.

Data Terminal Ready (DTR).......................................................................................................................... (output)

This signal line is turned ON by the unit to indicate that it is ON LINE. Circuit DTR ON does not indicate that communicationhas been established with the printer (or terminal). It is switched OFF when the unit is OFF LINE.

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4.5.1. System Start-up

When you finish installing KX-TVP50, connect the power cable and start up the system.The LED turns on → blinks, and the PCterminal displays the start-up screen as follows.

Note:

1. When you implement a new flash memory card, its system software will be downloaded. So it will take 1 to 3 minutes for theLED to turn on → blink. But this is not a failure, so wait a few minutes until the start-up screen is displayed.

2. Never disconnect the power cable in the middle of the system start-up (while the start-up screen is displayed), otherwise thesystem software download and start-up program may not work properly.

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4.6. CABLE CONNECTIONBefore connecting the power cable to an AC Inlet, make sure all other connections (RS-232C data terminal with VPS, PBX withVPS, PBX with telephone lines) are secure. Use the AC Inlet dedicated to the VPS unit.

CAUTION:

Disconnecting the power cable in the middle of the operation/process of the voice mail may cause trouble. When pullingout the power cord after installation, make aure that voice mail is OFF LINE by using the OFLN command or justly pull out theTEL cable and the RS232 cable, and then pull out the power cord of the voice mail.

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5 DISASSEMBLY INSTRUCTIONS5.1. HOW TO REMOVE THE UPPER CABINET

5.2. HOW TO REMOVE THE MAIN BOARD, FLASH MEMORY CARD ANDPOWER SUPPLY BOARD

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6 HOW TO REPLACE THE FLAT PACKAGE ICIf you do not have the special tools (for example: SPOT HEATER) to remove the SPOT HEATER´S Flat IC, if you have solder(large amount), a soldering iron, and a cutter knife, you can easily remove the ICs even if there are more than 100 pins.

6.1. PREPARATION · SOLDER

Sparkle Solder 115A-1, 115B-1 OR Almit Solder KR-19, KR-19RMA

· Soldering iron

Recommended power consumption is between 30 W to 40 W.Temperature of Copper Rod 662 ± 50°F (350 ± 10°C)(An expert may handle a 60~80 W iron, but a beginner might damage the foil by overheating.)

· FluxHI115 Specific gravity 0.863(Original flux should be replaced daily.)

6.2. FLAT PACKAGE IC REMOVAL PROCEDURE 1. When all of the IC lead cannot be seen at the standard degree, fill with large quantities of solder.

Note:

If you do not fill with solder and directly cut the IC lead with the cutter, stress may build up directly in the P.C. board´spattern. And as a result 1 the P.C. board pattern may have to be removed.

2. Using a cutter, cut the lead at the source. (Cut the contents with a cutter lightly, 5 or 6 times.)

3. Remove when the solder melts. (Remove the lead at the same time.)

After removing the Flat IC and when attaching a new IC, remove any of the excess solder on the land using the soldering wire, etc.If the excess solder is not removed from the land, the IC will slip and not be attached properly.

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6.3. FLAT PACKAGE IC INSTALLATION PROCEDURE

6.4. BRIDGE MODIFICATION PROCEDURE

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7 FUNCTIONAL BLOCK DIAGRAM

24


7.1.

B

LO

CK

DIA

GR

AM


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7.2. THE FUNCTION EACH BLOCK DIAGRAM 1. RS-232C Interface

Serial communication is performed by the CPU´s communication processor using the RS-232C driver. This interface is used foreach setting of the voice mail.

2. Analog Interface

When the SLT interface or APT interface is used, the analog voice signal is the transmission/reception interface circuit with thePBX. It includes call forwarding control, CPC detection and call waiting detection functions.

3. 4-line/2-line conversion circuit

In order to construct the PBX interface, this circuit converts between the communication lines (2 lines) that perform primary linetransmission/reception, and the reception lines (4 lines). It includes a hardware echo canceller circuit utilizing phase inversion.

4. C-Tone Detection Circuit

A continuous tone detection SLIC for fax use is provided to detect input of fax communication signals.

5. CODEC

When the SLT interface or APT interface is used, the analog voice signal is converted into PCM digital data. When the DPTinterface is used, the digital serial voice signal from the PBX is returned to analog format and used for C-Tone detection.

6. KME-PBX APT Interface Driver

In order to integrate APT with the KME-PBX (TA Series), APT protocol transmission/reception is used on the H-L line. Drivercontrol is controlled by the CPU I/O port. Control of two channels, Ch1 and Ch2, is performed by the APT driver of Ch1 only.

7. KME-PBX DPT Interface Driver

In order to integrate DPT with the KME-PBX (TD Series), DPT protocol transmission/reception is used on the H-L line. This iscomprised of HDLC which performs gate array and protocol control that converts driver and voice serial data, and control datato signals in 2B + D format. HDLC performing protocol control uses a communication processor built into the CPU to do it.Control of two channels, Ch1 and Ch2, is performed by the DPT driver of Ch1 only.

8. PCM Voice Data Routing Circuit

When DPT integration, APT integration or SLT integration is performed, this circuit possesses the routing function to connectto the PCM voice route required to realize the respective functions. Control is performed by the G/A standard port.

9. Cch Interrupt Control Circuit

When DPT integration is used, this circuit functions to provide effective transmission of voice mail for received Cch datatransmitted from the PBX Dch. Cch data is transmitted as an interrupt signal to the CPU, promoting Dch transmission from voicemail to the PBX.

10. DSP

Two DSP´s produced by DSPG Corporation for recording voice conversation used. These DSP have the following functions.

· Voice data compression and expansion using True Speech format

· Auto gain control

· DTMF tranceiver

· VOX detection

· TONE detection

· I/O port

· Bus interface

11. CPU

The Motorola MC68302 CPU is used. The CPU is equipped with a communication processor to perform HDLC communicationcontrol and RS-232C communication control during DPT communication. Serial I/O, interrupt control circuit and bus interfaceare used to perform overall control of KX-TVP50.

12. External Bus Interface

Read/write timing control and latch control of bus data is performed in order to adjust the read/write timing of the 68000 SeriesCPU and the read/write timing of peripheral devices.

13. Real Time Clock

This provides time data to the CPU. It is used for time stamping of recorded message, etc.

14. IDE Interface

The IDE interface is used to control the flash memory card. It has 2 slots, one each for the master and the slave.

15. System Flash ROM

8 Mbit of flash memory is provided for the systems flash memory. The systems boot program and production test program arestored in this ROM, and as the system boots up, the required OS and application programs are downloaded to this ROM from

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the master flash memory card where they reside to enable the system to operate.

16. System RAM

1 Mbit of SRAM is installed on each of the Upper and Lower surfaces (2 Mbit). Another 2 surfaces are available for futureexpansion. This RAM is used as CPU work memory or as a voice buffer for voice data.

17. Flash Memory Card (Master)

The flash memory card is equipped with the flash memory controller and two 64 Mbit units of flash memory. The flash memorycard on the master side contains the system program, system voice guidance and 2 hours of message recording area. Thismemory card is equipped with a flash memory controller, and this controller IC is used by the IDE interface.

18. Flash Memory Card (Slave)......KX-TVP52CE

One 64 Mbit flash memory card of the same construction as the card on the master side is provided. This memory card has 2additional hours of message recording capacity, so 4 hours of messages can be recorded when this is combined with themaster card.

7.3. SYSTEM SPECIFICATIONSThe Table 3-1 shows the System Specifications.

Table 3-1. SYSTEM SPECIFICATIONS

ITEM DESCRIPTIONSCabinet Wall mounted type stand-alone styleDimension (H × W × D) 173 × 318 × 65 mm (6-13/16” × 12-1/2” × 2-9/16”)Weight 1.2 kg (2.7 Ib)Power Source AC 100 V - 240 V, 50 Hz / 60 HzVoice Storage Capacity 2 hours (option when KX-TVP52CE mounting +2=4 hours)Line CapacityLine connectorLine interface

2 ports4 pin moduler jack type connectorPort-A: APT DPT/SLT Hybrid interfacePort-B: SLT interface

Data Terminal Interface Asynchronous RS-232C Port (9 pin Dsub connector) × 1Baud Rate: 300 up to 38,400bps (programmable)

Operation Switches Mode Configuration DIP Switch × 1 (only maintainance use)LED Power Indicator (red) × 1Dialing Method Tone duration/Pulse (10/20 pps)Flash time 100/300/600/900 msec (programmable)CPC detection 65/150/300/450/600 msec (programmable)Extension numbering 2 to 5 digits (programmable)Pause time 1 to 9 sec (programmable)Message Waiting Lamp Programmable DTMF sequence, or DPT data line, or APT datalineNumber of Mailbox maximum 32Number of Message 100 per mailbox (programmable)Personal Greeting Message Length 8 to 60 sec (programmable)Message Retention Time 1 to 30 days, or unlimited (programmable)Message Length 1 to 6 min (programmable)Reports output Mailbox list, Class of Service list, System Service report, Call Account report, Flash Memory Usage

Report Port Usage report, Mailbox Usage report, FAX report

7.4. CONTROL BLOCKSpecifications of Main Board, Flash Memory and Power Card

Control Block Outline

The CPU uses a Motorola MC68302. This CPU combines a M68000 microprocessor with multiple peripheral communicationdevices. The control block contains a communication controller with 3 independent systems, and a total of 28 parallel I/O. Themain CPU performs system overall control, control of the RS-232C, timer, interrupt controller and DPT Dch, DSP control andtrunk control.The system memory consists of 1 Mbyte (IC102) of flash memory and 256 Kbyte of S-RAM (IC103). The system flash ROMincludes the system initialization module, diagnostic module, and the system program boot module from the flash memory card.The RS-232C interface is connected to the CPU (IC101) serial interface via the driver IC (IC129). The CPU has a 7 bit interruptcontrol bit, used for APT communication interrupt, DPT communication interrupt, DSP interrupt and flash memory card interrupt.There is a separate IDE interface each for the master and the slave. The IDE interface on the master side is equipped with asystem flash memory card, and the IDE interface on the slave side can be equipped with the KX-TVP52CE. The master flashmemory card includes the system program, system guidance, user prompt and 2 hours of message recording storage area. Theflash memory card on the slave side only contains 4 hours of message recording storage area. Control of the flash memory cardis performed by the specialized flash memory controller, and an ECC function in BHC format is provided.

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Control Block

BLOCK SPECIFICATION DESCRIPTIONCPU MC68302 Running Frequency 16.384MHz (IC101)RAM 256 Kbyte 1Mbit Static RAM × 2 (IC103L, 103U)ROM 1 Mbyte 8 Mbit Flash Memory (IC102)RS232C I/F 1 Channel Asynchronous (300-38400bps)Interrupt INPUT 7 bits Hardware interrupt request (IC101)Parallel I/O 24 bits Around device control (IC101)HDLC interface 1 Channel DPT protocol control (IC101)IDE interface Master, Slave Flash memory card controlMaster Flash Memory Card 16 Mbyte 64 Mbit × 2 NAND Flash Memory (IC301, IC302)Slave Flash Memory Card 8 Mbyte 64 Mbit × 1 NAND Flash Memory (IC301)Flash Memory Controller ML54053 IDE, PCMCIA interface selectableReal Time Clock 1 Channel Battery Back up

7.5. DSP BLOCKDSP Block Outline

The DSP block has mounted on it 2 channels of the D6571 speech processor IC made by The DSPG company. Voicecompression uses the 7.2 Kbps TRUESPEECH compression format, providing DTMF generation and detection, AGC,programmable sensitivity adjustment (DTMF, CPT, VOX), digital volume control µ side/A side switching, and I/O.

DSP Block

BLOCK SPECIFICATION DESCRIPTIONDSPDSP parallel I/O portDSP PCM interfaceDSP Host interface

D6571F × 26 bits × 21ch × 21ch × 2

Running Frequency 45.056MHz (IC101)Analog interface controlCodec, G/A PCM interfaceCPU interface

7.6. INTERFACE BLOCKInterface Block Outline

The KX-TVP50 has 3 interfaces in 2 channels: the SLT (analog DTMF) interface as the PBX interface, the APT interface forvoice mail integration with the KME-PBX TA series, and the DPT interface for voice mail integration with the KME-PBX TDseries. These interfaces can be switched from the terminal.

Interface Block

BLOCK SPECIFICATION DESCRIPTIONAnalog T-R interfaceAPT Interface DriverDPT Interface DriverPCM codec

2 port1 channel1 channelMC145503 × 2

Bell, CPC detect, Hook pulse controlAPT protocol controlDPT protocol controlA/D D/A Convert

7.7. POWER SUPPLYPower Block Outline

The power unit supplies 3 types of power system to the main board. +15 V supplies power to the analog interface. It has anovercurrent prevention circuit. For circuits on the main board that require +12 V, +15 V on the main board is converted to +12V and then supplied. +5 V is mainly used for supplying power to the digital circuits, having the largest current capacity of thepower systems. +5 V has an overvoltage prevention circuit and an overcurrent prevention circuit. The flash memory cardrequires +3.3 V, so +5 V is converted by the main board. -5 V is supplied only to the DPT interface driver. It has an overcurrentprevention circuit.

Power Supply

BLOCK SPECIFICATION DESCRIPTION+15V 50 mA Power supply for analog interface+5.5V 900 mA Power supply for Digital circuit-5V 50 mA Power supply for DPT interface

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8 CIRCUIT OPERATIONS (MAIN BOARD/FLASH MEMORYCARD)

8.1. System Resert

System reset uses the power monitor IC to monitor the +5 V power supply to the main board. If the supply voltage reaches 4.75V or above, after a time lag of approximately 180 mS due to the time constant of the R.C., the reset signal is changed from L ->H (RSTn). This signal is received by IC136, then input to the CPU (IC101), flash memory (IC102), RTC (IC128), the flash memorycard (master) and the flash memory card (slave). To prevent current intake, IC136 uses the CMOS IC. Simultaneously, the resetsignal (RST) inverted at IC109 is input to DSP IC120 (ACH), DSP IC120 (BCH), and gate array IC125.

KX-TVP50 Reset IC Expanded Time Calculation

Expanded time (tPLH) = CI × RL × (In (Vcc ÷ (Vcc - (Vs cpu + 0.2)))) + 0.04(ms)CL: µFRL: kΩVoltage: VVs cpu: CPU reset threshold voltage

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Measured Value Graph 1

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8.2. CPU

8.2.1. CPU Clock

The CPU clock is generated by X101. The clock operates at a frequency of 16.384 MHz. The clock signal is input to (18) of the CPU(IC101) via the oscillator circuit. The external clock ClKO operates 2~11 nS later than the input clock and outputs the same clockfrequency. The external clock is supplied to the external bus interface control circuit.

Measured Value Graph (5) CCLK

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8.2.2. CPU Read Cycle

In the read cycle, the valid address (A23-A0) from IC101 and R/W Read signal are output during processor cycle state S0. Thenin state S2, AS (address strobe), LDS, UDS and CS are asserted. Assertion of these signals causes the valid data (D15-D0)output from the peripheral devices to be taken up by IC101 at the fall of S6.

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8.2.3. CPU Write Cycle

In the write cycle, the valid address (A23-A0) from IC101 is output during processor cycle state S0. Then in state S2, the R/W Writesignal, AS and CS are asserted. The peripheral devices receiving assertion of these signals prepare for data writing and in the nextstate S3, valid data (D15-D0) is output from IC101 CPU. The assertion of LDS and UDS at the rising of state S3 is received andthe peripheral devices write the data.

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8.2.4. System Flash ROM (IC102)

Stored in the system flash ROM is the system initialization program, system software and application loading program. Whenthe system is started up using the application loading program, the application program is loaded from the flash memory card.The CPU (IC101) selects and uses CS0 for the system flash ROM (IC102), then performs access after a wait of 2 CPU cycles.

· Measurement Diagram System Flash ROM Read

· Measurement Diagram System Flash ROM Write

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· Circuit Diagram System Flash ROM

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8.2.5. System S-RAM (IC103L, IC103U)

The application program from the system flash memory is loaded into the system S-RAM (IC103L, IC103U). Then it is executedas an execution program on the system S-RAM. The system S-RAM is equipped with two S-RAM of 1 Mbit each, with spacefor future expansion by installing another 2 units of IC104L and IC104U. The system S-RAM is also used as a voice data bufferwhen voice message recordings are played back. The CPU (IC101) selects and uses CS1 for the system F-ROM (IC102), thenperforms access after a wait of 0 CPU cycles. Switching between the upper bank S-RAM and lower bank S-RAM is performedusing the address decoder.

· Measurement Diagram System S-RAM Read

· Measurement Diagram System S-RAM Write

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· Circuit Diagram System S-RAM

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8.2.6. External Bus Interface

The external bus interface contains 2 circuits, a CPU R/W signal shaping circuit and a bus latch circuit. When the R/W signalof MC68302 is directly connected to the external peripheral devices as a base signal, it is possible that the R/W control timingconstraints may be violated for the respective peripheral devices. Accordingly, this R/W signal shaping circuit waits for 4 cyclesto access the external peripheral devices. The R/W signal length from the CPU is lengthened, so the DTACK signal from theCPU alters the R/W signal so that it rises earlier than the CS and Ds signal. As a result, the constraint conditions required foraccess to the external peripheral devices may be fulfilled. As a result of this R/W signal shaping, it is possible that output of validdata from peripheral devices does not match the timing of CPU intake. To overcome this, a circuit has been added which firstlatches on to valid data output from the peripheral devices and retains it until taken in by the CPU. The peripheral devicesconnected to this external bus interface are the IDE interface, RTC, DSP and gate array.

· External Bus Interface Circuit Diagram

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8.2.7. IDE Interface

This system has 2 IDE interfaces, one each for the master and slave.This interface is equipped with a flash memory card. Theflash memory card selects the master card or slave card in accordance with the location of the connector. The card connectedto CN105 is the master card, and the slave card is connected to CN106. Switching between the master and slave is performedby the HSEL signal. By setting the HOEN signal to GND, the flash memory controller interface is selected to the IDE interface.The HREG, HWEN, HINPACK, HIO1S16 and HWAIT signals are necessary signals when the memory card is selected to thePCMCIA interface: these are not used for the IDE interface. The CS signal to the flash memory controller consists of hcs1 andhcs2 generated by CS2 of the CPU (IC101). REQ is the interrupt signal from the flash memory controller. This interrupt signalis positioned at the lowest interrupt level of the CPU.

· IDE Interface (CN105, CN106 pin assignment)

Pin No Signal Name Description1, 2, 47, 48, 49, 50 DG Digital GND3, 4 +5V +5V11, 12, 13, 14, 15, 16, 17, 18,19, 20, 21, 22, 23, 24, 25, 26

MD15 - MD0 16 bit data lineMD15 - MD0

29, 30, 31 MA3, MA2, MA1 IDE address MA3, MA2, MA141, 42, 43, 44, 45, 32, 33, 34 MA11, MA10, MA9, MA8,

MA7, MA6, MA5, MA4PCMCI address (Not required for IDE.)DG

35 CE1 Chip select 136 CE2 Chip select 237 IORD Read signal38 IOWR Write signal39 REQ Controller request signal40 RESET Reset signal5 HWEN Write enable signal (not used) [+5V]6 HREG Attribute memory select (not used)7 HSEL Master (GND)/slave (+5 V) selection signal46 HOEN Output enable signal (not used) , IDE selection signal [GND]8 HINPACK PCMCI signal (not used for IDE)9 ,HIO1S1610 ,HWAIT27 PDIAG PDIAG is the Pass Diagnostic signal in Master/Slave handshake protocol28 DASP Disk Active/Slave Present signal in theMaster/Slave handshake protocol

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· Flash Memory Interface Circuit Diagram

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· Flash Memory Interface Read Cycle Diagram

· Flash Memory Interface Read Cycle Measurement Diagram

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· Flash Memory Interface Write Cycle Diagram

· Flash Memory Interface Write Cycle Measurement Diagram

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8.2.8. System Port

The system I/O port is supplied by the IC101 (CPU) parallel I/O port, the parallel I/O port of IC120A and IC120B, and the parallelI/O port of IC125. The details of these ports are shown in the respective diagrams.The rotary switch for changing modes in theprevious model has been changed to a 4 bit DIP switch. This makes it possible to switch between 16 modes.The master card includes the system application program, system guidance, user guidance storage area and 2 hours ofmessage recording storage area. The slave card contains an additional 4 hours of message recording storage area. A total of6 hours of message recording storage area can be used.

· System port DSP

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· System port CPU

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· System port G/A

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System port CPU I/O list (IC101 I/O list)

Pin No Pin Name I/O Kind Signal DescriptionChip Select Signal 131 CS0N/IOUT2 O CS Chip Select Main ROM Chip select (flash memory )

132 CS1N O CS Chip Select SRAM Chip select135 CS3N O CS Chip Select Flash memory controller chip select136 CS4N O CS Chip Select DSP Chip select (for ch1 and ch2)

PA I/O 70 RXD2/PA0 I S I/F Serial Interface RS232c RXD69 TXD2/PA1 O S I/F Serial Interface RS232c TXD68 RCLK2/PA2 I I/O L: BELL detection ch1 SLT, APT I/F bell detection input ch167 TCLK2/PA3 I I/O L: BELL detection ch2 SLT, APT I/F bell detection input ch264 CTS2N/PA4 O I/O L: DTR condition RS232c DTR (Data Terminal Ready)63 RTS2N/PA5 I I/O L: DSR condition RS232c DSR (Data Send Ready)62 CD2N/PA6 O I/O Hook control ch1 SLT, APT I/F Hook control ch161 SDS2/BRG2/P

A7O I/O Hook control ch2 SLT, APT I/F Hook control ch2

59 RXD3/PA8 I I/O L:Busy, H: Ready Main ROM RY/BYN signal input or WAITsignal of voice memory PCMCIA

58 TXD3/PA9 O I/O Not Used Master/slave mutual communicationinformation

57 RCLK3/PA10 O I/O Not Used Flash memory controller reset control56 TCLK3/PA11 O O DPT Cch interrupt clear signal Clear signal of DPT Cch interrupt latch53 BRG3/PA12 I I/O L: CPC detection ch1 SLT, APT I/F CPC detection ch152 DREQN/PA13 I I/O L: CPC detection ch2 SLT, APT I/F CPC detection ch251 DACKN/PA14 I I/O L: C-Tone detection ch1 SLT, APT I/F C- Tone detection ch150 DONEN/PA15 I I/O L: C -Tone detection ch2 SLT, APT I/F C- Tone detection ch2

PB I/O 9 IACK7/PB0 O I/O H: active Status data signal output of APT I/F-ch18 IACK6/PB1 I I/O L: active Status data signal input of APT I/F-ch17 IACK1/PB2 O I/O L: active Status data clear signal output of APT I/F-ch16 TIN1/PB3 O I/O H: active Status data signal output of APT I/F-ch24 TOUT1/PB4 I I/O L: active Status data signal input of APT I/F-ch23 TIN2/PB5 O I/O L: active Status data clear signal output of APT I/F-ch22 TOUT2/PB6 O I/O L: LED OFF, H: LED ON Power LED control signal

143 WDOG/PB7 O WDG L: Total System Reset Boot Watch dog timerPB INT 142 PB8 I INT OP2 = L: APT ch2 data interrupt

(Active low edge interrupt)APT ch2 data interrupt

141 PB9 I INT DSP ch2 interrupt Interrupt from DSP ch2

140 PB10 I INT DSP ch1 interrupt Interrupt from DSP ch1139 PB11 I INT OP2 = L: APT ch1 data interrupt

(Active low edge interrupt)Interrupt from APT ch1 data

Interrupt 23 IPL0N/IRQ1N I INT Interrupt from flash memorycontroller

Interrupt from flash memory controller

24 IPL1N/IRQ6N I INT DPT Cch interrupt DPT TX request interrupt25 IPL2N/IRQ7N Not used To +5V

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System port DSP (IC120A, IC120B parallel I/O list)

DSP ch1 GPO 0 L CODEC Ch1 AH CODEC Ch1 µ

GPO 1 L CODEC Ch1 Power DownH CODEC Ch1 Power ON

GPO 2 Not usedGPO 3 Not usedGPO 4 Not usedGPO 5 Not used

DSP ch2 GPO 0 L CODEC Ch2 AH CODEC Ch2 µ

GPO 1 L CODEC Ch2 Power DownH CODEC Ch2 Power ON

GPO 2 Not usedGPO 3 Not usedGPO 4 Not usedGPO 5 Not used

System port G/A (IC125 parallel I/O list)

General purpuse I/O for G/A OP0 L Ch 1 Shunt circuit OFFH Ch 1 Shunt circuit ON

OP1 L Ch 2 Shunt circuit OFFH Ch 2 Shunt circuit ON

OP2 L High way o interrupt control APT SLT mode ON DPT mode OFFH High way o interrupt control APT SLT mode OFF DPT mode ON

OP3 L Not usedH Not used

IP0 L Mode selection switch bit 0IP1 L Mode selection switch bit 1IP2 L Mode selection switch bit 2IP3 L Mode selection switch bit 3

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8.2.9. RS-232C interface

The RS-232C interface is provided by SIO (Serial Input Output Controller) built-in the IC101.

1. Data Format

When a data character to be transmitted is placed in the SIO, the serial interface automatically adds one start bit before the databits (lower order bits are output first) and the specified number of stop bits after the data bits. When parity (even, odd) isspecified in the mode register, a parity bit is inserted before the stop bits.

Fig. 1 Data Frame

2. Data Transmission

The Microprocessor checks the DSR (IC101 - 63): Data Set Ready is low, i.e. terminal side´s preparation for receiving datafinishes, then starts transmission. After transmitting the start bit, the transmit controller automatically appends a parity bit andstop bits to the data character of the specified length and shifts these out to the TxD line. When the next data character hasbeen written to the transmit data buffer, transmission continues with the start bit of the next data character following the stopbit of the current data.

Fig. 2 Switchover Timing for Transmit Data Bits

3. Data Reception

The RxD line is high when no data is in it (mark status). The beginning of a start bit is detected when the input goes low.For receiving, the first low sampled RxD is detected and, if the sampled data are low for four internal CLKs, this low level isconsidered to be a valid start bit. The center point of the following data bits is then determined and each data bit is sampled onthe TCLK falling edge.

Fig. 3 Switchover Timing for Receive Data Bits

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4. RS-232C Tranceiver (IC129)

The IC129 is a tranceiver IC only for RS-232C. IC129 possesses a built-in DC/DC Converter and generates 10V needed for theRS-232C interface. Each terminal voltage of the DC/DC convertor block is in Figure 4-6.

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8.2.10. Real Time Clock

Fig. 4 Real Time Clock

The Real Time Clock is provided by IC128. IC128 is a Real Time Clock IC with an eternity calender to be able to read and writefrom seconds. To interface with the Microprocessor four data buses=(LD<3-0>), four address buses=(LA<4-1>), two controlbuses (LIORN, LIOWN) and two chip select (RTCSN, MRSTN) are needed for set the time/modification/read out.

1. Microprocessor Read Cycle

Read timing of time data from IC308 by Microprocessor is shown in timing 4-12.

Fig. 5 Real Time Clock Read by Microprocessor

The Microprocessor (IC101) outputs valid Address to LA(4-1) in S1 state. Chip select Controller (IC116) asserts RTCSN in low.System Controller asserts LIORN to low in S2 state. To Respond to low assertion of LIORN, the IC128 outputs the internalresistor corresponding with LA(4-1). At that time to LD(3-0) the Microprocessor takes in effective data on LD(3-0) in the fallingedge of S6 state.

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Measurement Diagram

2. Microprocessor Write Cycle

Time data´s wire timing to IC128 by Microprocessor is shown in Timing 4 - 13.

Real Time Clock Write Cycle by Microprocessor

The Microprocessor (IC101) outputs Valid Address to LA (4-1) in S1 State. Chip select Controller (IC116) asserts RTCSN inlow. The Microprocessor outputs Valid Write Data to LD (3-0) in S3 state. System Controller asserts in low in time from the risingedge of S4 state to the rising edge of S6 state. IC 128 takes the effective data on LD (3-0) in the rising edge of LIOWN.

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Measurement Diagram

3. Battery Back Up Interface

IC128 possesses two motion conditions of operation mode and standby mode. Operation mode is guaranteed the interface withMicroprocessor and is the condition to be able to setting time/modification/read and write.If Provided more than 4/5 VDD voltage is relayed to the CS1 terminal (20 pin), it becomes the operation mode. If less than 1/5VDD voltage is relayed to the CS1 terminal (20 pin), it becomes the stand-by mode. By IC308 checking time function inside ICworks but the interface with Microprocessor is not guaranteed. In this mode the consumption of the current decreases. In orderto switch over these two modes (operation mode and stand-by mode), The MRSTN signal is connected to the IC128 CS1terminal.

Battery Backup

When Power goes down, MRSTN signal changes the level lower than 2/5 VBB before VBB reaches at 4V. When Power goes up,MRSTN signal changes the level higher than 4/5 VBB after VBB reaches at 4V. With this MRSTN signal, a certain switch over(operation mode and stand-by mode) is guaranteed. In order to guarantee the checking time function of IC128 in stand-bymode, more than 2V voltage should be added to VBB.This guaranteed voltage is supplied by the lithium battery.

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8.2.11. DPT Protocol Controller

When Panasonic KX-TD series PBX and VPS are connected, VPS adopts a Data Format and communication protocol based onX.25 (CCITT) level 2 in order to exchange its own status and command parties between the VPS and PBX mutually. This datacommunication is provided by communication processor IC101.The DPT protocol Controller has two ports. The serial port transmits and receives formatted data packets and the parallel portprovides a Microprocessor interface for access to various registers in the Protocol Controller.

8.2.12. DPT digital interface

DPT digital interface is provided with IC101. DPT interface built-in IC101 extracts effective data (2B + D) from a receivingDPTdata stream, transfers D channel receiving data to voice port, and B channel receiving data (PCM Voice Data) to DSP.Sending out DPT data stream formed with D channel sending out data received from Voice Port and B channel sending out datareceived from DSP, is output to the COL block. DPT interface is a digital interface, line bit rate : 512kBPS´s, 2 line time sharedata format. Its communication format is 2B+D (B:64kBPS, D:16kBPS) and executes ping-pong communication every 8kHz(125us).

Data format B channel is 64kBPS u/A PCM format and D channel is 16kBPS HDLC format.

DPT Data Transfer

Bit allotment of the DPT frame is described below. S(1-5) is a zero pattern of 5 bit and is used as hardware to synchronizereceiving and sending data with PLL.MA (1-3). PLL.MA (1-3) is a 3 bit zero pattern data against AM1 symbolization and is usedto detect the head of effective data. HK sends out an installed value inside the HK port. D(0-1) is 2 bit/frame HDLC datachannel. B1 (7-0 ), B2 (7-0) are received and sent out in an 8 bit PCM data by MSB first individually.

DPT Frame Format

The serial port handles bit oriented protocol structure and formats the data as per the packet switching protocol defined in theX.25 (level 2) recommendations of the CCITT. It transmits and receives the packeted data (information or control)serially asshown in Figure 1.

FLAG DATA FIELD FCS FLAG1BYTE N Byte 2) 2 Byte 1 Byte

Fig. 1 DPT Data Packet Format

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DPT Data Packet Format

Flag:

The flag is a unique pattern of 8 bits (01111110) which defines the frame boundary. The transmit section generates the flagsand automatically appends them to the frame to be transmitted. The receive section searches the incoming packets for flagson a bit-by-bit basis and establishes frame synchronization. The flags are used only to identify and synchronize the receivedframe.

Data:

The data field refers to the Address, Control and Information fields defined in the CCITT recommendations. A valid frameshould have a data field of at least 16 bits.

Frame Check Sequence (FCS):

The 16 bits following the data field are the frame check sequence bits. The generator polynomial is:G(x) = x16 + x12 + x5 + 1The transmitter calculates the FCS on all bits of the data field and transmits after the data field and before the end flag. The

receiver performs a similar computation on all bits of the received data and FCS fields. The result is compared with FOB8Hex.If it matches, the received data is assumed to be error free.

Zero Insertion and Deletion:

The Protocol Controller, while sending either data or the 16 bits FCS, checks the transmission on a bit-by-bit basis and insertsa ZERO after every sequence of five contiguous ONEs (including the last five bits of FCS). This ensures that the flag sequenceis not simulated. Similarly, the receiver examines the incoming frame content and discards any ZERO directly following the fivecontinuous ONEs.In the serial port, the formatted data packets are shifted in/out serially at a rate equal to the clock frequency on 2MHz. The

LDVD output is transmitted on the rising edge and the receiver samples the LUVD input on the falling edge of the clock. TheCENN controls have effect only after the current bit in the packet is transmitted/received.

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DPT Interface System Diagram

8.2.13. DPT Interface Operation

The DPT interface uses the H-L lines to transmit and receive the 2B+D signals compliant with the CCITX.25 protocol, i.e. thevoice data (2B) and control data (D) from 2 lines, to and from the KME TD Series PBX. The H-L signal isolated by thetransformer is separated into transmission and reception signals, then input to gate array IC125. This gate array separates theCCITX.25 protocol-compliant data into 4 serial signal channels: Cch, Dch, B1ch, and B2ch. When transmission is performed,protocol processing such as 0-insertion is performed. Cch indicates transmission start from the PBX, and reception of Cch bythe CPU as an interrupt signal initiates the communication controller of the CPU, and transmission start to the PBX occurs. Dchis for transmission and reception of PBX voice mail control data. B1 channel is for Ch1 and B2 channel is for Ch2 voice serialdata, input directly from the gate array to the DSP.

8.2.14. Gate Array Function

The gate array that controls the DPT communication is configured as follows.

8.2.14.1. Function Block Diagram

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8.2.14.2. Outline of Functions

1. DPT Layer-1 Interface

512k BPS Ping-Pong transfer (AMI encoder) interface (2B+D+C)

Selection of reception block by Digital PLL

Transmission pulse width and reception edge position settings are programmable

3 types of interrupt cause (frame error, parity error, 125 µS cycle interrupt)

Generation of 2 KHz (Duty 25% ON, 75%OFF) for photo interrupter

2. 2 MHz Synchronization Serial Interface

B Channel:

64k BPS x 2 channels (Can select CODEC direct interface or data communication interface.)

D Channel:

16k BPS x 1 channel (Can select to use internal HDLC or external HDLC.)

C Channel:

8k BPS x 1 channel (Can select to use internal register route or external port.)

B Channel Serial Loop Back Function

2 MHz clock output mode specification (Can select constant output or output only for valid data.)

Four Channel (C+D+B1+B2) Pulse Output (Active HI)

3. DR[1:0], DX[1:0], CK512K

This is the DPT Layer-1 Interface. DR[1:0] is reception input, DX[1:0] is transmission output. Layer 1 is the transfer means forthe AMI-encoded Ping-Pong format. It receives the "SYNC/MAM/C/D/B1/B2/P" data in the first half at 125 µs/frame, thentransmits "SYNC/MAM/C/D/B1/B2/P" one bit-time after receiving the P data. One bit-time is 512 KHz.After P data transmission,there is an idle period of 7 bit-time.

AMI encoding is performed based on the rules shown at the left. 1 bit data is converted into 2 bit AMI digital code with 3 valueson line (+5 V, 0 V, -5 V). For "0", the AMI encode value has two values, 2´b01 or 2´b10, so in order to encode two "0" insuccession, the previous encode value must be inverted for the next value.

Example:

0-0-0-0 → 2´b01-2´b10-2´b01-2´b100-1-0-1 → 2´b01-2´b11-2´b10-2´b11

Each field is as follows.

SYNC: This is a 5 bit continuous "00000" pattern, used in reception clock extraction by PLL.

MAM: This is a 3 bit "000" pattern (2´b01-2´b01-2´b10) contravening the AMI encoding rules, used for header detection of

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the reception frame.

C/D: This is valid data of the C channel (1 bit) and D channel (2 bits).

B1/B2: B1/B2 is valid data of two B channels (each 8 bits). The TD Series PBX inverts the polarity of the DPT I/O B1/B2channel data, so the Layer 1 transmission/reception part also inverts the polarity of the B1/B2 channel data.

P: This is parity data. This parity overlaps the bits to maintain direct current balance.

4. SR0, SR1, SX0, CK2M, EP3, EP2, EP1, EP0

This is a 2 MBPS interface. SR[1:0] is the input stream of data transmitted to DPT Layer 1, and SX0 is the output stream of datareceived from Layer 1. These are synchronized with CK2M (basic 2.048 MHz TX/RX clock) output. The CK2M can be set to thepower saving mode which is active only when valid data is output, or the constant output mode.EP[0:3] is a TX/RX enable pulse output for C/D/B1/B2 data. The output timing of EP[2:3] for the B channel has 2 modes, theCODEC direct mode and the DATA communication mode. EP[2:3] is changed by the rising edge of CK2M in the CODEC mode,and in the DATA mode it changes 1/4 clock earlier (intermediate between the CK2M falling edge and rising edge). The EP cycleis 125 µsec. The device enabled at EP2(B1) is connected to SR1, and the device enabled at EP3(B2) is connected to SR0. SX0is common.

8.3. TIMNG CHART FOR DPT TRANSMISSION

Timing Chart for DPT Transmission

IC125 (GATE ARRAY) DPT Interface

DPT Layer 1 interface. DR[1: 0] is receiving input and DX [1: 0] is transmitting output.Layer 1 is the transmission method of Ping-Pong type which is AMI encoded. “SYNC/MAMC/D/B1/B2/P” data is received in the first

58


half at 125 us/frame. After 1 bit time has passed since receiving P data, “SYNC/MAM/C/D/B1/B2/P” is transmitted. 1bit time is 512kHz. 7-bit time idle term comes after receiving P data.

DPT Frame timing

Measurement Diagram

Measurement Diagram

59


8.4. DPT INTERFACE CIRCUIT

KX

-TV

P50

CE

/K

X-T

VP

52C

E

60

8.5. G/AIC125 is a KME original gate array. In order to perform DPT communication with the PBX made by the KME company, this gatearray is equipped with a DPT interface function in order to perform DPT communication with the PBX made by the KMEcompany, a clock supply circuit that generates each channel pulse for base clock 2 MHz, Cch, Dch, B1ch and B2ch which areinput to the voice signal control system, and the gate control circuit for switching the through pass of the voice signal systemin response to the interface with the PBX.

61


Measured G/A READ

Measured G/A WRITE

62


8.6. APT INTERFACE CIRCUIT EXPLANATIONThe APT interface uses 4 lines, H-L and T-R, for efficient connection with the analog PBX (TA series). The voice signal andDTMF signal use T-R for transmission/reception using analog format. H-L is used for voice mail, and transmission/reception ofPBX status information. The PBX connection protocol for H-L signals is original to KME, using CPU parallel I/O. H-Lcommunication for KX-TA308/KX-TA616 and KX-TVP50 provides data communication during 4 mS per 1 channel in one shotper 64 mS. During this period of 4 mS, 19 pulse signals are output from the voice mail to the PBX, including the start bit, data,parity, and stop bit. In contrast, the PBX returns 44 pulses, including the start bit, data, parity, and stop bit, thus establishingtransmission and reception.

Circuit Diagram of APT Interface

63


8.7. APT INTERFACE CURCUIT

KX

-TV

P50

CE

/K

X-T

VP

52C

E

64

8.8. APT INTERFACEPhysical interface:

H-L lines (2 lines), analog voice T-R (2 lines)

Logical interface:

HOST-VM 44 bit serial communication (status information, TONE, etc.)

VM-HOST 16 bit serial communication (status information, machine model code, etc.)

Transmission rate: 32 µS/bit

H-L timing chart

65


8.9. ANALOG VOICE INTERFACE CIRCUITAnalog Voice Interface Circuit Diagram

KX

-TV

P50

CE

/K

X-T

VP

52C

E

66

8.10. AMPLIFIER GAIN SETTINGAmplifier Gain Setting

The gain settings for the analog voice interface are shown below. The input side passes through the speech transformer, andafter echo cancel occurs at the balance network and differential amp, the signal passes through a one-step amp and is inputto the CODEC. After the output is amplified at a one-step amp, it is output to the line interface.

Line Interface

The line interface is used as the voice recording playback interface when APT integration or SLT integration is used. Thesignal input from T-R passes through the surge absorber, Hook control circuit and the speech transformer, then is dividedinto the input and output systems at the 2 line-4 line conversion circuit before being connected to the voice CODEC.

67


8.11. DSPDSP

The HOST communication port is a 16-bit bi-directional register.The D6571F will access this register internally by one 16-bit wide access. The HOST accesses this register via the 8-bit bus intwo accesses: first low byte then high byte. After the HOST writes a command to the High byte of this register the D6571Faccepts this command.When the D6571F writes a status word to the communication register it sets the ACK pin low which is connected to the OSTfor indication. The HOST can use this pin as an interrupt or poll this signal periodically. When the HOST reads the high byteof this register the DSP sets the ACK bit high. The choice of high/low byte for the HOST will be made by the HI/LO pin. TheHOST should read the low byte of the status word first, then the high byte.

68


69


DSP Low Read

DSP High Read

70


DSP Low Write

DSP High Write

8.11.1. DSP Adjustment Parameters

The DSP used in this voice mail possesses an auto gain control function, DTMF generator, DTMF receiver, call progress tonedetection, Vox detection circuit, and a beep generation function. The output level and detection sensitivity of these functions canbe adjusted using the parameter settings.

DSP Adjustment Parameter Details

1. DTMF Output Level [0x06]: = 0x

2. Beep Output Level [0x0B]: = 0x

3. DTMF Detection Sensitivity [0x0A]: = 0x

4. Vox Detection Sensitivity [0x02]: = 0x

5. CPT Detection Sensitivity [0x06]: = 0x

71


· DTMF Generator Output Level

The DTMF output level can be changed using the parameter settings.

1: DTMF Output Level [0x06]: = 0x

· Beep Output Level

The beep output level is not used.

2: Beep Output Level [0x0B]: = 0x

· DTMF Detection Sensitivity Adjustment Parameter

The DTMF detection sensitivity can be adjusted.

3: DTMF Detection Sensitivity [0x0A]: = 0x

· Vox Sensitivity Adjustment Parameter

Adjusts the silence detection level sensitivity.

4: Vox Detection Sensitivity [0x02]: = 0x

· Call Progress Tone Detection Sensitivity

Adjusts the call progress tone detection sensitivity.

5: CPT Detection Sensitivity [0x06]: = 0x

72


8.11.2. DSP Control

This unit uses a recording playback IC (D6571F) for the voice mail telephone produced by the DSPG company. It performsvoice data compression and expansion, generation and reception of DTMF signals, AGC, VOX detection , CPT detection, andvolume control. In order to provide 2-channel real time operation, memory management of voice data from the DSP isperformed by the HOST CPU.

8.11.2.1. Host Interface

The HOST CPU port of the DSP is a 16 bit bi-directional communication register. Although the DSP IC accesses this registerinternally by 16-bit wide access, the HOST CPU accesses this register via the 8 bit bus in two accesses, the low byte first, thenthe high byte. After the HOST writes a command to this high byte, the DSP IC accepts the command. After the DSP IC writesa status word to the communication register, the ACK pin is set low. When the HOST CPU has read the high byte of thisregister, the DSP sets the ACK bit high. Selection of the high/low byte for the HOST is made by the HI/LO pin. The HOST CPUfirst reads the low byte of the status word, then the high byte. Event generation from the DSP IC generates ACKn signals to theHOST CPU, and the HOST CPU inputs this signal as a Level 4 interrupt signal. The interrupt priority order is highest startingwith Ch1, then Ch2.

DSP HOST Interface Conceptual Figre

73


8.11.3. Voice Highway Route Control

When DPT

The voice mail includes 3 types of PBX interface: DPT integration, APT integration and SLT integration. Each type of integrationcan be switched using the externally connected PC, and accompanying the switch, the route of the voice serial data (voicehighway), and the route of the interrupt signal to the CPU are switched to the appropriate route. This route switching isillustrated below.

Voice highway control conceptual figure

74


Voice highway control conceptual figure

When APT/SLT

75


8.11.4. CPC Detector

Fig. 4-31. CPC Detector

This logic detects temporary disconnection of the DC loop current on the telephone line during off hook conditions. The DC loopcurrent flows through T → D281 → Q282 → Q281 → R283 → PC281 - 1 → PC281 - 2 → D281 → R. When the DC loop is ON,photocoupler PC281 pin 4 - 3 is ON and CDET signal drives to low. When the DC loop is OFF, photocoupler PC281 pin 4 - 3is OFF and CDET signal drives to high.

Timing 4-26. CPC Detector

8.11.5. Hook Control

Fig. 4-32. Hook Control

This logic controls the DC loop ON/OFF of the SLT interface. When at the ON hook condition, a PLUS signal is driven to High Levelby the Co line control Port on IC101. In this condition, photocoupler PC282 pin 4 - 3 is ON and Q282 is turned OFF. When at theOFF Hook condition, a PLUS signal is driven to low level and Q282 is turned on. As a result, the DC current flows through thefollowing path.

DC loop path: T → L283 → L281 → L285 → D281 → Q282 → Q281 → R283 → PC281 → D281→ R286 → L286 → L282 → J283→ L284 → R

76


8.11.6. Bell Detector

Fig. 4-33. Bell Detector

This logic detects the ringing status input from the SLT line at the ON Hook Condition. The ring signal flows through T → L283 →L281 → L285 → PC283 → R287 → C283 → L286 → L282 → J283 → L283 → R. If the ringing signal level is over the thresholdlevel of the PC283, photocoupler PC283 4 - 3pin turns ON. In this case, the Bell signal is driven to Low.

Timing 4-27. Bell Detector

77


8.11.7. DPT Line Receiver

Fig. 4-34. DPT Line Receiver

This logic allows you to receive the DPT reception data from the PBX. The DPT reception data flows through HA → L289 → L291→ L287 → D291 → T292 (8 - 7) → C291→ R291 → T292 (6 - 5) → D291 → L288 → L292 → L290 → LA.

8.11.8. DPT Line Tranceiver

Fig. 4-35. DPT Line Tranceiver

This logic allows you to transmit the DPT transmission data to the PBX.

The DPT transmission signals flows as follows.

TXA = IC125 - 40 → R393 → (R265, C263) → Base of Q261.

TXB = IC125 - 41 → R394 → (R266, C264) → Base of Q262.

If IC125 drives TXA (TXB) to low level, Q261 (Q262) is turned ON and the loop current flows through as follows.

+5VA → Q261 (E - C) → (R261, C261) → T292A (3 - 4) → R204 → AG

+5VA → Q262 (E - C) → (R262, C262) → T292A (2 - 1) → AG

This loop current transition generates the DPT transmission data between T292A - 8 pin and T292A - 5 pin. As a result, T292Adrives the HA - LA line corresponding with TXA/TXB.

78


9 CIRCUIT OPERATIONS (POWER SUPPLY BOARD)Block Diagram

9.1. Circuit Operations 1. INPUT CIRCUITS

The AC input voltage passes through the fuse F501, the line filter L501 and the rush current suppressing power thermistorTH501, and then is applied to the rectifier diode D501.

The rectifier voltage of the AC input voltage is applied to C507.

When the AC input is 240VAC, the C507 voltage is about 330VDC.

2. Ringing Choke Converter

· Self-oscillation

By the C507 voltage, the starting current is sent into the base of Q501 via R505 and R506, and then Q501 turns on for amoment. When Q501 turns on, the C507 voltage is applied to between the primary winding 6-8 pin of T501, the base drivingvoltage of Q501 is generated in between the base winding 2-3 pin and then Q501 turns on without fail. After that, whenreached the saturation value of the collector current corresponding to the value of the base current controlled by the

79


limiting resistance R512, R513 and the control transistor Q502, Q501 turns off for a moment. When Q501 turns off, theflyback reverse voltage is generated in between the primary winding 6-8 pin of T501 and between the base winding 2-3 pin,and then Q501 turns off without fail.

By repeating the above-mentioned steps, this Ringing Choke Converter is self-rectangular-wave-oscillated. The oscillationfrequency is 90 kHz. (at 240VAC input)

· Voltage Conversion

During the self-oscillation, when Q501 is on, the rectangular waveform as the C507 voltage is the peak voltage is appliedto between the primary winding 6-8 pin of T501, converted to the appointed voltage, transferred to between the 5.5V winding(13, 14)-(15, 16), between the 15V winding (13, 14)-12 and between the -5V winding (13, 14)-11 of the secondary windingand then the appointed direct-current output voltage is generated by each rectifier smoothing circuit (5.5V: D510, C520 15V:D509, C519 (-5V: D511, C521).

· Output Voltage Stabilization

To stabilize the 5.5V output against the fluctuation of the input voltage and the load current, the shunt regulator IC503 isused for error detection and feedback. When the R-terminal voltage of IC503 changes, the K-terminal voltage changescorrespondingly and the currents of the photo-coupler PC501, the control transistor Q502 and the main transistor Q501change. As a result, the 5.5V output voltage is stabilized. The 15V output and the -5V output are stabilized by the three-terminal regulator IC501 and IC502.

3. Primary Overcurrent Protective Circuit

To prevent the overcurrent due to such as an output short circuit from damaging the main transistor Q501, the collector currentof Q501 is detected at R507. When it becomes a certain current and over, Q502 turns on, the voltage between B-E of Q501is decreased and the collector current is limited momentarily.

Moreover, against a long-period overcurrent, to prevent the on width of Q501 from spreading over a certain one; when the onwidth of the voltage between the base winding 2-3 pin of T501 becomes a certain value that is determined by the time constantof R511 and C512, Q502 turns on, the on width of Q501 is reduced, the output voltage is folded back to the 0V, the collectorcurrent is decreased, and therefore the Q501 is protected.

These primary overcurrent protective circuits work well against the short circuit of 5.5V output and 15V output whose power ofthe output short circuit is big.

Against the output short circuit of the 15V and -5V output, the overcurrent protective function of the three-terminal regulatorIC501 and IC502 itself works and the short-circuit current is limited to a certain value or under.

4. Output Overvoltage Protective Circuit

This is the function to prevent the digital circuit IC from damage when an overvoltage is generated at the output due to the shuntregulator IC503 failure, etc. The 5.5V/15V output is monitored by D512/D515. When the voltage that is the appointed value(5.5V: 6.8V 15V: 31V) and over is generated, D512 or D515 is conducted, SCR501 turns on, and the 5.5V output and the 15Voutput are in the short-circuit mode. At this time, the primary overcurrent protective circuit described at (3) works and preventsthe overcurrent damage of the main transistor Q501.

80


10 UTILITY COMMANDS

81


10.1. HELP COMMAND (HELP)

82


10.2. ONLN COMMAND (on line service control)

10.3. OFLN COMMAND

83


10.4. PASS COMMAND (Install password)

84


10.5. TIME COMMAND (Installation of Time/Date)

10.6. PSET COMMAND (Install report printing out time)

85


10.7. ELOG COMMAND (Display device error)

86


10.8. SAVE COMMAND (Program/Data Back up)

87


10.9. LOAD COMMAND (Program/Data up-date)

88


10.10. VERS COMMAND (To display each card and program version of Flashmemory card)

10.11. QSET COMMAND (Quick Setup)

10.12. MWL COMMAND (To install the number of Message Waiting lampretry)

10.13. MRL COMMAND (To install the minimum time of message recording)

89


10.14. MPLT COMMAND (Display registered user prompt)

10.15. CREP COMMAND (Display custom menu information)

90


10.16. CCLR COMMAND (To clear custom menu access number)

10.17. DCLR COMMAND (Initialize parameter, data of Flash memory card)

91


10.18. DCPY COMMAND (All selector copies between Flash Memory cards)

10.19. PCPY COMMAND (Program copy between Flash Memory cards)

10.20. GCPY COMMAND (System guidance copy between Flash Memorycards)

92


10.21. XCPY COMMAND (Copy from drive No.2(Flash2) to drive No.1(Flash1))

10.22. SYSD COMMAND (Install Flash2 to System Flash Memory)

93


10.23. LMON COMMAND (Circuit condition display)

94


10.24. PUTD (DTMF Information Display)

95


10.25. EMDM COMMAND (External modem setup)

96


11 TROUBLESHOOTING GUIDE

97


11.1. The power indicator does not light up when the power switch isturned on

98


11.2. The VPS system does not start operating

99


11.3. Blinking does not stop although the VPS system has already operated

100


101


11.4. DPT integration connection between Voice Mail and TD Series PBXfails

102


11.5. APT integration connection between Voice Mail and TA Series PBXfails

11.6. Bell arrival and hooking fails

103


11.7. You are unable to hear the guidance.

11.8. Recording and replaying messages fails (APT, SLT interface)

104


11.9. CPC detection does not operate

11.10. DTMF detection does not operate (APT, SLT interface)

105


11.11. FAX Tone detection does not operate

11.12. How to copy the flash memory card

106


11.13. How to connect the remote modem

107


11.14. How to do a self-diagnosis using the Manufacturing Examinationmode

108


109


110


111


12 CABINET AND ELECTRICAL PARTS LOCATION

112


13 EXTENTION CORD CONNECTING METHOD

113


14 ACCESSORIES AND PACKING MATERIALS

114


15 REPLACEMENT PARTSLIST (KX-TVP50CE)

This replacement parts list is for KX-TVP50CE only.

Notes:

1. The marking (RTL) indicates that the Retention Time islimited for this item.

After the discontinuation of this assembly in production, theitem will continue to be available for a specific period oftime. The retention period of availability is dependent on thetype of assembly, and in accordance with the lawsgoverning parts and product retention.

After the end of this period, the assembly will no longer beavailable.

2. Important safety noticeComponents identified by mark have specialcharacteristics important for safety. When replacing any ofthese components, use only manufacture´s specified parts.

3. The S mark indicates service standard parts and may differfrom production parts.

4. RESISTORS & CAPACITORSUnless otherwise specified;All resistors are in ohms (Ω) k=1000Ω, M=1000kΩAll capacitors are in MICRO FARADS (µF), p=µ(µF)*Type & Wattage of Resistor

15.1. CABINET AND ELECTRICALPARTS

Ref.No.

Part No. Part Name & Description Remarks

1 PSKM1017A1 CABINET BODY S

2 PQKV10007Z1 COVER, CABINET S

3 PQHD10011Z SCREW, SMALL

4 PQUS141Z SPRING

5 XUC3VW RETAINING RING

6 PSQT1034Y LABEL

7 PSGG1016Y1 GRILL S

8 PSLB5D1 CORE

9 PSHE1097Z SCREW

10 PSHE1110Z SPACER

11 PSMH1182Z ANGLE

12 PSMC1038Y ANGLE

13 PSHE7004Z SPACER

14 PSHE1012Z SPACER

Ref.No.


15 PSLB5F3 CORE

16 PSUS1013Z SPRING

17 PQHR945Z BAND

18 PQKF10026B1 REAR CABINET S

19 PSHX1143Z SPACER

20 PSMC1092Z MAGNETIC SHIELD

21 PSMX1023Y INSULATOR

22 PSGT1990Z NAME PLATE

23 PSHE1115Z SPACER

24 PSJG1010Z CONNECTOR

25 PSHE1116Z TAPE, CORE

15.2. ACCESSORIES AND PACKINGMATERIALS

Ref.No.


A1 PSJA1007Z CORD,POWER

A2 XWG35FY WASHER

A3 PQHE5004Z SCREW, TAPPING

A4 PSQX1919ZCD CD-ROM, INSTRUCTION

A5 PSQX1799Z TEMPLATE

A6 PQQX10970Y REMOTE LEAFLET

A7 PSQW1560Z CD-ROM LEAFLET

A8 PSQW1661Z REMOTE LEAFLET

A9 PSQX2203Z REFERENCE CARD (FRANCE)

A10 PSQX2203Z REFERENCE CARD (ITARY)

A11 PSQX2204Z REFERENCE CARD (SPAIN)

A12 PSQX2249Z REFERENCE CARD (HOLLAND)

A13 PSQX1098Z REFERENCE CARD (GREECE)

A14 PSQW1661Z INFORMATION LEAFLET

A15 PJME91Z MAGNET

A16 XTN26+14B SCREW

A17 PJMD9089Z ANGLE

A18 PJME90Z MAGNET

A19 PJJN11Z CORE

P1 PSPK1872Z GIFT BOX

P2 PSPD1156Z CUSHION

P3 XZB26X45A04 PROTECTION COVER (FOR SET)

P4 XZB25X34A04 PROTECTION COVER (FOR PRINTEDMATTERS)

P5 XZB05X08A03 PROTECTION COVER (FORACCESSORIES)

P6 PSPN1132Z ACCESSORY BOX

15.3. MAIN/LED BOARD PARTSRef.No.


PCB1 PSWP1TVP50CE MAIN/LED BOARD ASSÝ (RTL)

(ICS)

IC101 PSVI68302FGL IC

IC102 PSWITVP50E IC

IC103L PSVIHY6100GF IC

IC103U PSVIHY6100GF IC

IC106 PQVISN7L32S IC


IC108 PQVISN7L08S IC S


IC110 PSVIPS600CMT IC


IC116 PQVISN7L138M IC



IC120A PQVID6571F1 IC

IC120B PQVID6571F1 IC

115


Ref.No.




IC123 PQVISN7L126A IC

IC124 PQVISN7L126A IC

IC125 PSVIBU65050D IC

IC126A PQVIMC45503W IC

IC126B PQVIMC45503W IC

IC128 PQVIMS6242BG IC

IC129 PQVIDS14C232 IC







IC136 PSVITC7SH08F IC

IC201 PQVINJM319V IC

IC202A PQVITC4011BF IC

IC202B PQVITC4011BF IC

IC203A PQVINJM4558M IC

IC203B PQVINJM4558M IC

IC205 PQVINJM4558M IC

IC206A PQVIAFM112E1 IC

IC206B PQVIAFM112E1 IC

IC207 PQVITC4066BF IC

(TRANSISTORS)

Q102 UN5213 TRANSISTOR(SI) S

Q105 2SD1664Q TRANSISTOR(SI)

Q201A 2SA1576Q TRANSISTOR(SI)

Q202A 2SC4081Q TRANSISTOR(SI)



Q205A 2SC4081Q TRANSISTOR(SI)

Q205B 2SC4081Q TRANSISTOR(SI)

Q261 2SA1576Q TRANSISTOR(SI)

Q262 2SA1576Q TRANSISTOR(SI)

Q281A 2SD2040 TRANSISTOR(SI)

Q281B 2SD2040 TRANSISTOR(SI)

Q282A 2SA1627 TRANSISTOR(SI)

Q282B 2SA1627 TRANSISTOR(SI)

(DIODES)

D73A RLS71 DIODE(SI)

D101 MA721TX DIODE(SI)

D102 MA742 DIODE(SI)

D103 PQVDEC15 DIODE(SI)



D202A 1SS355 DIODE(SI)

D202B 1SS355 DIODE(SI)

D203A 1SS355 DIODE(SI)

D203B 1SS355 DIODE(SI)

D281A PQVDS1ZB60F1 DIODE(SI)

D281B PQVDS1ZB60F1 DIODE(SI)

D282A MA3020 DIODE(SI)

D282B MA3020 DIODE(SI)

D291A PQVDS1ZB60F1 DIODE(SI)

D401 LN242RP LED

(CApACITORS)

C101 ECUV1H180JCV 18p


C103 ECUV1E104ZFV 0.1




Ref.No.









C116 ECEA1CK101 100 S












C133 ECEA1VKS4R7 4.7 S

C134 ECEA1EU101 100

C135 ECEA1CK101 100 S





C142 ECEA1CK101 100 S


C145 ECEA1CK101 100 S

C146A ECUV1E104ZFV 0.1

C146B ECUV1E104ZFV 0.1



C151 PQCUV1H102J 0.001 S

C152 PQCUV1H102J 0.001 S




C156 ECSH1CC106 10

C157 ECEA1EU101 100















C177A ECQV1H104JL 0.1

C177B ECQV1H104JL 0.1








C187A ECUV1H103KBV 0.01

C187B ECUV1H103KBV 0.01

116


Ref.No.


C201 ECEA1AU221 220

C202 ECEA1AU221 220

C220 ERJ3GEY0R00 0(RESISITORS)


C225A ECUV1C104KBV 0.1

C225B ECUV1C104KBV 0.1



C228A ECUV1H331JCV 330p

C228B ECUV1H331JCV 330p



C230 PQCUV1H223KB 0.022 S

C232A ECUV1H821KBV 820p

C232B ECUV1H821KBV 820p

C233A PQCUV1H223KB 0.022 S

C233B PQCUV1H223KB 0.022 S









C238A ECUV1H821KBV 820p

C238B ECUV1H821KBV 820p



C240A ECUV1C105KB 1

C240B ECUV1C105KB 1





C243A ECEA1EK470 47 S

C243B ECEA1EK470 47 S



C247A ECUV1H473MDV 0.047 S

C247B ECUV1H473MDV 0.047 S



C250A ECUV1H100DCV 10p

C250B ECUV1H100DCV 10p









C255A PQCUV1H102J 0.001 S

C255B PQCUV1H102J 0.001 S

C256A ECUV1H103KBV 0.01

C256B ECUV1H103KBV 0.01

C257A ECEA1HUR47 0.47

C257B ECEA1HUR47 0.47

C258 ECEA1CK101 100 S



C261 ECEA1HKS010 1 S

C262 ECEA1HKS010 1 S






Ref.No.




C271A PQ4R18XJ000 0

C271B PQ4R18XJ000 0


C279A ECUV1H040CC 4p

C280A ECUV1H080DC 8p

C281A ECEA1HU2R2 2.2

C281B ECEA1HU2R2 2.2

C282A ECEA1HU100 10

C282B ECEA1HU100 10

C283A ECQE2E474KZ 0.47 S

C283B ECQE2E474KZ 0.47 S

C284A ECKDKC222KB 0.0022 S

C284B ECKDKC222KB 0.0022 S

C285A ECEA0JU220 22



C287A ECUV1H040CC 4p

C288A ECUV1H080DC 8p

C291A ECA1HEN2R2 2.2

(TRANSISTORS)

R101 ERJ3GEYJ106 10M

R102 ERJ3GEYJ106 10M

R103 ERJ3GEYJ472 4.7k

R104 ERJ3GEYJ103 10k




R108 ERJ3GEYJ330 33

R109 ERJ3GEYJ270 27

R110 ERJ3GEYJ330 33

R111 ERJ3GEYJ330 33

R112 ERJ3GEYJ330 33

R113 ERJ3GEYJ330 33


R115 ERJ3GEYJ330 33

R116 ERJ3GEYJ330 33

R117 ERJ3GEYJ330 33

R118 ERJ3GEYJ330 33

R119 ERJ3GEYJ330 33







R129 ERJ3GEYJ330 33

R130 ERJ3GEYJ330 33

















117


Ref.No.





























R174 ERJ3GEYJ330 33

R175 ERJ3GEYJ330 33

R176 ERJ3GEYJ330 33

R177 ERJ3GEYJ330 33

R178 ERJ3GEYJ330 33

R179 ERJ3GEYJ330 33

R180 ERJ3GEYJ330 33

R181 ERJ3GEYJ330 33

R182 ERJ3GEYJ330 33

R183 ERJ3GEYJ330 33







R192 ERJ3GEY0R00 0







R199A ERJ3GEYJ103 10k

R199B ERJ3GEYJ103 10k

R203A ERJ3GEYJ472 4.7k

R204A ERJ3GEY0R00 0









R210A PQ4R10XF1502 15k

R210B PQ4R10XF1502 15k

R211A PQ4R10XF1502 15k

R211B PQ4R10XF1502 15k

Ref.No.


R212A PQ4R10XF4702 47k

R212B PQ4R10XF4702 47k

R213A PQ4R10XF4702 47k

R213B PQ4R10XF4702 47k

R214A PQ4R10XF4702 47k

R214B PQ4R10XF4702 47k












R225 PQ4R10XF8201 8.2k

R226 PQ4R10XF1201 1.2k



R229 ERJ3GEYJ102 1k

R230 ERJ3GEYJ102 1k

R231 ERJ3GEYJ102 1k

R232 ERJ3GEYJ105 1M


R235 ERJ3GEYJ330 33

R236 ERJ3GEYJ330 33

R237 ERJ3GEYJ330 33




R240B ERJ3GEYJ332 3.3k







R246A PQ4R10XF4702 47k

R246B PQ4R10XF4702 47k

R247A PQ4R10XF4702 47k

R247B PQ4R10XF4702 47k

R248A PQ4R10XF4702 47k

R248B PQ4R10XF4702 47k

R249A PQ4R10XF4702 47k

R249B PQ4R10XF4702 47k

R250A PQ4R10XF6800 680

R250B PQ4R10XF6800 680

R251A ERJ6ENF30R0 30

R251B ERJ6ENF30R0 30

R252A PQ4R10XF7500 750

R252B PQ4R10XF7500 750


R253B PQ4R10XF56R0 56

R254A PQ4R10XF7500 750

R254B PQ4R10XF7500 750


R255B PQ4R10XF56R0 56





R258A ERJ6ENF1003 100k

R258B ERJ6ENF1003 100k




118


Ref.No.



R261 ERJ3GEYJ330 33

R262 ERJ3GEYJ330 33











R273 ERJ3GEYJ821 820

R274 ERJ3GEY0R00 0


R276 ERJ3GEYJ330 33

R277 ERJ3GEYJ330 33


R281A PQ4R10XJ822 8.2k

R281B PQ4R10XJ822 8.2k

R282A PQ4R10XJ682 6.8k

R282B PQ4R10XJ682 6.8k

R283A ERJ14YJ390 39

R283B ERJ14YJ390 39

R284A PQ4R18XJ472 4.7k

R284B PQ4R18XJ472 4.7k

R285A PQ4R10XJ104 100k

R285B PQ4R10XJ104 100k

R286A PQRQ25VJ5R6 5.6

R286B PQRQ25VJ5R6 5.6

R287A ERQN1VJ223 22k

R287B ERQN1VJ223 22k

R288A PQ4R18XJ122 1.2k

R288B PQ4R18XJ122 1.2k


R291A PQRQ1VJ821 820

R293A PQ4R18XJ000 0

R293B PQ4R18XJ000 0

R294A PQ4R10XJ000 0

R294B PQ4R10XJ000 0

R295A ERJ3GEYJ105 1M

R295B ERJ3GEYJ105 1M

R296A PQ4R10XJ000 0

R296B PQ4R10XJ000 0

R297A PQ4R10XJ000 0

R297B PQ4R10XJ000 0


R302A ERJ3GEY0R00 0

R302B ERJ3GEY0R00 0

R303 ERJ3GEY0R00 0

R311A ERJ3GEY0R00 0

R311B ERJ3GEY0R00 0

R313A ERJ3GEY0R00 0

R313B ERJ3GEY0R00 0

R314A ERJ3GEYJ680 68

R314B ERJ3GEYJ680 68

R322 ERJ3GEYJ330 33

R323 ERJ3GEYJ330 33

R324 ERJ3GEYJ330 33

R325 ERJ3GEYJ330 33

R326 ERJ3GEYJ330 33

R327 ERJ3GEYJ330 33

R328 ERJ3GEYJ330 33

R329 ERJ3GEYJ330 33

R330 ERJ3GEYJ330 33

Ref.No.


R331 ERJ3GEYJ330 33

R332 ERJ3GEYJ330 33

R333 ERJ3GEYJ330 33

R334 ERJ3GEYJ330 33

R335 ERJ3GEYJ330 33

R336 ERJ3GEYJ330 33

R337 ERJ3GEYJ330 33

R338 ERJ3GEYJ330 33

R339 ERJ3GEYJ330 33

R340 ERJ3GEYJ330 33


























R369A ERJ3GEYJ101 100

R380 ERJ3GEY0R00 0

R383 ERJ3GEY0R00 0

R384 ERJ3GEY0R00 0

R385 ERJ3GEY0R00 0


R389 ERJ3GEY0R00 0


R391 ERJ3GEY0R00 0

R393 ERJ3GEYJ330 33

R394 ERJ3GEYJ330 33

R395 ERJ3GEYJ330 33

R396 ERJ3GEYJ330 33


J101 ERJ3GEY0R00 0

L205 PQ4R18XJ000 0

(COIL)

L10 PQLQR1RM601 COIL

L106 PSLQR1K800S COIL



L109 PSLQR2F600 COIL

L110A PQLQR2K1P60 COIL

L110B PQLQR2K1P60 COIL

L201 PQLQR1T2R2M COIL

L202 PQLQR1T2R2M COIL

L281A PQLE106 COIL

L281B PQLE106 COIL

L282A PQLE106 COIL

119


Ref.No.


L282B PQLE106 COIL

L283A PQLE106 COIL

L283B PQLE106 COIL

L284A PQLE106 COIL

L284B PQLE106 COIL

L285A PQLE106 COIL

L285B PQLE106 COIL

L286A PQLE106 COIL

L286B PQLE106 COIL

L287A ELJNAR68KF COIL

L288A ELJNAR68KF COIL

L289A ELJNA3R3JF COIL




(CONNECTORS AND JACkS)

CN102 PQJP2D70Z CONNECTOR, 2p

CN103 PQJP8D94Z CONNECTOR, 8p

CN104 PSJP09A64Z CONNECTOR, 9p

CN105 PSJS50A92Z CONNECTOR, 50p

CN106 PSJS50A92Z CONNECTOR, 50p

CN201A PSJJ1T020Z JACk

CN201B PSJJ1T020Y JACk

CN402 PSJS02Q92Y CONNECTOR, 2p

(pHOTO COUpLERS)

PC281A PSVIPC817IK pHOTO ELECTRIC TRANSDUCER

PC281B PSVIPC817IK pHOTO ELECTRIC TRANSDUCER

PC282A PQVITLP627 pHOTO ELECTRIC TRANSDUCER

PC282B PQVITLP627 pHOTO ELECTRIC TRANSDUCER

PC283A PSVIPC814IK pHOTO ELECTRIC TRANSDUCER

PC283B PSVIPC814IK pHOTO ELECTRIC TRANSDUCER

(CERAMIC FILTERS)

FIL101 PQVFTU50MT CERAMIC FILTER





FIL10A PSVFNBMK200T CERAMIC FILTER

FIL10B PSVFNBMK200T CERAMIC FILTER

(VARISTORS)

SA200A PQVDT83A350X VARISTOR

SA200B PQVDT83A350X VARISTOR

SA202 PSVDY08Z102B VARISTOR

SA203 PSVDY08Z102B VARISTOR

ZNR81A ERZC07DK820 VARISTOR(SAUGE ABSOBER) S

ZNR81B ERZC07DK820 VARISTOR(SAUGE ABSOBER) S



(SWICH)

SW201 PQSSX19Z SLIDE SWITCH

(TRANSFORMERS)

T281A PSLT8D9A TRANSFORMER

T281B PSLT8D9A TRANSFORMER

T292A PSLT9Z7A pOWER TRANSFORMER

(CRYSTAL OSCILLATORS)

X101 PSVCCR1638B7 CRYSTAL OSCILLATOR S

X102A PSVCC0056GT CRYSTAL OSCILLATOR

X102B PSVCC0056GT CRYSTAL OSCILLATOR

X103 PSVCCR1638B7 CRYSTAL OSCILLATOR S

X104 PSVCC0021CT CRYSTAL OSCILLATOR

(OTHERS)

FGMETAL

PQMD2019W ANGLE

BATT101 PSPCR2032H09 BATTERY

15.4. FLASH MEMORY CARDPARTS

Ref.No.


PCB2 PSWP2TVP50CE FLASH MEMORY CARD ASSÝ

(ICS)

IC301 PSVITC58V64T IC


IC303 PSVIML54053A IC


IC306 PSVIRN5RZ33B IC

(CAPACITORS)















C317 ECHU1H104JB 0.1


C320 ECUV1C105KB 1

C321 PQCUV1A475ZF 4.7

(RESISTORS)

R305 ERJ3GEYJ1R0 1



R320 ERJ3GEYJ105 1M




X301 PSVCCR2000D4 CRYSTAL OSCILLATOR S

CN301 PSJP50B08Z CONNECTOR,50p

Repairing the Flash Memory Card:

The flash memory card itself should be replaced whenrepair is needed. The flash memory cards have beenformatted after installing the parts in factory. Therefore theunit can not work when the parts in the flash memory cardare replaced individually.

15.5. POWER SUPPLY BOARDPARTS

Ref.No.


PCB3 PSWP3TVP50BX POWER SUPPLY BOARD ASSÝ(RTL)

(ICS)

IC501 PSVINJM7815A IC

IC502 AN79L05 IC

IC503 PSVIL5431T IC

(TRANSISTORS)

Q501 2SC3979 TRANSISTOR(SI)

Q502 2SC1318R TRANSISTOR(SI)

Q503 2SC3939 TRANSISTOR(SI)

Q504 2SC1318R TRANSISTOR(SI)

Q505 2SA1309A TRANSISTOR(SI)

120


Ref.No.


(DIODES)

D501 PSVDD2SBA60 DIODE(SI)

D502 PSVDEG01CW DIODE(SI)







D509 PQVDD1NL20U DIODE(SI)

D510 PSVDFMBG14L DIODE(SI)






(CAPACITORS)

C502 ECQE2A104KR 0.1

C503 ECKDNA102MB 0.001

C504 ECKDNA102MB 0.001

C507 PSEA2GXCS331 330

C508 ECA2VHG4R7 4.7

C510 ECKZ3A101KB 100p

C511 ECQV1H104JL 0.1

C512 ECQB1H103JF 0.01

C515 ECKDRS332ME 0.0033

C516 ECKDRS332ME 0.0033

C519 PSEA1VXF470 47

C520 PSEA1AZL122 1200

C521 PSEA1CXF101 100

C523 PSEA1VXF470 47

C524 ECKR1H102KB 0.001

C525 PSEA1AXF221 220

C526 PSEA1AXF221 220

C527 ECQV1H104JL 0.1

C528 ECKR1H102KB 0.001

(RESISITORS)

R501 ERC12GM105C 1M

R502 ERG2SJ104 100k

R505 ERDS1VJ154 150k

R506 ERDS1VJ154 150k

R507 ERF2TKF2R2 2.2

R508 ERDS2TJ102 1k

R509 ERG1SJ101 100

R510 ERDS2TJ103 10k

R511 ER0S2TKF2001 2k

R512 ERG2SJ750 75

R513 ERG2SJ750 75

R515 ERDS1TJ820 82

R516 ERDS2TJ102 1k

R518 ER0S2TKF4751 4.75k

R519 ER0S2TKF3831 3.83k

R520 ERDS1TJ820 82

R521 ERDS2TJ102 1k

R522 ERDS2TJ102 1k

R523 ERDS2TJ131 130

R524 ERDS2TJ471 470

R526 ERG2SJ750 75

(CONNECTORS)

CN501 PSJP03A17Z CONNECTOR,3p

CN502 PQJS08Q04Z CONNECTOR,8p

(VARISTOR)

ZNR501 ERZV10V471X3 VARISTOR

(COILS)

Ref.No.


L501 ELF15N003A COIL

L504 PSLQR2U270K COIL

(OTHERS)

PC501 PSVI621D4GRL PHOTO COUPLER

F501 PSBA2C20TR15 FUSE

T501 ETS29AK4X5AC TRANSFORMER

TH501 ERTD5FFL160P THERMISTOR

SCR501 PSVDTF521S THYRISTOR

15.6. FIXTURES AND TOOLSRef.No.


EC1 PSZZ50K1Z EXTENTION CORD, 50p

Note :

PSZZ50K1Z is necessity for servicing.

121


16 PEPLACEMENT PARTSLIST (KX-TVP52CE)

This replacement parts list is for KX-TVP52CE only.

Notes:

1. The marking (RTL) indicates that the Retention Time islimited for this item.

After the discontinuation of this assembly in production, theitem will continue to be available for a specific period oftime. The retention period of availability is dependent on thetype of assembly, and in accordance with the lawsgoverning parts and product retention.

After the end of this period, the assembly will no longer beavailable.

2. Important safety noticeComponents identified by mark have specialcharacteristics important for safety. When replacing any ofthese components, use only manufacture´s specified parts.

3. The S mark indicates service standard parts and may differfrom production parts.

4. RESISTORS & CAPACITORSUnless otherwise specified;All resistors are in ohms (Ω) k=1000Ω, M=1000kΩAll capacitors are in MICRO FARADS (µF), p=µ(µF)*Type & Wattage of Resistor

16.1. FLASH MEMORY CARDRef.No.


PCB1 PSWP1TVP52CE FLASH MEMORY CARD ASSÝ (RTL)

(ICS)


IC303 PSVIML54053A IC


IC306 PSVIRN5RZ33B IC

(CAPACITORS)









Ref.No.








C317 ECHU1H104JB 0.1


C320 ECUV1C105KB 1

C321 PQCUV1A475ZF 4.7

(RESISTORS)

R305 ERJ3GEYJ1R0 1



R320 ERJ3GEYJ105 1M




X301 PSVCCR2000D4 CRYSTAL OSCILLATOR S

CN301 PSJP50B08Z CONNECTOR,50p

122


17 FOR THE SCHEMATIC DIAGRAMSNotes:

1. DC voltage measurements are taken with an electronic voltmeter and oscilloscope from a ground line.

· Power Switch ON condition

· Voltage Value: V

2. This schematic diagram may be modified at any time with the development of new technology.

3.

4.

123


17.1. MEMO

124


18 MEASURED VALUE GRAPH (MAIN BOARD)18.1. MAIN BOARD

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M50.0ms Ch1 4.4V

1

2

3

4

Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M50.0ms Ch4 3.1V

: 600mV: 186ms: 5.2V@

1

Ch1 2.00V M25.0ns Ch1 2.20V

: 5.48mV: 5.48ms: 5.2V

C1 Freg16.4159Mh

@

1

2

Ch1 2.00V Ch2 2.00V M25.0ns Ch1 2.20V

: 440mV: -7.64V

C1 Freg16.4088Mh

@

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch1 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M500ns Ch1 2.2V

1

2

3

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch3 2.2V

Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch3 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch4 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M100ns Ch2 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M100ns Ch2 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M100ns Ch2 2.2V


125

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M100ns Ch2 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M500ns Ch1 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M500ns Ch3 2.2V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M50.0ns Ch4 2.0V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M50.0ns Ch4 2.0V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch1 2.0V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch1 2.0V

1

Ch1 2.00V M10.0µs

C1 Freg32.841Kh

Ch2 2.00V

2

Ch2 2.00V M5.00ms Ch2 2.00V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M1.00µs Ch2 3.1V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M1.00µs Ch2 2.0V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M5.00µs Ch1 3.1V


126

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M1.00µs Ch2 3.1V

1

2

3

4

Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M200ns Ch1 3.5V

1

2

3

4Ch1 5.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M500ns Ch2 2.8V

1

2

3

4

Ch1 2.00VCh3 5.00V

Ch2 5.00VCh4 5.00V

M500ns Ch3 3.7V

C1 High5.2V

1

2

3

Ch1 5.00VCh3 5.00V

Ch2 5.00V M10.0µs Ch2 2.8V

1

2

3

Ch1 5.00VCh3 5.00V

Ch2 5.00V M10.0µs Ch2 2.8V


127

18.2. POWER SUPPLY BOARD

Ch1 100V M10.0ms Ch1 166V

1 D501 - - ~ N line

2 D501 - - ~ L line

3 C507

4 T501 8-6

5 Q501 C-E

6 R507

7 Q502 C-E

8 Q502 B-E 12 T501 (15, 16) - (13, 14)

11 T501 12 - (13, 14)

10 T501 2-3

9 D503 A - T501 3

1

1

0V

0V

0V

0V

: 648V: 336V@

: 648V: 336V@

Ch1 100V M10.0ms Ch1 166V

1

Ch1 100V M10.0ms Ch1 166V

1

Ch1 100V M5.00µs Ch1 166V

1

Ch1 100V M5.00µs Ch1 172V

0V1

Ch1 500mV M5.00µs Ch1 300mV

0V1

Ch1 2.00V M5.00µs Ch1 0V

0V1

Ch1 2.00V M5.00µs Ch1 0V

0V1

Ch1 5.00V M5.00µs Ch1 0V

0V1

Ch1 10.0V M5.00µs Ch1 0V

0V1

Ch1 20.0V M5.00µs Ch1 0V

0V1

Ch1 5.00V M5.00µs Ch1 0V

13 T501 11 - (13, 14)

14 IC503 K-A

15 IC503 R-A

0V1

Ch1 10.0V M5.00µs Ch1 0V

0V1

Ch1 2.00V M5.00µs Ch1 0V

0V1

Ch1 2.00V M5.00µs Ch1 0V


128

19 SCHEMATIC DIAGRAM

19.1. Main Board No. 1

C103

C104

C105

C106

C108

C107

+5V

DG

C101

22P

C102

27P

R10

1

10M

R10

2

10M

DG

C10

9

+5V

DG

+5V

C11

0

DG

+5V

IC10

6

1 23 IC

106

10 9

8IC

106

12

13

11

+5V

DG

C11

1

+5V

IC10845

6

IC1091 2

IC1151213

11

R10

510

K

R10

610

K

R10

710

K

+5V

+5V

DG

IC116

16

8

C12

8

R10

410

K

IC1159

108

IC10712

3

IC10745

6

X10

1

16.3

84M

Hz

C14

7A

+5V

C14

6A

DG

DG

+5V

+5V

IC106

14

7

C12

3

+5V

DG

IC110

RST

1

2

3

C13

2

Z0.

1˚

DG

C13

3

25V

4.7˚

R13

3

68K

+5V

MRSTN

DOUTA002:11BDINA002:11B

DCLAA002:11B

DOUTB002:11BDINB002:11B

DCLAB002:11B

CS5002:11F

EP1002:11F

C2M002:11G

SX0002:11G

SR1002:11G

EP2002:11G

EP3002:11G

INTTX002:11E

RXD002:11B

TXD002:11B

SR0002:11G

+5V

R10

34.

7K

+5V

R110 33

R111 33

R112 33

R113 33

R118 33

R117 33

R115 33

R116 33

R114

10K

R19

810

K

R19

54.

7K

+5V

+5V

+5V

R239A

10K+5V

+5V

IC1222 3

1

IC1225 6

4IC1232 3

1 IC1235 6

4

CN103

Power Connector

8 +15V

7 +5.8V

6 +5.8V

5 DC_ALM

1 GND2 GND3 GND

4 -5V

C13

6

C14

0

C13

9

+15V

+5V

DG

-5V

C14

4

R13

4

10K

+5V

BELLA002:11H

BELLB002:11C

DTR002:11B

DSR002:11B

HOOKA002:11H

HOOKB002:11B

CPCA002:11H

DG

CPCB002:11B

CTONA002:11H

CTONB002:11B

CPDB002:11B

u/AB002:11B

CPDA002:11H

u/AA002:11H

C13

4

25V

100

C14

5

16V

100

C14

2

16V

100

+5V

R239B

10K

C14

7B

C14

6B

GCNT002:11D

1M SRAM

PSVIHY6100GFTR

IC103U

2A16

31A15

4A12

5A7

6A6

7A5

8A4

9A3

10A2

11A1

12A0

13I/O1

14I/O2

15I/O3

16GND

17I/O4

18I/O5

19I/O6

20I/O7

21I/O8

22/CS1

23A10

24/OE

25A11

26A9

27A8

28A13

3A14

32VCC

29/WE

1N.C.

30CS2

1M SRAM

PSVIHY6100GFTR

IC103L

2A16

31A15

4A12

5A7

6A6

7A5

8A4

9A3

10A2

11A1

12A0

13I/O1

14I/O2

15I/O3

16GND

17I/O4

18I/O5

19I/O6

20I/O7

21I/O8

22/CS1

23A10

24/OE

25A11

26A9

27A8

28A13

3A14

32VCC

29/WE

1N.C.

30CS2

IC128

STDP1

VBB24

7A1

5A0

CS120

XT22

XT23

GND12

10A3

9A2

16D1

19D0

14D3

15D2

4ALE

2CS

11RD

13WR

R24

410

K

+5V

STDP

VBB

JMP1

BAT

T10

1

DG

+5V

R245

47K+5V

IC116

A1

B2

C3

6G1

5G2B

4G2A

Y015

Y114

Y213

Y312

Y411

Y510

Y69

Y77

X10432.768KHz

C168 20P

C169 20P

C16

7

DG

+5V

D103

R21

6A10

K

+5V

R21

6B10

K

L106

C13

5

16V

100

C13

7

L107

L108

R241

3.3K

R339 33R338 33

R340 33

C16

4C

165

DG

LED002:11A

C11

616

V10

0

DG

+5V

IC122

14

7

+5V

C13

0

DG

IC123

14

7

12

13 C13

1

+5V

DG

20

27

21

37

24

50

36

40

19

3

25

31

14

4

30

17

26

38

28

29

12

48

23

15

2

35

22

47

49

CN106

11

13

39

16

18

IC1099 8

IC12298

10

IC1221211

13

8M FLASH ROMIC102

A025

A124

D131

D029

A223

A322

A421

A520

A619

A718

A88

A97

A106

A115

A124

A133

A142

A151

A1648

A1717

BYTE47

CE26

OE28

WE11

RY/BY15

D335

D233

D540

D438

D744

D642

D932

D830

D1136

D1034

D1341

D1239

D1545

D1443

N.C.14

RESET12

37VCC

VSS27

N.C.9

N.C.10

N.C.13

VSS46

A1816

DG

C12

4

IC117

16

8

+5V

C11

7IC119

14

7

DG

+5V

1M SRAM

HY628100A

IC104L

2A16

31A15

4A12

5A7

6A6

7A5

8A4

9A3

10A2

11A1

12A0

13I/O1

14I/O2

15I/O3

16GND

17I/O4

18I/O5

19I/O6

20I/O7

21I/O8

22/CS1

23A10

24/OE

25A11

26A9

27A8

28A13

3A14

32VCC

29/WE

1N.C.

30CS2

C17

0

+5V

DG

1M SRAM

HY628100A

IC104U

2A16

31A15

4A12

5A7

6A6

7A5

8A4

9A3

10A2

11A1

12A0

13I/O1

14I/O2

15I/O3

16GND

17I/O4

18I/O5

19I/O6

20I/O7

21I/O8

22/CS1

23A10

24/OE

25A11

26A9

27A8

28A13

3A14

32VCC

29/WE

1N.C.

30CS2

+5V

C17

1

DG

IC11

91

21

31

1

IC11

99 10

8

IC117

A1

B2

C3

6G1

5G2B

4G2A

Y015

Y114

Y213

Y312

Y411

Y510

Y69

Y77

+5V

+5V

+5V

IC11

94 5

6

IC11

9

1 23

002:11E

+5V

R12

710

K

R12

810

K

+5V

IORD002:11E

IOWR002:11E

RST002:11E

IC10

64 5

6

002:11D

-5V

R19

1

10K

+5V

R19

010

K

MD7MD6MD5MD4

MD15

MD12MD13

MD3

MD9MD10

MD8

MD11

MD14

MD2MD1MD0

ce1ce2iord

MA3

reqrstn

MA1

iowr

MA2

DG

+15V

+5.8V

DC_ALM

C17

7AC

177B

IC13612

4

IC1091110

IC10934

R108 33

R109

27

DG

IC135

D12

11 Q8

PR

10

CLR

13

Q9

IC135

D2

3 Q6

PR

4

CLR

1

Q5

IC134

D2

3 Q6

PR

4

CLR

1

Q5

+5V

IC107

14

7

C12

2

DG

+5V

IC135

14

7

C18

3

DG

IC130

20

10

+5V

DG

C17

8

DG

C18

4

+5V

IC136

5

3

IC131

20

10

+5V

DG

C17

9 IC132

20

10

IC133

20

10

+5V

C18

1

DGDG

C18

0

+5V

+5V

R34

3

10K

R34

4

10K

+5V

R34

2

10K

+5VIC1079

108

IC1071213

11

IC10812

3

+5V

C12

9

DG

IC108

14

7

DG

DG

D102

MA742TX

21

3

D101

1

2

3

R129 33R130 33

R174 33R175 33R176 33R177 33

+5V +5V

R36

310

K

R36

210

K

D6571F

DSP1

IC120A

27DR0

DX025

HSTDB113

HSTDB014

DR126

DX124

FSYNC23

SCLK20

XIN18

XOUT17

28EGPIO5EGPIO4

2930

EGPIO333

EGPIO234

EGPIO135

EGPIO0

RESET21

PDN22

VCC19327353

GND15315474

HSTDB311

HSTDB212

HSTDB59

HSTDB410

HSTDB77

HSTDB68

4HI/LO

HSTRD5

HSTWR63

ACK77

DSPCS

59ADDR0

60ADDR1

61ADDR2

62ADDR3

63ADDR4

64ADDR5

65ADDR6

66ADDR7

67ADDR8

68ADDR9

69ADDR10

70ADDR11

71ADDR12

72ADDR13ADDR14

2

ADDR15180

ADDR16

75CE

76CE2

78ALE

79CLE

39HDB0

40HDB1

41HDB2

42HDB3

43HDB4

44HDB5

45HDB6

46HDB7

47HDB8

48HDB9

49HDB10

50HDB11

51HDB12

52HDB13

57HDB14

58HDB15

37FLRD

36FLWR

55NC

56NC

CLKOUT16

NC38

D6571F

DSP1

IC120B

27DR0

DX025

HSTDB113

HSTDB014

DR126

DX124

FSYNC23

SCLK20

XIN18

XOUT17

28EGPIO5EGPIO4

2930

EGPIO333

EGPIO234

EGPIO135

EGPIO0

RESET21

PDN22

VCC19327353

GND15315474

HSTDB311

HSTDB212

HSTDB59

HSTDB410

HSTDB77

HSTDB68

4HI/LO

HSTRD5

HSTWR63

ACK77

DSPCS

59ADDR0

60ADDR1

61ADDR2

62ADDR3

63ADDR4

64ADDR5

65ADDR6

66ADDR7

67ADDR8

68ADDR9

69ADDR10

70ADDR11

71ADDR12

72ADDR13ADDR14

2

ADDR15180

ADDR16

75CE

76CE2

78ALE

79CLE

39HDB0

40HDB1

41HDB2

42HDB3

43HDB4

44HDB5

45HDB6

46HDB7

47HDB8

48HDB9

49HDB10

50HDB11

51HDB12

52HDB13

57HDB14

58HDB15

37FLRD

36FLWR

55NC

56NC

CLKOUT16

NC38

DG

DG

R19

64.

7K

+5V

R19

7

10K

+5V

R120

4.7KR121

47K

R19

3

10K

R19

4

10K

+5V +5V

DGC11

8

No

Mou

nted

MC68302

IC101

RXD1/LIRXD71

RTS1/LIRQ/QCIDCL42

92D14

93D15

TXD1/LITXD41

RCLK1/LICLK39

TCLK1/LISY0/SDS140

CD1/LISY173

CTS1/LIGR72

BRG145

RXD2/PA070

TXD2/PA169

RTS2/PA563

RCLK2/PA268

TCLK2/PA367

CTS2/PA464

BRG2/SDS2/PA761

CD2/PA662

RXD3/PA859

PA9/TXD358

43RTS3

PA10/RCLK357

PA11/TCLK35653

MCDCLK/PA12

44CD3

DREQ/PA1352

DACK/PA1451

DONE/PA1550

IPL0/IRQ123

IPL1/IRQ624

IPL2/IRQ725

FC0127

FC1129

FC2130

AVEC/IOUT027

AS14

R/W15

UDS/A012

LDS/DS13

DTACK35

BCLR34

RMC/IOUT1137

IAC138

BR30

BG33

BGACK32

RESET28

HALT29

BERR26

BUSW47

DISCPU48

FRZ49

IACK7/PB09

IACK6/PB18

IACK1/PB27

TIN1/PB36

TOUT1/PB44

TIN2/PB53

TOUT2/PB62

WDOG/PB7143

PB8142

PB9141

PB10140

PB11139

CS0131

CS1132

CS2135

CS3136

EXTAL19

XTAL18

CLK022

90D12

91D13

87D10

88D11

85D8

86D9

82D6

83D7

80D4

81D5

77D2

78D3

75D0

76D1

98LA23

99LA22

100LA21

101LA20

103LA19

104LA18

105LA17

106LA16

110LA15

111LA14

112LA13

113LA12

115LA11

116LA10

117LA9

118LA8

119LA7

120LA6

121LA5

122LA4

124LA3

125LA2

126LA1

31N.C.

46108109

5VDD

20213860849697107128

1GND

1011161736375455656679899495102114123133134144

CTS374

R18

54.

7K

DG

R13

1 10K

R13

2 10K

+5V

IC131

1D 3

2D 4

3D 7

4D 8

5D 13

6D 14

7D 17

8D 188Q197Q166Q155Q124Q93Q62Q51Q2

EL11

OC1

IC132

1Q 2

2Q 5

3Q 6

4Q 9

5Q 12

6Q 15

7Q 16

8Q 198D187D176D145D134D83D72D41D3

EL11

OC1

R34

5

10K

IC130

1D 3

2D 4

3D 7

4D 8

5D 13

6D 14

7D 17

8D 188Q197Q166Q155Q124Q93Q62Q51Q2

EL11

OC1

IC133

1Q 2

2Q 5

3Q 6

4Q 9

5Q 12

6Q 15

7Q 16

8Q 198D187D176D145D134D83D72D41D3

EL11

OC1

R180 33

R181 33

+5V +5V

R326 33

R329 33

R332 33

R322 33

R327 33

R331 33

R334 33

R324 33

R333 33

R337 33

R328 33

R323 33

R325 33

R335 33R336 33

R330 33

R34710K

R35210K

R35710K

R36010K

R35410K

R34810K

+5V

R35110K

R36110K

R34610K

R35810K

R35610K

R35910K

R35310K

R35010KR34910K

R35510K

R12

2

47K

+5V +5V

R12

3

N.M

.

+5V

R18

8

4.7K

R187 47K

R18

6

N.M

.

R14

310

K

+5V

R13

510

K

R13

710

K

R15

010

K

R13

910

KR

138

10K

R14

010

K

R14

210

K

R14

910

KR

148

10K

R14

110

K

R14

510

KR

146

10K

R14

710

K

R14

410

K

R13

610

K

R15

710

K

R17

010

K

R15

510

K

R16

510

K

R15

110

K

R16

710

K

R15

610

K

R16

310

K

R17

110

K

R16

910

K

R17

210

K

R16

610

K

R15

810

K

R16

110

KR

160

10K

+5V

R16

810

K

R15

410

K

R16

210

K

R15

910

K

R17

310

K

R16

410

K

R15

210

KR

153

10K

C11

9

No

Mou

nted

DG

R182 33

R179 33R178 33

R183 33

R119 33

4142434445323334

567468910

DG

R385 0

R387 10KR386 No Mounted

R38

8

No

Mou

nted

DGDG

+5V

DG

+5V

R38

30

R382No Mounted

DG

R380 0R381 No Mounted

DG

DG

R38

40

DG

R38

90

+5V

R19

9A

10K

R19

9B

10K

+5V

1

49

29

44

34

46

3

13

48

35

21

41

12

45

5

8

4

25

31

27

39

30

2322

37

9

42

32

6

38

50

1

14

16

40

10

17

15

47

28

43

20

33

7

19

36

24

CN105

11

18

26

2

+5V

+5V

R124 N.M.R125

N.M

BEEPB

BEEPA

EP0 R192 0

+5V

C12

7

DG

IC115

14

7

IC108

1213

11

R39

0

10K

+5V

IC134

D12

11 Q8

PR

10

CLR

13

Q9

+5V

IC109

14

7

DG

C12

1

C18

2

DG

IC134

14

7

+5V

R391

0

R39

2

N.M

.

DG

SCLK

RSTN

RST

CCLK

R366

N.M.+5V

R36

4B

N.M

.

+5V

R36

5B

10K

+5V

R36

4A

N.M

.

+5V

R36

5A

10K

+5V

IC1095 6

+5V

R12

6

10K

R303 0R304 N.M

+5VR367

10K

R368

N.M.

DG DG

FIL

101

1

2

3

L109

J103

N.M

J102

N.M

FIL10A

PS

VFN

BM

K20

0T

1

2

3

R312A N.M.

+5V

L110ABLM11P600S

C186A

N.M

.

R316A N.M.

R314A

68+5V

C187A

0.01

R31

3A

0 X102A

45.056MHz

OUT 3

INH 1GND2VDD4

DCKA

DG

C18

5A

N.M

.

R314B

68

+5V

C186B

N.M

.

X102B

45.056MHz

OUT 3

INH 1GND2VDD4

R312B N.M.

+5V

C187B

0.01

FIL10B

PS

VFN

BM

K20

0T

1

2

3

C18

5B

N.M

.

L110BBLM11P600S

R31

3B

0

R316B N.M.

DCKB

DG

J101

LA[1]LA[2]LA[3]LA[4]LA[5]LA[6]LA[7]LA[8]LA[9]LA[10]LA[11]LA[12]LA[13]LA[14]LA[15]LA[16]LA[17]LA[18]LA[19]LA[20]LA[21]LA[22]LA[23]

LA[1]LA[2]LA[3]LA[4]LA[5]LA[6]LA[7]LA[8]LA[9]LA[10]LA[11]LA[12]LA[13]LA[14]LA[15]LA[16]LA[17]

LA[12]

LA[14]

LA[17]

LA[13]

LA[16]LA[15]

LA[10]

LA[4]

LA[7]LA[8]

LA[1]

LA[11]

LA[2]

LA[5]

LA[9]

LA[6]

LA[3]

LA[16]LA[17]LA[18]

LA[1]LA[2]LA[3]LA[4]

LA[1-23]

MA[1]MA[2]

LA[19]LA[18]LA[17]LA[16]LA[15]LA[14]LA[13]LA[12]LA[11]LA[10]LA[9]LA[8]LA[7]LA[6]LA[5]LA[4]LA[3]LA[2]LA[1]LA[1]

LA[2]LA[3]LA[4]LA[5]LA[6]LA[7]LA[8]LA[9]LA[10]LA[11]LA[12]LA[13]LA[14]LA[15]LA[16]LA[17]

LA[1]LA[2]LA[3]LA[4]LA[5]LA[6]LA[7]LA[8]LA[9]LA[10]LA[11]LA[12]LA[13]LA[14]LA[15]LA[16]LA[17]

LA[18]LA[19]LA[20]

CS[1]

AS

AS

RO

EU

RW

EU

RO

EL

RW

EL

CS0

UDS

LA[13]

LA[1

5]

LA[1]LA[2]LA[3]

MA[1]MA[2]MA[3]

MD[0]MD[1]MD[2]MD[3]MD[4]MD[5]MD[6]MD[7]MD[8]MD[9]MD[10]MD[11]MD[12]MD[13]MD[14]MD[15]

CS4

CS5

CS

1BC

S1A

RD

DTA

CK

DTACK


R

WR

CS2

CS

6

CS3

LDS

cs3

MA[1]MA[2]MA[3]

RDOC

RDOC

WROC

WROC

RDEL

LD[0-15]

LD[0

-15]

D[0

-15]

IOWR

IORD

D[0]D[1]D[2]D[3]D[4]D[5]D[6]D[7]D[8]D[9]D[10]D[11]D[12]D[13]D[14]D[15]

D[0]D[1]D[2]D[3]D[4]D[5]D[6]D[7]

D[8]D[9]D[10]D[11]D[12]D[13]D[14]D[15]

D[0]D[1]D[2]D[3]D[4]D[5]D[6]D[7]

D[8]D[9]D[10]D[11]D[12]D[13]D[14]D[15]

D[0]D[1]D[2]D[3]D[4]D[5]D[6]D[7]D[8]D[9]D[10]D[11]D[12]D[13]D[14]D[15]

D[0]D[1]D[2]D[3]D[4]D[5]D[6]D[7]

D[8]D[9]D[10]D[11]D[12]D[13]D[14]D[15]

D[0]D[1]D[2]D[3]D[4]D[5]D[6]D[7]

D[8]D[9]D[10]D[11]D[12]D[13]D[14]D[15]

LD[0]LD[1]LD[2]LD[3]LD[4]LD[5]LD[6]LD[7]


LD[0]LD[1]LD[2]LD[3]





LD[0]LD[1]LD[2]LD[3]LD[4]LD[5]LD[6]LD[7]LD[8]LD[9]LD[10]LD[11]LD[12]LD[13]LD[14]LD[15]

LD[0]LD[1]LD[2]LD[3]LD[4]LD[5]LD[6]LD[7]LD[8]LD[9]LD[10]LD[11]LD[12]LD[13]LD[14]LD[15]


LA[1

5]

LA[1

0]

LA[1

6]

LA[2

2]

LA[6

]LA

[7]

LA[3

]

LA[1

2]

LA[8

]

LA[1

8]

LA[4

]

LA[1

3]

LA[5

]

LA[2

1]LA

[20]

LA[1

]

LA[1

1]

LA[1

4]

LA[2

]

LA[1

9]

LA[9

]

LA[1

7]

LA[2

3]

D[0

]D

[1]

D[2

]D

[3]

D[4

]D

[5]

D[6

]D

[7]

D[8

]D

[9]

D[1

0]D

[11]

D[1

2]D

[13]

D[1

4]D

[15]

hce2

Freq

hce1

W

MA[3]

RSTN

SC

LK

SCLKMemory Option

SAME AS 2AP

2AP(PSUP1275)

LA[1-2]

LD[0-3]

Extention

RS232C Interface Signal

DPT Interface

DSP-A

DSP-B

DPT I/FC channelInterrupt Circuit

RS232CSend Signal

Bell A

CommunicationProcessorInterface

Real Time Clock Circuit

Parallel I/O

CPU

SRAM

SRAM

SRAMSelectorCircuit

Chip SelectDecoderCircuit

CPUClockGenerator

F-ROM Select

S-RAM Select

FMC Select

Another Select

DSP-A, DSP2BSRAML, SRAMHG/A, RTC

System Flash ROM

I/O Bus Control Circuit

Bus Latch Circuit

MasterSelect

F.M.C Select Signal

Flash Memory Card Interface

(Master)

Flash Memory Card Interface

(Slave)

Bell B

RS232C DTRRS232C DSR

CPC ACPC B

RS232CReceive Signal

CO Control Signal

Parallel I/O

Hook B

Hook A

Read

F.M.C InterruptWrite

Reset L->H

Power OFF: 2.8V

Watch dog RSTn

RSTn

CTONE B

DSPClockGenerator

CTONE A

F.M.C. InterruptInterruptSignal

H

H

H

L

L

7

9

12

11

37

38

47

41

40

39

42

49

3

48

50 8

10

64

5

13

14

15

16

19

18

17

35

36

20

22

21

30

27

28

31

29

33

32

InterruptSignal

SlaveSelect

23

24

25

26

34

DSP-BInterrupt

DSP-AInterrupt

APTInterrupt(Ach)

APTData out(Ach)

APTData Clear(Bch)

APTData Clear(Ach)

APTData Out(Bch)

APTInterrupt(Bch)

RST

1

2

Reset IC Power

ResetCircuit

As for the resistors of F class (F47k, F510, etc.), they can not be replaced with resistors except for the ones with the same specification (1 %).


129

19.2. Main Board No. 2

CN201ATEL JACK

3 TAL283A

SA281A

No

Mou

nted

SA282A

No

Mou

nted

MFG

SA283A

No Mounted

4 2

3 1

L284A2 RA

L282A

L281A

C28

4A

2200

P

C28

3A

250V

0.47

˚

R28

7A

1W22

K

R28

8A

1.2K

PC283A

PC

814 1

2 3

4

AG

D281A

R286A 0.25W 5.6

Q282A

R28

5A

100K

R28

4A

4.7K

C281A50V2.2 ˚

R28

1A

8.2K

C28

2A50

V10

˚

R282A

6.8K

Q281A

R28

3A

39

PC

281A

PC

817 1

2 3

4

AG

C29

5AN

o M

ount

ed

PC

282A

TLP

627 1

2 3

4

+5VA

ZN

R81

A

NV

082D

07

C271A

0

C25

5A10

00P

R255AF300

R254AF680

C254A

J470P

R25

3AF

300

R25

2A

F68

0

C25

2AJ4

70P

R25

1A

F30

0

R25

0AF

698

C25

0A

K0.

1

VAG

R249A

F47K

IC203A

3

21

C25

7A

50V

0.47

˚

C25

6A

50V

0.01

˚

AG AG

R25

7A

100K

R25

6A10

0K

+5V

R25

9A

1.0K

1 HAL291A

ZN

R91

AN

V08

2D07

ZN

R92

AN

V08

2D07

T291A

NoMounted

4

5

1

2

10

9

7

6

R29

1A82

0

C29

1A

50V

2.2˚

4 LA

R27

382

0

Q261

Q262

+5VA

R261 33

C261 50V1.0 ˚

R263

4.7KR264

4.7K

C264

68PF

R2664.7K

C263

68PF

R2654.7K

C26

5

100P

F

AG

AG

C26

6

100P

F

R262

33

R267

4.7K

R268

4.7K

IC2019

107

R26

9

4.7K

AG

C26

7

47P

F

AG

VREF

AG AG

R27

0

4.7K

C26

8

47P

F

VREFIC201

4

512

R276

33

R27

1

4.7K

+5V

R27

2

4.7K

R277

33

+5V

Q201A

R242A

4.7KR203A

4.7K

IC202A56

4R208A

10K

R209A

10K

C28

6A

J150

P

IC202A12

3

R204A

0R205A

1.0K

R20

6A

4.7K

R207A

1K

IC202A1312

11

IC202A98

10

R204B

C25

6B

50V

0.01

˚

C28

4B

2200

P

R282B

6.8K

R242B

R205B

R25

3B

F30

0

L291BQ201B

C281B50V2.2 ˚

SA282B

NoM

ount

ed

R28

5B

100K

4 LB

C25

2B

J470

P

R28

7B

1W22

K

CN201BTEL JACK

3 TB

R28

4B

4.7K

Q281B

C271B

0

+5VA

R28

1B

8.2K

T291B

NoMounted

4

5

1

2

10

9

7

6

IC202B98

10

R286B0.25W 5.6

2 RB

R28

3B

39

PC283B

PC

814 1

2 3

4

C28

6B

J150

P

R209B

10K

L281B

R207B

1KL292B

C254B

J470P

SA281B

NoM

ount

ed

PC

281B

PC

817 1

2 3

4

D281B

IC202B56

4

R255BF300

C25

7B

50V

0.47

˚

R203B

R20

6B

C28

3B

250V

0.47

˚

IC202B12

3

AG

ZN

R81

B

NV

082D

07

PC

282B

TLP

627 1

2 3

4

R25

2BF

680

T281B

PSLT8D9A-I

4

6 3

1

ZN

R91

BN

.M.

C28

2B50

V10

˚

1 HB

AG

R208B

10K

R28

8B

1.2K

L284B

IC202B1312

11

C29

5BN

o M

ount

ed

R254BF680

R25

9B

1.0K

Q282B

L282B

C25

5B10

00P

L283B

SA283B

No Mounted

4 2

3 1

AGAG

C23

5A0.

022

C23

3A

0.02

2C

234A

0.02

2

C23

7A

0.02

2

IC201

6

11C23

0

0.02

2

C27

2

0.02

2

AG

+5VA

-5VA

R22

5

F8.

2K

+5VA

R22

6

F1.

2K

AG

C26

9

0.02

2F

AG

VREF

IC201

3

8

AG

C23

3B

0.02

2

C23

4B

0.02

2

C23

7B

0.02

2

C23

5B

0.02

2

+15V

L10

+5V

R23

2

1M

R2311K

X10

3

16.3

84M

C15312P

C15447P DG

C15

50.

1

DOUTA001:12B

DCLAA001:12B

DINA001:12B

DOUTB001:12B

DINB001:12B

DCLAB001:12B

HOOKA001:12H

CPCA001:12H

BELLA001:12H

CPCB001:12H

HOOKB001:12H

BELLB001:12H

R229

1K

R230

1K

R22

847

KC

152

1000

P

C15

110

00P

R22

747

K

+5V

DG

L201 2.2 H

L202 2.2 H

+5V

-5V

+5VA

-5VA

C20

110

V22

0˚

C20

2

10V

220˚

AGDG

+5VA

-5VA

C248A K0.1

C24

2A 0.1

CN104

6 DSR

4 DTR

2 RXD

5 GND

RS232C #0

FIL1021

2

3

FIL1033

2

1

FIL1041

2

3

FIL1053

2

1

DG

IC129

1C1+

3C1-

4C2+

5C2-

15

VSS

6V-

2V+

16

VCC

10 7

1312

11 14

89

C16025V4.7 ˚

C16125V4.7 ˚

DG

C15

925

V4.

7˚

C15

725

V10

0˚

DG

+5V

C15

825

V4.

7˚

DG

EP3001:12D

EP2001:12F

C2M001:12G

SX0001:12G

SR1001:12G

EP1001:12G

CS5001:12A

RST001:12B

LA[1-2]001:12H

LD[0-3]001:12G

u/AB001:12C

CPDB001:12C

u/AA001:12E

CPDA001:12F

C262

50V1 ˚

DSR001:12H

RXD001:12H

DTR001:12H

TXD001:12H

INTTX001:12B

IORD001:12E

IOWR001:12E

C247A

0.047

R22

1A

10K

+5VA

SR0001:12D

CTONA001:12H

CTONB001:12H

IC124

14

7

DG

C16

2

DG

C16

3

SA200A

T83-

A35

0X

12

3

MFG

SA200B

T83-

A35

0X

12

3

L286B

L285B

L286A

L285A

D20

1A

N.M

.

D20

0A

N.M

.

RL2

00A

No M

ounte

d

1

64

2

R20

1AN

.M.

+5VA

R25

6B10

0K

+5V

R25

7B

100K

R20

2A

N.M

.

PC200AN.M.

1

23

4

R200A

N.M.

+5V

Q200ANoMountedAG

R200B

N.M.

+5V

PC200BN.M.

1

23

4

Q200BNo Mounted

R20

2B

N.M

.

AG

IC202A

14

7

C23

6A

DG DG

C23

6B

+5V

IC202B

14

7

C15

610

V10

0

R23

4

10K

+5V

IC12412 11

13

R237 33

R235 33

R236 33

GCNT001:12A

+5VA

+5VA

+5V+5V+5V

IC2071 2

13IC207

3 4

5

IC203A5

67

R258A

F120K

C244A 330P

IC2078 9

6IC207

10 11

12

R27

5

47K

Q203DG

R28

9

47K

Q204DG

+15V

+15V

IC203A4

8

AG

+15V

IC203B

4

8

AG

D10

6

7.5M

DG

R29

8

2.7K

+15V

R293A

0

R29

2AN

o M

ount

edR

292B

No

Mou

nted

R293B

0

F47KR214A

VAG

VAG

R29

4A 0

R258B

F120K

C244B330P

IC203B5

67

R29

4B 0

C23

1AN

o M

ount

ed

C225A

K0.1

C229A 330P

R246A

F47K

R297A

0VAG

C226A

K0.1

R24

7A

F47

K

R248A

F47K

C228A330P

R296A

0

VAG

VAG

C25

0B

K0.

1

VAG

R249B

F47K

C225B

K0.1

IC203B

3

21

C229B 330P

C228B330P

R246B

F47K

R297B

0

R296B

0

VAG

R248B

F47K

C226B

K0.1

R24

7B

F47

K

R25

1B

F30

0

R25

0BF

698

IC2053

21

C25

8

16V

100

AG

VAG

C26

0

0.02

2

C25

9

0.02

2

DG

VAG

R22

047

K

R22

247

K

R22

347

K

R22

447

K

+5V

DG

IC206A 51

2 3 4

6

AG

C24

3A16

V47

AG

+12V

IC206B 51

2 3 4

6

+5VA

+12V

AG

AG

C247B

0.047

C24

3B16

V47

R22

1B

10K

Q105

R21

9

2.7K

D10

7

11H

AG

+15V

+12V

+15V

R401

470

DG

D401

Q1022

CN102

1

CN402

1

2

+5V

R18

9

47K

+5V

SW

201

18

27

36

45

L290A

C28

8A

8p

L288A

L287A

L288B

C28

8B

N.M

.

L290B

L287B L289B

C28

7B

N.M

.

R29

1BN

.M.

C29

1B

N.M

.

D20

0B

N.M

.

D20

1B

N.M

.

+5VA

R20

1BN

.M.

RL2

00B

No M

ounte

d

1

64

2

Q202B

Q202A

C23

1BN

o M

ount

ed

IC207

14

7

DG

C17

6

+15V

MFG

MFG

C248B K0.1 F47KR214B

LED001:12A

SA280

NoM

ount

ed

42

31

SA

203

Y08

Z-10

00B

SA

202

Y08

Z-1

000B

MFG

FG

MFG-D

MFG-D

MFG-D

D73

BD

73A

D28

2A

1

3

2

D28

2B

1

3

2

T281A

PSLT8D9A-I

4

6 3

1

C28

0A

8p

C27

9B

N.M

.

C28

0B

N.M

.

MFG-D

MFG-D MFG-D

IC1245 6

4

IC1215 6

4

IC12123

1

IC1242 3

1

IC1249 8

10

IC121

9 810

IC12398

10

IC10913 12

IC121

14

7

13

12

AG

AG

AG

AG

AG

AG

IC125

45C2

44C1

43C0

59R9

INTTX12

D32

D23

D14

IOR10

INTRX11

48C5

47C4

PI 61

RESET63

A07

IOW9

D05

A16 55

R556

R657

R758

R8

46C3

54R4

50R0

51R1

52R2

53R3

RXB39

RXA38

TXB41

TXA40

OSO34

OSI33

21SXO

SR120

EP215

CK2M18

NI62

SR019

VDD1

VDD31

VDD49

GND17

GND35

GND64

N.C32

N.C42

N.C60

EP013

EP114

OP023

OP124

OP225

OP326

CK16M36

CK512K37

CK2K22

EP316

CSN8

IP027

IP128

IP229

IP330

3 TXD

T292B

N.M.

3

4

1

2

8

7

6

5

T292A

PSLT9Z7A-F

3

4

1

2

8

7

6

5

TA

RA

HA

LA

TB

RB

HB

LB

DSR

DTR

RXD

TXD

C11

4

C11

3

LED+5V

+5V

R24

3A 10K

+5V

R24

3B

10K

VAG

C238A 1000P

F39KR213A VAG

F39K

R212AR210AF15K

R211A

F15K

C251A

K0.1

C253AK0.1

C232A

1000P

AG

C24

1A

0.1

-5VA

+5VA

Q205A

D20

2AD

203A

R260A

22KC240A

1.0

AG

AG

R21

5A

120K

R29

5A

1M

R24

0A

3.3K

C23

9A

K0.

1

AG

DG

IC126A

PDI7

DR15DT11

VAG 1

BCLKT12BCLKR13

FST14

TG 4

VSS 8

TI+ 3

TI- 5

VDD 16

VLS9

FSR10

MU/A6

RO+ 2

VAGF39KR213B

C238B 1000P

F39K

R212B

C232B

1000P

R211B

F15K

C251B

K0.1

C253BK0.1

R210BF15K

IC126B

PDI7

DR15DT11

VAG 1

BCLKT12BCLKR13

FST14

TG 4

VSS 8

TI+ 3

TI- 5

VDD 16

VLS9

FSR10

MU/A6

RO+ 2

DGC

242B

0.1

AG

C24

1B

0.1

-5VA

+5VA

Q205B

R24

0B

3.3K

D20

2B

AG

AG

R29

5B

1M

D20

3B

C240B

1.0

R21

5B

120K

C23

9B

K0.

1

R260B

22K

AG

VAG

R302B0

R302A0

IC11512

3

IC108109

8

+15V

Q207AN.M. R

217B

N.M

.

+15V

DG

Q207BN.M.

DG

R21

7A

N.M

.

IC205

4

8

IC205

N.M.

6

57

VAG

R27

4

0

VAG

C22

0

0

R279 N.M.

R280

N.M.

R290 N.M.

C22

1

N.M

.

VAG

BEEPB

BEEPA

EP0

R27

8

47K

+5V

R301B

N.M.

IC208

N.M.

5 6

3

R301A

N.M.

IC208

N.M.

1 2

7

C223A

N.M.

C223B

N.M.

Q206

N.M.

AG

R300 N.M.

R29

9

N.M

.

+15V

IC208

N.M.

8

4

C22

2

DG

IC11545

6

+5V

R39

9

N.M

.

R398

N.M.

+5V

R39

7

10K

GCLK

R394 33

R393 33

R396 33

R395 33

TP2

TP1

TP3

TP4

L203

NoM

ount

ed

L204

No

Mou

nted

L205

DG

J1

C28

5A

6.3V

22

R36

9A

100

+5VA

+5VA

C28

5BR

369B

N.M

.

ZN

R92

BN

.M.

J283A

J283B

L289A

L292AC27

9A

4p

C28

7A

4p

MFG-D

D291A

1

2 3

4

N.MR310A

R31

1A 0N.M

R310BR

311B 0

-5V

-5V

C28

9A

N.M

.

C28

9B

N.M

.

C29

0A

K0.

047

C29

0B

K0.

047

DOUTA

DINA

DCLAA

DOUTB

DINB

DCLAB

LA[1]

LA[2]

LD[0]

LD[1]

LD[2]

LD[3]

DCLAA,DINA,DOUTA

DCLAB,DINB,DOUTB

DPT/APT/SLT I/F CHANNEL-A

APT/SLT I/F CHANNEL-B

POWER LED +12V Circuit VAG Circuit

1BP(PSUP1274)

N.M.

Dip Switch

43

44DPT I/F: HAPT I/F: LSLT

L

DPT I/F

TX

RX

SLTAPT I/F DPT I/F

through through

IC121IC122IC123IC124

DPT/APTSLT

Mode ChangeCircuit

46 6061

6667

65642M

H

H: Mµ lowL: A low

CODEC IC

RX GAIN AMP

GainLimiterCircuit

45

54

5556

57

58

59

51

52

53

Detect: HNone: L

FAXC-ToneDetect IC

TX GAIN AMP

VAG: 7.6VAG=DG

Trans

4W/2WCoversionCircuit

Bridge

HOOKControl Signal

DPT H-L Interface

DC Loop Circuit

Surge Absorber Circuit

Hook Circuit

CPCDetection

6362

DPT ComparisonVoltageCircuit

650mV

CPC DetectionSignal

Bell DetectionSignal Bell Detection Circuit

Bell Voltage TestPoint

ON Hook: HOFF Hook: L

Surge Absorber Circuit

APT H-L Interface

RS232C Circuit

7.6V




130

19.3. FLASH MEMORY CARD

23

3

5049

16

40

37

39

35

28

30

27

13

38

4

12

19

CN30111

47

29

17

21

15

2524

18

22

2

26

14

36

31

20

48

C30

4C

303

+5V

DG

C31

70.

10.

1

0.1

+5V

DG

R37

4

10K

+3.3V

R371 10K

DGC31

6

0.1

R32

127

0

C31

5

22P

C31

4

22P

X301

20MHz

DGDG

R320

1M

4142434445323334

46

567

89

10

R31

5B

10K

64M_NAND_Flash

IC301

27 IO726 IO6 38N.C.

39N.C.

25 IO524 IO421 IO320 IO219 IO118 IO0

43 CE42 RE4 WE5 WP41 R/B

2 CLE3 ALE

23 Vccg

36N.C.

37N.C.

32N.C.

35N.C.

30N.C.

31N.C.

28N.C.

29N.C.

7N.C.

6N.C.

9N.C.

8N.C.

10N.C.

14N.C.

13N.C.

16N.C.

15N.C.

17N.C.

44Vcc

22Vss

3433111240 OP

1Vss

+3.3V

C30

1

C31

2

+3.3V

DG

+3.3V

C30

7DG

+3.3V

C31

3

DG

DG

C30

8 +3.3V

DG

C30

9

R31

5A

10K

C31

0

0.1

0.1

0.1

DG64M_NAND_Flash

IC30227 IO726 IO6 38N.C.

39N.C.

25 IO524 IO421 IO320 IO219 IO118 IO0


2 CLE3 ALE

23 Vccg

36N.C.

37N.C.

32N.C.

35N.C.

30N.C.

31N.C.

28N.C.

29N.C.

7N.C.

6N.C.

9N.C.

8N.C.

10N.C.

14N.C.

13N.C.

16N.C.

15N.C.

17N.C.

44Vcc

22Vss

3433111240 OP

1Vss

+3.3V

C31

10.

1

0.1

0.1

0.1

0.1

0.1

+3.3V

C30

2

+3.3V

+3.3V

IC303

79 hd1582 hd14 maio6 14maio7 12

84 hd1387 hd1289 hd1143 hd1046 hd948 hd880 hd783 hd685 hd588 hd490 hd347 hd249 hd152 hd0

76 ha1072 ha970 ha868 ha766 ha664 ha563 ha461 ha359 ha257 ha155 ha0

56 hreg

78 hce177 hce2

74 hoe

69 hwe

73 hiord71 hiowr

44 hio1s16

67 hireq

58 hinpack

60 hwait

50 hstsche53 hspkr

maio4 20maio5 18

maio2 17maio3 19

maio0 11maio1 13

mce3 25mce2 24mce1 23mce0 22

macle 2

maale 3

mare 7

mawe 8

marb 9mwp 1

hrst62

hcsel65

VDD 10

VDD 21

VDD 40

VDD 51

VDD 86

VDD 104

GND 5

GND 15

GND 26

GND 36

GND 42

GND 54

GND 81

GND 94

GND 109

VDD 45

VDD 106

GND 16

GND 75

mbio6 35mbio7 33

mbio4 41mbio5 38

mbio2 37mbio3 39

mbio0 32mbio1 34

mbcle 27

mbale 28

mbre 29

mbwe 30

mbrb 31

xa1599

xa1498

xa1397

xa1296

xa1195

xa1093

xa992

xa891

xad7110

xad6108

xad5107

xad4105

xad3103

xad2102

xad1101

xad0100

xrbn112

xwrn111

xale113

xpse117

xint116

xrst115

xclk114

pcfg1119

pcfg0118

xin6

xout4

pon120

+3.3V

1

IC306IN2CE5GND1 NC 4

OUT 3

C32

1

4.7

1

DG

+3.3V

R30

5

C32

01

DG

+5V

IC304

5

3

DG

+3.3V

C31

9

+5V

IC30412 4

+3.3V

2AP(PSUP1275)

Flash Memory Controller 64Mbit NAND Flash Memory

64Mbit NAND Flash Memory

3.3VRegulator

Reset

L->H H

Repairing the Flash Memory Card:

The flash memory card itself should be replaced when repair is needed. The flash memory cards have been formatted after install ing the parts in factory. Therefore the unit can not work when the parts in the flash memory card are replaced individually.


131

19.4. POWER SUPPLY BOARD

215002

F501T2AH 250V

ELF15N003AL501

3 4

2 1

ETS29AK4X5ACT501

6

8

16

12

15,17,18

13

14

11

2

3

PQJS08Q04CN502

8 15V

7 5.5V

6 5.5V

3 SG

2 SG

1 SG

5 DCALM

4 -5V

2SC3979Q501

3

2

1

AC-P05CP24CN501

N

E

L

FG

V10

471U

ZN

R50

1

R50

1

1M

C50

3

1000

p

C50

4

1000

p

J2

C51

0

100p

D5048.2

2SC1318Q502

3

2

1

C51

2

0.01R

507

2.2

MA165

D507

D50

5M

A16

5

C50

740

0V33

0

D1NL20U

D509

C51

935

V47

FMB-G14L

D510

C52

010

V12

00

D1NL20U

D511

16V

100

C52

1

C52

610

V22

0

L504

27 µ

R51

5

82

R51

6

1k

L543

1A-A

IC50

3

K

A

R

78L15IC501

2IN

3OUT

1GND

79L05IC502

2IN

3OUT

1GND

C527

0.1

R51

8

4.75

k

R51

9

3.83

k

C515

3300p

C516

3300p

ERTD5FFL160P

TH501

R50

6

150k

R50

5

150k

R511

2.0k

PC

501

TLP

621

1

23

4

C52

8

1000

p

R52

1

1k

SC

R50

1

TF52

1S

23 1

R52

0

82

C52

510

V22

0

D51530

R52

4

470

R52

6

75

J12

J1

J9

NC

C50

1L502

0Ω

R517

0

J8

C

15V

-5V

5.5V

N

J13

DIN

L20U

D51

4

ALM

SG

C52

335

V47

J10

C511

0.1

NC

C50

9

D50

2E

G01

CW

R50

2

100k

C50

835

0V4.

7

R513

75

2SC

3939

Q50

33 2

1

D50

62.

7

R512

75MA165

D503

R51

0

10k

C50

2

0.1

J5

J4

J3

J7

R508

1k

J6

2SC1318Q504

3

2

1

R514

12

E

L

NC

C513

D501D2SBA60

- +

D50

8

MA

165

NC

R52

5

R52

2

1k

R52

3

130

Q505

2SA1309

MA

4047

D51

3

C52

4

1000

p

MA

4062

D51

2

R509

100

J11

460V

0V

5

0V

1.2V

-5.2V

7

0V0.9V

-4.4V

8

0V

31V

-11.5V

10

20V

-47V

0V

1120V

-8V

0V

13

6V

-14.5V

0V

12

1

2

6

5

3

1415

4

7

8

9

10

13

11

12

Ground

* The resistors of 1% class should be used for R511, R518 and R519.


132

20 SCHEMATIC DIAGRAM (KX-TVP52CE)

23

3

5049

16

40

37

39

35

28

30

27

13

38

4

12

19

CN30111

47

29

17

21

15

2524

18

22

2

26

14

36

31

20

48

C30

4C

303

+5V

DG

C31

70.

1

0.1

0.1

0.1

+5V

DG

R37

4

10K

+3.3V

R371 10K

DGC31

6

R32

127

0

C31

5

22P

C31

4

22P

X301

20MHz

DGDG

R320

1M

4142434445323334

46

567

89

10

R31

5B

10K

64M_NAND_Flash

IC301

27 IO726 IO6 38N.C.

39N.C.

25 IO524 IO421 IO320 IO219 IO118 IO0


2 CLE3 ALE

23 Vccg

36N.C.

37N.C.

32N.C.

35N.C.

30N.C.

31N.C.

28N.C.

29N.C.

7N.C.

6N.C.

9N.C.

8N.C.

10N.C.

14N.C.

13N.C.

16N.C.

15N.C.

17N.C.

44Vcc

22Vss

3433111240 OP

1Vss

+3.3V

C30

1

C31

2

+3.3V

DG

+3.3V

C30

7

DG

+3.3V

C31

3

DG

C30

8

DG

C30

9

R31

5A

10K

C31

0

0.1

0.1

0.1

0.1

1

0.1

0.1

0.1

1

DG

+3.3V

C31

10.

1

0.1

0.1

+3.3V

C30

2

+3.3V

+3.3V

IC303

79 hd1582 hd14 maio6 14maio7 12

84 hd1387 hd1289 hd1143 hd1046 hd948 hd880 hd783 hd685 hd588 hd490 hd347 hd249 hd152 hd0

76 ha1072 ha970 ha868 ha766 ha664 ha563 ha461 ha359 ha257 ha155 ha0

56 hreg

78 hce177 hce2

74 hoe

69 hwe

73 hiord71 hiowr

44 hio1s16

67 hireq

58 hinpack

60 hwait

50 hstsche53 hspkr

maio4 20maio5 18

maio2 17maio3 19

maio0 11maio1 13

mce3 25mce2 24mce1 23mce0 22

macle 2

maale 3

mare 7

mawe 8

marb 9mwp 1

hrst62

hcsel65

VDD 10

VDD 21

VDD 40

VDD 51

VDD 86

VDD 104

GND 5

GND 15

GND 26

GND 36

GND 42

GND 54

GND 81

GND 94

GND 109

VDD 45

VDD 106

GND 16

GND 75

mbio6 35mbio7 33

mbio4 41mbio5 38

mbio2 37mbio3 39

mbio0 32mbio1 34

mbcle 27

mbale 28

mbre 29

mbwe 30

mbrb 31

xa1599

xa1498

xa1397

xa1296

xa1195

xa1093

xa992

xa891

xad7110

xad6108

xad5107

xad4105

xad3103

xad2102

xad1101

xad0100

xrbn112

xwrn111

xale113

xpse117

xint116

xrst115

xclk114

pcfg1119

pcfg0118

xin6

xout4

pon120

+3.3V

1

IC306IN2CE5GND1 NC 4

OUT 3

C32

1

4.7

DG

+3.3V

R30

5

C32

0

DG

+5V

IC304

5

3

DG

+3.3V

C31

9

+5V

IC30412 4

+3.3V

1AP(PSUP1275)

Flash Memory Controller 64Mbit NAND Flash Memory

3.3VRegulator

Reset

L->H H


133


134

21 PRINTED CIRCUIT BOARD

21.1. MAIN BOARD : COMPONENT VIEW

POW

ERCN103

C145

L108

R175 R176

R177

IC101

X101

144

1

R174

C137

IC136

C184

R196

R114 R108J103

116

1 120 20

8 9 10 1011 11

R130 R134R18737 72

73

108

R150R149R148R147R146R145R144R143

R142R141R140R139 C156 X103

48 33

32

17

161

80

1

24

X102A

25 40

65

64

41

64

R164R159R160

R235R161R162

C177A

IC125

49

R138R137R136

R135109

IC102

MASTER SLAVE

IC104L

IC104U

IC103L

IC103U

R166

R154

R167R165R163R158R157R156R15548

1

24 2532 32

32

1

1

16 16

16

1717

17

32

IC120A

1

16 17

1

36

R186

D103

R384R353R362 R179

R18350

CN105

2

1 49

R351R323

C133

C116

R325R327R329

R381R347

IC110

R349

R380R382R383

R390

R368 R191R367IC116

R346R348R352R356R360

R322R324

R119

R181

R326R328R330R332R334R336R338R340R178R180R182

R350

R354R358

CN102LED

JMP1

X104C168 IC134 IC115

IC107IC106

C169

D102

IC128

PSUP1274X

R342R3431

1213

24

1 14

147 8

1 14

7 81 14

7 8

IC109

IC121IC119

IC124

IC130

IC132

X102B

IC122IC123

IC135

R344

IC207

IC108

C134D106

IC205

R274

R280

R243B

8

1 4

5

8 5

41

Q207A

R217A

R300

1

11

11

1

114

1414

1414

14

1441 64

40 65

25 80

24 1

7

77

77

7

78

8

11 1 Q105

D107R219

1

2 50

49

20 20R388

R385R387

CN106

R363 R345C181C165

R389R386

R399

11 11

10 1014

7 8

8

88

8

81 14

Q203

R275

L106 Q207B

R299 C222

C258

L205C177B

IC120B

L201C201

R240C239D202

1

1

T281

C226 R255

R254R247

R252C252

R283R293

D282C282

C281

C231

C235

C243

IC206B

IC206A

1

1

14

4

44

4

4

3 2

22

2

3

33

3

1

1

1

11

1 6

7 55

R291

C291

B

A

A

L287L291

L289C279

C280

L292L288

13

24

CN201

L290

CN201

124 3

C287 C2881 10

6

8

14 8

6

6

C257

Q202C243

C240

C260

C285

PC283

PC282

ZR281

6

51

R284

D281

R286

L286

L282

ZR292 ZR291

C284

L281

L283

L284

SA281

SA281

SA283

SA283

SA202 SA203

SA280

FG

SA200

SA200

CN104

J283

J283

SA282

SA282

C283

C283

T292

PC281

PC200

4

4

4

22

2 3

33

11

1

16 9

8

8 5 6 4

1

14 8

7

4 3

3 1

31

12 4

64

11

PC282

PC281

PC200

IC202B

R246

8 5

1 4

C254R253

R249C225

C228

R248

R296C237

C233

C250

R207

D203Q

205

D202

R214C248

IC126A

IC203A

C234C237

T281

PC283

Q200

Q202R257

RL200

C281

ZR281

L282

L281

Q281 Q282

R284

R283C282

D282

D281

R286R287

R369Q261

C257

C202

IC201

14

1 7

8

L202

C262

C261IC202A

C230

C226

R247

Q262

D401

CN4021 2

C285R201

D200

L286

C284

L285

L284

L283L289

L291

L290

L292

ZR292

ZR291

L288

R220

R222

R223

R224

T292

4 1

1

8

1065

5

T291

1 8

4 5

L287

R291

C291

SW201

D201

Q201

T291Q201

Q200

Q282

D201

FIL102

FIL104

FIL105

FIL103

D200

R287

L285

L204L203

Q281

R250 RL200

R251

IC203B

C234

R297C229

3

86 4

916

D203

C223R301

C240Q

205

R214C248

IC126B

C160

C158

C161IC129

1

8 9

C157

16C159

Q206R217B

IC208R289

Q204

7 88

1

7

D101

12

1 16

98Q102

BATT101

C164

C142

L107

C135

IC117IC131 IC133

R188

R121R198

R192

FIL101

18


135

21.2. MAIN BOARD : BOTTOM VIEW

R401

R205

A

R242

A

C279

A

C287

A

C288

A

CN20

1ACN

201B

R204

A

R206

A

R200

A R207

A

R255

A

R311

AR2

12A

R210

A

R295

A

R211

A

C253

A

C239

A

C241

AR2

40A

R259

A

R202

A

R293

A

R206

BR2

42B

R205

B

R204

B

R201

BR2

59B

R257

B

R288

BR2

85B

R281

B

R200

B

R200

B

R292

B

C271

B

C255

B

C242

B

C253

BC2

38B

C251

B

C241

BC2

32B

TP4

TP3

C256

B

R256

B

R295

B

R215

B

R212

BR2

10B

R258

BR3

02B

R302

A

R221

A

DCKB

MD0

MD2

MD1

R361

R359

R357 R3

55R3

31

C132

R333

R391

R392

R125

R109

R189

C140

CN10

38

1

R197

CCLK

L109

R304

J102

J101

R303

R103R1

23

R113

R129

R241

R112

R110

R170

R171

R111

R101

R118

R116

R168

R153

R152

R169

R115 R2

16A

R216

BR1

93

R194

R102

R195

R120

R124

R133

MRS

TN

R335

R337

MD3

MD5

MD7

MD9

MD4

MD6

MD8

MD1

0M

D12

MD1

4

R221

B

R239

BR2

18B

R364

BR2

90R2

79

R365

BR2

98 R127

R105

R126

R245

R244

R132

R131

RSTN

STDP

LED

VBB

SCLK

R128

R106

R399

R278

R122

R185

R190 R1

04

CN10

22

1

R199

B

R199

AR1

07

C148

BC1

76B

C136 C1

29

C122

C123

C182

C167

C183

C127

C121

C163

C162

C130

C119

C117

C178

C124

C128

C260

C220

C221

C259

C147

B

C146

B

C150

BC1

49B

L101

B

C247

BC2

47A

R294

BC2

44B

R311

B

R310

B

R211

BR2

13B

R260

B

C295

B

R292

AR2

85A

R281

AD7

3B

D200

DSRRX

D

TXD

DTR

DG

D201

C256

AR2

56A

R243

A

R239

A

R301

A

R365

A

R238

A

R218

A

R366C2

23A

C149

A

C146

A

C147

A

C148

AC1

50A

DCKA RS

TL101

A

C286

BR2

08B

R369

B

R203

BR2

09B

C236

B

C251

AC238

AR2

54A

R236

R237

R234

R228

R231

R232GCL

K

R230

R364

A

TP2

TP1

C254

A

C225

A

C231

AC2

50A

C233

A

C235

AC2

28A

C114

C113

L10

C154 C1

53

C151

C152

C109

C110

C171

C180

C179

C139

-5V

DC ALM+5.8V

+15V+5V

C101

C107

R173

R172

R117

R151

C131

C104

C102C1

08C1

06

C144

C105

C103

C118

C170

C111

R248

A

R250

A

R251

A

C255

AC2

36A

R288

AD7

3A

R262

R264 R2

66R2

65C2

63

C286

AR2

08A

R209

AR2

72R2

77R2

67

C267

C268

R269

R268

R270

R394

R393

R396

R395

C271

A

C264

C266

R261

2 1CN402 R273 R263

R203A

R271R276

R253A

R249A

R297AR246A

R310AR215A

R282A

iowr iord rep

ce1

ce5

rstnMA2

MD15

MD13MD11

MA3

R238B

MA1

C295A

C232AR213A

R258A

R294AR296A

R397

R398

R229

R227C155

C252A

C242A

C229A

C244A

R252A

R225R226-5VAC272

C269

C265

D200

D201

RA

TA

LA

LB

HB

RB

R282B

+5VA

FG R202B

CN104

1

6

5

9

TB4

21

3

HA

43

1 2

D291A

C280A

C291B

C291A


136

21.3. FLASH MEMORY CARD

23

C31

4

R32

0R

321

120

31 60

1

C30

8C

307

30

C31

5

R30

591

+3.

3V

C31

7

2 C

N30

1

1

C30

4

C30

390

61C

312

C32

0

IC306

50 49RE

F

A

DG

R37

4C

316

44

44 23

R315A

IC303

C309 C311 C310

R371

A

IC304

C319

C321

C313

+5V

X301

PSUP1275Z

R315B

R319

22

22

C3021

1

C301

IC301

IC302

(COMPONENT VIEW)


137

21.4. POWER BOARD

R525

R519

R518

R515 R5

17R5

16

R514

R511

R502

R508 R5

05

R506

D501

R501

F501

L502

Q50

4

J8

C520

IC50

3IC

501

C527

C509

C510

C507

C504

C503

C502

1

19

182 3

4 E

C528

C521

C523

C526

C519

KR

AD512

D510

D514

D509

D505

D504

D508

D502

D507

T501

D506

D503

J7

J3

J2

J4

J6

J5

J1

PSUP

1296

Z

T2AH

250

VA

J12 SCR501

J9

PC501

C516

C515

R513

R512R510

R509

R507

C512

C508

C501

TH501

ZNR501

CN501

L5011 2

34

Q501

Q502

E BC

L E N

Q503

C513C511

R520R521R523

R524R522

R526

C524

C525

CN502

IC502

1 8

L504

Q505

D513

D511

D515

B C E

J13

J10

(COMPONENT VIEW)


138

22 PRINTED CIRCUIT BOARD (KX-TVP52CE)

23

C31

4

R32

0R

321

120

31 60

1

C30

8C

307

30

C31

5

R30

591

+3.

3V

C31

7

2 C

N30

1

1

C30

4

C30

390

61C

312

C32

0IC

306

50 49RE

F

A

DG

R37

4C

316

44

R315A

IC303

C309 C311 C310

R371

AIC304 C319

C321

C313

+5V

X301

PSUP1275Z

R315B

R319

22

C3021

C301 IC301


139


140

141


A KXTVP50CEKXTVP52CEPrinted in Japan

Documents

VOICE PROCESSING SYSTEM KX-TVP50CE KX- · PDF filekx-tvp50ce kx-tvp52ce voice processing system tvp50ceorder no. kms0010528c8. 1 introduction 4 1.1. caution 4 1.2. safety precautions