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8/3/2019 Vlsi Course Final_LOGIC DESIGN
1/3
VLSI COURSE
Course Details and concepts are as follows:
RTL Coding and Simulation (FRONT END)
A real time project is chosen and will be designed using VHDL or
Verilog and will also be simulated for verifying the functionality of the
RTL.
BACKEND Tool Usage
o VLSI Tool usage flow from Synthesis to GDSII will be explained throughindustry
o Synthesis and DFT through RTL Compiler. FloorPlanning, Placement,Clock Tree Synthesis and Routing through soc Encounter.
Final Stage of project work
o Students, after they are comfortable with the above indicated flow and willcontinue their work in the core assigned stream using the above mentioned
industry standard EDA tools.
Introduction to VLSI design
o VLSI definitiono Why VLSI neededo What is a Silicon chipo Challenges and trends power, speed and area
Future technologies
VLSI LANGUAGES :
I. VERILOG TOPICS
Overview of Digital Design with Verilog HDL
2. Hierarchical Modeling Concepts
Basic Concepts
Modules and Ports
Gate-Level Modeling
Dataflow ModelingBehavioral Modeling
Tasks and Functions
II. VHDL TOPICS
Overview of Digital Design with VHDL
Levels of representation and abstraction
Basic Structure of a VHDL file
Lexical Elements of VHDL
8/3/2019 Vlsi Course Final_LOGIC DESIGN
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Data Objects: Signals, Variables and ConstantsData types:Integer types,Floating-point types,Physical types, Array Type, Record
Type.
Operators
Behavioral Modeling: Sequential Statements, Loop statement
Dataflow Modeling Concurrent Statements
Structural Modeling
Basic Digital Design
o Arithmetic circuitso Sequential and Combinational circuitso State machineso Digital design issues
VLSI Course :1
I
o Semiconductor physics, diode & MOSFET modelso CMOS Technologyo Cmos process flow, parasitics, cmos fabrication techniqueso CMOS Logic, CMOS capacitanceso Layout design rules, stick diagram
VLSI Course :2
o Cell Layout & Chip Floorplanningo Standard cell layout structure, multi-cell layout, power & signal routing,
use of metal layers, floorplanning
o Structure & Operation of Digital Functionso Basic Gates (MUX, En/Decoder, FF, Shifters, Registers, etc.)o Arithmetic Circuits, mainly adders (Manchester in CMOS)o Memory (SRAM, DRAM, ROMs, PROMs, PLA, FPGA)o Microprocessor datapath with ALU, SRAM, and shiftero Advanced Logic Structureso Dynamic, differential, pass-gateo Submicron Issueso MOSFET submicron models, design considerations/limits,
submicrontechnology (physical structures)
8/3/2019 Vlsi Course Final_LOGIC DESIGN
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Advanced Course Topics
o VLSI technology issueso Submicron fabricationo MEMSo Next-generation alternatives to CMOS-BiCMOS or compound
semiconductors
o Quantum or bimolecular deviceso Advanced Digital Systemso Analog/mixed-signal design