VLSI Chp2 a

8/8/2019 VLSI Chp2 a

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Outline

Introduction MOS Capacitor nMOS I-V Characteristics pMOS I-V Characteristics Gate and Diffusion Capacitance


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Introduction So far, we have treated transistors as ideal

switches An ON transistor passes a finite amount of current

Depends on terminal voltages Derive current-voltage (I-V) relationships

Transistor gate, source, drain all have capacitance I = C ((V/(t) -> (t = (C/I) (V Capacitance and current determine speed


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MO

S Capacitor Gate and body form MOS

capacitor

O

perating modes Accumulation Depletion Inversion


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Terminal Voltages Mode of operation depends on Vg, Vd, Vs

Vgs = Vg Vs Vgd = Vg Vd V

ds= V

d V

s= V

gs- V

gd Source and drain are symmetric diffusion terminals

By convention, source is terminal at lower voltage Hence Vds u 0

nMOS body is grounded. First assume source is 0 too.

Three regions of operation Cutoff

Linear

Saturation

Vg

Vs

Vd

Vgd

Vgs

Vds

+-

+

-

+

-


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nMO

S Cutoff No channel

Ids 0

+-

s

= 0

n+ n+

+-

p-type bo y

b

s


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nMO

S Linear Channel forms Current flows from d to s

e- from s to d

Ids increases with Vds Similar to linear resistor

+-

s>

t

n+ n+

+-

= s

+

-

s>

t

n+ n+

+

-

s>

>t

s= 0

0 < s

t

n+ n+

+-

s-

t

p-type bo y

b

s Is


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I-V Characteristics In Linear region, Ids depends on

How much charge is in the channel? How fast is the charge moving?


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Channel Charge MOS structure looks like parallel plate capacitor

while operating in inversions Gate oxide channel

Qchannel = CV C = Cg = IoxWL/tox = CoxWL V = Vgc Vt = (Vgs Vds/2) Vt

n+ n+

-t d

+

Vgd

gat

+ +

s urc

-

Vgs-

drain

Vds

channel-

Vg

Vs

Vd

Cg

n+ n+

-t e d

W

L

t x

SiO2

gate xide

(g d insulat r, Ix

= 3.9)

lysilic ngate

C x = I x / t x


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nMO

S Linear I-V Now we know

How much charge Qchannel is in the channel How much time teach carrier takes to cross

channel

ox 2

2

ds

ds gs t ds

ds gs t ds

QIt

W VC V V V

L

VV V V

Q

F

!

!

!

ox=W

F


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nMO

S Saturation I-V If Vgd < Vt, channel pinches off near drain

When Vds > Vdsat = Vgs Vt Now drain voltage no longer increases current

2

2

2

dsatd s gs t dsat

gs t

I F

F


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nMO

S I-V Summary

2

cutoff

linear

saturatio

0

2

2n

gs t

dsds gs t ds ds dsat

gs t ds dsat

V V

V I V V V V V

V V V V

F

F

!

"

Shockley1st order transistor models


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Example We will be using a 0.6 Qm process for your project

From AMI Semiconductor tox = 100

Q = 350 cm2/V*s Vt = 0.7 V

Plot Ids vs. Vds Vgs = 0, 1, 2, 3, 4, 5 Use W/L = 4/2 P

14

2

8

3.9 8.85 10350 120 A/V

100 10ox

W W WC

L L LF Q

v ! ! !

0 1 2 3 4 50

0 .5

1

1 .5

2

2 .5

Vds

Ids

(mA)

Vgs

= 5

Vgs

= 4

Vgs

= 3

Vgs

= 2

Vgs

= 1


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pMO

S I-V All dopings and voltages are inverted for pMOS

Source is the more positive terminal

Mobility Qp is determined by holes

Typically 2-3x lower than that of electrons Qn 120 cm2/Vs in AMI 0.6 Qm process

Thus pMOS must be wider toprovide same current

In this class, assumeQn/ Qp = 2

-5 -4 -3 -2 -1 0-0 .8

-0 .6

-

0 .4

-0 .2

0

Ids

(

)

Vgs

-

Vgs

-

Vgs

-

Vgs

-

Vgs

-

Vds


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Operation modes summary

2

cutoff

linear

saturatio

0

2

2

n

gs t

dsds gs t ds ds dsat

gs t ds dsat

V V

V I V V V V V

V V V V

F

F

!

"


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Capacitance Any two conductors separated by an

insulator have capacitance

Gate to channel capacitor is very important Creates channel charge necessary for

operation


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Capacitance Source and drain have capacitance to body

Across reverse-biased diodes Called diffusion capacitance because it is associated

with source/drain diffusion


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Capacitance


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Gate Capacitance Approximate channel as connected to source Cgs = IoxWL/tox = CoxWL = CpermicronW Cpermicron is typically about 2 fF/Qm

n+ n+

p-type body

W

L

tox

SiO2ga te oxide

(good ins lator, Iox

= 3.9I0)

po lys ilicon

ga te


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Diffusion Capacitance Csb, Cdb Undesirable, called parasitic capacitance Capacitance depends on area and perimeter

Use small diffusion nodes Comparable to Cg

for contacted diff Varies with process

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VLSI Chp2 a