Tutorial Presentation 4

8/19/2019 Tutorial Presentation 4

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The Build Process: Makefiles And Beyond

Arash Bakhtiari

2012-11-20 Tue

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Introduction

compiling your source code files can be tedious

specially when you want to include many source files

have to type the compiling command everytime you wantto do it

for big projects very time consuming

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Make utility

Make: a utility that help you to automatically build andmanage your projects

Makefile: are special format files which specify how toderive the target program

A makefile consists of rules

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Rules

A Rule :

specifies when and how to remake certain files(targets)

lists the other files that are the prerequisites of the target

(dependencies) commands to use to create or update the target

Rule syntax:

t a r g e t s : d e p en d e n c i e scommand



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DEMO

prog : prog . o a . o b . o c . og++ a . o b . o c . o pr og . o −o p r og

a . o : a . cg++ −c −g −Wal l −o a . o a . c

b . o : b . cg++ −c −g −Wal l −o b . o b . c

c . o : c . cg++ −c −g −Wal l −o c . o c . c

pro g . o : pro g . cg++ −c −g −Wal l −o p r o g . o p r o g . c

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DEMOCC = g++CFLAGS = −c −g −Wal l

SRCS = a . c b . c c . c pro g . cOBJS = a . o b . o c . o pr og . o

pro g : $ (OBJS)$ (CC) $ (OBJS) −o p r o g

a . o : a . c$ (CC) $ (CFLAGS) −o a . o a . c

b . o : b . c$ (CC) $ (CFLAGS) −o b . o b . c

c . o : c . c$ (CC) $ (CFLAGS) −o c . o c . c

pro g . o : pro g . c

$ (CC) $ (CFLAGS) −o p r o g . o p r o g . c

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Substitution References

substitutes the value of a variable with alterations thatyou specify

syntax:

$ ( v a r : a=b )

${ v a r : a=b}

take the value of the variable var , replace every a at theend of a word with b

example:

SRCS = a . c b . c c . c pro g1 . cOBJS = $ (SRCS : . c=.o )

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Inference Rules

many rules have the following form:

< f i l e n a m e >. o : < f i l e n a m e >. c$ (CC) $ (CFLAGS) .c

use inference rules to avoid all these lenthy entries in aMakefile

. c . o :

$ (CC) $ (CFLAGS) $<

$< is a dependent file out-of date with the target file

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DEMO

CC = g++CFLAGS = −c −g −Wal lSRCS = a . c b . c c . c pro g . cOBJS = $ (SRCS : . c=.o )

pro g : $ (OBJS)$ (CC) $ (OBJS) −o p r o g

. c . o :$ (CC) $ (CFLAGS) $<

c l e a n :rm − r f ∗~ ∗o ∗d p r o g



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Automatic Generation Of Makefile Dependencies

the inference rule only covers part of the source codedependency (only knows that program.o depends onprogram.c)

to solve this problem ⇒ list the dependencies separatelyin make file

gcc compiler with the flag “-MMD” automatically createsthe dependecy files(file.d)

add the dependecy files to Makefile with include directive include directive suspends reading of the current makefile

and read one or more other makefiles before continuing

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Parallel Compiling

take advantage of systems that have multiple processors,or multiple-core processors

a separate build process is created for each availableprocessor

flag -j: specifies the number of jobs to run simultaneously

make − j [ jobs ]
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