Advanced TransistorsBreakout Session 1
regarding Applied’s products, strategic position and growth opportunities.
These statements are subject to known and unknown risks and
uncertainties that could cause actual results to differ materially from those
expressed or implied by such statements, including but not limited to: the
level of demand for Applied’s products, which is subject to many factors,
including: uncertain global economic and industry conditions, business
and consumer spending, demand for electronic products and
semiconductors, and customers’ utilization rates and new technology and
capacity requirements; Applied’s ability to (i) develop, deliver and support
a broad range of products and expand its markets, (ii) obtain and protect
intellectual property rights in key technologies, and (iii) attract, motivate
and retain key employees; and other risks described in Applied’s SEC
filings. All forward-looking statements are based on management’s
estimates, projections and assumptions as of March 23, 2011, and Applied
undertakes no obligation to update any forward-looking statements.
2
Industry convergence on gate-last approach
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
Copper
Damascene
Through-Silicon
5
W F
E S
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
External Use
R 140
G 140
B 140
R 220
G 220
B 220
R 69
G 153
B 195
R 254
G 203
B 0
R 255
G 121
B 1
R 234
G 40
B 57
R 155
G 238
B 255
R 146
G 212
B 0
R 75
G 75
B 75
R 6
G 30
B 60
>6 pts PVD: Endura enables multi-layer metal gates
Expected ‘08 – ‘11F Share Gain
>6 pts Transistor: Thermal gate stack opportunity growth
>7 pts CMP: In-situ endpoint control
Source: VLSI Mar’11, Applied Materials (CY’11 forecast)
Centura® Gate
IBM ‘fab club’ switches high-k camps – IBM Jan 18th, 2011
For 20nm, “gate-last is a better approach”…
TSMC Adds High-k Metal Gate Low Power Process to
28nm Roadmap – TSMC, Aug 24th, 2009
“28nm [high-performance logic]…
on a gate-last approach”
Moore’s law, computing performance – Intel, Nov 11th, 2007
“Called the biggest transistor advancement
in 40 years by Intel Co-Founder Gordon Moore,
the processors are first to use Intel’s
Hafnium-based high-k metal gate”
8
Thermal
Gate
Stack
Metal
Gate
Stack
CMP
Metal
Gate
Stack
Thermal
Gate
Stack
Metal Gate Transition at ≤28nm Is Just Beginning
0
1
2
3
4
'04 '05 '06 '07 '08 '09 '10 '11E '12F '13F '14F
Foundry Capacity (Millions of wafer starts)
65nm ≤32/28nm 90nm
Polysilicon
Gate
SiON
Gate electrode becomes metal
11 2011 Investor and Analyst Meeting
SiON interface
layer ~ 0.5nm
2 nm
High-k ~2.5nm
Silicon Substrate
Metal Electrode
Cap metal
Atomic-scale engineering
Material stability
TiAl
SiON
High-k compatibility
Gate definition by CMP
Ti TiN TaN TiN
New high-k materials
Multiple gate materials
Low power
+ = Complexity Inflection Growth