1000 Technology Drive, Pittsburgh, PA 15219 645 Russell Street, Batesburg, SC 29006 SM 1A1.0001

Copyright © 2014 SM 1A1.0001, Rev. 2 Ansaldo STS USA, Inc. June 2014

SYSTEM DESCRIPTION

MicroLok® II 2/2

Notices

SM 1A1.0001, Rev. 2, June 2014 i

Proprietary Notice This document and the information contained therein are confidential

– the disclosure or other communication, copying, reproduction and

any use whatsoever is forbidden without the written authorization of

Ansaldo STS USA, Inc.

Important Notice ASTS USA constantly strives to improve our products and keep our customers apprised of changes in technology. Following the recommendations contained in the attached service manual will provide our customers with optimum operational reliability. The data contained herein purports solely to describe the product, and does not create any warranties.

Within the scope of the attached manual, it is impossible to take into account every eventuality that may arise with technical equipment in service. Please consult an ASTS USA local sales representative in the event of any irregularities with our product.

ASTS USA expressly disclaims liability resulting from any improper handling or use of our equipment, even if these instructions contain no specific indication in this respect. We strongly recommend that only approved ASTS USA spare parts are used as replacements.

© Property of Ansaldo STS USA, Inc., 2014 all rights reserved 1000 Technology Drive, Pittsburgh, PA USA 15219-3120

645 Russell Street, Batesburg, SC 29006 www.ansaldo-sts.com

Revision History

ii SM 1A1.0001, Rev. 2, June 2014

Revision History

Revision Date Nature of Revision

1 May 2014 Initial release

2 June 2014

Revised last paragraph of Section 2.4 to remove toggle switch information. Added part numbers to Section 2.6, Section 2.8, and Section 2.10. Added Section 2.11 and Section 2.12. Revised table in Section 3.2. Added J20 connector reference to Figure 2-13.

General Information

SM 1A1.0001, Rev. 2, June 2014 iii

Table of Contents 1. GENERAL INFORMATION ............................................................................................................... 1-1

1.1. RAIL Team and Technical Support ........................................................................................... 1-1

2. SYSTEM DESCRIPTION ................................................................................................................... 2-1

2.1. General Application and Functions ........................................................................................... 2-1

2.2. Basic Hardware/Software Elements ......................................................................................... 2-1

2.2.1. System Cardfile ............................................................................................................. 2-1

2.2.2. Vital Cut-Off Relay/CPS Board ..................................................................................... 2-2

2.2.3. Software ........................................................................................................................ 2-2

2.3. Basic Interlocking Control ......................................................................................................... 2-2

2.4. Overview of Operating Software and Software Handling .......................................................... 2-3

2.5. System Cardfile Description ...................................................................................................... 2-4

2.5.1. General Functions and Designs of Plug-In Components .............................................. 2-5

2.6. Standard Vital Input Printed Circuit Board ................................................................................ 2-8

2.7. Ethernet Communication PCB (ECB) ..................................................................................... 2-10

2.8. Hot Standby Synchronization (SYNC) PCB ............................................................................ 2-12

2.9. Standard Vital Output Printed Circuit Board ........................................................................... 2-14

2.10. Non-Vital I/O Printed Circuit Boards ....................................................................................... 2-16

2.11. Out8.ISO Printed Circuit Boards ............................................................................................. 2-18

2.12. In8.Out8 Mixed Vital I/O .......................................................................................................... 2-20

2.13. CPS and System Power Configuration ................................................................................... 2-22

2.14. VCOR Relay Description ........................................................................................................ 2-24

3. SYSTEM SPECIFICATIONS ............................................................................................................. 3-1

3.1. System Operating Power .......................................................................................................... 3-1

3.2. Vital Input and Output Printed Circuit Boards, Power and I/O .................................................. 3-1

3.3. Non-Vital I/O Printed Circuit Board Power and Data I/O ........................................................... 3-2

3.4. Out.ISO Printed Circuit Board ................................................................................................... 3-2

3.5. In.8Out.8 Mixed Vital Printed Circuit Board .............................................................................. 3-3

3.6. MLK 2/2 CPU Printed Circuit Board .......................................................................................... 3-3

3.6.1. Serial Communications Ports ....................................................................................... 3-3

3.7. System Cardfile Hardware Configuration .................................................................................. 3-4

3.7.1. COMM.IO PCB ............................................................................................................. 3-4

3.8. VCOR Relay.............................................................................................................................. 3-4

3.9. Environmental ........................................................................................................................... 3-4

List of Figures Figure 2-1. MicroLok II 2/2 System Configuration for Basic Interlocking Control ...................................... 2-3

Figure 2-2. Front View of Cardfile N16902101 .......................................................................................... 2-5

Figure 2-3. MLK 2/2 CPU Board Front Panel Layout ................................................................................ 2-7

Figure 2-4. Standard Vital Input PCB - Front Panel Layout....................................................................... 2-9

Table of Contents

iv SM 1A1.0001, Rev. 2, June 2014

Figure 2-5. Ethernet Communication PCB - Front Panel Layout ............................................................ 2-11

Figure 2-6. Hot Standby Synchronization PCB - Front Panel Layout ...................................................... 2-13

Figure 2-7. Standard Vital Output PCB Front Panel Layout .................................................................... 2-15

Figure 2-8. Basic Configuration of the Standard Vital Output PCB ......................................................... 2-16

Figure 2-9. Non-Vital I/O PCB Front Panel Layout .................................................................................. 2-17

Figure 2-10. Out8.ISO PCB Front Panel Layout ..................................................................................... 2-19

Figure 2-11. In8.Out8 Mixed Vital I/O PCB Front Panel Layout .............................................................. 2-21

Figure 2-12. CPS PCB - Front Panel Layout ........................................................................................... 2-23

Figure 2-13. Typical MicroLok II Cardfile External Power Supply Equipment and Connections ............. 2-24

General Information

SM 1A1.0001, Rev. 2, June 2014 1-1

1. GENERAL INFORMATION

This manual provides the following information on MicroLok II system:

System-level application and operational descriptions

Application and design technical specifications

System-specific configurations

System level and component specifications

Related manuals covering the MicroLok II 2/2 system include:

SM-1A1.0002 – System Hardware Installation Manual

SM-1A1.0003 – System Startup, Troubleshooting, and Maintenance

SM-6800D – System Application Logic Programming Guide; MicroLok II

SM-6800G – MicroLok II Application Guidelines

1.1. RAIL Team and Technical Support

The Rapid Action Information Link (RAIL) team created in 1996 serves the technical needs of current and potential ASTS USA customers. Convenient 24-hour access and a rapid resolution to customer problems are the trademarks of this organization. The RAIL team, which is staffed primarily by ASTS USA product and application engineers, is ready to assist and resolve technical issues concerning this or any ASTS USA product.

Direct any questions regarding the contents of this service manual to the RAIL team by telephone at 1-800-652-7276 or through Internet e-mail at railteam@ansaldo-sts.us.

MicroLok is a registered trademark of Ansaldo STS USA, Inc.

General Information

1-2 SM 1A1.0001, Rev. 2, June 2014

System Description

SM 1A1.0001, Rev. 2, June 2014 2-1

2. SYSTEM DESCRIPTION

2.1. General Application and Functions

The MicroLok II 2/2 interlocking control system is a multi-purpose monitoring and control system for railroad and rail mass transit wayside interlocking equipment. Basic applications and uses of the MicroLok II 2/2 system include:

Switch machine control and switch point position monitoring

Switch lock position monitoring

Local manual control of wayside switch machines for maintenance and contingencyoperations

Vital serial communications to other compatible interlocking control and track circuitsystems

Non-vital controller logic

The MicroLok II 2/2 system implements these functions in any combination, from basic to complex through the use of application-specific hardware configurations. The modular design of the MicroLok II 2/2 system enables each customer to custom-configure a system that will meet the specific control and interface requirements for the intended application. The operational configuration of the MicroLok II 2/2 system is primarily defined within the application logic software, which is custom-developed using the MicroLok II 2/2 programming tools.

2.2. Basic Hardware/Software Elements

The basic hardware and software elements of the MicroLok II 2/2 system include:

2.2.1. System Cardfile

Vital CPU for overall system monitoring, control, diagnostics and data recording.

Vital output channels for relay control.

Vital input channels for relay indications.

Non-vital I/O channels for local control panel (LCP) non-vital controls and indications.

Vital serial data I/O channels for communication with remote systems.

Front Panel USB and Ethernet Communications channels for system maintenance, andapplication logic and executive software loading and upgrades.

User controls/displays for on-site system configuration and access to diagnostic codes.

Rear Panel Ethernet communications

Rear Panel communications and I/O to partner MicroLok II 2/2 System

System Description

2-2 SM 1A1.0001, Rev. 2, June 2014

2.2.2. Vital Cut-Off Relay/CPS Board

Provides CPU-controlled switching of battery power to vital output circuits.

2.2.3. Software

The basic software elements include:

Executive Program to provide the basic monitoring and control operating system.

Application Logic program that specifies the user’s desired logic processing.

Application development tools to assist with the development and testing of the site-specific application.

Maintenance tools to assist with installation and troubleshooting.

2.3. Basic Interlocking Control

The MicroLok II 2/2 system provides control and monitoring functions for all elements of basic railway vital interlocking. Supervision and control of switch machines and switch locks are managed by the vital microprocessors on the system cardfile 2/2 CPU board. Standard vital output boards interface discrete commands from the 2/2 CPU board to switch machine relays or other types of vital relays as required. Vital input boards interface various external circuit inputs back to the 2/2 CPU board. A typical vital input would be switch machine correspondence.

A device that augments the basic MicroLok II 2/2 interlocking control function is a vital cut-off relay (VCOR). The VCOR contacts control the supply of battery power to all cardfile vital outputs such as switch machine relays. The VCOR relay is controlled by the cardfile CPU board microprocessors, which performs constant diagnostics on MicroLok II 2/2 internal circuits and external circuit interfaces. These diagnostics include monitoring of all individual vital output and inputs channels at the point of interface with external circuits. (See Figure 2-1.)

The microprocessors responds to failure of a safety-critical diagnostic by commanding the cardfile Power Supply board to remove the dc supply to the VCOR coil. This drops the VCOR and opens the contacts that provide battery power to the vital output boards. This fail-safe function defaults the interlocking equipment associated with the MicroLok II 2/2 system to the most restrictive state.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-3

N12 VITAL CONTROLS

VITAL INDICATORS

NON-VITAL OUTPUTS

NON-VITAL INDICATORS

VCOR

VITAL B12BATTERY

MICROLOK IISYSTEM

CARDFILE

STA

ND

AR

D V

ITA

L O

UTP

UT

VITA

L IN

PUT

NO

N-V

ITA

L I/O

CPS

CPU

1D2.

0398

.00

Figure 2-1. MicroLok II 2/2 System Configuration for Basic Interlocking Control

2.4. Overview of Operating Software and Software Handling

Depending on the system application, the MicroLok II 2/2 system cardfile can contain up to three main sets of software elements. All MicroLok II 2/2 systems contain executive and application software on the 2/2 CPU board. In addition, an EEPROM, located on the 2/2 CPU board edge connector housing, is programmed with site-specific configuration data that is unique to the cardfile.

The executive software is standard for all MicroLok II 2/2 systems (ASTS USA-developed) and is responsible for the overall vital monitoring and control of the system. The responsibilities of the executive software include:

Interlocking vital input monitoring, decision making and commands.

Monitoring of all vital input and output channels for intended on/off states.

System Description

2-4 SM 1A1.0001, Rev. 2, June 2014

Processing of user inputs received from a laptop PC or the CPU board front panel.

Continuous internal and external diagnostics.

Recording and playback of routine event and error codes.

Recording and playback of user-specified events.

Management of the serial data ports.

Execution of the application software.

All MicroLok II 2/2 CPU boards are shipped with the executive software already loaded into memory. Version upgrades are downloaded to the 2/2 CPU using a laptop PC and a Web Browser connected to either Ethernet port on the CPU board front panel.

The vital application software contains the application-specific logic (user-developed) appropriate for the overall MicroLok II 2/2 system configuration. Generally, the user develops this software using the ASTS USA programming tools and can be downloaded to the 2/2 CPU using the same Web interface used for executive software version upgrades. Refer to service manual SM-6800D for detailed information on MicroLok II 2/2 application software programming.

Site-specific configuration data stored in the CPU board edge connector housing EEPROM can be loaded using a laptop PC connection to the CPU board front panel serial port.

2.5. System Cardfile Description

Cardfile N16902101 (shown in Figure 2-2) is comprised of a 20-slot lower motherboard.

This cardfile was designed for use in a redundant MicroLok II 2/2 System containing two MicroLok II 2/2 cardfiles wired together in such a manner to provide the necessary redundancy for automatic failover.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-5

1A1.

0182

.00

Figure 2-2. Front View of Cardfile N16902101

2.5.1. General Functions and Designs of Plug-In Components

2.5.1.1. MLK 2/2 CPU Board

The same CPU board (part number N17068501, shown in Figure 2-3) is used in all MicroLok II 2/2 applications. The general functions of this board include:

Monitoring external indications from vital and non-vital input boards.

Processing vital external indications and executing logic defined in the application software.

Driving the vital and non-vital output boards as required by the application program.

Monitoring and controlling serial communication ports (links to other controllers).

Testing individual vital input and output channels for faults (in parallel with control of these channels) and responding to detected faults.

Monitoring system internal operation for faults and responding to detected faults.

Controlling power to vital outputs through the cardfile power supply and an external VCOR relay (fail-safe function).

System Description

2-6 SM 1A1.0001, Rev. 2, June 2014

Recording system faults and routine events in user-accessible memory.

Responding to CPU board front panel switch inputs and operating the associated displays.

Interacting with a laptop PC during system diagnostic operations, application logicprogramming, and executive software upgrading.

The CPU board is controlled by two architecturally diverse processors operating in a “two-out-of-two” mode. Each processor independently performs all vital functions and compares its operational state, input states, and application logic processing results with the other vital processor before setting the output states. A third non-vital processor handles the user interface and non-vital serial communication functions.

The CPU board incorporates four serial data ports which are intended for communications with external vital and non-vital systems.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-7

1D21

.039

9.00

A B C D

1 2 3 4

Figure 2-3. MLK 2/2 CPU Board Front Panel Layout

System Description

2-8 SM 1A1.0001, Rev. 2, June 2014

2.6. Standard Vital Input Printed Circuit Board

The MicroLok II standard vital input board (part numbers N17061001, N17061002, N17061003, N17061004, and N17061005) (shown Figure 2-4), provides 16 isolated inputs. Each input is isolated from each other, chassis, battery and all other circuitry on this board and in this system. The isolation is accomplished by physical spacing and opto-couplers on each input.

There are 16 green LED indications on the front panel that show the status of each input. The LED indications are numbered from 1 on the top to 16 on the bottom. These are software-controlled LEDs and will only turn on when the executive software reads it as a "1."

Each input can be wired independently or as a bipolar configuration; for more information, refer to the basic interface wiring diagram and information in SM-1A1.0002.

The standard vital input board operating specifications are described in Section 3 of this manual.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-9

1A1.

0338

.00

Figure 2-4. Standard Vital Input PCB - Front Panel Layout

System Description

2-10 SM 1A1.0001, Rev. 2, June 2014

2.7. Ethernet Communication PCB (ECB)

The Ethernet Communications PCB, N17066403 (shown in Figure 2-5), provides two Ethernet ports for PEER or Safe-P protocol communications to other systems.

An on-board processor manages the network communications. The user’s application program configures the port parameters such as IP address, network mask, etc. After configuration, the application program sets and reads bits from messages in the same way as it does for other serial messaging.

The rear panel connector for this board provides two RJ-45 jacks for common CAT 5 network cables. These two ports are typically configured by the application program for redundant networks.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-11

ECB

RESET

C

ETH1

RESET

A

B

ETH2

FACTORYUSE ONLY

1A1.

0177

.01

Figure 2-5. Ethernet Communication PCB - Front Panel Layout

System Description

2-12 SM 1A1.0001, Rev. 2, June 2014

2.8. Hot Standby Synchronization (SYNC) PCB

The Hot Standby Synchronization (SYNC.IO) PCB (part numbers N17066401 and N17066402) shown in Figure 2-6), is a special version of the ECB board. With the addition of vital inputs and outputs this PCB is designed to communication directly to a matching PCB in a partner/backup MicroLok II 2/2 system. Once configured in the application program the MicroLok II 2/2 systems will exchange I/O states and operational status information. In the event that the online MicroLok II 2/2 system should fail the partner/backup system will seamlessly take over control of the interlocking.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-13

US

0702

.000

5.02

Figure 2-6. Hot Standby Synchronization PCB - Front Panel Layout

System Description

2-14 SM 1A1.0001, Rev. 2, June 2014

2.9. Standard Vital Output Printed Circuit Board

The MicroLok II standard vital output board (part number N17060501, N17060502, N17066801, and N17066802) shown in Figure 2-7 and Figure 2-8, interfaces CPU vital outputs to external relay coils and similar loads. The board provides 16 independent outputs. Outputs are controlled by “high side” software-controlled switches that connect battery positive to the output.

Two styles of this PCB exist (all information applies to both PCB styles unless noted otherwise):

N170605xx PCBs Each output is also protected with a polyswitch, a device that functionslike a circuit breaker. When the overcurrent trip point (about 0.75 amp) is exceeded, thedevice switches to high impedance. The polyswitch returns to low impedance when theoverload or short circuit condition is removed. A short to battery negative trips the affectedpolyswitch. This results in the dropout of the VCOR relay, thus protecting all vital outputcircuits associated with the system. The system responds to a short to battery positive in thesame manner as a false output. This condition also results in the dropout of the VCOR relay.

N170668xx PCBs protect each output using a fuse. The fuse is mounted to the PCB (SMT)and is not user-serviceable.

The standard vital output board operating specifications are described in Section 3 of this manual.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-15

OUTPUTN170

605XX

OUT 1

OUT 2

OUT 3

OUT 4

OUT 5

OUT 6

OUT 7

OUT 8

OUT 9

OUT10

OUT11

OUT12

OUT13

OUT14

OUT15

OUT16

Figure 2-7. Standard Vital Output PCB Front Panel Layout

System Description

2-16 SM 1A1.0001, Rev. 2, June 2014

VCORRelay

House B12

ControlledExternalRelay

+-

House N12

Output“X”

AnalogGround

CPU Control

Polyswitch-Protected

Output “Contact”

Standard Vital OutputPCBs (12V)

Figure 2-8. Basic Configuration of the Standard Vital Output PCB

2.10. Non-Vital I/O Printed Circuit Boards

The non-vital I/O printed circuit boards enable the MicroLok II 2/2 system to generate and monitor the status of non-vital discrete inputs and outputs. Examples of non-vital I/O include controlled outputs to light remote indicator lamps, and the I/O associated with the switches and indicators on the local control panel (if installed). I/O board part number N17061501 (Figure 2-9) is used for external I/O circuits and provides 32 inputs and 32 outputs through its rear 96-pinconnector.

The non-vital I/O board employs polyswitches to protect the output circuitry. A polyswitch functions like a circuit breaker. When the over current trip point (about 0.75 amp) is exceeded, the device switches to high impedance. The polyswitch returns to low impedance when the overload or short circuit condition is removed. Two outputs on both board types are rated at 2.0A protected by 5.0A fuse. These output circuits are reserved for control of a relatively high current device. Inputs on both boards are activated from a positive voltage relative to battery ground over a range of 4.5 to 32.4 VDC. The non-vital I/O boards use latch ICs to buffer inputs and field effect transistors (FETs) to drive outputs.

The standard non-vital I/O board operating specifications are described in Section 3 of this manual.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-17

NV.IN32.0UT32

1

2

3

4

5

6

7

8

9

10

11

12

INPUTS

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

1

2

3

4

5

6

7

8

9

10

11

12

OUTPUTSSWITCHED

TO N12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

Figure 2-9. Non-Vital I/O PCB Front Panel Layout

System Description

2-18 SM 1A1.0001, Rev. 2, June 2014

2.11. Out8.ISO Printed Circuit Boards

The OUT8.ISO Vital Isolated Output PCB (part numbers N17065801, N17065802) shown in Figure 2-10, provides 8 vital isolated outputs for double break control of normal and BiPolar relays. Each output provides a positive (+) and a negative (-) connection that is isolated from the house battery and other outputs.

Outputs on the OUT8.ISO PCB can be selected to be Normal or BiPolar using the jumpers on the OUT8.ISO PCB.

Outputs are controlled by “high side” software-controlled switches and are protected by a PolySwitch, which acts like a circuit breaker. When the over-current trip point is reached (approximately 0.75A), the PolySwitch switches to a high impedance. The switch resets to its normal low impedance when the additional load or short is removed. Shorted outputs will not cause any damage to the PCB.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-19

OUT8.ISO

OUT1

OUT7

OUT6

OUT5

OUT4

OUT3

OUT8

OUT2

1A1.

0206

.00

Figure 2-10. Out8.ISO PCB Front Panel Layout

System Description

2-20 SM 1A1.0001, Rev. 2, June 2014

2.12. In8.Out8 Mixed Vital I/O

The IN8.OUT8 Mixed Vital I/O PCB (part numbers N17061601, N17061602, N17061603, 17066701, 17066702) shown in Figure 2-10, provides eight isolated vital inputs and eight non-isolated vital outputs.

The eight isolated vital input circuits, which interface with external devices, are isolated from all other inputs, the motherboard I/O Bus, cardfile chassis, and system battery to a minimum of 2000Vrms isolation. All eight non-isolated outputs on the PCB share a common floating N12 (isolated from system ground).

Each input circuit senses the voltage (vital level detector) applied to it, translates that voltage into a specific "On" or "Off" state, and then makes that state available to the cardfile CPU via the cardfile motherboard I/O data bus. When an input is detected and the CPU system diagnostics are valid, the system software turns the corresponding LED input indicator "On." Each circuit is vital in the sense that it will not falsely indicate an "On" state to the CPU.

Inputs are only accepted as "On" when the positive voltage value is within the voltage range specification of the board.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-21

IN8.OUT8

IN 1

IN 2

IN 3

IN 4

IN 5

IN 6

IN 7

IN 8

OUT 1

OUT 2

OUT 3

OUT 4

OUT 5

OUT 6

OUT 7

OUT 8

1A1.

0376

.00

Figure 2-11. In8.Out8 Mixed Vital I/O PCB Front Panel Layout

System Description

2-22 SM 1A1.0001, Rev. 2, June 2014

2.13. CPS and System Power Configuration

The MicroLok II Conditional Power Supply board (part number N451910-7501) shown in Figure 2-12 and Figure 2-13, is designed to power the system Vital Cut-Off Relay (VCOR) and is controlled by a 250 Hz. AC signal from the 332 CPU PCB. A diagram of the board appears in Figure 2-12.

CPS defines a Conditional Power Supply, whose output voltage is present only when a vitally generated AC input signal is present. This AC signal is generated by the 332 CPU PCB if and only if the program is executing correctly.

The CPS generates the vital negative 10V to power the 400 ohm VCOR in response to a 250Hz input from the CPU. The VCOR operates with negative voltage applied to eliminate the possibility of being energized by any possible positive voltages in the system. The CPS output energizes the VCOR, closing its contacts, providing vital input voltage to the cardfile PCBs. A series tuned circuit at the CPS input eliminates frequencies other than 250Hz.

Two non-vital LEDs located on the front panel indicate:

5V power to cardfile PCBs

CPS power to VCOR.

External system power supplies are used to provide the MicroLok II cardfile with +5V and +/-12V power. These three voltages are needed to power all of the plug-in boards used in the cardfile.

The power is brought into the cardfile on the lower 20-slot motherboard backplane through connector J20 just behind slot #19. See Figure 2-13 for typical wiring of external power supplies.

Vital House B12 is a separate source of power; it is not the +12V supplied by the external system power supply. Vital House B12 is House B12 that is controlled through contacts of the VCOR of which is driven by the CPS. When the system is functioning correctly, the CPS picks the VCOR and this then delivers the Vital House B12 to the vital output board to drive external relays. If a fault in the system is detected the CPS drops the VCOR, thus disabling the vital outputs.

Refer to section 3.1 to ensure the combination of boards you have selected does not overload the system power supply.

System Description

SM 1A1.0001, Rev. 2, June 2014 2-23Figure 2-12. CPS PCB - Front Panel Layout

Figure X.XX. CPS PCB - Front Panel Layout

CONDITIONALPOWERSUPPLY

5V ONVCOR

System Description

2-24 SM 1A1.0001, Rev. 2, June 2014

1D2.

0400

.01

J20

Figure 2-13. Typical MicroLok II Cardfile External Power Supply Equipment and

Connections

2.14. VCOR Relay Description

The vital cut-off relay (VCOR) is used by the MicroLok II 2/2 system to control power to all vital outputs. This relay is energized by the conditional output from the CPS circuit board in the system cardfile. The MLK 2/2 CPU board controls this fail-safe function. An ASTS USA PN-150B vital biased relay (N322500-701) is used for the VCOR. This relay incorporates a 400 ohm coil, and 6FB contacts consisting of low voltage silver-to-silver fronts and silver-to-silver backs.

Refer to Section 3 for additional specifications on this relay.

System Specifications

SM 1A1.0001, Rev. 2, June 2014 3-1

3. SYSTEM SPECIFICATIONS

3.1. System Operating Power

The table below provides a list of the worst-case current draws for MicroLok II 2/2 system boards:

NOTE

For detailed power calculations, refer to the power calculation spreadsheet found in the MicroLok II development system.

Board Condition +5V +12V -12VMMLK 2/2 CPU (N17068501) Serial Links ON 2 amp N. A. N. A.

IN16 (N1706100X) 16 LEDs ON 170.80 mA N. A. 275.40 mA

OUT16 (N1706050X) (N1706680X) 16 LEDs ON 154.80 mA 6 mA N. A.

IN8OUT8 (N1706160X) 8 LEDs ON 150 mA 4 mA 146.2 mA

NVIN320UT32 (N17061501) without LCP 32 LEDs ON 581 mA N. A. N. A.

NVOUT32 (N1706270X) 32 LEDs ON 143.5 mA N. A. N. A.

NVIN32 (N17706370X) 32 LEDs ON 363.80 mA N. A. N. A.

OUT.8.ISO (N17065801, N17065802) 8 LEDs ON 78 mA 4.50 mA N. A.

SYNC.IO (N17066401) (12V) N. A. 1 amp 5.0 mA 5.0 mA

COMM.IO N17066403 N. A. 1 amp 5 mA 0 mA

3.2. Vital Input and Output Printed Circuit Boards, Power and I/O

Vital Inputs

ASTS USA Part No.

Number of Isolated Inputs

Nominal Input

Voltage

Minimum Voltage to Ensure ON

State

Voltage to Ensure OFF

State

Maximum Sustained

Input Voltage

N17061001 16 12V 9.8V 7.0V or less 16.2V

N17061001 16 24V 9.5V 7.0V or less 34V

N17061001 16 50V 17.0V 9.0V or less 62V

N17061001 16 10V 35.0V 15.0V or less 72V

N17061001 AC immunity 16 24V 8.5V 7.0V or less 34V

System Specifications

3-2 SM 1A1.0001, Rev. 2, June 2014

Standard Vital Outputs

ASTS USA Part No.

Number of Non-isolated

Outputs

Voltage VBATT Range

Load Resistance

Range

Maximum OFF

Voltage

Minimum ON Voltage

N17060501 16 12V 50 - 0.75V VBATT - 1V

N17060502 16 24V 100 - 1.5V VBATT – 1V

N17066801 16 12V 50 - 0.75V VBATT – 2.5V

N17066802 16 24V 100 - 1.5V VBATT – 5V

N17065801 8 12V 50 0.75V ≈ 11.5V

N17065802 8 24V 100 1.50V ≈ 23V

3.3. Non-Vital I/O Printed Circuit Board Power and Data I/O

Non-Vital I/Os

ASTS USA

PART NO.

INPUT AND

OUTPUT

VOLTAGE

RANGE

EXTERNALLY

AVAILABLE

INPUTS

EXTERNALLY

AVAILABLE

OUTPUTS

CURRENT RATING ON

OUTPUTS

N17061501 4.5 to 32.4VDC 32 32

Outputs 1-30: 0.25A (polyswitch-protected)

Outputs 31, 32: 2.0A (Protected by a 5.0A, 3AG, 250 Volt fuse)

N1706160X 8 8

N1706270X N. A. 32

N17706370X 32 N. A.

3.4. Out.ISO Printed Circuit Board

ASTS USA

PART NO.

VOLTAGE

VBATT

RANGE

LOAD

RESISTANCE

RANGE

MAX. OFF

VOLTAGE

MIN. ON

VOLTAGE

N17065801 9.8V – 16.2V 50 -

0.75V ≈11.50V

400 - ≈12.50V

N17065802 18V – 32V 100 -

1.5V ≈23V

800 - ≈24V

System Specifications

SM 1A1.0001, Rev. 2, June 2014 3-3

3.5. In.8Out.8 Mixed Vital Printed Circuit Board

ASTS USA PART NO.

VOLTAGE VBATT RANGE

LOAD RESISTANCE

RANGE

MAX. OFF VOLTAGE

MIN. ON VOLTAGE

N17061601 12V 50 - ∞ 0.75V VBATT – 1V

N17061602 24V 100 - ∞ 1.5V VBATT – 1V

N17061603 24V 100 - ∞ 1.5V VBATT – 1V

N17066701 12V 50 - ∞ 0.75V VBATT – 1V

N17066702 24V 100 - ∞ 1.5V VBATT – 1V

3.6. MLK 2/2 CPU Printed Circuit Board

3.6.1. Serial Communications Ports

3.6.1.1. COM1 Port

Type: EIA RS-485 TxD and RxD System Battery (VBatt) External terminations required

3.6.1.2. COM2 Port

Type: EIA RS-485 TxD and RxD System Battery (VBatt) External terminations required

3.6.1.3. COM3 Port

Types: EIA RS-232 or RS-423

TxD and RxD System Battery (VBatt) External terminations required for RS-423

3.6.1.4. COM4 Port

Type: EIA RS-232 TxD and RxD System Battery (VBatt) Transmitter can be jumper-disabled

3.6.1.5. ETH A, ETH B Port, (CPU Front Panel to PC, Software Uploads)

Type: Ethernet TxD and RxD System ground referenced

Connector type: RJ-45 female

System Specifications

3-4 SM 1A1.0001, Rev. 2, June 2014

3.6.1.6. USB Port, (CPU Front Panel to PC, Diagnostics)

Type: USB TxD and RxD System ground referenced

Connector type: USB, B jack

3.7. System Cardfile Hardware Configuration

ASTS USA Part Number Cardfile

Mounting PCB

Mounting Slot Bus

Addressing

Upper PCB Interface

Connectors

Remote Power Supply

Connector

N16902101 Std. 19” rack, Shelf or wall Eurocard Via jumpers in

connector housings 48- / 96-pin male 8-way cage clampdiscrete wire conn.

3.7.1. COMM.IO PCB

ASTS USA

PART

NO.

INPUT AND

OUTPUT

VOLTAGE

RANGE

EXTERNALLY

AVAILABLE

INPUTS

EXTERNALLY

AVAILABLE

OUTPUTS

CURRENT RATING ON

OUTPUTS

N17066403 N. A. N. A. N. A. N. A.

3.8. VCOR Relay

Type Contacts Coil Resist.

(Ohms) Pickup Amps

Pickup DC Volts

System Voltage

ASTS USA PN-150B

N322500-701 6FB 400 0.0132 5.3 10

3.9. Environmental

System Cardfile Vibration Operating Temperature

Range (All Units)

Humidity Limit

5 - 20Hz.: 0.05" P-P displacement 20-200Hz.: 1.0G Peak Shock: 10G Peak

-40oC to +70oC 95% non-condensing

System Specifications

SM 1A1.0001, Rev. 2, June 2014 3-5

System Specifications

3-6 SM 1A1.0001, Rev. 2, June 2014

End of Manual