19
Stereo Audio Codec with USB Interface, Single-Ended Analog Input/Output and S/PDIF V2902 1 1. General Description The V2902 is a single-chip USB stereo audio codec with USB-compliant full-speed protocol controller and S/PDIF. The USB protocol controller works with no software code, but the USB descriptors can be modified in some areas (e.g., vendor ID/product ID). The V2902 employs SpAct TM architecture, an unique system that recovers the audio clock from USB packet data. On-chip analog PLLs with SpAct enable playback and record with low clock jitter and with independent playback and record sampling rates. It is mainly be used in many areas, such as USB Audio Speaker, USB Headset, USB Monitor and USB Audio Interface Box. Features: With S/PDIF On-Chip USB Interface With Full-Speed Transceivers Fully Compliant With USB 1.1 Specifi cation Certifi ed by USB-IF Partially Programmable Descriptors USB Adaptive Mode for Playback USB Asynchronous Mode for Record Bus Powered 16-Bit Delta Sigma ADC and DAC Sampling Rate DAC: 32, 44.1, 48 kHz ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz With Single 12-MHz Clock Source Single Power Supply: 5 V TYP (V BUS ) Stereo ADC Analog Performance at VBUS = 5 V THD+N = 0.01% SNR = 89 dB Dynamic Range = 89 dB Decimation Digital Filter Pass-Band Ripple = ±0.05 dB Stop-Band Attenuation = –65 dB Single-Ended Voltage Input Antialiasing Filter Included Digital LCF Included

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Page 1: Stereo Audio Codec with USB Interface, Single-Ended Analog … · 2019. 2. 4. · Stereo Audio Codec with USB Interface, Single-Ended Analog Input/Output and S/PDIF V2902 1 1. General

Stereo Audio Codec with USB Interface, Single-Ended Analog Input/Output and S/PDIF

V2902

1

1. General Description

The V2902 is a single-chip USB stereo audio codec with USB-compliant full-speed protocol controller and S/PDIF. The USB protocol controller works with no software code, but the USB descriptors can be modified in some areas (e.g., vendor ID/product ID). The V2902 employs SpActTM architecture, an unique system that recovers the audio clock from USB packet data. On-chip analog PLLs with SpAct enable playback and record with low clock jitter and with independent playback and record sampling rates. It is mainly be used in many areas, such as USB Audio Speaker, USB Headset, USB Monitor and USB Audio Interface Box.

Features:

With S/PDIF

• On-Chip USB Interface– With Full-Speed Transceivers– Fully Compliant With USB 1.1 Specifi cation– Certifi ed by USB-IF– Partially Programmable Descriptors– USB Adaptive Mode for Playback– USB Asynchronous Mode for Record– Bus Powered

• 16-Bit Delta Sigma ADC and DAC• Sampling Rate

– DAC: 32, 44.1, 48 kHz– ADC: 8, 11.025, 16, 22.05, 32, 44.1, 48 kHz

• With Single 12-MHz Clock Source• Single Power Supply: 5 V TYP (VBUS)• Stereo ADC

– Analog Performance at VBUS = 5 V– THD+N = 0.01%– SNR = 89 dB– Dynamic Range = 89 dB– Decimation Digital Filter– Pass-Band Ripple = ±0.05 dB– Stop-Band Attenuation = –65 dB– Single-Ended Voltage Input– Antialiasing Filter Included– Digital LCF Included

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V2902

2

• Stereo DAC– Analog Performance at VBUS = 5 V– THD+N = 0.005%– SNR = 96 dB– Dynamic Range = 93 dB– Oversampling Digital Filter– Pass-Band Ripple = ±0.1 dB– Stop-Band Attenuation = –43 dB– Single-Ended Voltage Output– Analog LPF Included

• Multifunctions:– Human Interface Device (HID) Volume ± Control and Mute Control– Suspend Flag

• Package: 28-Pin SSOP

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V2902

3

2. Block Diagram and Pin Description

2.1 Block Diagram

VCCCI VCCP1I VCCP2I VCCXI VDDI AGNDC

DIN S/PDIF Decoder

S/PDIF Decoder

Selector

AnalogPLL

ISO-InEnd-Point

PowerManager

ISO-OutEnd-Point

HIDEnd-Point

USBProtocol

Controller

USB

SIE

XCVR

D+

SSPND

VBUS

D-

SEL0SEL1

HID0HID1HID2

Tracker(SpAct)PLL (x8)

96 MHz

12 MHz XTOXTI

ControlEnd-Point

AnalogPLL

FIFO

FIFO

5-V to 3.3-V Voltage Regulator

Lock

ADC

DAC

VINL

VOUTL

VINR

VOUTR

VCOM

DOUT

AGNDP AGNDX DGND DGNDU

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V2902

4

2.2 PIn Configurations

2.3 Pin Description

D+D-

DGNDUHID0HID1HID2SEL0SEL1

AGNDC

VBUS

VCCCI

VCOM

VINLVINR

12

456789

11

3

10

14

1213

2827

252423222120

18

26

19

15

1716

SSPNDVDDI

DOUTDINVCCXI

AGNDXXTIXTO

AGNDP

DGND

VCCP2I

VOUTR

VCCP1I

VOUTL

Pin No. Pin Name I/O Description

1 D+ I/O USB differential input/output plus (1)

2 D– I/O USB differential input/output minus (1)

3 VBUS — Connect to USB power (VBUS)

4 DGNDU — Digital ground for USB transceiver

5 HID0 I HID key state input (mute), active high (3)

6 HID1 I HID key state input (volume up), active high (3)

7 HID2 I HID key state input (volume down), active high (3)

8 SEL0 I Must be set to high (6)

9 SEL1 I Must be set to high (6)

10 VCCCI — Internal analog power supply for codec (4)

11 AGNDC — Analog ground for codec

12 VINL I ADC analog input for L-channel

13 VINR I ADC analog input for R-channel

14 VCOM — Common for ADC/DAC (VCCCI/2) (4)

15 VOUTR O DAC analog output for R-channel

16 VOUTL O DAC analog output for L-channel

17 VCCP1I — Internal analog power supply for PLL (4)

18 AGNDP — Analog ground for PLL

19 VCCP2I — Internal analog power supply for PLL (4)

20 XTO O Crystal oscillator output

21 XTI I Crystal oscillator input (2)

22 AGNDX — Analog ground for oscillator

23 VCCXI — Internal analog power supply for oscillator (4)

24 DIN I S/PDIF input (5)

25 DOUT O S/PDIF output

26 DGND — Digital ground

27 VDDI — Internal digital power supply (4)

28 SSPND O Suspend flag, active low (Low: suspend, High: operational)

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V2902

5

(1) LV-TTL level.

(2) 3.3-V CMOS level input.

(3) 3.3-V CMOS level input with internal pull-down. This pin informs the PC of serviceable control signals such as mute, volume up, or volume down, which has no connection with the internal DAC or ADC directly.

(4) Connect a decouple capacitor to GND.

(5) 3.3-V CMOS level input with internal pull-down, 5 V tolerant.

(6) TTL Schmitt trigger, 5 V tolerant.

3. Electrical Parameter

3.1 Absolute Maximum Ratings

(Tamb = 25 °C, All voltage referenced to GND, unless otherwise specified)

Characteristic Symbol Conditions Value Unit

Power Supply Voltage VBUS –0.3 to 6.5 V

Ground voltage AGNDC, AGNDP,

AGNDX, DGND, DGNDU±0.1 V

Input Current ICC ±10 mA

Digital input voltage

SEL0, SEL1, DIN −0.3 ~ 6.5 V

D+, D-, HID0, HID1, HID2, XTI, XTO,DOUT, SSPND

−0.3 ~ (VDDI+0.3) <4

Analog input voltage

VINL, VINR, VCOM, VOUTR, VOUTL

−0.3 ~ (VcccI+0.3) <4 V

VCCCI, VCCP1I, VCCP2I, VCCXI, VDDI

−0.3 ~ 4

Operating Temperature Topr −40 ~ 125 °C

Storage Temperature Tstg −55 ~ 150 °C

Soldering Temperature TL 5s 260 °C

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6

3.2 Electrical Characteristics

3.2.1 DC Characteristics (All specifications at TA = 25 °C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted)

Parameter Symbol Pins Conditions Min. Typ. Max. Unit

High-level input voltage VIH

D+, D− 2 3.3

VXTI, HID0, HID1, HID2 2.52 3.3

SEL0, SEL1 2 5.25

DIN 2.52 5.25

Low-level input voltage VIL

D+, D− 0.8

VXTI, HID0, HID1, HID2 0.9

SEL0, SEL1 0.8

DIN 0.9

High-level input current IIH

D+,D−,XTI, SEL0, SEL1 VIN = 3.3 V ±10

μAHID0, HID1, HID2 VIN = 3.3 V 50 80

DIN VIN = 3.3 V 65 100

Low-level input current IIL

D+,D−,XTI, SEL0, SEL1 VIN = 0 V ±10

μAHID0, HID1, HID2 VIN = 0 V ±10

DIN VIN = 0 V ±10

High-level output voltage VOH

D+, D− 2.8

VDOUT IOH = –4 mA 2.8

SSPND IOH= –2 mA 2.8

Low-level output voltage VOL

D+, D− 0.3

VDOUT IOL = 4 mA 0.5

SSPND IOL =2 mA 0.5

Input clock frequency XTI 11.994 12 12.006 MHz

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V2902

7

3.2.2 AC Characteristics (All specifi cations at TA = 25°C, VBUS = 5 V, fS = 44.1 kHz, fIN = 1 kHz, 16-bit data, unless otherwise noted)

Parameter Symbol Conditions Min. Typ. Max. Unit

Dynamic Performance

Total harmonic distortion plus noise THD+N

VCCCI =3.67 V,VIN = –0.5 dB

0.01 0.02

%VIN = –0.5 dB 0.1

VIN = –60 dB 5

Dynamic range A-weighted 81 89 dB

Signal-to-noise ratio SNR A-weighted 81 89 dB

Channel separation 80 89 dB

Analog Input

Input voltage 0.6 VCCCI VP-P

Center voltage 0.5 VCCCI V

Input impedance 30 kΩ

−3 dB 150 kHz

fIN = 20 kHz −0.08 dB

Digital Filter Performance

Pass band 0.454 fS Hz

Stop band 0.583 fS Hz

Pass-band ripple ±0.05 dB

Stop-band attenuation −65 dB

Delay time td 17.4/fS s

Clock Frequency

Sampling frequency 32, 44.1, 48 kHz

Dynamic Performance

Total harmonic distortion plus noise THD+NVOUT = 0 dB 0.005 0.016

%VOUT = –60 dB 3

Dynamic range EIAJ, A-weighted 87 93 dB

Signal-to-noise ratio SNR EIAJ, A-weighted 90 96 dB

Channel separation 86 92 dB

Analog Output

Output voltage VO 0.6 VCCCI VP-P

Center voltage 0.5 VCCCI V

Load impedance AC coupling 10 kΩ

LPF frequency response–3 dB 250 kHz

f = 20 kHz −0.03 dB

Digital Filter Performance

Pass band 0.445 fS Hz

Stop band 0.555 fS Hz

Pass-band ripple ±0.1 dB

Stop-band attenuation −43 dB

Delay time td 14.3 fS s

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V2902

8

4. Characteristic Curve

ADC

Parameter Symbol Conditions Min. Typ. Max. Unit

Power Supply Requirements

Voltage range VBUS 4.35 5 5.25 VDC

Supply current56 67 mA

Suspend mode 210 μA

Power dissipation PD

ADC, DAC operation

280 352 mW

Suspend mode 1.05 mW

Internal power supply voltageVCCCI, VCCP1I,

VCCP2I, VCCXI, and VDDI

3.25 3.35 3.5 VDC

TOTAL HARMONIC DISTORTION + NOISE at -0.5 dBvs

FREE-AIR TEMPERATURE

Figure 1 Figure 2

Figure 3

VBUS - Supply Voltage - V VBUS - Supply Voltage - V

Dynamic Range

SNR

Dynamic Range

SNR

Dyn

amic

Ran

ge a

nd S

NR

- dB

Dyn

amic

Ran

ge a

nd S

NR

- dB

THD

+N -

Tota

l Har

mon

ic D

isto

rtio

n +

Noi

se -

%TH

D+N

- To

tal H

arm

onic

Dis

tort

ion

+ N

oise

- %

TA - Free Air Temperature - °C TA - Free Air Temperature - °C

Figure 4

TOTAL HARMONIC DISTORTION + NOISE at -0.5 dBvs

SUPPLY VOLTAGE

DYNAMIC RANGE and SNRvs

FREE-AIR TEMPERATURE

DYNAMIC RANGE and SNRvs

SUPPLY VOLTAGE

0.010

0.009

0.008

0.007

0.006

0.005

0.004

0.003

0.010

0.009

0.008

0.007

0.006

0.005

0.004

0.003

95

90

85

80

75

95

90

85

80

75

-50 -25 0 25 50 75 100

4.0 4.5 5.0 5.5 4.0 4.5 5.0 5.5

-50 -25 0 25 50 75 100

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V2902

9

DAC

TOTAL HARMONIC DISTORTION + NOISE at 0 dBvs

FREE-AIR TEMPERATURE

THD

+N -

Tota

l Har

mon

ic D

isto

rtio

n +

Noi

se -

%

TOTAL HARMONIC DISTORTION + NOISE at 0 dBvs

SUPPLY VOLTAGE

THD

+N -

Tota

l Har

mon

ic D

isto

rtio

n +

Noi

se -

%

TOTAL HARMONIC DISTORTION + NOISE at 0 dBvs

SAMPLING FREQUENCY

THD

+N -

Tota

l Har

mon

ic D

isto

rtio

n +

Noi

se -

%

Dyn

amic

Ran

ge a

nd S

NR

- dB

DYNAMIC RANGE and SNRvs

FREE-AIR TEMPERATURE

Dyn

amic

Ran

ge a

nd S

NR

- dB

DYNAMIC RANGE and SNRvs

SUPPLY VOLTAGED

ynam

ic R

ange

and

SN

R - d

B

DYNAMIC RANGE and SNRvs

SAMPLING FREQUENCY

Figure 7 Figure 8

Figure 9

VBUS - Supply Voltage - V VBUS - Supply Voltage - V

TA - Free Air Temperature - °C TA - Free Air Temperature - °C

Figure 10

Figure 11

fS - Sampling Frequency - kHz fS - Sampling Frequency - kHz

Figure 12

0.008

0.007

0.006

0.005

0.004

0.003

0.008

0.007

0.006

0.005

0.004

0.003

0.008

0.007

0.006

0.005

0.004

0.003

-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100

98

96

97

94

95

92

93

90

91

98

96

97

94

95

92

93

90

91

98

96

97

94

95

92

93

90

91

4.0 4.5 5.0 5.5

30 35 40 45 50 30 35 40 45 50

4.0 4.5 5.0 5.5

Dynamic Range

SNR

Dynamic Range

SNR

Dynamic Range

SNR

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V2902

10

SUPPLY CURRENT

OPERATIONAL and SUSPENDSUPPLY CURRENT

vsSUPPLY VOLTAGE

SUSPEND SUPPLY CURRENTvs

FREE-AIR TEMPERATURE

OPERATIONAL SUPPLY CURRENTvs

SAMPLING FREQUENCY

Figure 14fs - Sampling Frequency - kHz

Figure 15TA - Free-Air Temperature - °C

Figure 13VBUS - Supply Voltage- V

I CC -

Ope

rati

onal

Sup

ply

Curr

ent -

mA

I CC -

Susp

end

Supp

ly C

urre

nt -

mA

I CC -

Ope

rati

onal

Sup

ply

Curr

ent -

mA

I CC -

Susp

end

Supp

ly C

urre

nt -

mA

70

50

60

40

30

20

0.30

0.26

0.28

0.24

0.22

0.204.00 4.25 4.50 4.75 5.00 5.25 5.50

30 35 40 45 50 -40 0 40 80-20 20 60 100

60

70

50

40

30

20

0.30

0.40

0.35

0.25

0.20

0.15

0.10

ADC and DAC

USB Spec Limit for Device (0.3mA)

Suspend

Operational

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V2902

11

ADC DIGITAL DECIMATION FILTER FREQUENCY RESPONSE

ADC DIGITAL HIGH-PASS FILTER FREQUENCY RESPONSE

OVERALL CHARACTERISTICS STOP-BAND ATTENUATION

TRANSITION-BAND RESPONSEPASS-BAND RIPPLE

Am

plit

ude

- dB

Am

plit

ude

- dB

Am

plit

ude

- dB

Am

plit

ude

- dB

Am

plit

ude

- dB

Frequency [x fS]

0

-20

-40

-60

-80

-100

-120

-140

-160

Am

plit

ude

- dB

0

-30

-20

-10

-40

-50

-60

-70

-80

-90

-100

-30

-20

-10

0

-40

-50

-60

-70

-80

-90

-100

0.0

0.2

-0.2

-0.4

-0.6

-0.8

-4

0

-8

-12

-16

-20

-0.2

0.0

-0.4

-0.6

-0.8

-1.0

0 8 16 24 32

0.0 0.1 0.2 0.3 0.4 0.5

0.0 0.1 0.2 0.3 0.4 0 1 2 3 4

0.46 0.48 0.50 0.52 0.54

0.0 0.2 0.4 0.6 0.8 1.0

Figure 16

STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC

Frequency [x fS]

Figure 18

Frequency [x fS]

Figure 19

Frequency [x fS/1000]

Figure 20

Frequency [x fS/1000]

Figure 21

Frequency [x fS]

Figure 17

OVERALL CHARACTERISTICS STOP-BAND ATTENUATION

TRANSITION-BAND RESPONSEPASS-BAND RIPPLE

Am

plit

ude

- dB

Am

plit

ude

- dB

Am

plit

ude

- dB

Am

plit

ude

- dB

Am

plit

ude

- dB

Frequency [x fS]

0

-20

-40

-60

-80

-100

-120

-140

-160

Am

plit

ude

- dB

0

-30

-20

-10

-40

-50

-60

-70

-80

-90

-100

-30

-20

-10

0

-40

-50

-60

-70

-80

-90

-100

0.0

0.2

-0.2

-0.4

-0.6

-0.8

-4

0

-8

-12

-16

-20

-0.2

0.0

-0.4

-0.6

-0.8

-1.0

0 8 16 24 32

0.0 0.1 0.2 0.3 0.4 0.5

0.0 0.1 0.2 0.3 0.4 0 1 2 3 4

0.46 0.48 0.50 0.52 0.54

0.0 0.2 0.4 0.6 0.8 1.0

Figure 16

STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC

Frequency [x fS]

Figure 18

Frequency [x fS]

Figure 19

Frequency [x fS/1000]

Figure 20

Frequency [x fS/1000]

Figure 21

Frequency [x fS]

Figure 17

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V2902

12

ADC ANALOG ANTIALIASING FILTER FREQUENCY RESPONSE

DAC DIGITAL INTERPOLATION FILTER FREQUENCY RESPONSE

STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC

STOP-BAND ATTENUATION PASS-BAND RIPPLE

Am

plit

ude

- dB

f - Frequency - kHz

0

-10

-20

-30

-40

-501 10 100 1k 10k

Figure 22

f - Frequency - kHz

Figure 23

Frequency[x fS]

Figure 24

Frequency[x fS]

Figure 25

PASS-BAND RIPPLE

Frequency[x fS]

Figure 26

Am

plit

ude

- dB

-30

-20

-10

0

-40

-50

-60

-70

-80

-90

-100

-6

-4

-2

0

-8

-10

-12

-14

-16

-18

-20

0 1 2 3 4 0.0 0.1 0.2 0.3 0.4 0.5

0.46 0.47 0.48 0.49 0.50 0.51 0.52 0.53 0.54

Am

plit

ude

- dB

Am

plit

ude

- dB

0.0

0.2

-0.2

-0.4

-0.6

-0.8

Am

plit

ude

- dB

-0.2

0.0

-0.4

-0.6

-0.8

-1.00.01 0.1 1 10 100

STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC

STOP-BAND ATTENUATION PASS-BAND RIPPLE

Am

plit

ude

- dB

f - Frequency - kHz

0

-10

-20

-30

-40

-501 10 100 1k 10k

Figure 22

f - Frequency - kHz

Figure 23

Frequency[x fS]

Figure 24

Frequency[x fS]

Figure 25

PASS-BAND RIPPLE

Frequency[x fS]

Figure 26

Am

plit

ude

- dB

-30

-20

-10

0

-40

-50

-60

-70

-80

-90

-100

-6

-4

-2

0

-8

-10

-12

-14

-16

-18

-20

0 1 2 3 4 0.0 0.1 0.2 0.3 0.4 0.5

0.46 0.47 0.48 0.49 0.50 0.51 0.52 0.53 0.54

Am

plit

ude

- dB

Am

plit

ude

- dB

0.0

0.2

-0.2

-0.4

-0.6

-0.8

Am

plit

ude

- dB

-0.2

0.0

-0.4

-0.6

-0.8

-1.00.01 0.1 1 10 100

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DAC ANALOG FIR FILTER FREQUENCY RESPONSE

DAC ANALOG LOW-PASS FILTER FREQUENCY RESPONSE

STOP-BAND CHARACTERISTIC

STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC

PASS-BAND CHARACTERISTIC

Am

plit

ude

- dB

Am

plit

ude

- dB

-10

0

-20

-30

-40

-50

Am

plit

ude

- dB

-10

0

-20

-30

-40

-50

0 8 16 24 32

Frequency [x fS]

Figure 27

f - Frequency - kHz

Figure 29

f - Frequency - kHz

Figure 30

Frequency [x fS]

Figure 28

0.0

0.2

-0.2

-0.4

-0.6

-0.80.0 0.1 0.2 0.3 0.4 0.5

1 10 100 1k 10k

Am

plit

ude

- dB

-0.2

0.0

-0.4

-0.6

-0.8

-1.00.01 0.1 1 10 100

STOP-BAND CHARACTERISTIC

STOP-BAND CHARACTERISTIC PASS-BAND CHARACTERISTIC

PASS-BAND CHARACTERISTIC

Am

plit

ude

- dB

Am

plit

ude

- dB

-10

0

-20

-30

-40

-50

Am

plit

ude

- dB

-10

0

-20

-30

-40

-50

0 8 16 24 32

Frequency [x fS]

Figure 27

f - Frequency - kHz

Figure 29

f - Frequency - kHz

Figure 30

Frequency [x fS]

Figure 28

0.0

0.2

-0.2

-0.4

-0.6

-0.80.0 0.1 0.2 0.3 0.4 0.5

1 10 100 1k 10k

Am

plit

ude

- dB

-0.2

0.0

-0.4

-0.6

-0.8

-1.00.01 0.1 1 10 100

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5. INTERFACE SEQUENCE

5.1 Power On, Attach, and Playback Sequence

The V2902 is ready for setup when the reset sequence has finished and the USB bus is attached. After connection has been established by setup, the V2902 is ready to accept USB audio data. While waiting, the audio data (idle state) and analog output are set to bipolar zero (BPZ).

When receiving the audio data, the V2902 stores the first audio packet, which contained 1-ms audio data, into the internal storage buffer. The V2902 starts playing the audio data when detecting the following start of frame (SOF) packet.

Figure 31.Initial Sequence

Figure 32.Play, Stop, and Detach

VBUS(Pin 3)

VBUS(Pin 3)

700μs

VOUTLVOUTR

VOUTLVOUTR

0 V

D+/D-

D+/D-

Bus Idle

Internal ResetReady for Setup Ready for Playback

Device Setup 1 ms

1 ms

BPZ

SOF

SOF SOF SOF SOF SOF

Detach

SOF SOF

2nd Audio Data1st Audio Data

Audio Data Audio Data Last Audio Data

Set Con�gurationBus Reset

2.5 V (Typ.)

5 V(Typ.)

Figure 31. Initial Sequence

Figure 32. Play, Stop, and Detach

SSPND

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5.2 Play, Stop, and Detach Sequence

When the host finishes or aborts the playback, the V2902 stops playing after the last audio data has played.

5.3 Record Sequence

The V2902 starts the audio capture into the internal memory after receiving the SET_INTERFACE command.

Figure 31.Initial Sequence

Figure 32.Play, Stop, and Detach

VBUS(Pin 3)

VBUS(Pin 3)

700μs

VOUTLVOUTR

VOUTLVOUTR

0 V

D+/D-

D+/D-

Bus Idle

Internal ResetReady for Setup Ready for Playback

Device Setup 1 ms

1 ms

BPZ

SOF

SOF SOF SOF SOF SOF

Detach

SOF SOF

2nd Audio Data1st Audio Data

Audio Data Audio Data Last Audio Data

Set Con�gurationBus Reset

2.5 V (Typ.)

5 V(Typ.)

Figure 31. Initial Sequence

Figure 32. Play, Stop, and Detach

SSPND

Figure 33.Record Sequence

Figure 34.Suspend and Resume

SET_INTERFACE IN Token

D+/D-

D+/D-

Active 5 ms Suspend

Idle

Active

VINLVINR

SOF SOF

1 ms

Figure 33. Record Sequence

Figure 34. Suspend and Resume

SOF SOF SOF

IN Token IN TokenAudio Data Audio Data Audio Data

SSPND

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5.4 Suspend and Resume Sequence

The V2902 enters the suspend state after it sees a constant idle state on the USB bus, approximately 5 ms. While the V2902 enters the suspend state, SSPND flag (pin 28) is asserted. The V2902 wakes up immediately when detecting the non-idle state on the USB bus.

6. Typical Application Circuit And Application Note

6.1 TYPICAL CIRCUIT CONNECTION 1

Figure 35 illustrates a typical circuit connection for a high-performance application. The circuit illustrated is for information only. The whole board design should be considered to meet the USB specification as a USB−compliant product.

Figure 33.Record Sequence

Figure 34.Suspend and Resume

SET_INTERFACE IN Token

D+/D-

D+/D-

Active 5 ms Suspend

Idle

Active

VINLVINR

SOF SOF

1 ms

Figure 33. Record Sequence

Figure 34. Suspend and Resume

SOF SOF SOF

IN Token IN TokenAudio Data Audio Data Audio Data

SSPND

D+1

2

3

4

5

6

7

8

9

10

11

12

13

14C2

C7

C6

C5

C4

C3

C8

C11

C12

C1

3.6 V −

22 kΩ

1.5 kΩ x 3 1.5 kΩ

22 Ω

22 Ω

IC1IN OUT GND ADJ EN1 2 3 4 5

12 kΩ

1 MΩ

12 MHz

LPF,Amp

MUTE/PowerDown

LPF,Amp

3.85V

C10

C9

28

27

26

25

24

23

22

21

20

19

18

17

16

15

D-

DGNDU

AGNDC

HID0

HID1

HID2

SEL0

SEL1

VBUS

D+

D-

GND

VBUS

VINL

VINR

VCOM

VCCCI

VCCC1I

VDDI

DOUT

AGNDP

DIN

VCCXI

AGNDX

XTI

XTO

DGND

VOUTL

VOUTR

VCCC2I

SSPND

NOTE:

C1, C2: 10 μFC3, C4, C7, C8: 1 μF (These capacitors must be less than 2 μF)C5, C6: 10 pF to 33 pF (depending on crystal resonator)C9, C10, C11, C12: The capacitance may vary depending on design.

Figure 35. Bus-Powered Con�guration for High-Performance Application

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6.2 TYPICAL CIRCUIT CONNECTION 2

Figure 36 illustrates a typical circuit connection for a simple application. The circuit illustrated is for information only. The whole board design should be considered to meet the USB specification as a USB−compliant product.

C7

C6

C5

C4

C3

C8

C11

C12

1 MΩ

12 MHz

LPF,Amp

MUTE/PowerDown

LPF,Amp

D+

D-

DGNDU

AGNDC

HID0

HID1

HID2

SEL0

SEL1

VBUS

VINL

VINR

VCOM

VCCCI

VCCC1I

VDDI

DOUT

AGNDP

DIN

VCCXI

AGNDX

XTI

XTO

DGND

VOUTL

VOUTR

VCCC2I

SSPND1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15C2

C1

C10

C9

22 Ω

22 Ω

1.5 kΩ x 4

D+

D-

GND

VBUS

NOTE:

C1, C2: 10 μFC3, C4, C7, C8: 1 μF (These capacitors must be less than 2 μF.)C5, C6: 10 pF to 33 pF (depending on crystal resonator)C9, C10, C11, C12: The capacitance may vary depending on design.In this case analog perfomance of the A/D converter may degrade.

Figure 36.Bus-Powered Con�guration

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7. Package Information

7.1 SSOP28

DIM/PINS** 14 16 20 24 28 30 38

A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90

A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30

A

2, 00 MAX 0, 05 MIN 0, 10

0, 25

0° − 8°

0, 65 0, 15

Seating Plane

Gage Plane

1 14

0, 380, 22

28 15

5, 605, 00

8, 207, 40

0, 950, 55

0, 250, 09

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8. Statements And Notes:

8.1 The name and content of Hazardous substances or Elements in the product

8.2 Notion:

Recommended carefully reading this information before the use of this product;

The information in this document are subject to change without notice;

This information is using to the reference only, the company is not responsible for any loss;

The company is not responsible for the any infringement of the third party patents or other rights of the responsibility.

Part name

Hazardous substances or Elements

Lead and leadcompounds

Mercury andmercury

compounds

Cadmiumand cadmiumcompounds

Hexavalentchromium

compounds

Polybrominatedbiphenyls

Polybrominatedbiphenyl ethers

Lead frame ○ ○ ○ ○ ○ ○

Plastic resin ○ ○ ○ ○ ○ ○

Chip ○ ○ ○ ○ ○ ○

The lead ○ ○ ○ ○ ○ ○

Plastic sheet installed ○ ○ ○ ○ ○ ○

explanation

○: Indicates that the content of hazardous substances or elements in the detection limit of the followingthe SJ/T11363-2006 standard.

×: Indicates that the content of hazardous substances or elements exceeding the SJ/T11363-2006Standard limit requirements.