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INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, VOL. 24,183-199 (1996) STATIC AND DYNAMIC HYSTERETIC FEATURES IN A PWL CIRCUIT MAURO PARODI AND MARC0 STORACE Biophysical and Electronic Engineering Department, University of Genova, Via Opera Pia IIA, 1-16145 Genova, Italy AND SILVANO CMCOlTI Electrical Engineering Institute, University of Cagliari, Pia::a D'Armi. 1-09123 Cagliari, Italy SUMMARY The general properties of the static and dynamic hysteretic behaviours of a PWL ladder circuit are described and discussed. These properties are obtained on the basis of some results reported in a previous paper (M. Parodi et al., 1nt.j. cir. theor. appf., 22, 513 (1994), concerning the static hysteretic behaviour of the same circuit. Despite the non-linearity of the circuit, the main features of its hysteretic behaviour are shown to depend on the parameters of the circuit components in a simple way. Moreover this behaviour is similar to those observed in a large number of experiments. For these reasons, the PWL ladder circuit is taken as the central element of a general circuit model for hysteresis. The structure of this general circuit is described at the end of the paper. 1. INTRODUCTION In a recent paper' a ladder circuit composed of linear capacitors and piecewise-linear resistive elements was presented. It was shown that this circuit exhibits a well-defined static hysteretic behaviour. The main features of this behaviour (e.g. static hysteresis cycles, local and non-local memory, minor loops) were discussed both for a comparison with the features of some hysteresis and to point out their relations with the elements of the ladder circuit and with its size. Despite the non-linearities concerning the resistive elements only, the ladder circuit was proved to be very effective for a realistic description of static hysteretic phenomena. Such effectiveness had already been shown by ladder circuits of very small dimensions. It results both from the shape of the hysteresis loops (apart from some minor limitations) and from the circuit's capability to describe non-local memory phenomena. 2s6. Moreover, it was shown that the PWL equations provide very simple formulations for the physical limits of the rate-independent hysteretic behaviour and for the energy-loss evaluation. All these reasons make the PWL ladder circuit the basis for the development of a more general hysteresis model that makes it possible to improve the static performance and to extend the range of applications by including some important aspects of the dynamic hysteretic behaviour. This paper aims to study the theoretical aspects of this generalization. To this end, first the main results obtained on the static hysteresis of the ladder circuit' are briefly summarized. Then its dynamic behaviour is extensively analysed in order to obtain the characteristics of a dynamic hysteresis loop originating in the ladder circuit, both for a general input wave-form and for the particular but very important case of a sinusoidal input. It is worth noting that sinusoidal input wave-forms are the most widely used in experimental investigations of various significant properties and features of hysteretic materials (e.g. loop widening with frequency, minor loops). The simple structures of the PWL governing equations allow this analysis to be made in a direct way, thus leading to simple formulations for most of the results. The relation between the rate of variation in the input and the resulting shape of the loop is clearly stated. Then it is shown that, for a sinusoidal input wave- CCC 0098-9886/96/020183- 17 0 1996 by John Wiley & Sons, Ltd. Received 3 April 1995 Revised 3 July 1995

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Page 1: Static and dynamic hysteretic features in a PWL circuit

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, VOL. 24,183-199 (1996)

STATIC AND DYNAMIC HYSTERETIC FEATURES IN A PWL CIRCUIT

MAURO PARODI AND MARC0 STORACE

Biophysical and Electronic Engineering Department, University of Genova, Via Opera Pia I I A , 1-16145 Genova, Italy AND

SILVANO CMCOlTI

Electrical Engineering Institute, University of Cagliari, Pia::a D'Armi. 1-09123 Cagliari, Italy

SUMMARY

The general properties of the static and dynamic hysteretic behaviours of a PWL ladder circuit are described and discussed. These properties are obtained on the basis of some results reported in a previous paper (M. Parodi et al., 1nt.j . cir. theor. appf., 22, 513 (1994), concerning the static hysteretic behaviour of the same circuit.

Despite the non-linearity of the circuit, the main features of its hysteretic behaviour are shown to depend on the parameters of the circuit components in a simple way. Moreover this behaviour is similar to those observed in a large number of experiments. For these reasons, the PWL ladder circuit is taken as the central element of a general circuit model for hysteresis. The structure of this general circuit is described at the end of the paper.

1. INTRODUCTION

In a recent paper' a ladder circuit composed of linear capacitors and piecewise-linear resistive elements was presented. It was shown that this circuit exhibits a well-defined static hysteretic behaviour. The main features of this behaviour (e.g. static hysteresis cycles, local and non-local memory, minor loops) were discussed both for a comparison with the features of some hysteresis and to point out their relations with the elements of the ladder circuit and with its size. Despite the non-linearities concerning the resistive elements only, the ladder circuit was proved to be very effective for a realistic description of static hysteretic phenomena. Such effectiveness had already been shown by ladder circuits of very small dimensions. It results both from the shape of the hysteresis loops (apart from some minor limitations) and from the circuit's capability to describe non-local memory phenomena. 2s6. Moreover, it was shown that the PWL equations provide very simple formulations for the physical limits of the rate-independent hysteretic behaviour and for the energy-loss evaluation.

All these reasons make the PWL ladder circuit the basis for the development of a more general hysteresis model that makes it possible to improve the static performance and to extend the range of applications by including some important aspects of the dynamic hysteretic behaviour. This paper aims to study the theoretical aspects of this generalization. To this end, first the main results obtained on the static hysteresis of the ladder circuit' are briefly summarized. Then its dynamic behaviour is extensively analysed in order to obtain the characteristics of a dynamic hysteresis loop originating in the ladder circuit, both for a general input wave-form and for the particular but very important case of a sinusoidal input. It is worth noting that sinusoidal input wave-forms are the most widely used in experimental investigations of various significant properties and features of hysteretic materials (e.g. loop widening with frequency, minor loops). The simple structures of the PWL governing equations allow this analysis to be made in a direct way, thus leading to simple formulations for most of the results. The relation between the rate of variation in the input and the resulting shape of the loop is clearly stated. Then it is shown that, for a sinusoidal input wave-

CCC 0098-9886/96/020183- 17 0 1996 by John Wiley & Sons, Ltd.

Received 3 April 1995 Revised 3 July 1995

Page 2: Static and dynamic hysteretic features in a PWL circuit

184 M. PARODI, M. STORACE AND S . CINCO'ITI

form, the loop area grows with the frequency, as occurs in most experimental situations. The study of the loop widening with increasing frequency points out both the direct dependence of this behaviour on the PWL circuit parameters and the relation between the loop area and the energy balance for the ladder components. The control of the loop widening with frequency and the dependence of the loop on the sinusoidal voltage amplitude are demonstrated by way of an example.

The final part of this paper considers some possible generalizations of the basic ladder structure. Such generalizations aim to extend the capabilities of the cycle generated by the ladder (particularly in the static case) so as to include changes in the concavities of the loop branches. This is an important feature of various kinds of hysteresis cycles.*** Hysteresis models based on non-linear energy storage element^^.'*^ describe changes in concavity by considering suitable non-linear characteristics of these elements. In our approach the energy storage elements are linear and the proposed structure consists of a number of elementary cells connected in parallel to the ladder circuit. All these independent cells can be regarded as particular cases of the general ladder structure, which maintains its central role in the model. For simplicity, the generalization criteria are defined by giving an example based on experimental data on the static cycle of a ferromagnetic material. The resulting model is accurate enough, despite the limited number of circuit elements used.

2. STATIC HYSTERESIS: BASIC ELEMENTS

The basic structure to consider is the N-capacitor ladder network shown in Figure 1. The input variable is the voltage source e(r) and the output variable is the total charge Q stored on the

(b) Figure 1. (a) The N-capacitor laddei- network. (b) The characteristic of the k-th PWL element d,

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HYSTERETIC FEATURES IN A PWL CIRCUIT 185

capacitors, i.e. N

Q = C, v, ) = I

In the static case the hysteretic behaviour of Q versus e was presented and discussed in detail in Reference 1. For the present purposes it is important to recall two of the concepts that are the basis for the determination of the static hysteresis characteristic.

1. A 'rate independence' inequality exists for the parameters of the linear elements of the circuit and for the highest angular frequency Q in the spectrum of e ( t ) :

N

Q R X C , a 1 k = 1

When this inequality holds, the circuit follows instantaneously the variations in e ( t ) for any value of e ( t ) within the range

Q s

j = 1

-+ e

=1

=2,* * * 9 N

Figure 2. Static Q ( e ) for the N-capacitor ladder network

Page 4: Static and dynamic hysteretic features in a PWL circuit

186 M. PARODI, M. STORACE AND S . CINCOTTI

the voltage E, being the static saturation voltage defined by the parameters Vj of the PWL resistors in the circuit. In this range, the linear resistor R can be viewed as a short circuit according to (1). This is the basic condition that ensures the instantaneousness of the charge variations induced by e ( t ) on the capacitors. Then any static value of Q versus e is the equilibrium value resulting from an instantaneous dynamic process.’ The area of the static hysteresis cycle is equal to the energy dissipated on the PWL elements. I

2. Each of the capacitors C, ( k = 2 , ...., N) forms a cutset with the PWL elements d,-, and d,. Then the capacitor voltage v k is not influenced by the variations in e as long as d k - , and dk work within the ‘open circuit’ segments of their PWL characteristics. This is the key to outlining the general influence mechanism of e on the voltages vi of the capacitors.’ For a given value of e within the range defined by (2), let us consider any set of voltages vi such that the network is at equilibrium. This means that vl = e and that the values of v2, . . . , v N must fulfil the requirement i, = 0 (k = 1, . . . , N). Owing to the ‘rate independence’ inequality (1), any variation in e within the range (2) influences C, instantaneously, i.e. v1 takes on the new equilibrium value v , = e. The voltage v2 of the next capacitor C2 will change when and if its ‘old’ value does not lie any more within the ‘insensitivity range’ giving id, = 0 and id, = 0 (i.e. I vi - v2 1 6 V , , I v2 - v3 I < V,) and so on.

By using these two concepts, the static hysteretic behaviour of the circuit can be easily obtained.‘ For instance, Figure 2 represents the ‘first-polarization’ curve and the limit cycle of the N-capacitor ladder network, while Figure 3 recalls the possibility of having minor loops even for a very simple structure ( N = 4).

Both Figures 2 and 3 clearly show the piecewise-linear dependence of Q on the input voltage e . The slope of any segment is fixed by the capacitors that are outside their ‘insensitivity ranges’. For instance, the

N = 4

k = 1, ..., 4 ck= CO V k = vo

i I Figure 3. Example of a minor loop for a four-capacitor ladder network

Page 5: Static and dynamic hysteretic features in a PWL circuit

HYSTERETIC FEATURES IN A PWL CIRCUIT 187

slopes in the ‘first-polarization’ curve (Figure 2) grow with e and form the sequence C, , C , + Cz, C , + C2 + C,, and so on. When e = E,, all the voltages v k of the capacitors reach their upper limit values f ik and the charge Q takes on the saturation value Q , defined as

P = 1 j = l .

which is also the value of Q for e > E,. The descending and ascending branches of the static limit cycle could be discussed in a similar way. Concerning the ‘first-polarization’ curve, the main difference is that the ‘initial’ values of the v k in the descending (ascending) branch are the limit values f ik ( - f i k ) instead of zero. As a consequence, the threshold values of e driving each capacitor out of its insensitivity range differ in all these cases (see Figure 2). This makes the descending and ascending branches distinct and proves the existence of a limit cycle in the static case.

From a general point of view, the ‘open circuit’ segment of the PWL characteristic is basic to the

’I

(b)

Figure 4. Examples of PWL characteristics (a) incompatible and (b) compatible with the existence of a static hysteresis cycle

Page 6: Static and dynamic hysteretic features in a PWL circuit

188 M. PARODI. M. STORACE AND S . CINCOlTl

existence of a static hysteretic behaviour in the ladder network. If the ‘central’ segment of the PWL characteristic had a positive slope as in Figure 4(a), the insensitivity ranges for the equilibrium voltages v k could not exist any more, and any given e would result in well-defined and unique equilibrium values for all N capacitor voltages and for the charge Q; this rules out the possibility of a static hysteresis cycle. By contrast, the ladder network maintains a static hysteretic behaviour if the PWL segments at the edges of the ‘open circuit’ region are not vertical, as in Figure 4(b). In this case the slope of Q ( e ) in the ‘saturation’ regions ( I e I > E,) becomes positive and the rate independence inequality takes on a more complex form.

3. DYNAMIC HYSTERESIS: GENERAL FEATURES

The dynamic case can now be considered. Although in many cases of practical interest sinusoidal input wave-forms are used, here the analysis is developed in more general terms.

We assume that the input e ( r ) is a continuous (not necessarily periodic) wave-form subject to the following conditions.

I. The ‘rate independence’ inequality (1) is not fulfilled. 11. The voltage e ( r ) ranges alternately between a negative limit -em and a positive limit + eM.

111. The time derivative is positive definite when e ( t ) ranges from -em to +eM, and is negative definite

IV. The values em and eM are sufficiently large to set the voltages vdh of the PWL elements to their limit

In order to follow the dynamic evolution of the cycle, let us consider the voltage e ( t ) when it grows

when e( t ) ranges from + eM to -em.

values *V, ( k = 1, . . . , N ) over finite intervals of time.

from -em to +eM.

3.1. Saturation region

negative saturation values for the voltages of the capacitors and for the charge are In the first part of the voltage growth we have vdL= -V, owing to condition IV. The corresponding

v1= -?7, ( k = 1, ..., N )

Q = - Q s

which are the same values as found in the static case. As the voltages v k of the capacitors are constant, all the PWL elements are in series, so we have

because 17, = - E,. This situation holds until i, < 0, i.e. for e ( t ) within the range

- e m s e ( t ) < -E,

When e ( t ) reaches the value -E,, all the i, are zero. A larger value of e forces the voltage v , of the capacitor C , to change and all the PWL elements to enter their open circuit segments. This is the beginning of the ascending branch of the hysteresis cycle. It is important to point out that the ‘initial’ value - E , of e ( t ) for the branch is the same as in the static case.

3.2. Ascending branch

According to the previous considerations, the first part of the ascending branch can be studied using the equivalent representation of the ladder network shown in Figure 5.

In any shunt arm the actual voltage v, of the capacitor C, is split into two terms, i.e. the initial value -0, (represented by a voltage generator) and the voltage v; at the ends of the capacitor Ck, assumed as initially

Page 7: Static and dynamic hysteretic features in a PWL circuit

HYSTERETIC FEATURES IN A PWL CIRCUIT 189

R vdl vdN-l

uncharged. Denoting by the initial time t = 0, we have

e(0) = -fi, = -En

vk(o)= -Ok ( k = 1 , ..., N )

V;.(O) = 0

On this basis the circuit can be studied by referring to the ‘shifted’ capacitor voltage vl = v, + En versus the ‘shifted’ input e ’ ( t ) = e ( t ) + En. As a consequence, we can refer to the general result shown in the Appendix and write

Owing to condition 111, the term de/dz is strictly positive, so we can write

v , < e fo r t>O (3)

The limit value v , = e is reached only when RC, +O, i.e. when the ‘rate independence’ inequality holds for the ladder network.

The equivalent circuit in Figure 5 is valid as long as the first PWL element remains an open circuit, i.e. for v,, < V,. In view of the previous results, v, ,( t) and v , ( t ) are strictly increasing functions, so we can write

v,, = v , + ij,

dv,, dv, e - v, dt dt RC,

> O - - - - = -

These results imply that at some finite instant t , , vd, reaches the ‘upper’ value V,. Accordingly, v , can be expressed as

v, ( t , ) = v, - 27, = 2v, - E ,

This is the threshold value to make the capacitor C , take part in the charging process. According to the equivalent circuit in Figure 5 , the charge Q ( t ) for t E [0, t , ] is given by

N

Q(t ) = C, V, ( t ) - C, C, k = 2

This expression shows that the extreme values of this (strictly increasing) function are the same as in the static case. The main difference is that in the dynamic case any given value of Q (or v , ) is reached for a value of e larger than the static case limit value e = v , , as clearly expressed in (3). This amounts to saying

Page 8: Static and dynamic hysteretic features in a PWL circuit

190 M. PARODI, M. STORACE AND S. CINCO’ITI

that the corresponding function Q(e) describing this first part ab of the ascending branch lies to the right of the corresponding straight line a6 obtained in the static case, as shown in Figure 6.

This property is still more evident in the second part of the ascending branch, i.e. when the capacitor C2 is also under charge. The corresponding equivalent circuit is shown in Figure 7(a), where the equivalent generators in the shunt arms represent the voltages of the capacitors at the ‘initial’ time t = t,. In the circuit the ‘shifted’ voltages v’, and v; are equal, so we can consider the reduced circuit in Figure 7 (b) and write

e, = eel) e’(t) = e(t) + E,- 2 V , ,

e‘ ( t , ) = e, + E, - 2V, = e; > 0

v; ( t , ) = 0

The last expression follows directly from that derived in the Appendix and yields the inequality

v, - e<O for t> t ,

because of the positive sign of de/dt. By using the same arguments as in the previous case, we obtain the following results.

1. The equivalent circuit in Figure 7 (a) is valid up to the time instant I , when vd, = V,, which implies

2)2( f , ) = v, - 0, and also represents the threshold voltage for the participation of C, in the charging process.

2. In the time interval [t , , f , ] , Q ( f ) is a (monotonically increasing) function ranging over the same

................... ...

! el= e(tJ > v, (t,) - ... .........

i v; + y - q= v, (Q). QA : . . - _ _ .

...... - . -. ... , . - ............ ............... ...................

..... .......... __-. -. : -E0+2V1 L ....... - ....... (= ............ vl(t 3) j

- -: e2= e(tJ > v, (4) -. -.

_.- .......... ..................

-+ e

dynamic Q(e)

-----. static Q(e)

a

Figure 6

Page 9: Static and dynamic hysteretic features in a PWL circuit

HYSTERETIC FEATURES IN A PWL CIRCUIT 191

R vd2

Figure 7

domain as defined for the static case. At any t of the interval, however, Q ( t ) corresponds to a value e ( t ) larger than that in the static case (i.e. e > v,), so that the corresponding curve bc of Q ( e ) lies to the right of the straight line b P of the static ascending branch (Figure 6).

The reasoning for studying the successive parts of the ascending branch is completely analogous and needs no further comments. In conclusion, for any e ( t ) subject to conditions I-IV the whole dynamic ascending branch lies to the right of the static one, with the exception of the point (e = - E,, Q = -Q,) which is common to both branches. As shown by the integral term in expression (4), the difference between the static and dynamic branches is enhanced when de/dt is larger in magnitude.

The ascending branch terminates when all N voltages of the capacitors reach their positive saturation values fik ( k = 1, . . . , N ) , thus giving the charge value + Q,. As pointed out in the previous discussion, this occurs for a value of e that depends on de/dr but which in any case is strictly larger than the static value 4,.

The further growth of e up to the value eM does not influence the voltages of the capacitors and the charge, which remain saturated also during the first part of the descent of e until it reaches the value +E,. This value marks the beginning of the descending branch in both the dynamic and static cases.

3.3. Descending branch

The analysis of the descending branch is based on the same steps as for the ascending branch, so it is not described in detail. It is only important to point out that owing to the negative sign of de/dt, the dynamic descending branch is to the left of the static one, except for the ‘initial’ point (e = + E,, Q = + Q,) which is common to both branches.

We conclude that for any e ( t ) subject to conditions I-IV the following hold.

1. The dynamic ascending branch Q ( e ) lies to the right of the static one, apart from the common initial

2. The dynamic descending branch Q ( e ) lies to the left of the static one, apart from the common initial point.

point.

Page 10: Static and dynamic hysteretic features in a PWL circuit

192 M. PARODI, M. STORACE AND S . CINCOTTI

3. Any dyiiumic transition -em -+ eM + -em of e ( t ) results in a closed loop Q ( e ) whose shape depends on the wave-.form e ( t ) but always contains the static hysteresis cycle defined fo r the circuit. Then the area of the static hysteresis cycle is a lower bound to the area of any dynamic loop ranging from a positive to a negative saturation.

The area of any loop can be expressed as

and can be interpreted as follows. We first observe that dQ/dt # 0 except for the saturation regions. In these regions all the PWL elements and the linear resistor R are traversed by the current

e F E, ld9 = -

R

the T sign depending on whether we are considering a positive or a negative saturation. The corresponding power dissipated by these elements does not influence the loop integral (5) .

Outside the saturation regions the PWL elements are not in series any more. The Nth element in particular becomes an open circuit and the current dQ/dt is equal to the current entering the circuit (Figure 8). Then the term e dQ/dt represents the power entering the circuit when it is not under saturation conditions and the integral ( 5 ) yields the energy dissipated by R and the PWL elements under these conditions (the Nth element's contribution is zero). This result should be viewed as a generalization of the one given for the static case,' where the condition v , = e annihilates the energy loss term originated by R . Fos this reason the resistance R is a very simple parameter to control the frequency dependence of dynamic liysteresis loops, as is pointed out in the next section, where dynamic loops originated by sinusoidal input wave-forms e ( t ) are considered.

4. HYSTERESIS FOR SINUSOIDAL INPUT

The case where e ( t ) is a sinusoidal wave-form is the simplest and most important to discuss the dynamic behaviour. Generally the hysteresis cycle corresponding to any sinusoidal input e ( t ) = E sin( wt) maintains the symmetry found in the static case (see Figure 2). As long as the sinusoid amplitude E is sufficiently large to fulfil condition IV, the area of the hysteresis cycle grows with the frequency. This loop widening is commonly observed in experiments. The PWL model allows a strict control of the frequency dependence of the loop widening by a simple adjustment of the linear resistor R. In order to stress this point, we consider the simplest ladder structure (N = 3) depicted in Figure 9.

-_ A A I - Figure 8

Page 11: Static and dynamic hysteretic features in a PWL circuit

HYSTERETIC FEATURES IN A PWL CIRCUIT

......................... - ...................

-20 -15 -10 -5 0 5 10 15 20

193

I R f 1 f* I f,

10 kn 102Hz ' 103Hz 104Hz

100kQ 10 Hz 102Hz 103Hz

Figure 9. The three-capacitor ladder network that generates the curves plotted in Figures 10 and I 1

The PWL elements are identical for simplicity (Vk = 1 V, k = 1,2,3) and the corresponding static saturation parameters are E, = 3 V and Q, = 10 nC.

For a fixed sinusoid amplitude E = 20 V the loop widening with the frequency is presented in Figure 10, where the static loop is shown together with the dynamic loops corresponding to the different frequencies fl, f 2 and f 3 . As shown in the table, multiplying R by a factor a means dividing the frequencies of the various dynamic loops by a. Such a ' frequency-scaling' property originates in the coincidence (outside the saturation regions) of the current flowing through R with the term dQ/dt. Accordingly, the integral (5) giving the loop area can be written as

e $ d t = j e ( e - v , > - dt

R

Along the loop the term e - vl of the integral function changes with the considered part of the ascending (or descending) branch according to the discussion developed in Section 3. The typical structure of this term is that of expression (4), which is suitable for general considerations. In accordance with the analysis made in Section 3.2, it is easy to verify that the contribution of expression (4) to the loop area for e ( r ) = E sin(wt) remains the same when the variable and the parameters are changed as follows:

R j a R , t j a t , o + w / a

- static cycle

----- f2 ......... f,

Figure 10. Plots of hysteresis cycles at three different frequencies f , . f2 and f , for the ladder network in Figure 9. The table gives two different sets of values of R, f , , f, and f , yielding these cycles

Page 12: Static and dynamic hysteretic features in a PWL circuit

194 M. PARODI, M. STORACE AND S . CINCOTTI

Q f = 10 kHz , R = 10 k SZ

E = 20V E= 15V E = 1OV E = 7 V

I..-. E = S V

........a.

-.-.-.- ------ -

-20 -15 -10 -5 0 5 10 15 20

Figtirc 11. Plots of hystcresis cycles at five different values of the sinusoid aniplitude E for the ladder network in Figure 9

This property is proved to hold for any of the parts of the dynamic loop branches by the general results repoi-ted in the Appendix.

The final result is then represented by the ‘frequency-scaling’ role of R in the ladder structure. Its use for the control of the frequency behaviour of the model needs no further comments.

The shape of the dynamic loop depends also on the sinusoid amplitude E . At any given frequency a decrease in E results in a reduction in the loop area. This is clearly shown in Figure 11 for the previously dctined ladder network. When E is not sufficient to make the charge Q reach its saturation value, the loop takes on an ellipsoidal shape like the inner loops in the figure. This behaviour is very similar to that of ferromagnetic materials.

5. SOME GENERALIZATIONS FOR A MODEL

In the previous sections the main features of the hysteretic behaviour were discussed with reference to the ladder network represented in Figure 1. In the formulation of a PWL model the ladder structure plays a central role. For instance, it includes all the basic elements that ensure the existence of minor loops, even in structures of minimum sizes.’ In spite of all its advantages, the hysteresis cycle generated by a ladder structure is subject to a limitation that is apparent also in the static case. The general cycle represented in Figure 2 clearly shows that the slope of the ascending branch grows with e up to the saturation value E,, i.e. i t is a concave-up curve over the whole domain [ - E , , E,] (the con-esponding descending branch is concave-down). This fact represents a limitation on the model accuracy whenever the concavities of the experimental branches to fit are subject to changes within the definition domain. For instance, the ascending branch of the cycles generated by ferromagnetic materials is concave-up in the first part of the domain but becomes concave-down in the tinal part (from now on we shall omit the analogous statements concerning the descending branch).

In some hysteresis models (see e.g. References 3, 5 and 6) this problem is solved by the proper choice of the non-linear characteristic of the energy storage elements. Here the only energy storage elements are the (irreur capacitors. Moreover, all the PWL resistors have the characteristic shown in Figure 1. The problem can then be solved by taking the original ladder circuit as the main component of a more general ‘parallel structure’.

From a general point of view a change in the branch concavity can be obtained by adding to the ladder

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HYSTERETIC FEATURES IN A PWL CIRCUIT 195

+- e(t>

circuit other charge terms to the overall ladder circuit charge Q,(e). These additive terms are generated by proper sets of independent cells which are connected to the voltage source e and can be regarded as particular cases of the general ladder structure discussed in the previous sections.

The approach outlined in the following is based on two different sets of cells (Figure 12) which give the charge contributions Q,(e) and Q,(e) respectively.

Ladder network (>

5.1. M-set

This first set consists of M cells connected in parallel to e ( t ) (see Figure 12). The structure of the kth cell (k = 1, ..., M) is displayed in Figure 13(a). The related cycle Q,(e ) is defined by the parameters V,, and A,,, of the PWL elements and by the capacitance C,, in the cell, as shown in Figure 13(b).

The first-polarization curve gives QMi = 0 up to e = V,,, then it coincides with the ascending branch. The preliminary steps concerning the blocks QL(e) and Q,(e) are related to the experimental cycle as

1. In the experimental cycle let e = E , denote the abscissa for which the ascending branch becomes

2. Take E l as the saturation voltage for QL in the ladder network. 3. Divide the down-concavity interval [ E l , E,] into a number M of equally spaced sampling points and

define A, = ( E , - E I ) / M . 4. Take V,, = E , , V,, = E , +A, , . . ., V,, + E l + ( M - l)A,. In the interval [El, E,] the resulting

contribution Q, to the ascending branch is a PWL characteristic with slopes C,, + C,,, C,, + CM3, . . . , C,,_, + C,,, C,,, whereas QL is set to its saturation value in accordance with step 2.

outlined in the following.

concave-down. Let E, denote the saturation voltage of the cycle.

=i! i I I *-- I

Q

Figure 12. The structure of the general model

Page 14: Static and dynamic hysteretic features in a PWL circuit

196 M. PARODI, M. STORACE AND S. CINCO'TTI

e@) p I I

(b)

Figure 13

It is easy to verify that owing to the previously defined choices, the slope of QL+ QM versus e is zero over the interval [-E,, - E l ] ; actually, the resulting ascending branch should be a positive-slope, concave- up curve.

The necessary adjustment is obtained by using the second set of cells.

5.2. P-set

This second set consists of P cells connected in parallel to e ( t ) (see Figure 12). The structure of the kth cell ( k = 1, .. . , P ) is shown in Figure 14(a). The resulting voltage-controlled static function Q,,(e) corresponding to the parameter V,, of the PWL element and to the capacitance C,, is shown in Figure 14(b).

Taking the parameters V,, as a sequence of decreasing values V,, = E,, . . . , Vp, ( > E , ) , the resulting Q , ( e ) is a PWL single-valued function whose slopes in the range [-I?,, - E , ] are C,,, C,, + C,,, ..., C,, + ... + C,,,. This is the basis for choosing the elements C,, for the aforesaid adjustment .

The considerations concerning the descending branch are completely analogous and need no comments. The values of the linear resistances of the cells do not affect the static behaviour. The remaining details of the synthesis procedure are consequential. For this reason we limit ourselves to giving an example based on the experimental cycle of a ferromagnetic material (see Reference 2 , Figure 2.59). In this example the ladder network has N = 4 cells and the remaining blocks have M = 4 and P = 2 cells respectively. All the

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HYSTERETIC FEATURES IN A PWL CIRCUIT 197

0.1 n

0.0

U

-0.1

(b)

Figure 14

Ladder (N4) M-block

(M4 , A* 0.4 Volt)

3 0.1 4 0.2

-

k

1

2 3 4

-

-

5 1.25

I I

1 2.8 1 2.5

1 1 3.75 j 2 ' 2

Figure 15. The resulting hysteresis cycle for the model defined in the tables (E, = 1.2 V, E, = 2.8 V). The inner scales refer to the electric variables of the model. The outer scales refer to the corresponding magnetic variables and define the experimental points

used for the synthesis of the model

Page 16: Static and dynamic hysteretic features in a PWL circuit

198 M. PARODI, M. STORACE AND S. CINCO’ITI

parameters of the PWL circuit are summarized in the tables in Figure 15. The resulting cycle (Figure 15) is represented together with the experimental points used for the synthesis and with the main parameters previously defined.

6. CONCLUDING REMARKS

The theoretical aspects considered in this paper should demonstrate the feasibility of using the PWL ladder structure presented in Reference 1 as the central element of a generalized hysteresis model.

The similarity of the dynamic hysteretic behaviour originating in this structure to those observed in most experimental situations is pointed out both by the loop widening with increasing frequency and by the dependence of the loop shape on the sinusoid amplitude of the input. Among the main results, the general discussion developed shows that the control of the frequency behaviour can be achieved by a simple adjustment of the linear resistance of the ladder circuit.

The ‘parallel architecture’ described in the final part of the paper aims to suggest a possible way of modelling changes in the concavities of the loop branches, thus extending the capabilities of the original single-ladder structure. The parallel cells are particular cases of the general ladder structure, so their individual behaviours need no special comments. The outlined synthesis procedure can be modified to meet further requirements by following the basic ideas of the proposed approach.

As a final remark, it is worth noting that the general results presented in the paper prove the flexibility of the PWL ladder circuit in modelling a large class of hysteretic phenomena and in formulating the pertinent theoretical results in a very simple way, in spite of their non-linearity. The simplicity of the circuit structure and the nature of its components point out the feasibility of numerical evaluations of the model’s behaviour even by using the simplest versions of circuit simulation programmes.

APPENDIX

We consider the elementary circuit represented in Figure 16, where v(0) = 0 and u ( t ) is subject to the conditions

u(0) = uo 3 0

du - > O f o r a n y t > O dt

R

V

Figure 16

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HYSTERETIC FEATURES IN A PWL CIRCUIT 199

Then the zero-state response v ( t ) ( f a 0) can be written as

1 0) = - RC exp( - b) 1,’ exp( $) u (z) dr

or, after integration by parts, as

t - t du v ( t ) = u( t ) - uo exp -- - exp -- - d t

(iC) ( I ? C ) d r (7)

Owing to the conditions (6) on u( t ) , the above expression yields

v ( t ) - u( t )<O for any t > O

which also implies

dv 1

d t RC - - - - (u - v ) > 0 for any t > 0

thus ensuring that v ( t ) will grow in a strictly monotonic way but will assume smaller values than u(t). For given RC and uo terms, the distance I v ( t ) - u ( t ) I grows with the time derivative of u( t ) within the domain [0, t ] , as follows immediately from (7).

Finally, it is important to observe that when RC+O, v ( t ) + u( t ) , which represents the physical basis for the ‘rate-independent behaviour’ and for the related static analysis.

Completely analogous conclusions can be drawn for the case

u(0) = ug s 0

du - < o d t

for any t > 0

the only differences being the signs of ( v - u ) and dv/dt .

I .

3 L.

3.

4. 5.

6.

7.

8.

REFERENCES M. Parodi, M. Storace and S. Cincotti, ‘A PWL ladder circuit which exhibits hysteresis’, Int. j . cir. rheor. appl., 22, 513-526 (1994). I. D. Mayergoyz, Mathematicalmodels of hysteresis, Springer, New York, 1991, Chaps. 1 and 2. L. 0. Chua and K. Stromsmoe, ‘Lumped-circuit models for nonlinear inductors exhibiting hysteresis loops’, IEEE Trans. Circuit Theory, CT-17,564-574 (1970). D. C. Jiles and D. L. Atherton, ‘Ferromagnetic hysteresis’, IEEE Trans. Magnetics, MAG-19, 2183-2185 (1983). B. D. Coleman and M. L. Hodgdon, ‘A constitutive relation for rate-independent hysteresis in ferromagnetically soft materials’. Inr. J. Eng Sci., 24, 897-919 (1986). S . Bobbio and G. Marmcci, ‘A possible alternative to the Preisach model of static hysteresis’, Nuovo Cimento, 15, 723-734 (1993). M. P. Kennedy and L. 0. Chua, ‘Hysteresis in electronic circuits: a circuit theorist’s perspective’, Int. j . cir. theor. appf., 19, 471-515 (1991). M. A. Krasnosel’skii and A. V. Pokrovskii, Systems with Hysteresis, Springer, Berlin, 1989.