Senior Honors ThesisCompletion of Physics 495 for Graduation with Departmental Distinction

Department of Physics, Duke University

April 26, 2017

Fabrication and electrical measurementof copper sulfide memristors

Kaitlin McCreery

Defense Committee:Dr. Stephen Teitsworth (Chair)

Dr. Kate ScholbergDr. Henry Greenside

Abstract

There is a great demand for nanoscale circuit elements that use less power and that canbe packed more densely. Memristive switches—devices that modulate their resistance statedepending on the history of the applied current or voltage—have the potential to advanceresistance random access memories and neuromorphic chips that are currently unachievabledue to limitations in silicon-based microelectronics. Here, I explored a new method to fabri-cate a low-cost memory resistive structure, characterized its crystal structure, and measuredits switching dynamics. My results demonstrated that its performance is comparable toexpensive, commercially available memristors. I adopted and improved upon a procedurein order to fabricate a memory resistive structure using a simple wet chemistry techniqueinvolving sulfur and copper to produce a copper sulfide semiconductor (with film thicknessapproximately 10 microns) which maintained high or low resistance between two conduct-ing electrodes. X-ray diffraction data indicated that the fabricated semiconductor containsnon-stoichiometric phases of copper sulfide, revealing possible physical mechanisms behindresistive switching. The current-voltage characteristic for these devices revealed hystereticswitching occurring with an applied voltage as low as 600mV. The transient response andhysteresis characteristic demonstrate an RC delay as well as stochastically varying abruptcurrent steps within a few microseconds of the pulse application, switching resistive statesabout twice as fast as flash memory technology.

Honors thesis submitted in partial fulfillment of the requirements for graduation withDistinction in Physics in Trinity College of Duke University.

Contents

1 Introduction 3

2 Memristors: An Overview 6

2.1 Memory Resistance Switching . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2 Applications and neuromorphic implementation . . . . . . . . . . . . . . . . 14

3 Memristor Fabrication 16

3.1 Preparation of Cu/CuXS/Ag memristive structure . . . . . . . . . . . . . . . 16

3.2 Electrical measurements methodology . . . . . . . . . . . . . . . . . . . . . . 17

4 Thin film characterization 19

4.1 Expected phases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.2 Identification of copper sulfide phase via X-ray diffraction . . . . . . . . . . . 21

5 Electrical measurement 26

5.1 Resistive-switching performance . . . . . . . . . . . . . . . . . . . . . . . . . 26

5.2 Device endurance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

5.3 Comparing performance to commercially available device . . . . . . . . . . . 35

6 Conclusion 37

7 Acknowledgements 39

8 Appendix 40

8.1 Additional methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

8.2 Modeling an Ideal Memristor . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.2.1 The Schmitt Trigger . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.2.2 Static analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

8.2.3 Op-amp dynamics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

1

8.2.4 Analysis of JFET switching component . . . . . . . . . . . . . . . . . 45

8.2.5 Constructing an analog ideal memristor . . . . . . . . . . . . . . . . . 46

9 Bibliography 47

2

1 Introduction

The consumer electronics market has seen an eruption of portable electronic devices in recent

years due to the widespread use of technology such as cell phones, universal serial bus (USB)

memory devices, and digital recording devices. To keep up with this increasing demand,

flash memories have become an important market segment of the semiconductor industry.

Moore’s law, which states that the number of transistors in integrated circuits doubles every

two years [1], will eventually cease to hold as silicon devices approach the nano-scale regime,

when the oxide layer approaches comparable dimensions to its constituting atoms. One

solution to this dilemma is for the current focus in device development to shift and focus on

discovering and fabricating ionic switching devices, which are governed by different physical

mechanisms.

The development of cheap, scalable, and high-density memory technology has been

focused mainly on increasing memory density in silicon. The research efforts in flash memory

have led to a 40 percent price drop per year on average, costing about 80,000 USD per

Gigabyte in 1987 to less than 1.50 USD per Gigabyte in 2008 [2], with the current cost

per Gigabyte approaching 0.02 USD [3]. However, when device scaling reaches below the

100 nm regime in compact electronics, small flash memory devices face fundamental physical

challenges because of the requirement for high electric fields to program and erase memory

as well as scaling limitations on the physical thickness of oxide tunnels and gate length [4, 5].

It has therefore become increasingly important to find alternative memory technologies that

could potentially replace conventional flash memory, and current research in the field has

focused on numerous novel memory technologies for next-generation electronics [6].

As a contender for the next-generation memory technology, the memristor (a con-

traction of the phrase “memory resistor”) has recently drawn a great deal of attention in

physics and engineering. A resistive-switching memory cell can be described as a memris-

tor, which is a circuit element whose existence was suggested in 1971 using a symmetry

3

argument by electrical engineer Leon Chua [7] to be the fourth fundamental passive circuit

element among resistors, capacitors, and inductors. Hewlett-Packard and the startup com-

pany Knowm Incorporated collectively own the 40 patents for memristor chip technology,

and these companies produce the only commercially available memristors to date. Knowm

Inc. manufactures a 16-pin chip containing eight memristors and is currently available for

purchase between 180 and 220 USD [8]. Memristors are not yet integrated into modern

computer technology.

In this work, I explore the use of copper sulfides as a promising candidate for low-cost,

highly scalable flash memory alternative. Copper sulfides (CuXS where 1 ≤ X ≤ 2), cation

deficient p-type semiconductors, have been widely studied in effective and stable nanoscale

switching devices, where methods such as atomic layer deposition and spray pyrolysis are

employed to deposit a semiconducting CuXS film [9–11]. Recently, memory-resistive switch-

ing has been observed in CuXS films independent of film thickness by means of the relatively

cheaper method of electrochemical deposition [12]. It is noteworthy that memory switch-

ing using thin film copper sulfide is attainable using a low-cost and relatively simple wet

chemistry technique described in this paper. The development of alternative simple and

inexpensive methods of CuXS film deposition may be of some technical and economic signif-

icance with the exponentially increasing demand for memristor technology.

Over the course of the last year, I have studied copper sulfide memristor technology. I

fabricated copper sulfide semiconducting films using a simple wet chemistry technique that

I adapted from a fellow student to improve the device’s performance and its reproducibility.

I electrically characterized the devices I created and explored their memory-resistive prop-

erties, and I characterized the copper sulfide phases present in the thin semiconducting film

via X-ray diffraction to gain insight to underlying resistive-switching mechanisms.

In this thesis, I explain basic memristor operational principles and their potential to

enable novel computing devices. I describe my experimental techniques, then discuss the

4

composition of the copper sulfide film. I then present the electrical characterization for

memristive switching, and compare the performance of the devices I created with commer-

cially available device performance. I will conclude by summarizing my results, proposing

additional experiments, and providing recommendations for improving copper sulfide mem-

ristors so that they may be implemented in computing and device development moving

forward.

5

2 Memristors: An Overview

Students in introductory physics and electronics courses typically learn about three funda-

mental passive circuit elements: the resistor, the capacitor, and the inductor. The ideal

resistor is defined by a single-valued relationship between voltage, v(t), and current, i(t),

via dv = Rdi. Similarly, the capacitor is defined by a single-valued relationship between

charge, q(t), and voltage, v(t), via dq = Cdv, and the inductor is defined by a relationship

between magnetic flux, φ(t), and current, i(t), via dφ = Ldi. These three definitions in-

corporate three relationships between the four fundamental constituents in circuit theory:

voltage, current, charge, and magnetic flux. These relationships, illustrated in Figure 1,

raise an intriguing question: why is the circuit element corresponding to the relationship

between charge q(t) and magnetic flux φ(t) missing? In 1971, Leon Chua reasoned from this

symmetry argument that there must exist a fourth fundamental circuit element defined by

the functional relationship dφ = Mdq, where M is the memristance of a device; he called

this device a memristor (a contraction for memory-resistor) [7]. Despite the simplicity of

this proposition, experimental demonstration of such a device had not been accomplished.

6

Figure 1: The four fundamental two-terminal passive circuit elements include theresistor, the capacitor, the inductor, and the memristor. They are defined withoperational definitions connecting the fundamental elements of circuit theory:current, voltage, charge, and magnetic flux. The identification of the missingelement corresponding to the relationship between magnetic flux and charge wasoriginally published by Leon Chua [7], who proposed relating these two propertiesby the existence of a fourth fundamental circuit element called a memristor.

After decades of sparse research on the properties of the memristor, in 2008, Strukov

et. al [13] presented a physical model in which the memristance of a device is equivalent

to a time-dependent resistor proportional to the charge q(t) that previously passed through

it. Their argument also implies that memristance has the same units as resistance. This

proposed model was reasoned from a thin film structure and switching in a metal oxide, which

does not follow the microscopic physical switching mechanisms of charge carriers for all types

of memory resistance, such as a memristor governed by cation migration. Therefore, rather

than focusing on the relationship between the magnetic flux and charge, memristors can

be more usefully described as devices with a current-voltage characteristic curve displaying

7

history-dependent switching, known as a ‘pinched-hysteresis loop’ [14]. Because of the variety

of different mechanisms governing resistive memory, the pinched hysteresis loop provides an

operational definition that does not require an underlying microscopic physical model.

2.1 Memory Resistance Switching

A conventional flash memory cell consists of two gates made of silicon: a floating (elec-

tronically isolated) gate and a control gate, which are separated by a dielectric (typically a

metal-oxide semiconductor). When the floating gate is connected to the control gate, the

cell has a value of 1. To change the value to 0, a voltage is applied to the control gate, which

forces electrons through the metal-oxide layer into the floating gate. The cell is able to main-

tain memory by storing electrons in the floating gate [15]. When the flash memory cell is

reduced in size down to the nanometer regime, there are several scaling issues that affect its

performance. First, the cell capacitance is decreased, leading to a decrease in stored charge.

Second, because the data are stored in the floating gate, the metal-oxide layer must be thick

enough to prevent the leakage of charges or shortage between the control and floating gates.

Third, interference between cells increases because of parasitic capacitance between floating

gates, causing undesirable fluctuations in the memory state of the cell [4]. These limitations

in flash memory become more prominent with the technological boom of digital devices that

demand densely packed flash memory cells to carry out robust calculations.

Meanwhile, a resistive switching memory cell is a simple capacitor-like structure where

a memristive material layer is sandwiched between two metal electrodes. This simple basic

structure has left tremendous room for the exploration of a large number of materials that

have demonstrated resistive switching such as binary metal oxides (e.g. TiO2) and solid

electrolytes (e.g. Ag2S, Cu2S) [10, 16].

The resistance memory cell has two distinct resistive states: the high resistance state

(HRS), also known as the OFF-state, and the low resistance state (LRS), also known as the

8

ON-state. The switching operation between the two states is termed “SET” or “write” and

the reverse switching is termed “RESET” or “erase.” The typical current-voltage charac-

teristic for a resistance switching device is shown in Figure 2. When the voltage between

the two electrodes is increased to a voltage threshold determined by the properties of the

device, the resistance abruptly changes from the high to the low resistance state. The de-

vice stays on until the voltage is decreased to a different threshold, causing the device to

switch from the low to the high resistance state. The switching modes can be categorized

as unipolar or bipolar switching. In unipolar switching, the switching behavior does not

depend on the polarity. Contrary to unipolar switching, the switching behavior is bipolar

when the SET operation occurs on only one polarity and the RESET operation requires

reversed polarity. This switching behavior forms an antisymmetric current-voltage charac-

teristic curve, which is typically called a “pinched” hysteresis loop in which the resistance

state is history-dependent, and is a unique property of memristors [14].

Identifying the mechanism for resistance switching is difficult because several possible

chemical and physical phenomena provoke the resistance states. There are several different

microscopic mechanisms that give rise to memristive functions, and none of them are par-

ticularly well understood. Furthermore, these phenomena may happen simultaneously or at

varying temperatures, increasing the challenge to find the dominant switching mechanism.

Among numerous switching mechanisms occurring in memristors, I will propose two possible

mechanisms for my device: ion migration; and valence change processes.

9

(a) In unipolar switching, resistive switching is induced by a voltageof the same polarity but different magnitude, so high and low resistivestates may be reached without reversing the polarity of the electric fieldacross the device.

(b) In bipolar switching, one polarity is used to switch fromthe HRS to the LRS, and the opposite polarity is required toswitch back to the HRS.

Figure 2: Characteristic resistive switching demonstrated with a pinched hystere-sis loop, a fingerprint property of memristors.

10

One possible model for switching could be governed by the formation and rupture of

conducting metal filaments and is illustrated in Figure 3. This mechanism requires a high

electric field for an electro-forming process, during which gradual movement of cations in a

conductor occur due to a momentum transfer between electrons and diffusing metal atoms.

The formation of metal filaments that grow from the copper electrode to the top electrode

finishes when the voltage reaches VSET , electrically connecting the two and leading to an

abrupt increase in current through the device. During the RESET process, the reversed po-

larity of the electric field results in Joule heating—also known as resistance heating, during

which the passage of a current through the memristive layer produces heat—thermally forces

the ions to dissipate and disrupt the filaments. This process is highly dependent on temper-

ature and independent of polarity, and therefore is more likely the underlying mechanism in

unipolar switching systems.

Another possible model for resistive switching in copper sulfides is an electrochemical

metalization mechanism (ECM) that is illustrated in Figure 4. This mechanism is based on

mobile cation migration and electrochemical reactions that form and disrupt more or less

conducting paths between the top and bottom electrodes [6]. The memory cell is initially

in the high-resistance state until a positive voltage is applied to an active metal electrode,

at which point the electrochemically active metal atoms are oxidized and dissolved into the

memristive layer. The oxidized cations move as a result of the force applied by the electric

field through the memristive layer. These oxidation and reduction processes lead to the

physical change of non-stoichiometric structures to lend them conductive or non-conductive.

Reversing the polarity causes another electrochemical change in the metal atoms and the

conducting path breaks, returning the device to the high resistance state. Applying a positive

voltage can restore the conducting path. The switching mode in this case must be bipolar

because opposite voltage polarities are required to switch resistive states.

11

Figure 3: Illustration of the proposed switching mechanism with the interstitialmovement of ions to create metallic conducting filaments.

Figure 4: Illustration of the proposed switching mechanism involving the valence-change of atoms in the copper sulfide film creating conducting paths. This illus-tration is a proposed physical switching mechanism that is based on varying thecrystal stoichiometry.

Both of these processes require some form of diffusion of charged particles through a

solid-state system, which is the stepwise migration of atoms through a matrix composed of

a crystal lattice. The valence change mechanism proposed in Figure 4 is the process known

12

as vacancy diffusion, illustrated in Figure 5(a), where the diffusion of atoms in one direction

corresponds to the motion of vacancies (i.e. ‘holes’) in the opposite direction. Meanwhile,

for interstitial diffusion illustrated in Figure 5(b), atoms that are small enough can dif-

fuse between atoms in the host structure. In this system, copper ions diffuse through the

large copper sulfide matrix. In CuXS polycrystalline materials, copper ions diffuse relatively

quickly for solid-state systems with a reported chemical diffusion constant at room tempera-

ture of Dinterstitial ≈ 10−7cm2/s [17]. Meanwhile, the diffusion constant at room temperature

for vacancy diffusion is Dvacancy ≈ 10−9cm2/s [18]. Interstitial diffusion occurs more rapidly

than diffusion of vacancies. Additionally, there are more interstitial positions than vacancies

in the matrix, so the probability of interstitial atomic movement is greater than vacancy

diffusion [19]. The driving force for diffusion may be concentration or chemical potential,

and the diffusion constant is influenced by the type of atomic migration, temperature of the

system, and activation energy of the compounds involved.

(a) (b)

Figure 5: The two possible switching mechanisms proposed in this thesis aregoverned by diffusion of atoms, either by the diffusion of atoms between vacantsites in the crystal lattice (a) or by the interstitial movement of smaller atomsbetween atoms in the copper sulfide matrix (b).

Upon further inspection, these proposed switching mechanisms actually yield much

slower switching times than reported memristive switching. For example, I obtained an

order of magnitude estimate for the time that a copper ion takes to interstitially diffuse

through the copper sulfide semiconductor matrix with thickness L = 10 microns at the rate

13

of the diffusion constant D = 10−7cm2/s:

L2

D2≈ (10−4cm)2

10−7cm2/s= 1 second

This estimate is much larger than the expected switching time for a memristive cell. Mean-

while, the same quick estimate can be performed for the valence change mechanism of diffu-

sion with diffusion constant D = 10−9cm2/s:

L2

D2≈ (10−4cm)2

10−9cm2/s= 10 seconds

This diffusion mechanism is slower still. This quick estimate indicates that switching gov-

erned by these simple diffusion models alone does not accurately capture the intricate dy-

namics involved in copper sulfide resistive switching. Resistive switching times faster than

10 µs are therefore the result of more complex microscopic physical switching mechanisms,

possibly dictated by the simultaneous occurrence of both diffusion mechanisms or a more

intricate valence-change occurring in more complex crystal structures of the thin semicon-

ducting film.

2.2 Applications and neuromorphic implementation

Current research in resistance switching has been driven by the search for an ideal non-volatile

memory device. Memory has constituted 20 percent of the semiconductor industry in the last

three decades and is expected to continue to increase [3]. Scaling of the traditional flash cell

may not be possible below 12 nm because they do not have very good endurance at this size,

particularly in densely packed circuit elements. To date, the best memristor performance and

reliability have been demonstrated in metal oxide bipolar filamentary and electrochemical

metalization bridge memory [6]. These memristors are considered as logic elements with

re-programmable properties, and could potentially perform logic computations in computer

14

architecture. One drawback to the direct implementation of memristor technology in today’s

electronic devices is their low operating voltage combined with a computer’s high operational

power that would cause electrical shorting between the electrodes of the device at high

voltages.

There is great enthusiasm in the biological sciences and engineering based on the con-

struction of circuits which mimic biological systems. Mammalian brains are much more

efficient than current computer architecture for computational tasks such as pattern recog-

nition and classification, which they carry out using diffusion over synaptic gaps between

20 nm and 40 nm in size. Some key features of biological neural processing systems are

their high scalability, and low-power consumption features using a massive network of par-

allel arrays of variable, limited precision components [6, 16] . Memristors are regarded as a

promising solution for modeling these features of biological synapses due to their scalability

that is currently in the nano-scale regime and ion-based binary switching [20, 21]. Mem-

ristors have been shown to support synaptic functions essential for learning, such as spike

timing dependent plasticity [22]. There are certainly concerning limiting factors of memris-

tors in conventional neuro-computing networks due to variability of switching dynamics used

in different devices and in response to fluctuating magnitudes of external electric fields. How-

ever, biological systems are existent proof that robust computations can be carried out using

individually unreliable components in a large network composed of individual dynamical

components.

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3 Memristor Fabrication

I adopted and improved upon a simple wet chemistry technique from Matthew Olson, who

devised the method during an independent study project with Professor Stephen Teitsworth

the semester prior to the start of my studies. He was inspired, in part at least, by the method

from a personal website run by self-described tinkerer and musician Nyle Steiner [23], who

noticed that combining dry sulfur powder and copper yields a device that demonstrates the

behavior of a characteristic hysteresis loop.

3.1 Preparation of Cu/CuXS/Ag memristive structure

In these experiments, a copper sulfide film was fabricated from a spontaneous reaction be-

tween copper and sulfur. The preparation process of the film is as follows: (1) a pre-cut

copper PC board was sanded and vigorously polished with Tripoli soft metal buffer to create

a smooth substrate surface. (2) The copper was rinsed with tap water to wash away residual

buffer. (3) The copper was wiped with denatured ethanol and dried to obtain the copper

substrate. (4) Denatured ethanol was mixed with sulfur powder (99.90%) with a volumetric

ratio of 2:1. (5) The copper was immersed in the alcohol-sulfur mixture and covered to

prevent significant alcohol evaporation for a range of 24 to 72 hours, stirring every 12 hours.

(6) The copper was removed from the mixture and gently rinsed with denatured ethanol to

remove excess sulfur powder and the sulfur powder was meticulously removed by hand with

a stainless steel spatula under a compound microscope. A black homogeneous CuXS film was

observed on the copper substrate, then air-dried for investigation. The thin copper sulfide

film that formed on top of the copper substrate is shown in Figure 6. The film thickness was

measured with a micro-caliper, from which I determined that the thin film thickness ranged

between 5 and 20 microns.

Copper (Cu) is an electrochemically active electrode and the CuXS film is a p-type

16

semiconducting layer fabricated on its surface. A small drop of silver paint was partially

dried on a smooth strip of Scotch tape, then placed and left to dry on top of the film.

(a) Copper sulfide film on copper substrate. (b) 50X magnification of copper sulfide film.

Figure 6: Representative images of the CuXS film at increasing magnificationunder a compound light microscope. Micron-scale gaps in the film are apparent,likely due to the naturally forming crystalline structure of the copper sulfide film.

3.2 Electrical measurements methodology

I integrated the device into a measurement circuit with a 100 Ω resistor to ground in order

to measure changes in voltage across the memristor, as shown in Figure 7. I observed a

discontinuity in the input signal as a result of the load rapidly switching from very high

to low impedance. To ensure the device received a predictable signal, I incorporated an

operational amplifier (LM-741) with unity gain as a buffer between the input signal and the

load; the op-amp does not draw current from the input, but the output voltage is equal to

the input, isolating the source and the load. The current-voltage (I-V) characteristic curves

and the time-dependent current of the memristor devices were recorded and analyzed after

a typical voltage bias sweep was applied; I mapped the device current, Imem = Vmem/R,

against the voltage across the device, Vmem = VIN − IR. I describe additional experiments

with varying signal properties alongside their characteristic curves in Section 4.1.

17

Figure 7: Schematic for the circuit used to indirectly measure memristor switch-ing. A unity-gain amplifier was used as a buffer to isolate the source from theload.

18

4 Thin film characterization

4.1 Expected phases

The phases of copper sulfide describe the crystal lattice structure, copper deficiency, and the

chemical formula. The four most common phases of copper sulfide are chalcocite (Cu2S),

djurleite (Cu1.94S), digenite (Cu1.8S), anilite (Cu1.75S), and covellite (CuS); two of them,

CuS and Cu2S, are stoichiometric, and the others are nonstoichiometric. All of these phases

exist in nature and are semiconductors, and the structural properties of copper sulfides

depend on the synthesis and the reaction temperature [19]. The hole conductivity of copper

sulfide is dependent on the molar ratio of copper to sulfur. There exists a substantial body

of literature of X-ray characterizations of the CuXS compounds, primarily carried by the

minerology community in the 1970s.

Figure 8: Phase diagram of copper sulfide between 0 C and 160 C constructedfrom experimental data [24]. Each region is defined by the phase or phases thatexist over the range of temperatures and compositions within the phase boundarylines. Regions that are not labeled consist of mixed phases and crystal structures.The superimposed green line indicates probable phases at room temperature,which I used to predict the phases present in this study.

19

Figure 8 shows the binary alloy phase diagram for copper sulfides. Binary eutectic

phase diagrams are commonly used as maps that represent the temperature and composition

of phases at constant pressure (normally 1 atm). They are helpful in predicting phase

transformations and their resulting crystal structure when the temperature is changed [19].

The stoichiometric phases of copper sulfide are possible at room temperature, but several

intermediate phases or metallic precipitates may be found. For example, cooling Cu2S from

120C to 100C would cause copper to precipitate as well as a change from hexagonal to

monoclinic chalcocite. During a transformation, there must be a redistribution of the copper

and sulfur components that is accomplished by atomic diffusion. Note from Figure 8 that

more complex crystal structures at equilibrium require higher temperatures. The crystal

structures of a given phase of copper sulfide can be distinguished with the use of X-ray

diffraction and Rietveld refinement.

X-ray powder diffraction, illustrated in Figure 9, is a non-destructive technique that

provides detailed information about the internal lattice of a crystalline substance. A crystal

is typically regarded as a set of parallel planes of atoms separated by a distance d. When

a collimated beam of X-rays strikes a pair of parallel lattice planes in a crystal, each inter-

atomic space scatters the beam as a function of wavelength and emits a secondary wave

in accordance with Bragg’s Law, nλ = 2d sin θ. Peaks of the intensity of the scattered

radiation occur when rays from successive planes interfere constructively. The angle between

the transmitted radiation and the diffracted radiation is always equal to 2θ due to Bragg’s

Law. In this study, the phase constituents of the resulting film on the copper substrate

were analyzed via X-ray diffraction. The sample was fixed with tape on a four-cycle X-ray

diffractometer so that the film axis was parallel to the Φ axis. Data were collected with

a wavelength of 0.7208 A and a beam size of 100 µm over the course of 25 hours. The

parameters (2θ− d values and peak intensities) were checked with the spectra of the sample

data from the Inorganic Crystal Structure Database reference diffraction files. Rietveld

refinement is a method that uses least squares to refine a line profile from collected X-ray

20

diffraction data to match a measured profile from a database of crystallographic structures.

I browsed several crystallographic databases to find the proper profile that matched the

locations of constructive interference from the raw X-ray diffraction data, then used Rietveld

refinement to subtract the background from the ionization of air and match the measured

profile.

Figure 9: Illustration depicting the principle of X-ray diffraction characteriza-tions. A fixed wavelength (≈ 10−9 m is reflected off of the crystallographic struc-ture and constructively interferes corresponding to the distance between parallelplanes in accordance with Bragg’s law. The sample and the detector rotate toprobe a range of angles.

4.2 Identification of copper sulfide phase via X-ray diffraction

The high-resolution X-ray diffraction pattern from a synthesized copper sulfide memristor

is displayed in Figure 12(b). By checking the parameters (2θ− d values and peak intensity)

of the XRD pattern with the XRD spectra of the sample data from the ICSD reference

diffraction patterns, this data indicates that the fabricated copper sulfide film is composed of

a variety of mixed phases. Rietveld refinement, which was employed to fit the two most likely

phases, is presented in Figure 11, which shows the composition is approximately 63 percent

rhombohedral digenite and 33 percent hexagonal covellite. However, exact identification

of the crystalline structure is controversial due to the stock of over 100 X-ray diffraction

patterns—many of which have peaks that are narrowly spaced—making it difficult to clearly

21

assign diffraction patterns, demonstrated in Figure 12. There are peak intensities that are

not accounted for in the current Rietveld refinement data. However, rhombohedral digenite

and hexagonal covellite are clearly far more dominant. These structures are visualized in

Figure 10.

(a)(b)

Figure 10: Three-dimensional visualization of (a) Cu9S5 with a rhombohedral(space group 166) structure, and (b) CuS with a hexagonal (space group 194).Crystallographic models created using VESTA.

Previous measurements and analysis of the morphological and electrical properties of

copper sulfide reveal two important features of the digenite phase: first, digenite is less

resistive and has a lower energy band gap than chalcocite (Cu2S); and second, digenite has

been known to maintain its crystalline phase after storing for one year at room temperature

[25]. On the other hand, CuS is a stable p-type compound and has been widely used in

recent years in thin film solar cells due to its unique photovoltaic properties [26]. Hexagonal

covellite also has an advantageous lower energy band gap than rhombohedral digenite [11].

These data indicate that the copper deficiency improves the conductivity of the CuXS, and

a film composed of a combination of digenite and covellite has the potential to maintain

long-term stable semiconductor properties. Additionally, the rate of diffusion of Cu+ ions

increases with decreased stoichiometry of CuXS [18], indicating that the predominantly non-

22

stoichiometric composition of these films may influence switching speed.

The size, shape, and stoichiometry of copper sulfides are difficult to predict because

their fabrication depends on several factors such as solution and substrate temperature,

deposition time, molar ratio, and the influence of the substrate on the reaction. Furthermore,

they are difficult to characterize, as the elongated low-symmetry crystal structure makes the

unit cells readily form twinned structures [27]. Twins are aggregate crystal structures with

the same species that join together in a symmetric orientation or share some symmetric

arrangement of atoms. The presence of twin structures can produce false peaks in the

X-ray diffraction pattern, increasing the complexity of characterizing the present phases of

copper sulfides. Interestingly, twinned structures and pseudo-symmetries have been reported

both in hexagonal covellite [28] and rhombohedral digenite [29], explaining the complexity

in analyzing the powder X-ray diffraction pattern. Figure 11 shows the X-ray diffraction

pattern after undergoing Rietveld refinement to fit peak intensities to the rhombohedral

digenite and hexagonal covellite, and demonstrates that there are missing phases or false

peaks as a result of twinned structures.

I predicted the phases of copper sulfide that would form at room temperature based

on the binary alloy phase diagram in Figure 8. However, these binary alloy phase diagrams

specifically do not account for any other compounds present that might influence the fab-

rication process. In these experiments, ethanol was added to uniformly distribute the solid

sulfur powder in an attempt to produce a more uniform layer of the thin film. It was clear

that ethanol also increased the rate of the reaction, suggesting that its presence lowered the

activation energy. Also, when energized sufficiently, ethanol dissociates:

C2H5−OH −−→ C2H5O + H+

The presence of the dissociated hydrogen atom changes the dynamics of the system.

This, along with the presence of these complex crystal structures, have interesting implica-

tions regarding the switching dynamics of these memristor structures. The isolated proton

23

may sit in equilibrium between the charged atoms in the crystal lattice and move when an

external electric field is applied. These hydrogen atoms can therefore act as independent

charge carriers, certainly affecting the resistive-switching dynamics. The extra protons may

increase switching speed, but they may also contribute to switching instability.

Figure 11: X-ray powder diffraction pattern after Rietveld refinement to fit peakintensities for digenite (space group 166) and covellite (space group 194). Thepeak positions correspond to the translational symmetry of the unit cell; the peakintensities correspond to the electron densities inside the unit cell, and the peakwidths indicate deviation from the perfect crystal form. Wide peaks and slightlyshifted peak positions indicate some peaks may be false due to crystal twinning,or the presence of a new phase of copper sulfide with a lower copper-to-sulfurratio.

24

Figure 12: X-ray diffraction characterization of the phase(s) of copper sulfidepresent in the sample. In (a), preliminary measurement indicated that the powderdiffractometer identified the obvious presence of copper, but the relative inten-sities made the semiconductor film pattern (around 2θ = 30) appear relativelytiny. To be able to better identify the present phases besides copper, another X-ray diffraction pattern was collected at a reduced value of 2θ ≤ 40 over 25 hours.This pattern is compared to peak intensities of common and expected phases ofcopper sulfide such as (b) rhombohedral digenite, (c) cubic digenite, (d) hexago-nal covellite, and (e) hexagonal chalcocite. Several peaks are unaccounted for inthe Rietveld refinement and may be present due to crystal twinning phenomena.

25

5 Electrical measurement

Memristor structures have inherently variable switching dynamics between high and low

electrical resistance states. The results presented in this section are not from one device, but

five, so slight variations in device behavior are present. However, due to overall consistency

and generally low variability between the devices, I present this data as a representative

sample of the devices fabricated using the method introduced in this paper.

5.1 Resistive-switching performance

I measured the transient response, or ‘natural’ response, of the memristor’s resistive switching

to observe how the current through the device changed during one switch. These results are

shown in Figure 13. As the applied voltage rises, the device changes states from the high

resistance OFF state, during which the current through the device is very small, to the low

resistance ON state in an abrupt transition.

Figure 13: The time-dependent current (read using the left ordinate axis) duringone phase change during positive voltage ramping. The voltage of the sourcesignal (read using the right ordinate axis) is superimposed to demonstrate theramping behavior of the voltage across the memristor, which here is 1 VPP at100 Hz, during switching.

26

To determine how the resistance in the device changes during one switch from the OFF-

state to the ON-state, I collected the data for the changing voltage over time. I then attained

the resistance across the memristor via Rmem = Vmem/I, where I is the effective current

through the device. The effective resistance switching over one switching cycle is shown in

Figure 14. The OFF-state of this device is approximately 16 KΩ prior to switching. This

result is slightly concerning at first, because large (on the order of 106 Ω) OFF-state resistance

is required to block current flow in any small conducting array prior to the formation of a

complete conducting path or filament. However, resistive switching systems are commonly

compared using their ROFF/RON ratio, and a ratio of ROFF/RON > 10 is considered a

requirement to be competitive with flash memory [5]. Applying this principle to these data,

a quick order of magnitude estimate shows:

ROFF

RON

=104 Ω

102 Ω= 102

This ratio provides supporting evidence that these devices have the potential to com-

pete with flash memory. Memristors are considered to be highly scalable devices due to the

presumption that the current in the ON-state is carried by a narrow conducting filament or

path. A key piece of evidence to support this is that the resistance of the ON-state does not

depend on or is weakly dependent on the area of the device. However, a flaw in this argument

is that the resistivity of the semiconducting layer can be changed, and the resistance of the

ON-state requires a SET operation. In general, ROFF is governed by the bulk properties of

the memristive material, and RON is governed by the properties of the conducting array.

It is clear in Figure 14 that the time required for the memristor to switch from the

OFF state to the ON state is less than 5 µs. There are several possible reasons why this very

fast switching speed occurs, and one possible explanation is the use of silver paint as the

top electrode. Silver is known to diffuse rapidly into large, soft matrices by an interstitial

mechanism, and its implementation in ZnS contributed to lowering the switching voltage

27

due to rapid transport of metal ions [30]. The use of two active electrodes in memristors is

not common practice for building memory-resistive structures.

Figure 14: Typical example of the change in resistance during the process ofswitching from the initial OFF-state to the ON-state, displayed in a semi-logplot. The SET voltage across the memristor in this case was 350 mV during anapplied signal of 1 VPP at 100 Hz. It is clear that resistance changes abruptlywithout much of a step-like feature.

Figure 15 shows a characteristic pinched hysteresis loop. When a positive electric

field is applied across the device, ions diffuse through the memristive layer and connect

the top and bottom electrodes, at which point the resistance jumps from the OFF-state to

the ON-state. As the polarity of the electric field is reduced to zero and reverses polarity,

current continues to flow through the conducting array until the voltage reaches a negative

threshold that breaks it, switching the device from the ON-state to the OFF-state. As the

device cycled between the high and low resistive states nearly 106 times, the transitions

between the OFF and ON states occur quickly, giving a sharp switching edge and clearly

defined pinched hysteresis loop. This figure demonstrates a bipolar resistive switch, which

is not as prominent in subsequent hysteresis loops. The reason for this is likely because the

28

frequency of the applied signal was just 5 Hz to produce Figure 15, allowing a slow voltage

ramp that carries atoms in and through the copper sulfide matrix to form a conducting array.

Figure 15: Hysteresis behavior of Cu/CuXS/Ag device over 100 cycles during anapplied signal of 1 VPP at 5 Hz.

A key characteristic of memristors is their ability to retain one memory state until

a change in voltage beyond a threshold (determined by the intrinsic properties of the de-

vice) causes the resistance state to switch. Evidence supporting or refuting the volatility of

memristor function provides insight to possible applications. If the device is volatile, then

hysteretic switching is possible without reversing the polarity of the applied signal. If the

device is non-volatile, then a reversed polarity is required to induce hysteresis. For this

experiment, I applied a signal ranging from 0 V to 1 V and was only able to observe the

device in the high resistance state or the low resistance state. However, when I reduced the

lower voltage limit to be slightly negative, I observed the open-loop hysteretic characteristic.

Thus, a negative polarity is required to induce resistive switching. Figure 16 provides this

evidence that these devices are non-volatile and thus bipolar.

29

Figure 16: Demonstration of bipolar switching behavior in Cu/CuXS/Ag deviceover 50 cycles during an applied signal from −0.2V to 1 V at 1 KHz.

To further classify the operating parameters of copper sulfide memristor structures,

I observed their behavior as the frequency and voltage parameters were varied. With the

same device, I applied a signal and changed its parameters in small increments, first by

increasing the frequency while holding the voltage constant, and then increasing the voltage

while holding the frequency constant. These data are presented in Figures 17 and 18. In

Figure 17, I observed essentially static hysteresis in the positive direction at 5 Hz. When

I increased the frequency to a high 50 KHz, I observed a clear phase shift between the

voltage and current made apparent by the offset from the origin, which is likely due to

a time delay caused by resistive-capacitive effects derived from the time required for the

voltage across the capacitor-like electrodes to reach that of the applied voltage. The time

delay due to resistive-capacitive effects can be roughly estimated using the RC time constant

τ = RC. The approximate capacitance for the device is determined by the classic relationship

C = ε0A/d where ε0 is the vacuum permittivity constant, A is the device area, and d is the

distance between the top and bottom electrodes. I determined an estimate for the RC time

30

constant for this device:

C =ε0A

d≈ (10−11 Fm−1)(10−5 m)

10−6 m= 10−10 Farads

τ = RC = (100 Ω)(10−10 Farads) = 0.01 µs

Resistive-capacitive delay hinders the speed of microelectronic circuits. Despite its

small approximate value in this system, as the device size decreases, this effect becomes

more prominent.

In Figure 18, I first observed the presence of an open pinched hysteresis loop with an

applied signal of 600 mV. The device maintained hysteretic switching behavior until the

voltage was large enough to permanently damage the device, in this case at 3.2 V. It is

important to note that the memristor’s VSET varies with the applied signal. This behavior

can be explained by the peak-to-peak applied voltage which, when increased in peak-to-peak

magnitude, drive the ions further away from the top electrode during the reversed polarity

state, causing the ions to have a greater distance to travel to connect the electrodes and turn

the device back on. Thus, for these devices, SET and RESET voltages vary based on the

applied signal. Finally, Figure 19 displays the hysteresis loops captured during a frequency

scan, and demonstrate the variability in the resistance and the switching capabilities at high

frequencies. This frequency response demonstrates that the switching capabilities of the

copper sulfide memristor are maintained at very high frequencies, so the device itself has a

rather large bandwidth ranging from 5 Hz to 500 kHz.

31

(a) (b)

Figure 17: Representative device performance at low (a) and high (b) frequencies.To generate this data, the voltage was held constant at 1 VPP and the frequencywas increased in increments of 100 Hz. The phase delay is apparent at highfrequencies (b).

(a) (b)

Figure 18: Operating voltage for a representative device. To generate this data,the frequency was held at 1 KHz while I conducted a scan of increasing peak-to-peak amplitudes (in increments of 100 mV) from 100 mV to until overvoltagewas reached at 3.2 V.

32

Figure 19: Frequency response of hysteresis switching behavior in Cu/CuXS/Agdevice over 50 cycles during an applied signal of 1 VPP .

5.2 Device endurance

The switching dynamics of the memristor design described in this work rely on one or more

of two physical mechanisms: an electrochemical reaction in the copper sulfide film, changing

its conductivity; and the migration of conducting ions of copper, silver, or hydrogen. These

mechanisms are based on the dynamics of the system including inherent properties of the

device and the applied signal, and can therefore switch mechanisms or occur simultaneously.

These copper sulfide memristors provide stable and repeatable switching. I constructed

a few devices that continued to demonstrate memory-resistive switching more than a month

after the film fabrication. However, one of the greatest setbacks with this low-cost memristor

is the occasional breakdown of its structural integrity. While this corrosion did not occur to

every device, Figure 20 shows an example of the observed corrosion tendency.

33

(a) Uniform copper sulfide film on coppersubstrate only minutes after removing fromthe reaction and cleaning.

(b) Corroded copper sulfide film of the samedevice 30 days after removing from the reac-tion.

Figure 20: One of the biggest and most perplexing obstacles in switching repro-ducibility is the degradation of the copper sulfide thin film that occurred over amatter of weeks or days.

This degradation could be due to a variety of factors. One possible cause is that

the experimental methods used to fabricate these devices does not guarantee the complete

removal of the sulfur powder from the fabricated film, possibly allowing the spontaneous

reaction between copper and sulfur to continue; this would yield larger crystal structures,

disrupting the uniformity of the thin film. Another possible cause for this apparent corrosion

is photodegradation, which is a reduction as a result of the exposure to oxygen and photons—

which has been experimentally demonstrated in digenite and covellite [11]. A third cause

may be due to the presence of ethanol in the experimental methods. Metals characteristically

give up electrons in the process known as oxidation. The electrons eventually become part

of another compound during a reduction reaction. Some metals are corroded by acidic

solutions, containing a large concentration of H+ atoms, which are reduced via the reaction

2 H+ + 2 e– −−→ H2. As discussed in Section 4.2, the presence of ethanol is harmful in

this case as it is likely contributing hydrogen atoms to the system that are being reduced

to hydrogen gas via oxidation-reduction reaction, leading to corrosion of the copper sulfide

film.

34

5.3 Comparing performance to commercially available device

Two companies—Hewlett-Packard and Knowm Incorporated—collectively own the 40 patents

for all commercially available memristors. Hewlett-Packard released a memristor in 2008

intended for commercial and integrated circuit use, but the low reliability of the devices

prevented the company from incorporating them into their idea for a next-generation com-

puter [8]. I claim that the memristors I built during this study function comparably to

commercially available devices.

Knowm Inc.’s current commercially available memristor is a 16-pin chip that is made

with the intent that researchers will use them to study their properties [31]. The device

is bipolar and consists of two electrodes, both active, and a thin film made of amorphous

chalcogenide. The Knowm memristor uses both oxidative reduction reactions and ion con-

duction to switch resistive states depending on the parameters of the applied signal, which

is a similar mechanism that I suggest for the device presented in this paper. Knowm’s

specs report that the resistive-switching behavior of the device can occur after the device

has been set by a DC bias. This is due to the permanent change in the chalcogenide layer

that happens during the electro-forming process. The device described in this paper likely

undergoes an electro-forming step, but current evidence supports that a DC bias is not re-

quired to induce hysteretic switching. Identical to the memristors described in this paper,

Knowm’s memristor is advertised in the device specifications to have an operating voltage

below 3 VPP and requires the use of a series resistor. In Figure 21, the frequency response of

Knowm’s memristor should be compared to the frequency response of my device presented

in Figure 19. These data suggest that the device presented in this paper may actually have

better durability of hysteretic switching at high frequencies.

35

Figure 21: Frequency response of the Knowm Inc. memristor [31]. While a 16-pinmemristor is commercially available for between 180 and 220 USD, my device hasan estimated cost of a fraction of a cent and has comparable functionality. Thereader is encouraged to compare this figure to Figure 19.

The cost of a memristor produced by Knowm Inc. is currently between 180 and 220

USD. While this is likely not the cost of production, the fabrication process described in the

device specifications involve materials that are restrictive either due to their availability or

their cost. The fabrication method presented in this paper relies on a few key ingredients,

all of which can be bought in a hardware store: a copper board, sulfur powder, silver

conducting paint, and denatured ethanol. Using volumetric ratios, I estimated the average

cost of producing a single device that is one square inch in size and arrived at 0.3 USD.

However, with proper precision cutting equipment, the area of the device could be reduced

to a small fraction of this size, indicating that the materials cost for one potential memristor

could fall below one cent.

36

6 Conclusion

In this thesis, I explored the use of copper sulfides as a possible candidate for a flash memory

alternative. I aimed to construct a copper sulfide memristor structure that demonstrates

hysteretic switching comparable to current commercially available devices at a reduced cost.

I adopted and improved upon a fabrication method to produce a copper sulfide thin film; I

used silver paint to construct a metal-semiconductor-metal memristor; I characterized the

phases of the thin film via X-ray diffraction; and I electrically measured aspects of the

switching dynamics. I found that this simple wet chemistry technique produces a thin film

primarily composed of rhombohedral digenite and hexagonal chalcocite, revealing complex

physical mechanisms that may govern resistive switching. I characterized the operating

parameters of the devices and found that these copper sulfide memristors switch resistance

states nearly twice as fast as flash memory cells and have a comparable range of operating

voltages to the memristor patented by Knowm Incorporated. I have demonstrated that these

devices are capable of non-volatile hysteretic resistance at low operating voltage and current

with a potential financial setback of roughly one cent.

Memristors are of current research interest because of their simplicity, potential for

scalability, low operating voltages, and low-power consumption, particularly because flash

memory is reaching its scaling limit in the nano-scale regime. A decisive advantage of

using thin-film memory resistive devices is the rapid (< 10µs) write/erase speed at low

voltages and operating currents. As introduced in Section 1, the push for tightly packed

electronic circuitry in consumer electronics has influenced the cell size and cost of flash

memory dramatically, and the cost per bit is projected to decrease even more [3]. However,

scaling of flash memory is made difficult by the thickness of the oxide-based structure that

inherently shorts when decreased to the nanometer scale. Copper sulfides used in resistance

change memories show surprising scalability, and are possibly more applicable and reliable

than oxide-based switching structures [10]. It has been experimentally demonstrated that

37

CuXS products maintained their crystalline phases after being stored for a year at room

temperature [25], indicative of good stability.

Looking forward, there is great potential to improve this fabrication methodology. Over

the course of my studies, I made small adjustments in my procedure that significantly im-

proved the functionality and reproducibility of these copper sulfide memristor structures, but

there is still tremendous room for improvement. First, although interesting crystal structures

arise at room temperature due to the use of ethanol to lower the activation energy, its con-

tinued use in the fabrication process should be questioned due to its potential contribution

to the thin film corrosion. The fabrication methods may also be improved by devising a more

efficient yet inexpensive thin film cleaning process, which currently requires meticulous man-

ual effort to physically remove the residual sulfur powder. Furthermore, these memristors

are not ready for commercialized use because of their fragile and exposed thin film, so further

improvements are necessary to condense the surface area of the device while maintaining the

ease of integration into electronic circuitry is required before wide-scale distribution.

38

7 Acknowledgements

First and foremost, I would like to thank Dr. Stephen Teitsworth for advising this project. I

would also like to thank Casey Marjerrison for her insight in exploring the crystal structure

of copper sulfide phases, for interesting discussions regarding the formation and analysis

of complex crystallographic structures, and for her assistance collecting and analyzing the

X-ray diffraction data. A special thanks to Dr. Yuriy Bomze for teaching me how to take

proper measurements with complex equipment, and to Matt Olson for introducing me to

thin film fabrication.

All studies presented in this paper were conducted through the Department of Physics

and the Shared Materials Instrumentation Facility at Duke University.

39

8 Appendix

8.1 Additional methods

I fabricated the CuXS film using copper and a mixture of denatured ethanol and sulfur

powder. Rinsing thoroughly with denatured alcohol does not remove all of the sulfur powder

from the film without damaging the thin film layer, decreasing device stability. I ran the

same reaction over the same time frame with isopropyl alcohol instead of denatured ethanol

to experiment with inexpensive alternatives, and found that the isopropyl alcohol tends

to lower the activation energy, accelerating the thin film growth dramatically; however,

it also corrodes the device rapidly, and is not recommended for this reaction. Rinsing with

denatured ethanol and water, even without significant turbulent flow, resulted in destruction

of the CuXS film during the final cleaning stage. The non-polar elemental sulfur is insoluble in

the polar solutions currently being used to facilitate the reaction. However, dry sulfur powder

exposed to the copper substrate yields a slow reaction and a non-uniform film consisting of

gaps between the film and copper substrate. I attempted to improve the final cleaning stage

by dissolving the sulfur in a strong nonpolar solvent such as carbon disulfide (CS2), benzene

(C6H6), and toluene (C6H5−CH3), but reached no success in finding a solvent to dissolve

sulfur but keep the thin film in tact. The current method involves meticulously scraping the

sulfur grains off of the thin film under a microscope with a stainless steel spatula.

Typical inert electrodes, which are placed on top of the film, include Pt, Au, and

W [6]. However, any conductor should be able to perform the same function. I primarily

constructed the memristor devices using a small piece of aluminum foil, which results in

poor reproducibility and instability of the ON-state. To improve these contacts, I attempted

using aluminum epoxy, copper tape, soft solder deposited with a soldering iron, and silver

paint. Silver paint was the only plausible alternative to preserve switching dynamics, but is

an active electrode, unlike other memristive devices.

40

8.2 Modeling an Ideal Memristor

To the best knowledge of the author, an analog device using standard available electronic

components to produce the pinched hysteresis loop of an ideal memristor has not yet been

created. The theory behind constructing a circuit of this type is described here with a circuit

theory approach.

8.2.1 The Schmitt Trigger

Otto Schmitt first invented what he called the ”thermoionic trigger” when he was a graduate

student [32]. The Schmitt trigger is a comparator circuit with hysteresis implemented by

applying positive feedback to the noninverting input to the differential amplifier. This active

circuit converts an analog input signal to a digital output signal, which retains its value

until the input changes sufficiently to trigger that change. A Schmitt trigger composed of

an operational amplifier with a positive feedback loop is shown in Figure 22.

Figure 22: The Schmitt trigger

This device is typically used to remove noise from signals used in digital circuits. I

intend to use and modify the Schmitt trigger’s property of hysteresis to mimic that of an

ideal memristive device.

8.2.2 Static analysis

The equivalent circuit for an ideal op-amp with positive feedback is shown in Figure 23.

41

Figure 23: An ideal op-amp circuit with reference voltages v+ and v− leading toopen-loop gain A(v+ − v−).

Using the voltage divider to relate the output voltage vout to the input voltage vin and

setting v− to ground and solving,

vout = A(v+ − v−) = A

(vout − vinR1 +R2

R1 + vin

)

vout

(1− AR1

R1 +R2

)= vin

(1− R1

R1 +R2

)

vout = vin(R1 +R2)−R1

−R1

vout = −vinR2

R1

(1)

which is the gain of an op-amp with positive feedback.

8.2.3 Op-amp dynamics

An ideal op-amp circuit with both positive and negative feedback [33] is given in Figure 24.

A small perturbation across the capacitor C leads to a time constant associated with the

internal structure of the op-amp.

v+ =v0R1

R1 +R2

= γ+v0 (2)

42

(a)(b)

Figure 24: (a) An ideal op-amp circuit with positive feedback and reference volt-ages v+ and v−. (b) The internal delay element of the op-amp with referencevoltages corresponding to op-amp reference voltages, (v+ − v−).

v− = 0

(v+ − v−) = R

(Cdv+

dt

)+ v∗

Note from Figure 24, the output voltage is v0 = Av∗, where A is the open loop gain.

RC

A

dv0dt

+v0A

= (v+ − v−)

Substituting Equation 2,

RC

A

dv0dt

+v0A

= γ+v0 − 0

dv0dt

+v0RC

= γ+v0A

RC

dv0dt

+ v0

[1

RC+

1

RC

(γ+) ]

= 0

dv0dt

+v0T

= 0 (3)

43

By applying separation of variables, we can solve for v0 in terms of the time constant T:

∫dv0v0

= −∫dt

T

v0(t) = κe−tτ (4)

If the portion of the output voltage sent to the positive input is greater than the

voltage at the negative input (here it is v− = 0), the result is net positive feedback. Thus,

when γ+ > γ− = 0, the time constant T can be negative, yielding a positive and unstable

exponential shown in Figure 25.

(a) (b)

Figure 25: (a) Plot showing effect of vout = exp(−tτ

) with a positive time constant.For positive feedback, the internal dynamics of the op-amp yields an exponentialoutput voltage, limited only by the rail voltages. (b) The resulting hysteresis loopfrom positive feedback [34].

The result in Figure 25(b) demonstrates the hysteresis loop resulting from positive

feedback. As vin is increased, vout remains constant at the lower rail voltage until vin reaches

the rail voltage, switching the sign of the time constant and causing vout to switch to the

positive rail.

44

(a)

(b)

Figure 26: (a) The N-channel JFET. (b) Typical N-channel JFET operatingcharacteristics.

8.2.4 Analysis of JFET switching component

Junction field-effect transistors (JFETs), shown in Figure 26 are three-lead semiconductors

that are exclusively voltage controlled. A unique property of the JFET is that it is on when

there is no voltage difference between the gate and the source leads; when a voltage difference

forms between the leads, the JFET becomes more resistant to current flow and less current

flows through the drain-source leads. JFETs are therefore referred to as depletion devices,

unlike bipolar transistors. The JFET has an extremely large input impedance (around

1010Ω), so it draws little current from the control circuit while it controls current flow [35].

For a JFET, under certain operating conditions, the resistance of the drain-source

channel is a function of the gate-source voltage alone. In an n-channel JFET, when the

gate voltage is the same as the source voltage (VGS = VG − VS = 0), maximum current

flows through the JFET from the drain to the source (when the drain current is reduced to

the point that the JFET is no longer conducting). The Source current flowing out of the

device is the drain current flowing into it, so ID = IS. This voltage where the JFET acts

like an open circuit is referred to as the pinchoff voltage and is symbolized by VGS(off). The

resulting current is the drain current for zero bias, IDSS, and is given on the data sheet for

45

every JFET. The current through the JFET, ID, depends on the drain to source voltage.

When VDS is small, ID varies linearly with VDS. Thus, the JFET can function as a voltage-

controlled resistor in the ohmic region of the JFET’s functionality when VG < VGS(off).

Alternatively, when VDS is increasingly negative, the current has the opposite effect because

of the gate-to-channel junction when the drain signal exceeds the negative gate voltage. As

long as the JFET is in the ohmic regime, the output voltage is Vout = VinRDSR+RDS

= VinA where

A is the gain.

8.2.5 Constructing an analog ideal memristor

Using a Schmitt trigger and an n-channel JFET, an analog ideal memristive device may be

constructed to mimic the hysteresis loop of the ideal non-volatile memristor. This model is

shown in Figure 27.

Figure 27: Current design of an analog memristive device using a Schmitt triggerand n-channel JFET.

Based on the analysis above, the Schmitt trigger will produce a square hysteresis loop

as shown in Figure 25(b). When the output of the Schmitt trigger is more negative than

the source voltage Vin = VS, the gate is closed and current will flow from the drain to the

source in the ohmic region of the JFET. In the same way, when VDS > −VS, the JFET will

operate in the ohmic region and current will flow from the drain to the source.

46

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