SATA 2.5 Clause 7 Physical Layer Test Suite (v1.1) (1)

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© 2006 University of New Hampshire InterOperability Laboratory

UNH INTEROPERABILITY LAB

SATA CONSORTIUM

SATA 2.5 Clause 7

Physical Layer Test Suite

Version 1.1

Technical Document

Last Updated:April 18, 2006

SATA Consortium121 Technology Drive, Suite 2

InterOperability Laboratory Durham, NH 03824

Research Computing Center Phone: +1-603-862-3640

University of New Hampshire Fax: +1-603-862-4181

http://www.iol.unh.edu/consortiums/sata






The University of New Hampshire

InterOperability Laboratory

UNH IOL SATA Consortium 2 SATA 2.5 UNH Physical Layer Conformance Test Suite v1.1

TABLE OF CONTENTS

TABLE OF CONTENTS.........................................................................................2

MODIFICATION RECORD ..................................................................................4

ACKNOWLEDGMENTS.......................................................................................5 INTRODUCTION....................................................................................................6

GROUP 1: PHY GENERAL REQUIREMENTS .................................................8

TEST PHY-01 - U NIT I NTERVAL ................................................................................................... 9

TEST PHY-02 – FREQUENCY LONG TERM STABILITY ................................................................ 10TEST PHY-03 - SPREAD-SPECTRUM MODULATION FREQUENCY .............................................. 11

TEST PHY-04 - SPREAD-SPECTRUM MODULATION DEVIATION ................................................ 12

GROUP 2: PHY TRANSMITTER REQUIREMENTS.....................................13

TEST TX-01 - PAIR DIFFERENTIAL IMPEDANCE ........................................................................ 14TEST TX-02 - SINGLE-E NDED IMPEDANCE............................................................................... 15

TEST TX-03 - DIFFERENTIAL MODE R ETURN LOSS .................................................................. 16

TEST TX-04 - COMMON MODE R ETURN LOSS.......................................................................... 17TEST TX-05 - IMPEDANCE BALANCE........................................................................................ 18

GROUP 3: PHY TRANSMITTED SIGNAL REQUIREMENTS.....................19

TEST TSG-01 - DIFFERENTIAL OUTPUT VOLTAGE .................................................................... 20TEST TSG-02 - R ISE/FALL TIME ............................................................................................... 21

TEST TSG-03 - DIFFERENTIAL SKEW ....................................................................................... 22

TEST TSG-04 - AC COMMON MODE VOLTAGE ........................................................................ 23

TEST TSG-05 - R ISE/FALL IMBALANCE .................................................................................... 24TEST TSG-06 - AMPLITUDE IMBALANCE .................................................................................. 25

TEST TSG-07 - TJ AT CONNECTOR , DATA, 5UI ........................................................................ 26TEST TSG-08 - DJ AT CONNECTOR , DATA, 5UI........................................................................ 27TEST TSG-09 - TJ AT CONNECTOR , DATA, 250UI .................................................................... 28

TEST TSG-10 - DJ AT CONNECTOR , DATA, 250UI.................................................................... 29

TEST TSG-11 - TJ AT CONNECTOR , CLOCK , 500 ...................................................................... 30TEST TSG-12 - DJ AT CONNECTOR , CLOCK , 500...................................................................... 31

GROUP 4: PHY RECEIVER REQUIREMENTS .............................................32

TEST RX-01 - PAIR DIFFERENTIAL IMPEDANCE ........................................................................ 33TEST RX-02 - SINGLE-E NDED IMPEDANCE............................................................................... 34

TEST RX-03 – DIFFERENTIAL MODE R ETURN LOSS .................................................................. 35

TEST RX-04 – COMMON MODE R ETURN LOSS.......................................................................... 36

TEST RX-05 – IMPEDANCE BALANCE........................................................................................ 37

GROUP 5: PHY OOB REQUIREMENTS..........................................................38

TEST OOB-01 – OOB SIGNAL DETECTION THRESHOLD ........................................................... 39

TEST OOB-02 – UI DURING OOB SIGNALING.......................................................................... 40

TEST OOB-03 – COMINIT/RESET AND COMWAKE TRANSMIT BURST LENGTH ................. 41

TEST OOB-04 – COMINIT/RESET TRANSMIT GAP LENGTH .................................................. 42






TEST OOB-05 – COMWAKE TRANSMIT GAP LENGTH ............................................................ 43

TEST OOB-06 – COMWAKE GAP DETECTION WINDOWS ....................................................... 44TEST OOB-07 – COMINIT GAP DETECTION WINDOWS........................................................... 45






MODIFICATION RECORD

2) April 18, 2006 (Version 1.1) INCREMENTAL UPDATE Andy Baldman: Added to Appendices A and B.

Added clarification to PHY-02 under ‘possible problems’.

1) March 14, 2006 (Version 1.0) INITIAL RELEASE Andy Baldman: Initial Release






ACKNOWLEDGMENTS

The University of New Hampshire would like to acknowledge the efforts of the following

individuals in the development of this document.

Andy Baldman UNH InterOperability LaboratoryDave Woolf UNH InterOperability Laboratory






INTRODUCTION

The tests contained in this document are organized in order to simplify the identification

of information related to a test, and to facilitate in the actual testing process. Tests are separated

into groups, primarily in order to reduce setup time in the lab environment, however the different

groups typically also tend to focus on specific aspects of device functionality.

The test definitions themselves are intended to provide a high-level description of themotivation, resources, procedures, and methodologies specific to each test. Formally, each test

description contains the following sections:

Purpose

The purpose is a brief statement outlining what the test attempts to achieve. The test is

written at the functional level.

ReferencesThis section specifies all reference material external to the test suite, including the

specific subclauses references for the test in question, and any other references that might be

helpful in understanding the test methodology and/or test results. External sources are always

referenced by a bracketed number (e.g., [1]) when mentioned in the test description. Any otherreferences in the test description that are not indicated in this manner refer to elements within the

test suite document itself (e.g., “Appendix 6.A”, or “Table 6.1.1-1”)

Resource Requirements

The requirements section specifies the test hardware and/or software needed to perform

the test. This is generally expressed in terms of minimum requirements, however in some cases

specific equipment manufacturer/model information may be provided.

Last Modification

This specifies the date of the last modification to this test.

Discussion

The discussion covers the assumptions made in the design or implementation of the test,

as well as known limitations. Other items specific to the test are covered here as well.

Test Setup

The setup section describes the initial configuration of the test environment. Small

changes in the configuration should not be included here, and are generally covered in the test procedure section (next).

Procedure

The procedure section of the test description contains the systematic instructions forcarrying out the test. It provides a cookbook approach to testing, and may be interspersed with

observable results.








GROUP 1: PHY GENERAL REQUIREMENTS

Overview:

This group of tests verifies the Phy General Requirements, which are primarily defined in

Table 20 of Clause 7 of the SATA Standard, v2.5.






Test PHY-01 - Unit Interval

Purpose: To verify that the Unit Interval of the DUT TX signaling is within the conformance limits.

References:[1] SATA Standard, 7.2.1, Table 20 – General Specifications

[2] Ibid, 7.2.2.1.3 – Unit Interval

[3] Ibid, 7.4.11 – SSC Profile

Resource Requirements: See Appendix A

Last Modification: March 14, 2006 (Version 1.0)

Discussion:

Reference [1] specifies the general PHY conformance limits for SATA devices. This specification includesconformance limits for the mean Unit Interval (UI). Reference [2] provides the definition of this term for the

purposes of SATA testing. Reference [3] defines the measurement requirements for this test.

In this test, the mean UI value is measured based on the average of at least 100,000 observed UI’s,

measured at the transmitter output. The test pattern used for this test is the High Frequency Test Pattern (HFTP).

For devices which support 3.0Gb/s rates, this test must be run at both interface speeds (3.0Gb/s and

1.5Gb/s).

Test Setup: See Appendix A

Test Procedure:

This test is included in the referenced SATA-IO MOI document. See Appendix B for details.

Observable Results:

The mean Unit Interval value shall be between 666.4333 ps and 670.2333 ps for 1.5Gb/s devices, and between 333.2167ps and 335.1167ps for 3.0Gb/s devices.

Possible Problems: None.








Test PHY-03 - Spread-Spectrum Modulation Frequency

Purpose: To verify that the Spread Spectrum Modulation Frequency of the DUT’s transmitter is within the

conformance limits.

References:

[1] SATA Standard, 7.2.1, Table 20 – General Specifications

[2] Ibid, 7.2.2.1.5 – Spread-Spectrum Modulation Frequency[3] Ibid, 7.4.11 – SSC Profile

Resource Requirements: See Appendix A.


Discussion:Reference [1] specifies the general PHY conformance limits for SATA devices. This specification includes

conformance limits for the Spread-Spectrum Modulation Frequency. Reference [2] provides the definition of this

term for the purposes of SATA testing. Reference [3] defines the measurement requirements for this test.

In this test, the Spread-Spectrum Modulation Frequency, f SSC, is measured, based on at least 10 completeSSC cycles.

Test Setup: See Appendix A.

Test Procedure:


Observable Results:

The Spread-Spectrum Modulation Frequency value shall be between 30 and 33 kHz for both 1.5Gb/s and3.0Gb/s devices.







Test PHY-04 - Spread-Spectrum Modulation Deviation

Purpose: To verify that the Spread-Spectrum Modulation Deviation of the DUT’s transmitter is within the

conformance limits.

References:

[1] SATA Standard, 7.2.1, Table 20 – General Specifications

[2] Ibid, 7.2.2.1.6 – Spread-Spectrum Modulation Deviation[3] Ibid, 7.4.11 – SSC Profile



Discussion:Reference [1] specifies the general PHY conformance limits for SATA devices. This specification includes

conformance limits for the Spread-Spectrum Modulation Deviation. Reference [2] provides the definition of this


In this test, the Spread-Spectrum Modulation Frequency, f SSC, is measured, based on at least 10 completeSSC cycles.


Test Procedure:


Observable Results:

The Spread-Spectrum Modulation Deviation value shall be between –5000 and +0 ppm for both 1.5Gb/sand 3.0Gb/s devices.







GROUP 2: PHY TRANSMITTER REQUIREMENTS

Overview:

This group of tests verifies the Phy Transmitter Requirements, which are primarily

defined in Table 20 of Clause 7 of the SATA Standard, v2.5.






Test TX-01 - Pair Differential Impedance

Purpose: To verify that the Pair Differential Impedance of the DUT’s transmitter is within the conformance limits.

References:[1] SATA Standard, 7.2.1, Table 21 – Transmitter Specifications

[2] Ibid, 7.2.2.2.1 – TX Pair Differential Impedance (Gen1i)

[3] Ibid, 7.4.22 – TDR Differential Impedance (Gen1i/Gen1m)



Discussion:

Reference [1] specifies the Transmitter Specification conformance limits for SATA devices. Thisspecification includes conformance limits for the Pair Differential Impedance. Reference [2] provides the definition

of this term for the purposes of SATA testing. Reference [3] defines the measurement requirements for this test.

Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The Pair Differential Impedance for the DUT TX port shall be between 85 and 115 ohms for Gen1i,

Gen1m, Gen1x, and Gen2x devices. This test does not apply to Gen2i and Gen2m devices.







Test TX-02 - Single-Ended Impedance

Purpose: To verify that the Single-Ended Impedance of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.2.2 – TX Single-Ended Impedance (Gen1i)

[3] Ibid, 7.4.23 – TDR Single-Ended Impedance (Gen1i/Gen1m)



Discussion:

Reference [1] specifies the Transmitter Specification conformance limits for SATA devices. Thisspecification includes conformance limits for the Single-Ended Impedance. Reference [2] provides the definition of

this term for the purposes of SATA testing. Reference [3] defines the measurement requirements for this test.


Test Procedure:


Observable Results:

The Single-Ended Impedance for the DUT TX port shall be greater than 40 ohms for Gen1i and Gen1mdevices. This test does not apply to Gen2i and Gen2m devices.







Test TX-03 - Differential Mode Return Loss

Purpose: To verify that the Differential Mode Return Loss of the DUT’s transmitter is within the conformance

limits.

References:

[1] SATA Standard, 7.2.1, Table 21 – Transmitter Specifications

[2] Ibid, 7.2.2.2.3 – TX Differential Mode Return Loss (Gen2i, Gen2m)[3] Ibid, 7.4.10 – Return Loss and Impedance Balance



Discussion:Reference [1] specifies the Transmitter Specification conformance limits for SATA devices. This

specification includes conformance limits for the Differential Mode Return Loss. Reference [2] provides the

definition of this term for the purposes of SATA testing. Reference [3] defines the measurement requirements forthis test.


Test Procedure:


Observable Results:The TX Differential Mode Return Loss shall be above the minimum limits specified in reference [1] for

Gen2i and Gen2m devices. For convenience, the values are reproduced below.

Frequency Range Lower Rloss Limit (Gen2i) Lower Rloss Limit (Gen2m)

150-300 MHz 14 dB 14 dB300-600 MHz 8dB 8 dB

600-1200 MHz 6 dB 6 dB

1200-2400 MHz 6 dB 6 dB

2400-3000 MHz 3 dB 3 dB

3000-5000 MHz 1 dB -







Test TX-04 - Common Mode Return Loss

Purpose: To verify that the Common Mode Return Loss of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.2.4 – TX Common Mode Return Loss (Gen2i, Gen2m)

[3] Ibid, 7.4.10 – Return Loss and Impedance Balance



Discussion:

Reference [1] specifies the Transmitter Specification conformance limits for SATA devices. Thisspecification includes conformance limits for the Common Mode Return Loss. Reference [2] provides the definition



Test Procedure:


Observable Results:

The TX Common Mode Return Loss shall be above the minimum limits specified in reference [1] forGen2i and Gen2m devices. For convenience, the values are reproduced below.


150-300 MHz 8 dB 5 dB

300-600 MHz 5 dB 5 dB

600-1200 MHz 2 dB 2 dB1200-2400 MHz 2 dB 2 dB

2400-3000 MHz 2 dB 1 dB

3000-5000 MHz 1 dB -







Test TX-05 - Impedance Balance

Purpose: To verify that the Impedance Balance of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.2.5 – TX Impedance Balance (Gen2i, Gen2m)

[3] Ibid, 7.4.10 – Return Loss and Impedance Balance



Discussion:

Reference [1] specifies the Transmitter Specification conformance limits for SATA devices. Thisspecification includes conformance limits for the TX Impedance Balance. Reference [2] provides the definition of


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The TX Impedance Balance shall be above the minimum limits specified in reference [1] for Gen2i and

Gen2m devices. For convenience, the values are reproduced below.


150-300 MHz 30 dB 30 dB

300-600 MHz 20 dB 20 dB

600-1200 MHz 10 dB 10 dB

1200-2400 MHz 10 dB 10 dB2400-3000 MHz 4 dB 4 dB

3000-5000 MHz 4 dB -







GROUP 3: PHY TRANSMITTED SIGNAL REQUIREMENTS

Overview:

This group of tests verifies the Phy Transmitted Signal Requirements, which are

primarily defined in Table 22 of Clause 7 of the SATA Standard, v2.5.






Test TSG-01 - Differential Output Voltage

Purpose: To verify that the Differential Output Voltage of the DUT’s transmitter is within the conformance limits.

References:[1] SATA Standard, 7.2.1, Table 22 – Transmitted Signal Requirements

[2] Ibid, 7.2.2.3.1 – TX Differential Output Voltage

[3] Ibid, 7.4.4 – Transmitter Amplitude



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the Differential Output Voltage. Reference [2] provides the definition of this term

for the purposes of SATA testing. Reference [3] defines the measurement requirements for this test.

Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The Differential Output Voltage shall be between the limits specified in reference [1]. For convenience,

the values are reproduced below.

Device Type DOV Min DOV Max

Gen1i, Gen1m 400 mV 600 mV

Gen1x 400 mV 1600 mV

Gen2i. Gen2m 400 mV 700 mV

Gen2x 400 mV 1600 mV







Test TSG-02 - Rise/Fall Time

Purpose: To verify that the Rise/Fall time of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.3.3 – TX Rise/Fall Time

[3] Ibid, 7.4.3 – Rise and Fall Times



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the Rise/Fall Time. Reference [2] provides the definition of this term for the


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The TX Rise/Fall Times shall be between the limits specified in reference [1]. For convenience, the values

are reproduced below.

Device Type RFT Min RFT Max

Gen1i, Gen1m 100 ps 273 ps

Gen1x 67 ps 273 ps

Gen2i, Gen2m, Gen2x 67 ps 136 ps









Test TSG-04 - AC Common Mode Voltage

Purpose: To verify that the AC Common Mode Voltage of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.3.5 – TX AC Common Mode Voltage (Gen2i, Gen1x, Gen2x)

[3] Ibid, 7.4.17 – TX AC Common Mode Voltage



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the TX AC Common Mode Voltage. Reference [2] provides the definition of this


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The AC Common Mode Voltage value shall be less than 50 mVp-p for Gen2i and Gen2m devices.







Test TSG-05 - Rise/Fall Imbalance

Purpose: To verify that the Rise/Fall Imbalance of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.3.9 – TX Rise/Fall Imbalance

[3] Ibid, 7.4.16 – TX Rise/Fall Imbalance



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the Rise/Fall Imbalance. Reference [2] provides the definition of this term for the


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The Rise/Fall Imbalance value shall be less than 20% for Gen2i and Gen2m devices.







Test TSG-06 - Amplitude Imbalance

Purpose: To verify that the Amplitude Imbalance of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.3.10 – TX Amplitude Imbalance (Gen2i, Gen1x, Gen2x)

[3] Ibid, 7.4.15 – TX Amplitude Imbalance



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the TX Amplitude Imbalance. Reference [2] provides the definition of this term for

the purposes of SATA testing. Reference [3] defines the measurement requirements for this test.

Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The TX Amplitude Imbalance value shall be less than 10% for Gen1x, Gen2i, Gen2m, and Gen2x devices.







Test TSG-07 - TJ at Connector, Data, 5UI

Purpose: To verify that the TJ at Connector (Data, 5UI) of the DUT’s transmitter is within the conformance limits.


[2] Ibid, 7.2.2.3.11

[3] Ibid, 7.4.8



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the TJ at Connector (Data, 5UI). Reference [2] provides the definition of this term


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The TJ at Connector (Data, 5UI) value shall be less than 0.355 UI for Gen1i and Gen1m devices.









Test TSG-09 - TJ at Connector, Data, 250UI

Purpose: To verify that the TJ at Connector (Data, 250UI) of the DUT’s transmitter is within the conformance

limits.

References:

[1] SATA Standard, 7.2.1, Table 22 – Transmitted Signal Requirements

[2] Ibid, 7.2.2.3.11[3] Ibid, 7.4.8



Discussion:Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specification

includes conformance limits for the TJ at Connector (Data, 250UI). Reference [2] provides the definition of this



Test Procedure:


Observable Results:

The TJ at Connector (Data, 250UI) value shall be less than 0.47 UI for Gen1i and Gen1m devices.







Test TSG-10 - DJ at Connector, Data, 250UI

Purpose: To verify that the DJ at Connector (Data, 250UI) of the DUT’s transmitter is within the conformance

limits.

References:


[2] Ibid, 7.2.2.3.11[3] Ibid, 7.4.8




includes conformance limits for the DJ at Connector (Data, 250UI). Reference [2] provides the definition of this



Test Procedure:


Observable Results:

The DJ at Connector (Data, 250UI) value shall be less than 0.22 UI for Gen1i and Gen1m devices.







Test TSG-11 - TJ at Connector, Clock, 500

Purpose: To verify that the TJ at Connector (Clock, 500) of the DUT’s transmitter is within the conformance

limits.

References:


[2] Ibid, 7.2.2.3.12[3] Ibid, 7.4.6, 7.4.8




includes conformance limits for the TJ at Connector (Clock, 500). Reference [2] provides the definition of this term



Test Procedure:


Observable Results:

The TJ shall be less than 0.37UI when measured at f BAUD/500 for 3.0GB/s devices.







Test TSG-12 - DJ at Connector, Clock, 500

Purpose: To verify that the DJ at Connector (Clock, 500) of the DUT’s transmitter is within the conformance

limits.

References:


[2] Ibid, 7.2.2.3.12[3] Ibid, 7.4.6, 7.4.8




includes conformance limits for the DJ at Connector (Clock, 500). Reference [2] provides the definition of this term



Test Procedure:


Observable Results:

The DJ shall be less than 0.19UI when measured at f BAUD/500 for 3.0GB/s devices.







GROUP 4: PHY RECEIVER REQUIREMENTS

Overview:

This group of tests verifies the Phy Receiver Requirements, which are primarily defined

in Table 23 of Clause 7 of the SATA Standard, v2.5.






Test RX-01 - Pair Differential Impedance

Purpose: To verify that the Pair Differential Impedance of the DUT’s receiver is within the conformance limits.

References:[1] SATA Standard, 7.2.1, Table 23 – Receiver Specifications

[2] Ibid, 7.2.2.4.1

[3] Ibid, 7.4.22



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the RX Pair Differential Impedance. Reference [2] provides the definition of this


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The RX Pair Differential Impedance shall be between 85 and 115 Ohms for 1.5Gb/s devices.







Test RX-02 - Single-Ended Impedance

Purpose: To verify that the Single-Ended Impedance of the DUT’s receiver is within the conformance limits.


[2] Ibid, 7.2.2.4.2

[3] Ibid, 7.4.23



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the RX Single-Ended Impedance. Reference [2] provides the definition of this term


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The RX Single-Ended Impedance shall be at least 40 Ohms for 1.5Gb/s devices.







Test RX-03 – Differential Mode Return Loss

Purpose: To verify that the Differential Mode Return Loss of the DUT’s receiver is within the conformance limits.


[2] Ibid, 7.2.2.4.3

[3] Ibid, 7.4.10



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the RX Differential Mode Return Loss. Reference [2] provides the definition of this


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The RX Differential Mode Return Loss shall be above the minimum limits specified in reference [1] for

3.0Gb/s devices. For convenience, the values are reproduced below.

Frequency Range Lower Rloss Limit (3.0Gb/s)

150-300 MHz 18 dB

300-600 MHz 14dB

600-1200 MHz 10 dB1200-2400 MHz 8 dB

2400-5000 MHz 5 dB







Test RX-04 – Common Mode Return Loss

Purpose: To verify that the Common Mode Return Loss of the DUT’s receiver is within the conformance limits.


[2] Ibid, 7.2.2.4.4

[3] Ibid, 7.4.10



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the RX Common Mode Return Loss. Reference [2] provides the definition of this


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The RX Common Mode Return Loss shall be above the minimum limits specified in reference [1] for

3.0Gb/s devices. For convenience, the values are reproduced below.

Frequency Range Lower Rloss Limit (3.0Gb/s)

150-300 MHz 5 dB

300-600 MHz 5dB

600-1200 MHz 3 dB1200-2400 MHz 3 dB

2400-5000 MHz 3 dB









GROUP 5: PHY OOB REQUIREMENTS

Overview:

This group of tests verifies the Phy OOB Requirements, which are primarily defined in

Table 25 of Clause 7 of the SATA Standard, v2.5.






Test OOB-01 – OOB Signal Detection Threshold

Purpose: To verify that the OOB Signal Detection Threshold of the DUT’s receiver is within the conformance

limits.

References:

[1] SATA Standard, 7.2.1, Table 25 – OOB Specifications

[2] Ibid, 7.2.2.7.1[3] Ibid, 7.4.20




includes conformance limits for the OOB Signal Detection Threshold. Reference [2] provides the definition of this



Test Procedure:


Observable Results:

The OOB Signal Detection Threshold value shall be between 50 and 200 mVppd for 1.5Gb/s devices.The OOB Signal Detection Threshold value shall be between 75 and 200 mVppd for 3.0Gb/s devices.







Test OOB-02 – UI During OOB Signaling

Purpose: To verify that the UI During OOB Signaling of the DUT’s transmitter is within the conformance limits.

References:[1] SATA Standard, 7.2.1, Table 25 – OOB Specifications

[2] Ibid, 7.2.2.7.2

[3] Ibid, 7.4.11



Discussion:

Reference [1] specifies the Transmitted Signal conformance limits for SATA devices. This specificationincludes conformance limits for the UI During OOB Signaling. Reference [2] provides the definition of this term


Test Setup:

See Appendix A.

Test Procedure:


Observable Results:

The UI During OOB Signaling value shall be between 646.67 and 686.67ns.







Test OOB-03 – COMINIT/RESET and COMWAKE Transmit Burst Length

Purpose: To verify that the COMINIT/RESET and COMWAKE Transmit Burst Length of the DUT’s transmitter

is within the conformance limits.

References:


[2] Ibid, 7.2.2.7.3[3] Ibid, 7.4.21




includes conformance limits for the COMINIT/RESET and COMWAKE Transmit Burst Length. Reference [2]

provides the definition of this term for the purposes of SATA testing. Reference [3] defines the measurementrequirements for this test.


Test Procedure:


Observable Results:The COMINIT/RESET and COMWAKE Transmit Burst Length value shall be between the minimum and

maximum values of UIOOB multiplied by 160.







Test OOB-04 – COMINIT/RESET Transmit Gap Length

Purpose: To verify that the COMINIT/RESET Transmit Gap Length of the DUT’s transmitter is within the

conformance limits.

References:


[2] Ibid, 7.2.2.7.4[3] Ibid, 7.4.21




includes conformance limits for the COMINIT/RESET Transmit Gap Length. Reference [2] provides the definition



Test Procedure:


Observable Results:

The COMINIT/RESET Transmit Gap Length value shall be between the minimum and maximum values ofUIOOB multiplied by 480.









Test OOB-06 – COMWAKE Gap Detection Windows

Purpose: To verify that the COMWAKE Gap Detection Windows of the DUT’s receiver are within the

conformance limits.

References:


[2] Ibid, 7.2.2.7.6[3] Ibid, 7.4.21




includes conformance limits for the COMWAKE Gap Detection Windows. Reference [2] provides the definition of



Test Procedure:


Observable Results:

The DUT shall verify COMWAKE detection at the lower limit of 103ns.The DUT shall verify COMWAKE detection at the upper limit of 110ns.

The DUT shall verify no COMWAKE detection at the lower limit of 53ns.

The DUT shall verify no COMWAKE detection at the lower limit of 177ns.

Possible Problems:

None.










Appendix A - Hardware Requirements, Test Fixtures, and Setups

Purpose: To specify the measurement hardware and test fixtures used in this test suite.

Last Modification: March 14, 2006 (version 1.0)

Discussion:

A.1 - Introduction

The purpose of this appendix is to document the measurement equipment and fixtures used for performing

the tests defined in this suite.

A.2 - Equipment

Table A-1 below summarizes the list of measurement equipment used by the IOL for performing the testscontained in this test suite.

Table A-1: Equipment list

Functional Block Equipment Key FeaturesDigital Storage Oscilloscope Agilent 81304A 4 CH, 13 GHz BW, 40GS/s, 2 MS memory

Time Domain Reflectometer Agilent 86100C DCA-J, with

one N54754 diff TDR module,

and S-parameter option.

18 GHz BW.

Ability to directly compute return loss from

time domain data.Test Fixture Agilent N5421 SAS/SATA to

SMA fixture

Short trace length, low loss,

matched traces.

Signal Generator Agilent 81134A 3.35GHz Pulse/Pattern Generator

The DSO is used for all measurements in Groups 1 and 3 of this test suite (Phy General and TransmittedSignal tests). The TDR is used for Groups 2 and 4 (TX/RX impedance), and the DSO/Signal Generator combination

is used for Group 5 (OOB tests). See the specific Method of Implementation (MOI) documents referenced in

Appendix B of this suite for specifics about test setups and procedures.







Appendix C – Test Requirements Summary Table

Purpose: To summarize the testing requirements, rates, and test patterns for each test in this test suite.

Last Modification: March 14, 2006 (version 1.0)

Discussion:

C.1 - Introduction

The purpose of this appendix is to document the measurement apparati and methods used for performing

the tests defined in this suite.

Test ID Test Name 1.5G DUT 3.0G DUT Required Patterns

PHY-01 Unit Interval Test at 1.5G Test at both HFTP

PHY-02 Freq LT Stability Test at 1.5G Test at 3G only HFTP

PHY-03 SSC Frequency Test at 1.5G (If supported) Test at 3G only HFTP

PHY-04 SSC Deviation Test at 1.5G (If supported) Test at 3G only HFTP

TX-01 Diff Impedance Test at 1.5G Test at 1.5G only Any valid NRZ patternTX-02 SE Impedance Test at 1.5G Test at 1.5G only Any valid NRZ pattern

TX-03 Diff Rloss Test at 1.5G (Informative) Test at 3G only Any valid NRZ pattern

TX-04 Common Mode Rloss Test at 1.5G (Informative) Test at 3G only Any valid NRZ pattern

TX-05 Impedance Balance Test at 1.5G (Informative) Test at 3G only Any valid NRZ pattern

TSG-01 Diff Output Voltage Test at 1.5G Test at both

TSG-02 Rise/Fall Time Test at 1.5G Test at both HFTP, LFTP, LBP

TSG-03 Diff Skew Test at 1.5G Test at 3G only HFTP, MFTP

TSG-04 AC CM Voltage N/A Test at 3G only MFTP

TSG-05 Rise/Fall Imbalance N/A Test at 3G only HFTP, MFTP

TSG-06 Amplitude Imbalance N/A Test at 3G only HFTP, MFTP

TSG-07 TJ, Data, 5UI Test at 1.5G Test at 1.5G only HFTP, LBP, SSOP (opt)

TSG-08 DJ, Data, 5UI Test at 1.5G Test at 1.5G only HFTP, LBP, SSOP (opt)

TSG-09 TJ, Data, 250UI Test at 1.5G Test at 1.5G only HFTP, LBP, SSOP (opt)TSG-10 DJ, Data, 250UI Test at 1.5G Test at 1.5G only HFTP, LBP, SSOP (opt)

TSG-11 TJ, Clock, f/500 N/A Test at 3G only HFTP, LBP, SSOP (opt)

TSG-12 DJ, Clock, f/500 N/A Test at 3G only HFTP, LBP, SSOP (opt)

RX-01 Diff Impedance Test at 1.5G Test at 1.5G only Any valid NRZ pattern

RX-02 SE Impedance Test at 1.5G Test at 1.5G only Any valid NRZ pattern

RX-03 Diff Rloss Test at 1.5G (Informative) Test at 3G only Any valid NRZ pattern

RX-04 Common Mode Rloss Test at 1.5G (Informative) Test at 3G only Any valid NRZ pattern

RX-05 Impedance Balance Test at 1.5G (Informative) Test at 3G only Any valid NRZ pattern

OOB-01 OOB Sig Detect Thresh Test once, at default OOB speed of 1.5G N/A

OOB-02 UI During OOB Test once, at default OOB speed of 1.5G N/A

OOB-03 I/R/W Burst Length Test once, at default OOB speed of 1.5G N/A

OOB-04 I/R Gap Length Test once, at default OOB speed of 1.5G N/AOOB-05 W Gap Length Test once, at default OOB speed of 1.5G N/A

OOB-06 W Gap Detect Windows Test once, at default OOB speed of 1.5G N/A

OOB-07 I Gap Detect Windows Test once, at default OOB speed of 1.5G N/A

Documents

SATA 2.5 Clause 7 Physical Layer Test Suite (v1.1) (1)