SaberRD Electrical Student Guide v1.7

SaberRD Electrical Systems1

1 2013 Synopsys, Inc. All Rights ReservedSynopsys Customer Education Serv ices 2013 Synopsys, Inc. All Rights Reserv ed

Introduction to

SaberRDPhysical Modeling, Simulation, and Analysis

for Multi-Domain Power Systems

2 2013 Synopsys, Inc. All Rights Reserved

Introductions

Name Company Job Responsibilities EDA Experience Main Goal(s) and Expectations for this Course


Facilities

Building Hours

Restrooms

Meals

Messages

Smoking

Recycling

Phones

Emergency EXIT

Please turn off cell phones and pagers

Facilities


Agenda

Tool Flow and Time Domain Analysis1

Schematic Capture & Parts Gallery2

Small-Signal Frequency Analysis3

Operating Point Analysis4

Introduction0DAYDAY1



Agenda

DC Transfer Analysis5DAYDAY1

FFT6

Design Optimization8

Mixed-signal Analysis7


Agenda

Modeling: Import Spice Model10

Modeling: TLU11

Modeling: StateAMS12

Modeling: Characterization13

Introduction to Robust Design14

Introduction to Modeling9DAYDAY2

Worst Case Analysis15


Agenda







Serves Expert and Casual Users Proven technology, broad application

coverage

Easy to Use Intuitive UI guides the flow

Embeds Methodology Test-driven results for electro-*

system design & verification: system performance, robustness, reliability

Deployable throughout Enterprises Standards-based, compatible with CAE

environments & flows, supply chains

Desktop Simulation for Electro-* Systems



Quick Methods

SaberRD: Serving All Levels of Users

SaberRD supports any level of users Quick and easy entry point Basic analysis up through fully customized verification flow User selects method based on need, experience & available time Seamless transition between levels guarantees easy learning curve

Advanced Customized


Ive heard of Saber, what is SaberRD?

Saber

Classic

SaberRD

Saber

SimulatorSaberHDL

Interface

SimulationKernel

SaberHDL

MASTonly

MAST + VHDL-AMS

MAST + VHDL-AMS


Ive heard of Saber, what is SaberRD?

If my company uses Saber Classic or Saber through a Frameway, will this class still be useful?Definitely. The menu selections / buttons may be different, but the functionality is the same and the concepts of simulation are whats important hereThe two environments co-exist nicely: schematic, symbol, results, library compatibility

Saber Classic SaberRD

Saber

Simulator SaberHDL SaberHDL


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Scripting / Automation

Embedded SW ConnectionsBase Set:

Time-Domain Performance

Freq-Domain Performance

Scripting / Automation

Embedded SWConnections

Advanced Beyond the CompetitionPhysical Modeling & Simulation for Real Systems

+ Saber: Design for ReliabilityGrid / ParallelComputing

Design for Robustness

Design Optimization

M

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ModelingGeneric Model

LibrariesModeling

Assistants

+ Saber: Component CharacterizationFE / Field Solver

ExtractionInput Format Compatibility

Component Libraries

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& ExamplesSupport &

CommunityIndustry

Standards

+ Saber: Leading RobustnessSupply Chain

SuccessLeading

PerformanceLinux, Unix

Support

Base Set: Behavioral Language(s)Multi-Domain

ModelingGeneric Model

LibrariesModeling

Assistants

Base Set: Windows-based IDEDocumentation

& ExamplesSupport &

CommunityIndustry

Standards



Agenda







Getting Started

Design

Modeling

Simulation

Analysis

Reporting

Quick access to examples, documentation, and user resources

Full-featured schematic design for pow er electronic and multi-domain systems

Create & manage MAST and VHDL-AMS models

Intuitive controls for test-driven simulation

Measurements, calculations, and transforms

Flexible output options

SaberRD: An Intuitive User Flow


Easy Design Access

Help System

Jump Start Designs

Support Resources

Getting Started

Design

Modeling

Simulation

Analysis

Reporting

Getting Started Welcome


Online Resources from previous User Groups

Getting Started

Design

Modeling

Simulation

Analysis

Reporting

Online Help/Support Integrated Browser

Integrated Access to Synopsys Online Support System



Finding Documentation

Getting Started

Design

Modeling

Simulation

Analysis

Reporting

?


Intuitively organized controls through Tabbed Ribbon Structured by flow as opposed to features Customizable Quick Access toolbar for frequently used features

Tabbed Ribbon Where to Find?

Getting Started

Design

Modeling

Simulation

Analysis

Reporting


Dialog box launcher Provides access to advanced configuration

Easy navigation through tabs Help through QuickHelp Tool Tips

Dialog Box Launchers

QuickHelp field

Getting Started

Design

Modeling

Simulation

Analysis

Reporting


Intuitive schematic-based modeling Tabbed MDI (multi-document interface) for handling multiple schematics Tight integration with model library Design hierarchy browsing & easy archiving

Modeling Schematic-Based Design Creation

Getting Started

Design

Modeling

Simulation

Analysis

Reporting



Symbol properties evaluated for correctness of syntax

Enforces data type consistency with underlying model

Design Correct-by-Construction

Getting Started

Design

Modeling

Simulation

Analysis

Reporting


Quick model access through model library Easy model creation through modeling tools Library management

Modeling: Creating and Managing Libraries

Getting Started

Design

Modeling

Simulation

Analysis

Reporting


Intuitive controls

Optimized to require minimum input from user Single & looping analyses Advanced configuration options for finer control

Simulation Quick Simulation Controls

Getting Started

Design

Modeling

Simulation

Analysis

Reporting

Advanced Simulation

Configuration


Post processing & simulation in a single environment

Tabbed documents to switch between design and results Waveform Calculator for results manipulation

Seamless Integration: Simulation & Analysis

Getting Started

Design

Modeling

Simulation

Analysis

Reporting



Easy export to standard formats

Quick creation of images for reports & presentations

Customizable and scriptable

Reporting: Export to Standard Formats

Getting Started

Design

Modeling

Simulation

Analysis

Reporting


Getting Started

Design

Modeling

Simulation

Analysis

Reporting

Documentation: Archiving/Exporting Results


Time Domain (Transient) Analysis General Description

Transient analysis calculates the behavior of a system as a function of time.

Each calculated data point in time is called a time step. Required Parameters

Other Features/Comments To allow for file comparison you can specify plot file names. Transient analyses can start from zero (no Operating Point

analysis required). Advanced simulation controls are available to calibrate

accuracy.

End Time - specifies the end time of the analysis.

Time Step - specifies the initial time step of the analysis.


Time Domain Response - Example



Setting the Time Step Field

Typically, set this to 1/100th or 1/1000th of end time

Rule of ThumbSet the value of tstep to the smallest of: 1/10th of the smallest relevant time constant in the design Shortest rise or fall time of a square/pulse wave driving source 1/100th of the input period of a sinusoidal driving source

SaberRD uses the value in the Time Step field to determine an initial guess at the next solution point in the simulation.


Prefix Abbreviations

a atto 10-18

f femto 10-15p pico 10-12n nano 10-9u (or mu) micro 10-6m milli 10-3k kilo 103meg (or me) mega 106g giga 109t tera 1012

You can express a number as a constant immediately followed by an appropriate abbreviation (do not include units).


Prefix Abbreviations - Examples

For example, the following are equivalent:x = 3p x = 3e-12

The following are illegal specifications for numbers:x = 3 p (space not allowed between number and

abbreviation) x = 1mA (units not allowed)

NOTE: VHDL-AMS models require scientific notation:x = 3p x = 3e-12


Time Domain Measures

Falltime Risetime Slew Rate Period Frequency Duty Cycle Pulse Width Delay Overshoot Undershoot Settle Time



Advanced Simulation Controls

Accessed with the Dialog Box Launcher at the bottom right of the Quick Simulation controls

Provides access to customization of file names and advanced simulation controls

Changing solveroptions is typically not needed and is covered in advanced training


15 minutes

Lab 1: Time Domain

In this lab exercise, you will perform a time domain (transient) analysis on the RLC circuit.

Perform the steps beginning on the page titled Lab #1 in your exercise manual.

Open Design

Perform Transient Analysis

View Results

Perform Measurement

Close Design


Lab #1 Review

Time domain analyses are characterized by having time as the independent axis (X-axis)

The results appear similar to how they would look on an oscilloscope

Measurements specifically designed for Transient analysis can be found using the Measurement Tool under Time Domain.

References: SaberRD Users Guide


Agenda








Schematic-Based Design Creation

Intuitive, flexible, schematic-based modelingTabbed MDI for handling multiple schematicsTight integration with model libraryDesign hierarchy browsing & easy archiving



Describe (model) system behavior using parts, connections, and annotations

Home tab

Hierarchical Model

Symbol / Model

Multiple Sheets




Conserved node

Ground node

Signal flow node

Mixed Domains




Selected part

Attributes of selected property

Properties of selected part



Parts Gallery

Parts Gallery tool accessible on left side of SaberRD

30,000+ models for multi-domain applications

Includes generic models to fully characterized parts

Browse or Search to find models you need


Extensive Libraries for Physical Modeling

Machines&

Generators

Switches& Relays

Power Devices

ThermalElements

Passive Elements

Logical Gates

Transmission Lines

Electromagnetics

Transformers

BehavioralBlocks

Fluidic Elements

Mechanical Elements

Signal Flow Blocks

Batteries &

Storage

Comparators & Op-Amps

Bridges& Drives

Generic Parts


Extensive Libraries for Physical Modeling

Saber Component LibraryCharacterized Parts

BJTsPhilips, TI, Fairchild, Harris, etc.

MOSFETsIRF, Philips, Harris, Toshiba, etc.

IGBTsIRF, Harris, Mitsubishi Electric, etc.

FusesLittelfuse, Autofuse, Microfuse, etc.

PW MsFairchild, Linear, Intersil, TI, Motorola, etc.

RegulatorsAnalog Devices, National, TI, Motorola, etc.

Op-ampsAnalog Devices, Motorola, National, Philips, etc.

Motor ControllersTI, ON Semi, Fairchild, etc.

IVN ComponentsTransceivers (CAN, LIN, FlexRay), Chokes, Ferrites

More

Off-the-Shelf Parts


Searching libraries

Intelligent search capabilities Search for generics or

components Blue icon indicates a MAST-

based model, red indicates a VHDL-AMS-based model

Click the search tab

Open the documentation on the part

Type in a part name, number, or key word

Other part and library information displays once you select a part

Place part



Parametric Search

You can also locate parts via parametricsearch.Define performance ranges and ratings to find the specific part you need.

Must select Components to activate Parametric Search


Important parts of a part on a schematic

Parts come either from a distribution (Saber) library, site library, user library, or local workspaceSymbols are just graphics, graphics have attributesModels are connected to symbols through properties


Important parts of a part on a schematic

Parts come either from a distribution (Saber) library, site library, user library, or local workspaceSymbols are just graphics, graphics have attributesModels are connected to symbols through properties

schematic property indicates hierarchical model


Design Browser

The Design Browser provides an efficient way to navigate your design



Design Browser

The Design Browser also provides a design archiving tool Right-click menu

Includes needed files in a directory

Great for storing, sharing, sending to support


Customizable Hot-keys


Customizable Quick Access Toolbar Easy access to frequently used features Build-up quick flows aligned with your specific needs

Optimizing Workflow Quick Access Toolbar


Tips for success

Always ground your design. Why?



Tips for success

Parts Gallery includes multiple grounds for different domains Mainly for aesthetics All reference parts = node 0


Tips for success

Always fill in required properties


Tips for success

Connection NotesElectrical Digital User can connect directly.

Hypermodels (D-A or A-D) are automatically inserted.

Domain A Domain B User must insert one or more converter blocks.

Signal flow Conserved User must insert converter blocks.

Domain converter blocks included in Parts Gallery


Tips for success

Open circle = no connection Solid dot = connection

Not connected

Connected



Tips for success

Same page connectors make schematics more readable


15 minutes

Lab 2: Schematic Circuit

In this lab, you will complete the schematic diagram shown on the following slide.


Open Design

Place Parts

Define Properties

Inspect the Design

Save the Design


Differential Amplifier Schematic


Agenda








Small-Signal AC Analysis

General Description Frequency (or small-signal AC) analysis calculates the behavior of a

system as a function of frequency. This is a linear analysis about a specified operating point. The default

operating point is the output of the DC analysis. Required Parameters

Other Features/Comments You must have an AC voltage or current source specified in the circuit. To allow for file comparison, you can specify plot file names. You can specify number of frequency points calculated, as well as

linear or logarithmic spacing of those points.

Start Frequency - specifies the beginning frequency for the analysis.

End Frequency - specifies the end frequency for the analysis.


Why AC Analysis?

AC analyses are useful in several areas, including: Filter design Open and closed loop control design Stability analysis In general, any time you need to know how something

behaves as a function of frequency


Small-Signal AC Analysis

Small-signal AC analyses characterize non-linear systems in the frequency domain by frequency-sweeping a small sinusoidal signal at the input.

This small sinusoid keeps the system running in the linear region of operation around a previously calculated operating point.

Typical AC analysis signals are shown on the following slide. The slide shows a systems gain (magnitude) and phase as a function of frequency.


Small-Signal AC Response Example



Frequency Domain Measures

Lowpass (3dB point) Highpass (3dB point) Bandpass (Q, ripple, etc.) Stopband Phase Margin Gain Margin Slope Magnitude Phase Real Imaginary Nyquist Plot Frequency THD / SNR / SINAD


Notes on Waveforms

The availability of signals in the Plot File window is controlled by the Signal List. Below are some examples::*:* Include all signals in current instance:...:* Include all signals within or below the top level design:...:foo.*:* Include all signals in all instances of any foo component:...:foo.u12:* Include all signals in the foo.u12 instancesig1 sig2 Include each signal listed. Separate the names with spaces

You can also Browse for signals to include in the Signal List. A Signal List can be configured for each analysis and is available under File Control in the Advanced Simulation form.


20 minutes

Lab 3: Small-Signal AC

In this lab exercise, you will perform frequency domain (small-signal AC) analysis on the RLC circuit.You will perform a standard transfer function analysis and display it in Bode form.


Open Design

Perform AC Analysis

View Results

Close Design


Lab #3 Review

Small-Signal AC Analysis is linear about an operating point

Useful whenever you want to understand something as a function of frequency

Measurements specifically designed for AC analysis can be found using the Measurement Tool under Frequency Domain



Lab #3 Review - Continued

Looping can be used to sweep various component values

Batch measurements are possible (measurements on multi-membered waveforms)



Agenda







Operating Point (DC) Analysis General Description

The DC operating point analysis calculates the state of the system at time=0.

This is used as an initial point for subsequent analyses.

Required Parameters None. You can simply select OK to run a DC operating

point analysis.

Other Features/Comments Input and output files can be specified. Different algorithms are available for difficult circuits.


Operating Point Analysis (continued)

In essence, for an operating point analysis: All dynamic elements are effectively removed from the

circuit Inductors are shorted Capacitors are opened Time-dependent sources are removed

Noise sources set to 0 AC sources set to 0

An operating point is a set of values that define the steady state of a nonlinear system at time=0, with all time-varying parameters and their derivatives set to 0.



Operating Point - Initial Point File

It contains the operating point used in other SaberRD analyses SaberRD uses it as the first data point for time domain

analysis. For small signal frequency analysis, SaberRD applies a

small sinusoidal signal around the operating point.

It provides a quick check to determine possible incorrect part parameters Gives you an idea if components have correct values, etc.

The results of an operating point analysis are stored in the initial point file (named design_name.dc.ai_ipby default). This file serves two purposes:


15 minutes

Lab 4: Operating Point

In this lab exercise, you will perform an operating point analysis on an RLC circuit.


Open Design

Perform Operating Point Analysis

Change Input Voltage and Rerun Analysis

Close Design


Lab #4 Review

With vin = 0 at time = 0, all circuit nodes are 0 for DC analysis

With vin = 1 at time = 0, vout = 0.909V Inductor is shorted for DC analysis Capacitor is opened for DC analysis vout is the input voltage across a simple voltage divider

1V*(1k/1.1k) Component values can be dynamically altered in

SaberRD References: SaberRD Users Guide


Agenda

2011 Synopsys, Inc. All Rights Reserved


FFT6





DC Transfer Analysis

General DescriptionSweeps an independent DC voltage or current source over a user-defined range of value and computes the DC operating point for each sweep value.

Required Parameters Independent Source (e.g. v_dc.v1). Sweep Range

Other Features/Comments Requires DC Operating Point analysis to be run first (or

run from zero) Input and output files can be specified


DC Transfer Analysis

Useful for finding the transfer function of an amplifier, component thresholds, etc.


Nested DC Transfer

You can also vary other design parameters while sweeping the source


DC Transfer - Loudspeaker Circuit



15 minutes

Lab 5: Operating Point with Looping

In this lab, you will find the DC Transfer function of the Loudspeaker circuit


Open Design

Point AnalysisPerform Operating

Point Analysis

Find Transfer Find Transfer Function

Plot Results


Lab #5 Review

DC Transfer analysis allows you to study a circuit with the x-axis (independent variable) chosen as something other than time. (Great for transfer function analysis)



Agenda


FFT6




Fourier Analysis

Transforms time-domain waveforms into a frequency spectrum



Fouriers Theorem

According to Fouriers theorem, any periodic waveform can be represented by the sum of its average and a series of sine waves.

The sine waves have frequencies of integer multiples of the frequency of the periodic function, and varying magnitudes and phases.

f(t) = a0 + a1 cos w0t + a2 cos 2w0t + + b1 sin w0t + b2 sin 2w0t

The discrete Fourier transform allows the magnitudes and phases of the sine waves to be determined from data points along a period of the function.

The range of the data points is from the end of the analysis to one period before the end of the analysis.


Fourier Analysis

The main advantage of doing this is to allow easy discrimination between large and small sinusoids of different frequencies in a given waveform

For example, if you want to test the purity of an oscillator: Time Domain: the ripple you want to measure

may be buried in the larger signal its super-imposed upon.

Frequency Domain: all signals of varying frequency are represented on their own spot on the frequency axis, distinct and separate from the other signals.


Fast Fourier Transform (FFT)

The Fast Fourier Transform is a post-processing command that calculates the frequency components of a section of time. Because this analysis requires time domain data, you must run a transient analysis prior to executing this analysis.



Because non-periodic functions cannot be represented by a Fourier series, it is no longer sufficient to find the Fourier coefficients at a set of harmonic frequencies. Instead, a continuous range of frequencies is calculated showing the value of each FFT data point.




FFT analysis is used to transform time-domain data into frequency-domain data.

Input values must be real-valued, and the generated output values will be complex.

Windowing functions may be applied to the input data before being transformed.



Discontinuities cause spectral leakage Blurring of the frequency spectrum output Extra harmonics appearing

Solutions Apply a window function to the original data, Serves to smooth out discontinuities in the

sampled data Dont Forget to choose a truly periodic part of the

signal


Waveform Calculator

In the next lab, you will use the Waveform Calculator. This is a very powerful tool, and an extensive reference for it can be found toward the end of this manual.The following slide highlights some of the calculators features.


Waveform Calculator

Entry Field (Register)Icon BarPulldown Menus

Programmable Buttons

Stack Display

Extended Operation Buttons

Keypad



Using the Calculator

To get a waveform into the Register, select the waveform name on the graph window and middle-click in the Register. You can also use Edit > Copy, then Edit > Paste to

accomplish this task

Either RPN or Algebraic input modes can be selected. To plot results from the calculator, click on the Graph X

button in the Icon Bar:


15 minutes

Lab 6: Fast Fourier Transform (FFT)

In this lab, you will perform an FFT on the Audio loudspeakers transient simulation results. You will determine the large-signal frequency response of this non-linear block.Perform the steps beginning on the page titled Lab #6 in your exercise manual.

Open Design

Perform Alter Perform Alter Parameter

Perform AC/TR/FFT Perform AC/TR/FFT Analyses

Compare Results

Close Design


Agenda


FFT6




Mixed Signal Analysis

Mixed-signal is often needed in order to add control into a design

D(s) G(s)

H(s)

Controller Plant

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Methods of adding control

Control blocks in SaberRD library StateAMS Co-simulation with Simulink Abstract VHDL digital part C foreign function Co-simulation with a digital chip simulator

D(s) G(s)

H(s)

Controller Plant

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Control blocks in SaberRD

Many control blocks in Parts Gallery


StateAMS

Easily / graphically model control for

your design


Simulink Models

SaberSimulink

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Take advantage of existing Simulink models Co-simulate Import into Saber via

Simulink Real Time Workshop



Abstract VHDL Digital Part

As a VHDL-AMS simulator, SaberRD can natively simulate VHDL digital parts


C Foreign Function


Mixed-Signal Analysis

Mixed-signal analysis involves both analog and digital components/models.

Mixed-Signal Simulation Approaches Glued Simulators Native Mixed-Signal Cosimulation

A/D Interface Models - Hypermodels


Mixed-signal partsare complicated and

fall a little into each bin.

DigitalSimulator

Digital Library

AnalogSimulator

Analog Library

Glued Simulators

Simulators coupled via a backplane No mixed-signal modeling language

0 1 X Z

Coupling AlgorithmCoupling Algorithm



Summary of Glued ApproachM

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Analog Models Digital Models

Analog Solver Digital Solver

Back Plane

No mixed-signal models

Boundary AlgorithmBoundary Algorithm


One shared library of Analog, Digital, and Mixed-Signal Parts

SaberRDAnalog Digital

Calaveras

Native Mixed-Signal (Single-Kernel)

Tight analog/digital integration (not working with two foreign simulators)

Only one mixed-signal language needed, and one design


Summary of Native Mixed-Signal

SaberRD

Digital Models

Digital Solver

Mixed-Signal ModelsAnalog Models

Analog Solver Boundary Algorithm

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Digital Cosimulation

Cosimulation achieved by merging event-queues of simulators Analog/digital interface still resides with native (single-kernel)

simulator

One shared library of Analog, Digital, and Mixed-Signal Parts

SaberRDAnalog Digital

Calaveras

DigitalSimulator

Digital Library

0 1 X Z

IPC Link



Summary Cosimulation Approach

SaberRDCo-Simulation

Analog Models Mixed-Signal Models

Analog Solver Boundary Algorithm

0,1,X,Z VerilogVHDL

Digital Models

Digital Solver

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What to Use When?

If you have big A (Analog), little D (Digital) then you can use SaberRDs native mixed simulation environment.SaberRD can simulate digital VHDL natively.

If you have big Dfor example, a multi-million gate ASIC or FPGAthen leave the digital to a high-performance digital simulator like Synopsys VCS.

If the design lies somewhere in-between, then it is very design dependent as to which approach will work best.

A/dA/da/Da/D


Hypermodels

Hypermodels inserted automatically by SaberRD Hypermodels are associated with digital components 3,500 parts already characterized by Synopsys Templates to customize to specific requirements

P P

N N

P P

N N

a2d

d2a

Analog-to-digital and digital-to-analog boundaries must be traversed


Hypermodel I/O

A Hypermodel template can be considered as a single-bit, digital-to-analog or analog-to-digital converter that models the following: Transition characteristics Terminal (loading) characteristics

Hypermodels do not model digital delays. This is done within the digital components.



Hypermodel Logic Levels

Hypermodel templates recognize only the following logic levels: 0, 1, X, Z. These logic levels are represented by digital states that use logic_4 values shown below.

These values are defined in the units.sin file that is automatically loaded when running SaberRD.

l4_0 0 (LOW)l4_1 1 (HIGH)l4_x X (uncertain not treated as "don't care")l4_z Z (high impedance)


Preparation for Lab #7


10 minutes

Lab 7: Time Domain

In this lab, you will perform mixed-signal simulation on a counter circuit. You will netlist the circuit with various hypermodels and observe simulation results of each.


Open Design

Perform DC/TR Analysis

Analyze Results

Close Design


Lab #7 Review

Hypermodels are automatically inserted at the boundary between analog and digital pins. Hypermodels do not exist at the schematic level:

they are inserted during netlist generation The inserted hypermodels can be viewed by looking

directly at the netlist References: SaberRD Book; Co-simulation User

Guides; Introduction to MAST Workshop; Advanced Saber/MAST Workshop



Agenda


FFT6




Why Design Optimization?

Useful for Filter design Impedance matching Minimizing power consumption PID Controller optimizationor anytime youre trading off multiple

input values to try to achieve some optimal design result


Design Optimization in SaberRD

Leverages Worst-Case Analysis Tool WCA is also just an optimization challenge WCA covered in subsequent sections


Design Optimization Flow

Objective Start with the goal in mind, for example Minimize power consumption Obtain closest match to a value or a

waveformtypically thought of in terms of minimums or maximums




Objective

MeasureWhat do you need to measure? For example Power consumed Closeness to a value or waveform



Objective

Measure

AnalysisWhat analysis will produce that measure? For example Operating Point Time Domain AC



Objective

Measure

Analysis

Variation

What design parameters will be allowed to vary? Add tolerances to those components


Design Optimization in SaberRD

WCA Tool Intuitive drag & drop

solution Analysis Definition Measurements &

objectives Multi objective definition Library of powerful

algorithms



Workflow for Optimization in SaberRD

Objective

Measure

Analysis

Variation



Objective

Measure

Analysis

Variation



Objective

Measure

Analysis

Variation



Objective

Measure

Analysis

Variation



Algorithms the key to success

Search Algorithms Local & global algorithms Combined search possible to

leverage synergy of different methods

Customized calibration possible


Lab 8: Design Optimization

60 minutes

In this lab, you will use design optimization to design a bandpass filter


If using SaberRD Student Edition for the training, skip this entire lab. Optimization is not enabled in the Student Edition.

Extract Stochastic Extract Stochastic Parameters

Perform Optimization

Analyze Results

Close Design

Open Design


Agenda


Modeling: TLU11







Why is modeling important?

Certain model effects are important A model without the right effects could delay discovery of

design flaws until prototyping However, a model with too many effects slows simulation

time

Robust Design processes demand efficiency Many iterations to observe statistical information Often analyzing large or complex systems Models that simulate fast decrease simulation times



Model Effects

Basic first order behaviors

Steady State & Logic behaviors

Dynamic transfer function behaviors

Averaged effects

Complex behaviors such as over-value protection and self-heating effects

Switching effects

Actual system architecture

Device physics

Least Complex

Most Complex

Architectural

Behav ioral

Functional

Component


Modeling Approaches

Architectural and Functional Architectural: Steady State & Logic

behaviors Functional: Transient behaviors,

Averaged model (no switching) Model the effects of the complete block

Basic first order behaviors Dynamic transfer function behaviors Averaged effects

Evaluate and Ensure stability Test topology concepts without

worrying about implementation

D(s) G(s)

H(s)

Controller Plant

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Architectural

Behav ioralComponent

Functional

130 .s2+1250s+130

Plant


Architectural and FunctionalAdvantages Simple to create a model

No need for modeling language knowledge

No building blocks required Accommodates multiple abstraction

levels Very fast simulations possible Only consider important model

characteristicsDisadvantage

Only as detailed as characteristics considered

Modeling Approaches

D(s) G(s)

H(s)

Controller Plant

+_

130 .s2+1250s+130

Plant

Architectural


Functional


Modeling Approaches

Behavioral Model the effects individual

components contribute Complex behaviors such as

over-value protection and self-heating effects

Switching effects Component implementation is

not considered Model represents actual dynamic

waveforms Evaluate signal quality

D(s) G(s)

H(s)

Controller Plant

+_

Architectural


Functional

Plant



Modeling Approaches

BehavioralAdvantages Easy to Model

Use existing building blocks No need for modeling language

knowledge Fast Simulation Times Can use either control system

models or conserved modelsDisadvantage Lower fidelity than component level

Architectural


Functional

D(s) G(s)

H(s)

Controller Plant

+_

Plant


Two common approaches to modeling

Control System Also referred to as signal flow Has a direction No units Input is independent of output

Conserved Based on conservation of

energy Ports have no direction Considers physical units through and across

variables depend on each other

input output

H(s)

across

through

across=f(through)


In power systems design, the focus is on the hardware.

The choice of approaches matters because the hardware matters.

Why does this choice matter?


ConservedPhysical Model

ControlSystem Model

Use physics equations directly

i = C(i = C(i = C(i = C(dvdvdvdv////dtdtdtdt) ) ) )

i = v/R i = v/R i = v/R i = v/R

Its about accuracy: in power systems

the physics equations more

readily model the behavior than a transformation



ConservedPhysical Model

ControlSystem Model

Reuse block ?

No! Because its equivalent to something else.

EquivalentEquations

Reuse block ?

Yes!

Re-use sub-models


Model complex, real world hardware easily

Feedback is explicitly defined.

This model is not bi-directional. What

happens if its back-driven (as a generator)?

Control System Model of a DC Motor



Equations:vin = vres + vgen + d_by_dt(flux)tq_Nm(shaft) = tgen - d_by_dt(mom) - visc

Same equations apply when back-driven

as a generator

Sides of the equations here means obeying the laws of

conservation of energy



Loading effects are critical to modeling

power systems



Example: modeling an IGBT

It would be extremely difficult to capture non-linear effects in a signal flow model: Timing behavior, that is,

switching behavior as a function of frequency, temperature, and bias

Switching losses as a function of frequency and bias conditions

Tail current Thermal behavior as a function

of frequency and bias

Model non-linearities / interdependencies


Ideal Control Signals Ideal Sensor Signals

Physical System: Conserved Models

Algorithms: Control System

Models

Mix signal flow and conserved


Mix signal flow and conserved

Control System Modeling Conserved ModelingBehaviors with no loading effects Sensor output signals Ideal measurement of signals Performance maps (table look-up type performance data)

Systems with loading effects Vehicle chassis acting to load the vehicle powertrain Powertrain motor acting to load the electrical power system

Algorithm modeling Description of physical hardware Electronic circuits Hydraulic circuits Mechanical systems Thermal systems Systems with greater than 1st or 2ndorder effects


Modeling Approaches

Component Model the detailed physical behavior

of the components Actual system architecture Device physics

Model behavior matches hardware behavior

Evaluate regions of operation Define component tolerances Aid in selection of manufacturer

components

Architectural


Functional

D(s) G(s)

H(s)

Controller Plant

+_

Plant



Modeling Approaches

ComponentAdvantage Very high fidelityDisadvantages Slower simulation times Can require more modeling effort

Requires knowledge of a modeling language

Requires manufacturers data

Plant

Architectural


Functional

D(s) G(s)

H(s)

Controller Plant

+_


Model Effects

Architectural

Behav ioral

Functional

Component

Faster Simulation

Slower Simulation

Less Effort to Create

More Effort to Create

Lower Fidelity

Higher Fidelity

Basic first order behaviors Steady State & Logic

behaviors

Dynamic transfer function behaviors

Averaged effects

Complex behaviors such as over-value protection and self-heating effects

Switching effects

Actual system architecture Device physics


Modeling: Automatic Symbol Creation

Automatically create symbols from Source code

MAST VHDL-AMS Spice

Hierarchical Models Needed properties are added to the symbol automatically Symbol editor lets you customize the graphics

Shape Port alignment Flip / Rotate Graphics


Symbol Generation from Schematic

Add hierarchical pins to schematic



Symbol Generation from Source Code


Our goal is to enable an author to protect their Intellectual Property while allowing a user to execute the IP with any trusted tool.

SaberRD can encrypt MAST and VHDL-AMS model source.

For VHDL-AMS, SaberRD follows IEEEs P1076-2008 which defines encryption for VHDL-AMS model portability.

Modeling: Encryption


Modeling: Encryption

Encryption Tool GUI Graphically specify

region to be encrypted in MAST or VHDL-AMS model

Recommend you leave variable names, etc. exposed where possible


60 minutes

Lab 9: Hierarchical Models & Encryption

In this lab, you will complete a schematic and encrypt this as a hierarchical model.


If using SaberRD Student Edition for training, skip only the Encryption part of lab. Encryption is not enabled in the Student Edition.

Add Hierarchical Pins

Create Symbol

Encrypt Model and Attach to Symbol

Test Model

Create SchematicCreate SchematicModel



Agenda


Modeling: TLU11







30,000+ parts in Saber Library Generic Models Characterized Parts

SaberRD: Flexible Modeling Options

Electronic

Electro-Mechanical

Electrical

Magnetic

Mechanical

Thermal

Hydraulic

Controls

PneumaticOptical

Digital



Modeling Tools State Diagrams Characterization Multi-dimensional TLU Hierarchical Schematic


Transformers

MOSFETs

IGBTs

More

Characterize

Diodes

Create

MAST

VHDL-AMS



Modeling Tools State Diagrams Characterization Multi-dimensional TLU Hierarchical Schematics

Languages Industry Standard VHDL-AMS MAST HSPICE, PSpice IBIS S-parameters C/C++, Fortran


Accept

PSpiceHSPICESimulink

SaberRD



Importing Spice Models

Spice Import Wizard Helps build symbol

automatically With options for a

default box symbol, OpAmp, Comparator



Spice Import Wizard Helps build symbol

automatically With options for a

default box symbol, OpAmp, Comparator

Easy access to Spice source, pin names, etc.



Select Import Spice from a user library in Parts Gallery

Create symbol with Spice Wizard

Compile Library

Use the new part


10 minutes

Lab 10: Modeling

In this lab, you will import and use a Spice model.


If using SaberRD Student Edition for training, stop after Task #2. This model exceeds the node limits of the Student Edition.

Open Design

Import Spice model

Analyze Results

Close Design



Agenda


Modeling: TLU11







Generic & Specific Modeling Capabilities


Modeling Tools Palette

Shortens the development time to produce both genericand specific models

Graphical interface enables model creation without having to know a modeling language

Imports measured data or data sheets Optimizer calculates model parameters to match simulation

results with imported data Table Look-Up Tool allows modeling of a behavior that is

dependent on up to 5 variables StateAMS allows modeling of complex state dependent

equations for conservative systems using graphical state diagrams


Table Look-Up Tool

Quick and easy creation of generic and specific models from: Measured Data (ASCII Files,

Scanned Waveforms, etc) Datasheets SaberRD Plot Files

Automatic symbol creation Advanced interpolation

and extrapolation options Support for up to 5

independent variables No need to know any modeling language



Model Architect - Scanned Data Utility

How to import PDF, BMP, GIF, JPG or other scanned formats into Model Architect?Answer: Scanned Data Utility

Import Image

Export ASCII


30 minutes

Lab 11: Table Look-Up

In this lab, you will use the TLU tool to develop a Thermistor for a system.

You will then use SaberRD to analyze the system.


Open Design

Create TLU model

Compare expected vs. model results

Close Design


Agenda


Modeling: TLU11







Generic & Specific Modeling Capabilities



StateAMS

State-dependent modeling of continuous behavior

Easy to create very complex models

Advanced modeling features

Tightly integrated with SaberRD environment

No need to know any modeling language


StateAMS Example: Model Interface

Define the interface of the model by adding ports and terminals


StateAMS Example: Model Interface

Terminals are associated with a physical domain and have "across" and "through" variables

Ports may be continuous or state-driven


StateAMS Example: Model Quantities

Variables are used to construct equations that describe the behavior of the model

Variables may be continuous or static



StateAMS Example: Model Quantities

Constants can be used to parameterize model behavior

Appear as properties on the generated symbol


StateAMS Example: States

States are used to describe different modes of model behavior

Each concurrent group of states must have one initial state



The equations that govern variables are defined in each state



Governing equations may also be defined by editing a variable directly



StateAMS Example: Blocks

Blocks are used to group states that share transitions and actions


StateAMS Example: Transitions

Transitions define the conditions for moving from one state to another


StateAMS Example: Code Generation

View the generated MAST or VHDL-AMS code for the model

Directly place the symbol in a SaberRD design and simulate


30 minutes

Lab 12: StateAMS

In this lab, you will use the StateAMS tool to develop a controller for a system.

You will then use SaberRD to analyze the systems.


Open Design

Create StateAMS model

Check Results

Close Design



Agenda


Modeling: TLU11







Device Characterization

Characterization through Datasheet Information

Support for Power Electronics and Multidomain (MOSFETs, IGBTs, Diodes, and more...)

Thermal Charaterization

IGBT Characterization

Magnetics Characterization

MOSFET Characterization

SaberModeling Solutions

DCPM MotorCharaterization

DiodeCharaterization


Scanned Data Utility

Import image

Drag axis box to match image boundaries

Define axis range and scale

Define parameters for multiple curves

Click mouse button along curve to create data points

Data Sheet Image


Optimize & UseBefore Optimization

After Optimization

Automatic Symbol Generation Place Part

Simulate



45 minutes

Lab 13: Characterization

In this lab, you will use the Diode tool to characterize a power diode.


Open Datasheet

Characterize diode model


Agenda


Modeling: TLU11







Robust Design Objective

Implement the simplest, most cost effective design that meets performance specifications and promises the highest reliability Most economical life-cycle costs Meet performance:

Despite variation in manufacturing processes Despite variationdue to environmental conditions Despite variationdue to aging

Costs of deviating from optimal design show up as: Poor quality Overdesign


Designing for Quality

Methodologies Screen out defective units

Test or rework all failing parts Remove causes of variation

Remove causes external to the system Replace causes internal to the system

Adopt Robust Design principles Make system performance insensitive to variation

Costly!



Robust Design Focus

Determine the important characteristic(s) of component, sub-system, or system

Robust Design concentrates on this Design Performance Measurement

TargetPerformance

Distribution Y

Distribution XCost ($) Quality

LossFunction

Poor Quality Overdesign

UnitsShipped

Goal is to reduce effect of variability on that characteristic

UnitsShipped


Inductance

-10% +10%

Time Delay

-2% +2%

Current

-15% +5%

-30%

Capacitance

+30%

Why Statistical Analysis?

System Performance =?Solution: Statistical Analysis



Goal: Analyze the behavior of the system when variation is introduced

Design Requirements Component tolerances are included External variation/noise is added to the system

Analysis Requirements Multiple variations considered simultaneously Design variations determined by statistical tolerance Number of permutations large enough to provide useful

statistical information

Physical prototyping cannot meet all the requirements


Simulation-based Robust Design Flow

performancemeasure(s) model(s)

nominaldesign &

optimizationsensitivityanalysis

robustdesign

parameters /tolerances

monte carlosimulations

paretoanalysis



Does this work?

Observations Vehicles were being brought in for

service due to poor performance Diagnostics determined that all parts

were operating within specifications Randomly replacing parts eventually

caused vehicle to have proper performance

Possible Causes Tolerance stack-up caused the vehicle to

have poor performance Explicitly defined tolerances for system

performance metrics do not exist

Case Study


Customer Example The Problem

TimeTimeTimeTime

Out putO ut putO ut putO ut put

Cust omerCust omerCust omerCust omer

Ma x A cceptableMa x A cceptableMa x A cceptableMa x A cceptable

Te s t BoundaryTe s t BoundaryTe s t BoundaryTe s t Boundary


16161616 Target ResponseTarget ResponseTarget ResponseTarget Response

Cust omerCust omerCust omerCust omer

Min A cceptableMin A cceptableMin A cceptableMin A cceptable

????

????

Considerable overshoot was observed for the measured output

Maximum acceptable overshoot was not defined during the design of the system


Customer Example The Solution

1.1.1.1. Model system in Model system in Model system in Model system in SaberSaberSaberSaber

2.2.2.2. Use Robust Design to identify where system can be improvedUse Robust Design to identify where system can be improvedUse Robust Design to identify where system can be improvedUse Robust Design to identify where system can be improved

3.3.3.3. Modify design to reduce variation in Modify design to reduce variation in Modify design to reduce variation in Modify design to reduce variation in systemsystemsystemsystem performance metric due to variation in performance metric due to variation in performance metric due to variation in performance metric due to variation in

individualindividualindividualindividual components components components components

TimeTimeTimeTime

Out putO ut putO ut putO ut put

Ma x A cceptableMa x A cceptableMa x A cceptableMa x A cceptable



16161616 TargetTargetTargetTarget

Min A cceptableMin A cceptableMin A cceptableMin A cceptable

????

????


Customer Example Conclusions

Robust design improved the signal response Robust design techniques improved the design to handle

the statistical variation of the components and reduce the variation of the system

Saber simulation results were later validated in the vehicle and matched the measured response

Quantified Return On Investment (ROI) in warranty cost savings



Simulation-based Robust Design Flow


nominaldesign &


robustdesign



paretoanalysis


Define Tolerances

In Saber, tolerances are defined by assigning a probability density functions (PDF) to parameters Models should have meaningful

parameters Allowable probability density functions

Uniform: uniform(nominal_value,tolerance)

Normal: normal(nominal_value,tolerance)

Piecewise Linear: pwl(nominal_value,tolerance)

Example of a 10k resistor with 10% tolerancernom=normal(10k,0.1)


Monte Carlo vs. Sensitivity

Sensitivity Monte Carlo -> Pareto

Deterministic Method Statistical MethodDoes not use tolerances

Uses Tolerances

Perturb one parameter at a time, by a small fixed amount

Allow all parameters to randomly vary in their tolerance band Run a sample set of simulations Compute correlation between variations in performance and the variations of each of the independent parameters

Ratio Percent performance change to the percent parameter change

Statistical sensitivity Percent change in performance correlated with percent change in each parameter


Monte Carlo Analysis

SaberRDs Monte Carlo Analysis Randomly varies component parameters, and executes

the specified Saber analysis at each set of parameter values.

Random selection based on tolerance data in models Other Features/Comments

Saber changes component values every time the loop is executed

Large or small-signal analyses allowed



Inductance

-10% +10%

Time Delay

-2% +2%

Current

-15% +5%

-30%

Capacitance

+30%


!

Which source of variation most affects overall variation?


MC Analysis results are useful for spotting trends or correlation between a given measure and a component parameter

Data can also be represented in histogram format

Statistical information such as circuit mins, maxs, std dev, etc. are available

Apply Multiple Variations SimultaneouslyMin Sensor Voltage v s. Damping (good correlation)

0.6

0.65

0.7

0.75

0.8

0.85

0.9

d(damper_t.visc)()5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0

(V) : d(damper_t.v isc)()LocMin(sens_point)

_run(-)

0.0

20.0

40.0

rnom(r.pbias)()8.5k 9.0k 9.5k 10.0k 10.5k 11.0k

Mean: 10022.0

std_dev : 334.25

(1)count


Tools for Optimizing for Robustness

Pareto Analysis Monte Carlo simulations produce large amounts of data How do we turn that data into information? Pareto analysis rank orders the parameters that have the

biggest effect on the variance of the design performance measure


results analysis

simulation

Pareto Analysis

Monte Carlo results show the effect of tolerances Including parametric

interdependency Pareto results provide

correlation data about the impact of tolerances on the design performance measure

monte carlo simulation

plot signal of interest

plot measurement of interest

pareto analysis on measurement

parameterfile



Pareto Analysis (cont.)

Results provide information on the impact of parameter interaction

Example Parameter B has an effect

on performance, but only when parameter A is at a higher-than-nominal level

This will show up in the correlation analysis results because some of the random runs are likely to be performed with a high value assigned to A

AB

Performance

Random runs


Pareto Scatter Plots

Least-Squares fit lines generatedautomatically by Pareto


Pareto Sensitivity and R2 Histograms

(-)

(-)

Over(vout)

0.0

2.0

par(-)0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

-2.0

0.0

2.0

(-) : par(-)R**2

(-) : par(-)Sensitivity

c(c.c1)

c(c.c1)

l(l .l1)

l(l .l1)

rnom(r.r1)

rnom(r.r1)

rnom(r.r2)

rnom(r.r2)

O ver(vout)

O ver(vout)

Sensitivity or Main Effect Histogramsindicate magnitude and direction of least-squared fit line though correlation scatter plots

R2 Correlation histogramsindicate the tightness of the scatter points around the least-squared fit line

Histograms can be created for any measurement


Interpreting Pareto

Sensitivity or Main Effect can be thought of as the slope of best fit line R2 can be thought of as tightness of scatter points around best fit line Summarizing this example we see:

l(l.l1) has weak, positive correlation (Sensitivity) and little relative contribution (R2) to changes in the overshoot of vout

rnom(r.r1) has stronger, negative correlation (Sensitivity) and greater relative contribution (R2) to changes in the overshoot of vout

(-)

(-)

Over(vout)

0.0

2.0

par(-)0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

-2.0

0.0

2.0

(-): par(-)R**2

(-): par(-)Sensitivity

c(c.c1)

c(c.c1)

l(l.l1)

l(l.l1)

rnom(r.r1)

rnom(r.r1)

rnom(r.r2)

rnom(r.r2)

Over(vout)

Over(vout)



Example Results


Example Results


Review: Robust Design Flow


nominaldesign &


robustdesign



paretoanalysis


Observations

Observations: Statistical analyses1. Yield valuable data2. Are very important in analyzing the robustness of a

system3. Are computationally intensive by nature

Statistical analyses are a good candidate for using parallel computing

SaberRD allows this through a feature called Distributed Iterative Analysis (DIA)



Distribute iterative analyses of a design across a compute network to reduce overall analysis time

Enables more iterations (of design and variations) to meet quality goals

Typically 1000 runs per design Example with 24 CPUs: Reduced turn

around time from 48 hours to 2+ hours(~24x)

Simulation sent to the Grid

Results gathered from the Grid

Grid Computing with Saber


45 minutes

Lab 14: Monte Carlo and Pareto Analysis

In this lab exercise, you will perform a Monte Carlo analysis on the RLC circuit then use Pareto Analysis to determine sensitivity.

If using SaberRD Student Edition for the training, follow the extra Student Edition instructions in the lab guide. The Student Edition limits Monte Carlo runs to 10.

Open Design

Perform Monte Carlo Analysis

Perform Pareto Analysis

Generate Scatter Plot

Close Design


Lab 14: Review

1. Design Quality Does Tolerance Stack-up affect your ability to meet design

specifications? Work with suppliers to improve tolerances on those components

or more specifically, parametersthat will give you the best ROI Increase design confidence without prototyping

2. Design Optimization Where are the areas of over-design? Trade-off tight tolerances in favor of cost savings in areas that do

not affect overall performance


Agenda


Modeling: TLU11








WCA is essential in fault-intolerant and safety-critical systems.

Also, sub-systems are complex, how do you determine the minimums and maximums of important parameter values?

Motivation


Traditional Approaches: Variation Analysis

Deterministic approach Discrete set of parameter values (defined by the user)

to analyze the parameter space

Benefit Easy to set up & quick overview of influences thru

variations

Drawbacks May not uncover the worst case (no search-based

method) Requires the definition of a search grid (overwhelming

for a large parameter space)


Traditional Approaches: Monte Carlo Analysis

Statistical approach Discrete analysis of parameter space using a random based

algorithm Uses distribution functions to define tolerances and

associated probability behavior Benefit

Overview of behavior across the entire parameter space Drawbacks

May not uncover the worst case (no search-based method) Requires implicit definition of a search grid (distribution

functions + number of runs) Computationally expensive


Traditional Approaches: EVA

Extreme Value Analysis Deterministic approach

Discrete analysis investigating the extremes/corners of the parameter space

Benefit Easy to set up

Drawbacks Parameter space between extremes/corners is not

considered Worst case may be missed



Traditional Approaches: RSS

Root Sum Square Statistical approach

Based on Central Limit Theorem Combination of overall parameter statstics into a single

normal (Gaussian) statistical distribution Worst Case defined as the 3 value of combined distribution

Benefit More realistic results than EVA

Drawbacks Assume linearity between parameter and behavior (constant

sensitivity) Worst case may be missed for more complex circuits


Traditional Methods Conclusion

No guarantee to uncover worst case behavior All methods are lacking a target-oriented

algorithm Can even fail for very simple designs (eg. voltage

divider) No confident results to finally qualify the

robustness of an implementation for sign-off


Saber WCA Overview

Purpose is to overcome the limitations of traditional methods Confident uncoverage of worst case Easy to use

Technical requirements Search-based algorithms Flexible definition of WCA objectives (e.g. Min, Max) Re-use of existing design set up (e.g. MC tolerances) Intuitive graphical user interface


Sabers WCA Solution

Saber WCA Solution

Design Parameter Tolerance Values

Design Unit under Test

WCA Objectives

WC Parameter Values WC Behavior



Workflow

Design CreationDesign

Creation

DefinitionTest

Definition

WCA WCA Execution

Results Evaluation

Results Evaluation

- Sabers modeling library- Customized HDL models- Models from suppliers

- WCA objectives- Constraints definitions- Algorithm selection

- 1-click solution - Analysis monitoring- In-Analysis adjustment

- WCA Parameter export- Robustness verification- Design decision


Test Definition Made Easy

Test definition Intuitive drag & drop solution Analysis Definition Measurements & objectives Multi objective definition Library of powerful algorithms


Algorithms the key to success with WCA

Search Algorithms Local & global algorithms Combined search possible to

leverage synergy of different methods

Customized calibration possible


Example

AC Source RectifierDC/DC Converter

Variable Load

Supply VoltagesFeedback Loop



The Challenge

Steady state level of output voltage across load varies due to design tolerances

What are the Worst Case values (upper & lower limit)?

Output Voltage

Steady State

??


The Solution

WCA tool calculates WC limits Significant deviation from

nominal behavior (27.9V)Lower Limit

Upper Limit


Comparison with Monte Carlo

Voltage values within boundaries of WCA results Monte Carlo does not uncover the Worst Case



Does this mean that Monte Carlo is not necessary?




Goal MethodIdentify parameters to reduce variation

Monte Carlo and Pareto





Identify +/- 3- Monte Carlo





Identify +/- 3- Monte CarloIdentify conditions that lead to worst-case

WCA


45 minutes

Lab 15: WCA

In this lab exercise, you will run a worst-case analysis on a voltage divider circuit


If using SaberRD Student Edition for the training, skip this entire lab. WCA is not enabled in the Student Edition.

Open Design

Run a Range Search

Run a Corner Search

Compare Results



Agenda







Agenda


FFT6




Agenda


Modeling: TLU11







Serves Experts and Casual Users Proven technology, broad application

coverage

Easy to Use Intuitive UI guides the flow

Embeds Methodology Test-driven results for electro-* systems

design & verification: system performance, robustness, reliability

Deployable throughout Enterprises Standards-based, compatible with CAE

environments & flows, supply chains

Desktop Simulation for Electro-* Systems



Thank you!


Appendices

Appendix A: SaberRD ApplicationsAppendix B: SaberRD MeasurementsAppendix C: MAST Preview & NetlistsAppendix D: More About SaberRD

SaberRD FeaturesSaberRD ApplicationsSaberRD AlgorithmsSPICE Import

Appendix E: SaberRD Simulation Controls


SaberRD ApplicationsAppendix A


SaberRD Applications

General Purpose Non-Linear Ordinary Algebraic Differential equation solver integrated with an event scheduler

Primary function is to optimize mixed-signal and mixed physical domain systems and circuits

Used for top down or bottom up design methodology. System (Control system) abstraction to hardware implementation.

Examples of Specific Applications: Linear and mixed-signal ASICs (Regulators, Multiplexers, PWMs,

Oscillators, etc.) Linear and mixed-signal Boards (Sensor interface circuits, micro-

processor (software algorithms), motor drivers, etc.)



SaberRD Applications

Switching Power Supplies both full implementation and State average (Buck, Boost, Inverters etc.)

Servo Mechanisms (Disk controllers, Satellite positioning, Throttle actuators etc.)

Mechatronic Systems (Doorlock Assemblies, Windshield wipers, Sun Roof, Soft Start on compressors etc.)

Electro-Hydraulic (Fuel Injection, Automotive Transmission Controller, Sprayer Mechanisms)

Sampled Data System (Digital Filters, Data acquisition systems etc.)


SaberRD MeasurementsAppendix B


SaberRD Measurements

Measurements are the key to design analysis Over 60 built-in measurements at your fingertips You can add custom measurements Measurements transform simulation data into design

information


Measurements

Time Domain: duty cycle, frequency, period, pulsewidth, risetime, falltime, slew

rate, delay, overshoot, undershoot, settle time, slope Frequency Domain:

lowpass, highpass, bandpass (Q, ripple, etc.), stopband, phase margin, gain margin, group delay, slope

Reference or level measurements: max, min, X at max, X at min, peak to peak, topline, baseline,

amplitude, average, RMS, AC-coupled RMS General Measurements:

at X, at Y, delta X, delta Y, length, slope, local min/max, crossing, horiz. level, vert. level, point marker

Statistics: Max, min, range, mean, median, std. deviation, mean (+/- 3 std

dev), histogram, yield, Dpu, Cpk



MAST PreviewAppendix C


Mixed-Signal Hardware Description Language

MAST is a fully functional Mixed-signal Hardware Description Language (MSHDL)

The simulator accepts an ASCII file The model development procedure is as follows:

Write your model in MAST and put file in your working directory.

Existing models can be included with the equations of a new model (i.e. netlist entries can be put into model)


General Template Syntax and Structure

template headerunit and pin_type definitionsheader declarations{local declarationsparameters {

parameter assignments}

netlist statementswhen {

state assignments}

values {value assignments}

control_section {simulator-dependent control statements}

equations {equations describing behavior}

}


Documents

SaberRD Electrical Student Guide v1.7