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Robu st Low Powe r VLSI Robust Low Power VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

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Page 1: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

Robust

Low

Power

VLSI

Power Management Solutions for ULP SoCs

Deliberate Practice – Session 3

Seyi and Aatmesh 15th May 2013

Page 2: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 2

Session 2 Review

• Problems with Power Management in ULP SoCs• Efficient voltage regulation required at low voltages• Multiple regulated output voltages needed• Energy harvesting is needed to further extend

lifetimes

AFE ADC

µController

Memory

DSP

Pwr. Mgmt.

RF

Rx

Tx

Infrastructure Circuits

Boost Converter

Voltage Regulation

TEG

ECG,EEG,EMG

Clock Source

Y. Zhang, et al, "A Batteryless 19uW…. ", JSSC, Jan. 2013. 

19µW out of 50µW from TEG

Page 3: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 3

Session 2 Review

LDO Vref +

-

OPAMP

IC

M1

Vin

VDD

I I

• Input power to the IC• VDD*I

• Power taken from the source• Vin*I

• Ideal Efficiency is given by,• VDD*I/Vin*I=VDD/Vin

• Ex, Vin=1.2V and VDD=0.5V• Efficiency is 0.41 or ~40%.• Almost 60% of power is

lost in regulation

Page 4: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 4

Session 2 ReviewResearch Questions• What alternatives to an LDO can we implement to raise

the intrinsic efficiency of the regulator?

• How will these alternatives address other problems?• Multiple outputs• Overhead (area, power, etc.)

• How will energy/performance be monitored?• e.g. DPM (Shakhsheer et. al.)

• How can we harvest energy with higher efficiency? • State of the Art: 38%

Page 5: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 5

Proposed Solution – Modified DC-DC Converter

Title: A 400nW Single-Inductor Dual-Input-Tri-Output DC-DC Buck-Boost Converter with Maximum Power Point Tracking for Indoor Photovoltaic Energy Harvesting

Authors: K. Chew, Z. Sun, H. Tang, L. Siek

Page 6: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

+-

6

DC-DC Converter Review: Buck

Vi VoLOAD

InductorCurrent

Iavg=IL

IL

Iavg=IL

Vx

Page 7: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 7

Boost Converter

Boost Converter

Vin

InductorCurrent

Iavg=IL

Iavg=IL

Page 8: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 8

Proposed Solution – Modified DC-DC Converter• Dual-Input Tri-Output

• Allows three rails and two energy harvesting options

SolarCell

Bat

.

V10

V18

VBAT

VPV

Page 9: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 9

Proposed Solution – Modified DC-DC Converter• Both Buck and Boost Conversion with single

inductor

SolarCell

Bat

.

V10

V18

VBAT

VPV

Buck Boost

Page 10: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 10

Example – Boost Converter

SolarCell

Bat

.

V10

V18

VBAT

VPV

10

InductorCurrent

Iavg=IL

Iavg=IL

Page 11: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 11

Proposed Solution – Modified DC-DC Converter

Title: A 400nW Single-Inductor Dual-Input-Tri-Output DC-DC Buck-Boost Converter with Maximum Power Point Tracking for Indoor Photovoltaic Energy Harvesting

Authors: K. Chew, Z. Sun, H. Tang, L. Siek

Page 12: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 12

Energy Harvesting for using Solar Cell

• Maximum Power Point (MPP) exists

Page 13: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI 13

MPP is a dynamic quantity

• MPP varies with insolation level, temperature etc. • MPP tracking needs to be done we need to operate at

MPP

Page 14: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

Maximum Power Point Tracking

How can this be done?

1414

InductorCurrent

Iavg=ImIavg=Im

Boost Converter

Vin

Page 15: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

MPPT Implementation Block Diagram

PV

Solar Cell

Energy Harvester

(DC-DC Boost Converter)

MPPT Circuit

Vm, Im

Page 16: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

Perturb and Observe (P&O) Paper uses perturb and observe method

Page 17: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

Algorithm for P&O Technique

J.J. Nedumgatt, K.B. Jayakrishnan, S. Umashankar., D. Vijayakumar, and D.P. Kothari, “Perturb and Observe MPPT Algorithm for Solar PV Systems-Modeling and Simulation.” India Conference (INDICON), 2011 Annual IEEE, Dec. 2011 pp.1,6, 16-18.

Page 18: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

ResultsDiscussed Work [1]

Page 19: Robust Low Power VLSI R obust L ow P ower VLSI Power Management Solutions for ULP SoCs Deliberate Practice – Session 3 Seyi and Aatmesh 15 th May 2013

Rob

ust

Low

Power

VLSI

References1. Chew, K.W.R.; Zhuochao Sun; Tang, H.; Siek, L., "A 400nW single-inductor

dual-input-tri-output DC-DC buck-boost converter with maximum power point tracking for indoor photovoltaic energy harvesting," Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International , vol., no., pp.68,69, 17-21 Feb. 2013

2. Y. Qiu, C. Van Liempd, B. Op het Veld, P.G. Blanken, and C. Van Hoof, “5μWto-10mW Input Power Range Inductive Boost Converter for Indoor Photovoltaic Energy Harvesting with Integrated Maximum Power Point Tracking Algorithm,” ISSCC Dig. Tech. Papers, pp. 118-119, Feb. 2011.

3. I. Doms, P. Merken, R. Mertens, and C. Van Hoof, “Integrated Capacitive Power-Management Circuit for Thermal Harvesters with Output Power 10 to 1000μW,” ISSCC Dig. Tech. Papers, pp. 300-301, Feb. 2009.

4. Y.K. Tan and S.K. Panda, “Energy Harvesting from Hybrid Indoor Ambient Light and Thermal Energy Sources for Enhanced Performance of Wireless Sensor Nodes,” IEEE Trans. Industrial Electronics, vol. 58, no. 9, pp. 4424-4435, Sep. 2011.

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Robust Low Power VLSI R obust L ow P ower VLSI A Programmable Multi- Channel Sub-Threshold FIR Filter for a Body Sensor Node Alicia Klinefelter Dept. of

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