Review Summary of Single Stage Amplifiers

8/10/2019 Review Summary of Single Stage Amplifiers

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Review Summary of Single Stage Amplifiers

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Last Updated: June 24, 2014


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Contents

1 Introduction to Single Stage Amplifiers 2

1.1 Basic Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21.2 Common-Source Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2.1 Common-Source Stage with Resistive Load . . . . . . . . . . . . . . . . . . . . . . 31.2.2 CS Stage with Diode-Connected Load . . . . . . . . . . . . . . . . . . . . . . . . . 41.2.3 CS Stage with Current-Source Load . . . . . . . . . . . . . . . . . . . . . . . . . . 6

1.2.4 CS Stage with Triode Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71.2.5 CS Stage with Source Degeneration . . . . . . . . . . . . . . . . . . . . . . . . . . 7

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Chapter 1

Introduction to Single Stage

Amplifiers

1.1 Basic Concepts

1. Most of the signals are too small to driver a load and requires amplification. Amplification is oneof basic building block of feedback systems.

An important part of a designers job is to use proper approximationsso as to create a simple

mental picture of a complicated circuit. The intuition thus gained makes it possible to formulate

the behavior of most circuits by inspection rather than by lengthy calculations.

from: Design of Analog CMOS Integrated Circuits by Behzad Razavi

2. There are four basic types of single-stage amplifiers

(a) Common-Source(b) Common-Gate

(c) Source Followers (Common-Drain)

(d) Cascode Configurations

3. The following aspects of the performance of amplifiers are important

(a) Gain

(b) Speed

(c) Power Dissipation

(d) Supply Voltage

(e) Linearity

(f) Noise

(g) Maximum Voltage Swing

(h) Input Impedance

(i) Output Impedance

In practice most of these parameters trade with each other and makes the design a multi-dimensionaloptimization problem. Therefore, intuition and experience play important roles to arrive at an ac-ceptable compromise.

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Figure 1.1: Multi-dimensional Tradeoffs Analog Design

Figure 1.2: Common-Source Stage with Resistive Load

1.2 Common-Source Stage

1.2.1 Common-Source Stage with Resistive Load

1. By virtue of transconductance of a CS stage, a MOSFET converts variations in its gate-sourcevoltage to a small-signal drain current, which can pass through a resistor to generate a small-signaloutput voltage.

2. Input impedance of this circuit is very high at low frequencies.

3. If input voltage increases from zero,M1is off andVout= VDD. AsVin approachesVTH,M1 beginsto turn on, drawing current from RD and lowering Vout. IfVDD is not excessively low, M1 turnson in saturation. The current voltage relationship is given by

Vout= VDD

IDRD =VDD

RD1

2nCox

W

L(Vin

Vt)

2

where channel length modulation is neglected. Here Vin, Vout andVt are small-signal quantities.

4. As Vin is further increased, M1 enters into trode region.

Vout= VDD RD 12

nCoxW

L

2(Vin Vt)Vout V2out

5. As Vin is further increased, M1 enters into the deep triode region, Vout 2(Vin Vt).

Vout= VDDRds

Rds+ RD=VDD

1

1 + nCoxWL

RD(Vin Vt)

Since the transconductance drops in the triode region, we usually ensure that Vout > (Vin Vt).It means that M1 should operate in saturation region for keeping constant transconductance andlinear amplification.

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6. Small-signal low frequency gain

Av =Vout

Vin=

Vin

VDD RD 1

2nCox

W

L(Vin VTH)2

Av =

RDnCox

W

L

(Vin

VTH) =

gmRD

7. If signal swing is large the transconductance varies and this leads to a nonlinear operation of thisstage and the circuit operates in the large signal mode.

8. How do we maximize the voltage gain of a common-source stage?

Av = RDgm= VRDID

gm= VRDID

2nCoxID(W/L) = VRD

ID

2nCox(W/L)

Therefore, the small-signal voltage gain is increased by increasingW/L or increasingVRD or de-creasingID if other parameters are constant. It is important to understand the trade-offs resultingfrom this equation.

(a) A larger MOS device size leads to larger device capacitances.(b) A higher VRD limits the maximum voltage swings. If (VDD VRD) = (V)in Vt), M1 is at

the edge of the triode region, allowing only very small swing at the output and the input.

(c) If VRD remains constant and ID is reduced, then RD must increase, thereby leading to agreater time constant at the output node.

It means there is a trade-offs between gain, bandwidth and voltage swing. Lower

supply voltages further tighten these trade-offs

9. For larger values ofRD, the effect of channel modulation in M1 becomes significant.

Vout= VDD RD 12

nCoxW

L(Vin Vt)2(1 + Vout)

VoutVin

= RDnCoxWL

(Vin Vt)(1 + Vout)RD 12

nCoxW

L(Vin Vt)2 Vout

Vin

Av = RDgm RDIDAvAv = gmRD

1 + RDID= gmRD

1 + RDro

= gm(ro//RD)

ro is effect of channel length modulation. IfRD ro, then effect ofro dominates over RD.

1.2.2 CS Stage with Diode-Connected Load

1. In many CMOS technologies, it is difficult to fabricate resistors with tightly-controlled values or

a reasonable physical size. Consequently, it is desirable to replaceRD with a MOS transistor. A

MOSFET can operate as a small-signal resistor if its gate and drain are shorted. This is called

diode-connected transistor. It exhibits a small-signal behavior similar to a two-terminal resistor.Note that this transistor is always in saturation because drain and gate have same potential ( VGD VT for PMOS transistors).

2. The voltage across dependent current sourcegmvgs isvgs. Consequently, the equivalent resistanceis (ro|| 1gm ) 1gm .

3. If body effect exists, theVSB is equal to the voltage between source and ground. The body terminalis connected to VSS for NMOS and to VDD for PMOS. In this case, VSS is at ground potential.So, the drain terminal is connected to small-signal ground; VSB =VSD = VDS=Vro . Therefore,equivalent resistance of two teminal device becomes

1gm+ gmb

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Figure 1.3: Common-Source Stage with Diode Connected Load

4. The impedance seen at the source ofM2 as per figure 1.3 is lower when body effect is included.The load impedance for M1 is

1gm+gmb

. Therefore, the small-signal voltage gain becomes

Av = gm1 1gm+ gmb

= gm1gm2

1

1 + =

(W/L)1(W/L)2

1

1 +

sinceID1= ID2.

5. It means that if the variation ofwith respect to output voltage is neglected, the gain is independentof bias current and voltage so long as M1 stays in saturation. In other words, as input and outputsignals vary, the gain remains relatively constant, indicating that input-output characteristic isrelatively linear. This linear characteristic is shown with small-signal analysis.

6. This linear behavior is also proved by large signal analysis. Neglecting channel-length modulationfor simplicity, we have

ID1= ID2

nCox2

W

L 1

(Vin Vt1)2 = nCox

2

W

L

2

(Vin Vt2)2

If the variation ofVt withVout is small, the circuit exhibits a linear input-output characteristic.

7. WhenIDdecrease to very low valuesVGS2 Vt2and Vout VDDVt2. In reality, the subthresholdconduction in M2 eventually brings Vout to VDD if ID approaches zero, but at very low currentlevels, the finite capacitance at the output node slows down the change from VDD Vt.

8. IfVin < Vt, the output voltage remains atVDD Vt. For Vin > Vt, Vout follows approximately astraight line. AsVin exceedsVout + Vt1, M1 enters the triode region, and the characteristic becomesnonlinear.

9. The bo dy effect in diode connected CS configuration is eliminated by using PMOSdiode-connected transistor.

Av =

n(W/L)1p(W/L)2

10. To achieve a high gain the dimension ofM1 should be higher than dimension ofM2. In a sense, ahigh gain requires a strong input device and weak load device. In addition to disproportionately wideor long transistors, a high gain translates to another important limitation: reduction in allowable

voltage swings. Specifically, since, ID1=|ID2

|,

n

W

L

1

(VGS1 Vt1)2 =n

W

L

2

(VGS2 Vt2)2

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revealing that

Av|VGS2 Vt2|VGS1 Vt1

therefore, overdrive voltage of M2 must be much higher than M1. For example, VGS1 Vt1 =200mV, and|Vt2| = 0.7V, we have|VGS2| = 2.7V, severely limiting the output swing. This isanother example of the trade-offs. Note that, with diode connected loads, the swing is constrainedby both the required overdrive voltage and the threshold voltage.

A2v = n(W/L)1p(W/L)2

Av|VGS2 Vt2|VGS1 Vt1 =

n(W/L)1p(W/L)2

Av = n(W/L)1(VGS1 Vt1)p(W/L)2|VGS2 Vt2| =

nCox(W/L)1(VGS1 Vt1)pCox(W/L)2|VGS2 Vt2|

Av = gm1gm2

11. In modern CMOS technology, channel-length modulation is quite significant and, more importantly,the behavior of transistors notably departs from square law. Thus, the gain of a diode-connectedCS stage becomes

Av = gm1

1

gm2ro2ro1

1.2.3 CS Stage with Current-Source Load

1. The voltage gain relationshipAv = gmRDsuggests that we increase the load impedance of the CSstage can be increased by increasing the load impedance RD. With a resistor or diode-connectedload, however, increasing the load resistance limits the ouput swing.

2. A more practical approach is to replace the load with a current source. Both transistors, M1, a

NMOS and M2, a PMOS, operate in saturation. Since, the load impedance seen at the outputnode is equal to ro1ro2, the gain isAv = gm1(ro1ro2)

3. Note that, the output impedance and the minimum required |VDS2| of M2 are lessstrongly coupled than the value and voltage drop of a resistor. The voltage |VDS2(min)| =|VGS2Vt2| can be reduced to a few hundred millivolts by simply increasing the widthof M2. If ro2 is not sufficiently high, the length and width of M2 can be increased to achievea smaller while maintaining the same overdrive voltage. The penalty is the large capacitanceintrouced byM2 at the output node.

4. The output impedance of MOSFETs at a given drain current can be scaled by changing the length,

i.e., to the first order, 1/L and hence ro L/ID because = 1ID . We may surmise thatlonger the transistors yield a higher voltage gain.

5. If L1 is scaled by a factor (> 1), then W1 may need to be scaled proportionally aswell. This is because, for a given drain current, VGS1 Vt1 1/

(W/L)1, i.e., if W1

is not scaled, the overdrive voltage increases, limiting the output swing. Also, since

gm1 1/

(W/L)1, scaling up only L1 lowers gm1. The intrinsic gain of the transistor is givenby the following expression

gm1ro1=

2

W

L

1

nCoxID

1

ID

indicating that the gain increases with L because depends more strongly on L than gm does.

Also, note that gmro decreases as ID increases. Increasing L2 while keeping W2 constantincreases ro2 and hence the voltage gain, but at the cost of higher|VDS2| required tomaintain M2 in saturation.

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1.2.4 CS Stage with Triode Load

1. A MOS device operating in deep triode region behaves as a resistor and can therefore serve as theload in a CS stage. The gate ofM2 is biased at a sufficiently low level voltage, ensuring the loadis in deep triode region for all output voltage swings.

Ron2=

1

pCox(W/L)2(VDD Vb |Vt2|)

2. The principal drawback of this circuit stems from the dependence of Ron2 upon pCox, Vb andVt2. Since pCox and Vt2 vary with process and temperature and since generating a precise valueofVb requires additional complexity, this circuit is difficult to use, this circuit is difficult to use.Triode loads, however, consume less voltage headroom then do diode-connected devices becauseVout(max) = VDD for triode load and Vout(max)= VDD Vt2 for diode connected load.

1.2.5 CS Stage with Source Degeneration

1. In some applications, the square-law dependence of the drain current upon the overdrive voltageintroduces excessive nonlinearity, making it desirable to soften the device characteristic. The near

linear behavior is achieved using diode-connected load. Alternatively, this can be accomplished byplacing a degeneration resistor in series with the source terminal. AsVin increases, so do ID andthe voltage drop across RS. That is, a fraction ofVin appears across the resistor rather than asthe gate-source overdrive, thus leading to a smoother variation ofID.

2. The equivalent transconductance

Gm = gm

1 + gmRS

The small-signal voltage gain is thus equal to

Av = gmRD1 + gmRD

3. It means that as RS increases, Gm becomes a weaker function ofgm and hence the drain current.IfRS is very large, most of the signal appears across RSand gain becomes a linearized function.The linearization is achieved at the cost of lower gain (and higher noise).

4. Gm in the presence of body effect is derived as

Gm = gmro

RS+ ro[1 + (gm+ gmb)ro]

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Review Summary of Single Stage Amplifiers