Adv. Radio Sci., 4, 143–148, 2006www.adv-radio-sci.net/4/143/2006/© Author(s) 2006. This work is licensedunder a Creative Commons License.

Advances inRadio Science

A design approach for integrated CMOS LC-tank oscillatorsusing bifurcation analysis

M. Prochaska, K. Bohle, and W. Mathis

University of Hannover, Institute of Theoretical Electrical Engineering, Appelstraße 9A, 30167 Hannover, Germany

Abstract. Electrical oscillators play a decisive role in in-tegrated transceivers for wired and wireless communicationsystems. In this context the study of fully integrated differ-ential VCOs has received attention. In this paper formulasfor investigations of the stability as well as the amplitudeof CMOS LC tank oscillators are derived, where an over-all model of nonlinear gain elements is used. By means ofthese results we are able to present an improved design ap-proach which gives a deeper insight into the functionality ofLC tank VCOs.

1 Introduction

The demand for ever-higher frequencies, higher levels ofintegration, low power consumption and low costs poses achallenge for the design and implementation of RF oscilla-tors. To fulfill these requirements - especially in the fieldof mobile communication - in recent years fully integratedcross coupled voltage controlled LC tank oscillators receivedattention as shown inRazavi (1997) and van der Tang etal. (2003). Predominantly piecewise linear models are usedwhich are based on heuristic methods. For the calculationof the amplitude the method of describing function is com-mon practice, where typically higher-order harmonics arediscarded. In order to guarantee a steady state oscillation theBarkhausen criterion is well-established which is also basedon a linearized model of the oscillatory circuit, see e.g.Ti-etze and Schenk(2004). Since the nonlinearity is essentialfor the operation of electrical oscillators (Mathis and Russer,2005), we present an alternative approach which uses a non-linear overall model of the active elements comparable withBuonomo and LoSchiavo(2002) andBuonomo and LoSchi-avo(2003). Starting from a nonlinear model of the transistorsthe VCO is modeled by a nonlinear dynamical system and a

Correspondence to:M. Prochaska(prochaska@tet.uni-hannover.de)

stability condition as well as a formula for the tank amplitudeis derived. For this purpose symbolic algorithms are used,which are implemented by computer algebra. Compared toProchaska et al.(2005) we present an enhanced methodol-ogy for CMOS technology. In order to demonstrate the prac-ticability of our approach we have implemented our tech-nique into a well-known design concept introduced inHa-jimiri and Lee(1999) andHam and Hajimiri(2001). It turnsout that by means of our results common design schemescan be improved, since the presented methodology providesa deeper insight into the behavior of fully integrated LC tankoscillators.

2 Nonlinear analysis

There are lots of implementations of CMOS differential LCtank oscillators which differ wildly with respect to their res-onance frequency, noise behavior or power consumption.Without a loss of generality we have decided to analyze aVCO introduced inde Muer et al.(1998) (Fig. 1), sincefor the verification of our results a perturbation analysis isavailable inBuonomo and LoSchiavo(2002) andBuonomoand LoSchiavo(2003). Furthermore, a PSpice simulationof the oscillator forC = 2pF , L = 4nH , Wn/Ln = 480,VT N = 0.5V , VDD = 3V and kn = µnCox = 20µA/V 2 isshown in Fig.2. The initial point for the design is a detaileddescription of the components of the LC tank. Because ofthe structure of the circuit and under the assumption that thepassive components are linear, the differential VCO can bereduced to the equivalent circuit shown in Fig.3, see e.g.Ha-jimiri and Lee(1999). For the VCO presented inde Muer etal. (1998) follows

gtank =1

2

(gon + gv,max + gL

)Ltank = 2L

Ctank =1

2

(CNMOS + C + CP + CV,max + Cload

)(1)

Published by Copernicus GmbH on behalf of the URSI Landesausschuss in der Bundesrepublik Deutschland e.V.

144 M. Prochaska et al.: CMOS LC tank oscillators

Fig. 1. CMOS cross-coupled LC tank oscillator.

where CNMOS = Cgs,n + Cdb,n + 4Cgd,n, is the totalparasitic capacitance,gv = Cv,maxω/Qv = ω2C2vRv andgL = 1/Rp + Rs/(ωLs)2 are the conductances of the var-actors and inductors, respectively. If the transistors operatein the pinch-off region, the amplitudeVtank is limited to−VT N

M. Prochaska et al.: CMOS LC tank oscillators 145

to a stable limit cycle. In order to predict the amplitude firstby means of the transformationT and forµ 6= 0 we calculate

ẏ =[

0 ω0−ω0 µ

]y + ε

[0

ky32

], (6)

where we assume that a linear oscillator is perturbed by asmall nonlinearity. Otherwise our approach for the predictionof the amplitude which is based on a perturbation methodcannot be applied. For the further calculation it is necessaryto mark perturbation by the perturbation parameterε. Nowwe transform the given system into polar coordinates. Fory1 = rsinθ andy2 = rcosθ it follows

θ̇ = ω0 + ε

(−

12µ −

14kr

2)

sin 2θ

−18k sin 4θ

ṙ = ε

−12µr + 38kr3 +(

12µr +

12kr

3)

cos 2θ + 18kr3 cos 4θ

. (7)Since both equations of Eq. (7) are coupled, we cannot calcu-late the amplitude directly. However by means of averaginga relief can be produced as shown inSanders and Verhulst(1985). For presentation higher order terms of the averagedsystem are neglected and so we arrive at

˙̄2 = ω0

˙̄r = εr̄µ − ε3

8kr̄3 (8)

Since both equations of Eq. (8) are decoupled we are able tocalculate a first approximation of the amplitude:

Vtank ≈ r̄ =

√−

4

3

µ

k

= 4

√√√√23

I0Ln

knWn

(1 −

2gtankI0

√I0Ln

knWn

)(9)

If the stability condition given by the Poincare normal formis fulfilled Eq. (9) is valid. Otherwise the VCO possesses nolimit cycle and the tank amplitude is zero. However, it mustbe pointed out that Eq. (9) is just a first approximation. Bymeans of our approach the calculation of a sequence of aver-aging procedures is also possible which leads to a higher ac-curacy of the prediction of amplitude. Especially in that caseour approach which is based on Lie series is advantageous,since the averaged system can be calculated in efficient man-ner, see e.g.Mathis and Voigt(1987). It must be also pointedout that the PSpice simulation and perturbation method per-formed inBuonomo and LoSchiavo(2002) validates our re-sults. As given inBuonomo and LoSchiavo(2003) for thecircuit shown in Fig.1 follows 1/gtank = 341. For exam-ple, by means of Eq. (9) we findVtank = 0.4877V whichis a good approximation compared to the PSpice simulationshown Fig.2.

Fig. 3. Simplified equivalent circuit of LC tank VCOs.

4 Design procedure

As shown inHajimiri and Lee(1999) andHam and Hajimiri(2001) there are altogether 10 design variables: two for theMOS transistors(Wn, Ln), the inductanceLtank of spiral in-ductors given by geometric parameters(b, s, n, d), the upperand lower limit of the varactors(Cv,max, Cv,min), the load ca-pacitorsCload and the bias currentI0. These variables mustbe determined according to the specifications of the oscilla-tor. Usually, it is reasonable to determine the design valueswith respect to the phase noiseL{ωoff}, where in our regimeof operation the following equation holds, seeHam and Ha-jimiri (2001)]:

L(ωoff) ∝L2tankI0

V 2tank

(10)

In order to analyze the dependency of the design variables onthe phase noise in detail we put Eq. (9) into Eq. (10):

L(ωoff) ∝L2tank

323

LnknWn

(1 − 2gtank

√Ln

I0knWn

) (11)From Eq. (11) follows that the phase noise can be mini-mized if(

1 − 2gtank

√Ln

I0knWn

)→ max. (12)

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146 M. Prochaska et al.: CMOS LC tank oscillators

Fig. 4. CMOS cross-coupled LC tank oscillator.

It turns out that for givengtank, Wn, Ln and kn Eq. (11)can be maximized if the bias current is set to its maximumvalue given by the specifications. From Eq. (12) also fol-lows that the phase noise can be minimized by the choice ofa very small bias current. However, in that case the ampli-tude tends to zero. To reduce parasitic capacitances and toget the highest transconductance inHajimiri and Lee(1999)is suggested to setLn to the minimum value allowed by theprocess. However, as shown in Eq. (11) it must be takeninto account that the phase noise also depends onLn. Afterthat the MOS transistors are described by only one indepen-dent design variableWn. Since the ratioCv,max/Cv,min istypically determined by physical laws and remains constantfor scalable layouts only one design variableCv,max is suffi-cient. Finally, the capacitanceCload is directly given by theload and additionally assumptions as shown inHajimiri andLee (1999). Thus it remains the design variablesWn, Ltankand Cv,max, where the inductance is given by the geomet-ric parameters of the on-chip coils. After a suitable initialguess of the inductance value inHam and Hajimiri(2001)three design steps are suggested in order to find the remain-ing design variables: First, the amplitude must be larger thana certain valueVtank,min to provide a voltage swing adequatefor the next stage(Vtank ≥ Vtank,min). Second, starting fromthe tuning range of the oscillation frequency one can defineconditions for the upper and lower limit of tuning range

LtankCtank,min ≤1

ω2max, LtankCtank,max ≥

1

ω2min

, (13)

where the fractional tuning range is given by(ωmin − ωmax)/ω and ω = (ωmax− ωmin)/2. Third thestartup condition

gactive ≥ αmingtank,max (14)

Fig. 5. Calculation of the tank amplitude in the design area, wherehigher harmonic are taken into account.

can also be used to get the remaining design variables. InEq. (14)αmin is the small-signal loop gain. The reader shouldnote that Eq. (14) guarantees the start-up and the existenceof steady state oscillation, where the latter is based on theBarkausen criterion as shown inKonstanznig et al.(2002).Since it can be shown that the Barkausen criterion is an in-tegral part of the Hopf theorem our bifurcation analysis andthe calculation of the amplitude is a more general formula-tion of Eq. (14). The difference between our technique andcommon methods are the consideration of nonlinear termsof higher degree. The visualization of the three design con-strains in aCv,max − Wn plane is shown in Fig.4, wherethe grey highlighted area - the so called feasible design area- marks all(Wn, Cv,max) which fulfill the design constrains.Since for the visualization of the start-up condition the choiceof Ltank is necessary we have to pick an initial guess forthe inductance value so that we find a suitable design area.In Ham and Hajimiri(2001) is recommended to choose asmall inductance which maximizegL while in Craninchx andSteyaert(1995) a large inductance is preferred. For our mod-ified design approach we also prefer an inductance selectionas shown inHam and Hajimiri(2001). However, by usingour technique the initial choice ofLtank is not important forthe final result of the design process. So we suggest choosingthe initial inductance in dependency on designer’s experienceof the application area to reduce the calculation effort duringthe design process. In general, the choice ofLtankdepends onthe operating area of the oscillatory circuit. On the one handit must be taken into account that with respect to Eq. (1) theVCO typically possesses for a smaller inductance a largergL. A minimizedgL minimizesgtank and so we maximizeEq. (12). On the other hand Eq. (12) depends on the operat-ing area given byWn andCv,max. For example, if Eq. (12)is near its maximum the choice of a larger inductance leads

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M. Prochaska et al.: CMOS LC tank oscillators 147

Fig. 6. Calculated Amplitude by describing function method.

to higher phase noise, since in that case a smaller conduc-tancegtank does not increase Eq. (12) significantly. However,if Eq. (12) is small andgtank depends strongly ongL a largerLtank leads to a reduction of the phase noise sincegL changesEq. (11) more thanLtank. Thus in general it is not possible tochoose an ideal inductance value without knowledge aboutthe other design variables. Unfortunately,Ltank must be cho-sen in order to get the remaining design variables. A reliefcan be produced by using the results of our analysis, sincephase noise depends on the amplitude significantly. Startingfrom Eq. (9) we are able to calculate the amplitude for everyfeasibleWn − Cv,max pair of the design area (Fig.5). More-over, under consideration of robust design aspects we cancalculate reliableWn − Cv,max pairs which lead to a maxi-mum amplitude to guarantee best phase noise performance.After that we suggest to analyze Eqs. (11) and (12) with re-spect to Eq. (1) in order to decide if the inductance shouldbe increased or decreased. By means of the modifiedLtankthe design constrains can be adapted. This procedure mustbe repeated until the design area shrinks to single point or afurther modification ofLtank leads to no improvement. Espe-cially in last case, the tank amplitude is an important criterionto choose a feasibleWn−Cv,max pair. The reader should notethat we are able to calculate the amplitude under considera-tion of higher harmonics which leads to a high accuracy ofthe design process. This is confirmed by the calculation ofthe amplitude by the well-known method of the describingfunction (Fig.6), which leads to the big differences to thePSpice Simulation.

5 Conclusions

In this paper we have presented the first bifurcation analysisof fully integrated CMOS LC tank oscillators. Formulas for

the calculation of the tank amplitude as well as the analy-sis of the stability are given which can directly be used forthe design of differential VCOs. It turns out that the resultsof the analysis by an overall model of the active elementslead to an improvement of the design process, since by usingour approach a deeper insight into the functionality of LCtank VCOs is provided. We have presented the results in ananalytic form - designers are able to implement differentialVCO by means of the given results even if other models ofthe components of the circuit are required. In this case pos-sibly the calculations are more complicated. However, ourmethodology can be used in the same manner. So it rep-resents a guide for the analysis and the design of electricaloscillators whereas the nonlinearities of circuit componentsare an integral part of the design process. It turns also outthat geometric methods are powerful tools for investigationsof nonlinear oscillators. Since they provide a survey of thesolution set we get a deeper insight in the behavior of the net-work. In contrast to numerical computation the shown ana-lytical methods have the advantage that the results are inter-pretable by the parameters of the network. Furthermore, wehave implemented geometric methods by means of computeralgebra. Because of these routines the calculations proceedin an automated manner.

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