PROGRAMME : M.E - PART TIME APPLIED ELECTRONICS · PDF file... PART TIME APPLIED ELECTRONICS CURRICULUM ... Weste and K.Eshragian, “Principles of CMOS VLSI Design”, 2nd Edition,

SATHYABAMA UNIVERSITY FACULTY OF ELECTRICAL AND ELECTRONICS

M.E. / M. Tech PART TIME x REGULATIONS 2015

PROGRAMME : M.E - PART TIME APPLIED ELECTRONICS

CURRICULUM SEMESTER 1

Sl. No. COURSE CODE COURSE TITLE L T P C PAGE No.

THEORY

1. SEC5101 Transforms and Random Process for Electronics Engineering 4 0 0 4 2

2. SEC5103 Advanced Digital System Design 4 0 0 4 4

3. SEC5109 CMOS Circuits Design 4 0 0 4 10

PRACTICAL

1. SEC6530 Circuits Design Lab 0 0 6 3 67

TOTAL CREDITS 15

SEMESTER 2 Sl. No. COURSE CODE COURSE TITLE L T P C PAGE No.

THEORY

1. SEC5113 Advanced Analog Integrated Circuits 4 0 0 4 14

2. SEC5116 Microcontrollers for Embedded System Design 4 0 0 4 17

3. SEC5137 Advanced RF System Design 4 0 0 4 38

TOTAL CREDITS 12


THEORY

1. SEC5105 Advanced Digital Signal Processing 4 0 0 4 6

2. Elective – 1 4 0 0 4

3. Elective – 2 4 0 0 4

PRACTICAL

1. SEC6531 Matlab Programming Lab 0 0 6 3 67

TOTAL CREDITS 15

L - LECTURE HOURS, T – TUTORIAL HOURS, P – PRACTICAL HOURS, C – CREDITS

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M.E. / M. Tech PART TIME xi REGULATIONS 2015


THEORY

1. SEC5107 Advanced Digital Image Processing 4 0 0 4 8

2. Elective – 3 4 0 0 4

3. Elective – 4 4 0 0 4

TOTAL CREDITS 12


THEORY

1. SEC5201 RF MEMS and Its Applications 4 0 0 4 39

2. Elective – 5 4 0 0 4

3. Elective – 6 4 0 0 4

PRACTICAL

1. SEC6541 Lab VIEW Programming Lab 0 0 6 3 70

TOTAL CREDITS 15


THEORY

1. S35PROJ Project Viva voce 0 0 40 20

TOTAL CREDITS 20

TOTAL CREDITS FOR THE PROGRAM 89

ELECTIVE COURSES

Sl. No. COURSE CODE COURSE TITLE L T P C PAGE No.

1. SEC5119 Real Time Operating Systems 4 0 0 4 20

2. SEC5130 Advanced Wireless Communications 4 0 0 4 31

3. SEC5207 Algorithm and Architecture for Signal Processing ICs 4 0 0 4 45

4. SEC5601 Advanced Cryptography 4 0 0 4 74

5. SEC5602 Applied Cryptography and Data Security 4 0 0 4 75

6. SEC5603 Distributed Processing & Networking 4 0 0 4 76

7. SEC5604 High Performance Networks 4 0 0 4 77

8. SEC5605 Wireless Sensor Networks 4 0 0 4 78

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M.E. / M. Tech PART TIME xii REGULATIONS 2015

9. SEC5606 Intelligent Computing Techniques 4 0 0 4 79

10. SEC5607 Software Tools for Technical Computing 4 0 0 4 80

11. SEC5615 Multidimensional Image Processing 4 0 0 4 88

12. SEC5620 Real Time Embedded System Design 4 0 0 4 93

13. SEC5625 Low Power VLSI Design 4 0 0 4 98

14. SEC5629 ASIC Design 4 0 0 4 102

15. SEC5632 Electromagnetic Interference & Compatibility 4 0 0 4 105

16. SEC5633 Embedded Control Systems 4 0 0 4 106

17. SEC5666 Modelling & Simulation of Communication Network 4 0 0 4 139

18. SEC5667 Time Frequency Analysis 4 0 0 4 140

19. SIC5603 Advanced Digital Control System 4 0 0 4 169

20. SIC5608 Advanced Robotics & Automation 4 0 0 4 174

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M.E. / M. Tech PART TIME 2 REGULATIONS 2015

SEC5101

TRANSFORMS AND RANDOM PROCESS FOR ELECTRONICS ENGINEERING

(For AE, EMB & VLSI)

L T P Credits Total Marks

4 0 0 4 100

COURSE OBJECTIVES To reinforce the mathematical foundation with advanced topics To enable the student to appreciate the engineering aspect of mathematics To equip the student with tools to confront continual mathematical challenges

UNIT 1 2D TRANSFORMS 12 Hrs. Need for transform – Review of 1D Transform – 2D DFT – IDFT – properties – Image transforms – 2D Orthogonal and Unitary transform and its properties – Separable transforms – Walsh, Hadamard, Haar, DST, DCT, Slant, SVD & KL transforms.

UNIT 2 WAVELET TRANSFORMS & ITS APPLICATIONS 12Hrs. Wavelet transforms – 1D & 2D Wavelet transform – basis and orthogonal basis – Time and frequency decompositions – STFT – CWT, DWT, Haar wavelet and Shannon wavelet – MRA – Orthonormal Wavelets – Fast Wavelet transform – Wavelet Packets – Biorthogonal Wavelet Bases – SPIHT Algorithm – Wavelet Denoising – Wavelet based Signal Processing – Signal & Image compression.

UNIT 3 PROBABILITY & RANDOM VARIABLES 12 Hrs Probability concepts – Random variable – moment generating function – discrete types, continues types – Distributions - Binomial, Poisson, Geometric, Uniform, Normal and Exponential – Transformation of random variables – 2D random variables – marginal, conditional, joint probability – Correlation – Regression – Central Limit Theorem.

UNIT 4 RANDOMPROCESS 12 Hrs. Notion of Stochastic processes – Stationary and Independence; WSS & Ergodicity – Correlation Functions; Auto Correlation, Cross Correlation & its properties – expectations – variance, co variance – Power Spectral Density – properties – energy spectral density – Parseval’s theorem – Wiener Khintchine relation – Linear systems with Random inputs – response of linear systems to white noise – simulation of white noise – Noise Bandwidth – low pass filtering of white noise.

UNIT 5 QUEUING THEORY 12 Hrs. Introduction to queuing theory – Characteristics of Queuing Systems – Little’s Law – Markovian Queues – Single server models – Multiple server models – Non-Markovian Queues – Pollaczek-Khinchine formula – Machine interference model – steady state analysis – self service queue – Priority Queues – Open and Closed Networks – queuing applications.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Rafael C.Gonzalez & Richard E Woods, Digital Image Processing, Third Edition, Pearson Prentice Hall, 2009. 2. Peyton Z.Peebles, Probability, Random Variables and random signal principles, 4th edition, TMH publication, 2001. 3. Anil K Jain, Fundamentals of Digital Image Processing, Prentice Hall, 1989. 4. Raghuveer M Rao & Ajit S Bopardikar, Wavelet Transform: Introduction to Theory & Applications, Pearson Education, 1998. 5. Donald Gross, John F. Shortle, James M. Thompson, and Carl W. Harris, Fundamentals of Queuing Thoery, 4th edition,

Wiley 2008.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration : 3 Hrs. PART A : 5 Questions of 4 Marks each-No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 Marks 50 Marks

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SEC5103 ADVANCED DIGITAL SYSTEM DESIGN

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To explain how digital circuit of large complexity can be built in a methodological way To illustrate how the concepts presented in the lectures are applied in practice, and how the need to

accommodate different practically-motivated trade-offs can lead to alternative implementations To expose students to the advanced design techniques and methodology

UNIT 1 INTRODUCTION TO COMBINATIONAL AND SEQUENTIAL LOGIC CIRCUITS 12 Hrs. Combinational: Introduction; General Approach to Combinational Logic Design; Introduction to Digital Integrated Circuits; Decoders; Encoders; Digital Multiplexers; Binary Comparators; Array Multipliers; Tristate Buffers. Sequential: Latches; Flip-Flops; Counters - Ring counter and Johnson Counter; Counter Design; Sequential Circuit Design using State Graphs - Mealy and Moore Machines.

UNIT 2 SYNCHRONOUS SEQUENTIAL NETWORKS 12 Hrs. Structure and Operation of Synchronous Sequential Networks; Analysis of Clocked Synchronous Sequential Networks (CSSN); Design of CSSN; State Table Reduction – Implication Chart method, Equivalence Classes method, Merger Graph method; State Assignment; Algorithmic state Machines – ASM Charts, ASM Tables, ASM Realizations.

UNIT 3 ASYNCHRONOUS SEQUENTIAL NETWORKS 12 Hrs. Structure and Operation of Asynchronous Sequential Networks (Fundamental and Pulse Mode); Analysis of Asynchronous Sequential Networks (ASN); Design of ASN; Primitive Flow Table; Flow Table Reduction; State Assignment; Races in ASC –Static and Dynamic Hazards; Essential Hazards; Mixed Operating Mode Asynchronous Circuits.

UNIT 4 PROGRAMMABLE LOGIC DEVICES 12 Hrs. Basic Concepts; Programming Technologies; Programmable Logic Element(PLE); ROM-Programmable Logic Array(PLA); Programmable Array Logic(PAL); Structure of standard PLD’s; Complex PLD’s(CPLD); System Design using PLD’s; Design of Combinational and Sequential Circuits using PLD’s; System Design Using the Concept of Controller.

UNIT 5 STUDY OF FPGA & XILINX 12 Hrs. Introduction to Field Programmable Gate Arrays; Types of FPGA; Xilinx XC3000 series, Logic Cell Array(LCA); Configurable Logic Blocks(CLB); Input/Output Block(IOB); Programmable Interconnect Point(PIP); Introduction to ACT2 family and Xilinx XC4000 families; Design examples: Pseudo Random Generator, Traffic Light Controller, Vending Machine Controller.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Donald G. Givone, Digital principles and Design, Tata McGraw Hill, 2002. 2. John M Yarbrough, Digital Logic applications and Design, Thomson Learning, 2001. 3. William I. Fletcher, An Engineering Approach to Digital Design, Prentice Hall of India, 1996. 4. Charles H. Roth,Jr. and Larry L. Kinney, Fundamentals of Logic Design, 6th Edition, Cengage Learning, 2012. 5. Richard F. Tinder, Engineering Digital Design, 2nd Edition Revised, Academic Press, 2000.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration: 3 Hrs. PART A : 5 Questions of 4 Marks each-No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 Marks 50 Marks

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SEC5109 CMOS CIRCUIT DESIGN

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To introduce basic theories and techniques of digital VLSI design in CMOS technology To learn the fundamental concepts and structures of designing digital VLSI systems include CMOS devices and

circuits, standard CMOS fabrication processes, CMOS design rules, static and dynamic logic structures, interconnect analysis, CMOS chip layout, simulation and testing, low power techniques, design tools and methodologies, VLSI architecture

UNIT 1 CMOS AND MOS TRANSISTOR PRINCIPLE 12 Hrs. Silicon semiconductor technology an overview-CMOS technology n-well p-well process- Twin tub - Silicon on insulator - CMOS process enhancements - Interconnect - Circuit elements - latchup - Latch up prevention techniques - Threshold voltage equation and second order effects-MOS models-small signal AC characteristics.

UNIT 2 ELECTRICAL PROPERTIES AND LAYOUT DESIGN OF MOS TRANSISTOR 12 Hrs. The MOS invertors, CMOS AND NMOS inverters, Inverter ratio, Static and Dynamic characteristics-Power consumption -Static Dissipation- Dynamic Dissipation -Energy and Energy delay parameter-combinational logic implementation using NMOS and CMOS - Design rules-Stick diagram and Layout design, NAND-NAND, NOR- NOR, and AOI Logic.

UNIT 3 CMOS CIRCUIT AND LOGIC DESIGN 12 Hrs. CMOS logic design- Typical CMOS NAND and NOR delays-Transistor sizing-CMOS logic structures- Complementary logic BICMOS logic- Pseudo NMOS logic-Dynamic CMOS logic-Clocked CMOS logic-Precharge domino CMOS logic-Pass transistor logic-CMOS domino logic-NP domino logic-Cascade voltage switch logic-Source follower pull up logic(SFPL)-Clocking strategies- I/O structures.

UNIT 4 CMOS TESTING 12 Hrs. The need for testing-Manufacturing test principles, Fault models, observability, controllability, fault coverage,automatic test pattern generation, Delay fault Testing, Statistical fault analysis, Fault sampling-Design strategies for test-Chip level Test Techniques, System level test techniques-Layout design for improved testability

UNIT 5 CMOS SUBSYSTEM DESIGN 12 Hrs. Data path operations, Addition/subtraction,. Parity generations, Comparators, Zero/one detectors, Binary Counters, Implementation of ALU functions with an adder-carry look ahead adder- Multiplication Array- Radix-n-Wallace tree and Serial parallel Multiplication, Pipelined multiplier array, Design of 4 bit Shifters- Memory Architectures and Memory control circuits - FSM, PLA Control Implementation.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Neil. H. E. Weste and K.Eshragian, “Principles of CMOS VLSI Design”, 2nd Edition, Addison-Wesley, 2000 2. Eugene D Fabricius, “Introduction to VLSI Design”, Mc Graw Hill, 2000 3. Douglas A. Pucknell and K.Eshragian, “Basic VLSI Design”, 3rd Edition PHI, 2000 4. Jan M Rabaey, Chandrakasan A, Nikolic B, “ Digital Integrated Circuits”, Pearson Education, New Delhi, Third Indian

Reprint, 2004. / Prentice Hall of India, New Delhi. 5. Amar Mukherjee, "Introduction to nMOS and CMOS VLSI system design", Prentice Hall, USA, 1986. 6. .Wayne Wolf, "Modern VLSI Design: Systems on Silicon", Third Edition, Pearson Education Indian Reprint, New Delhi,2000.


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M.E. / M. Tech REGULAR 67 REGULATIONS 2015

SEC6530 CIRCUITS DESIGN LAB

(For AE) L T P Credits Total Marks 0 0 6 3 100

SUGGESTED LIST OF EXPERIMENTS: 1. Negative Feedback Amplifier 2. Multistage Amplifier 3. Hartley Oscillator & Colpitts Oscillator 4. RC Phase Shift Oscillator 5. Mono Stable Multivibrator & Bi-Stable Multivibrator 6. Astable Multivibrator 7. Flip Flops 8. Carry look ahead adder & Comparator 9. Counters & Shift Registers 10. Encoder and Decoder 11. Multiplexer and Demultiplexer 12. Arithmetic Logic Unit

SEC6531 MATLAB PROGRAMMING LAB


SUGGESTED LIST OF EXPERIMENTS: 1. Linear and Circular Convolution 2. Auto Correlation and Cross Correlation 3. Up-Sampling and Down-Sampling 4. Decimation and Interpolation 5. Power Spectrum Estimation 6. Image Arithmetic & Logical Operations 7. Geometric Transformations of an Image 8. 2D Transforms of an Image 9. Edge Detection Using Derivative Filter Mask 10. Smoothing & Sharpening in Spatial and Frequency Domain 11. Image Enhancement using Point Processing and Spatial Operation 12. Binary Phase Shift Keying 13. M-ary Frequency Shift Keying 14. Quadrature Phase Shift Keying 15. Quadrature Amplitude Modulation

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SEC5113 ADVANCED ANALOG INTEGRATED CIRCUITS

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To encourage students to develop working knowledge of linear circuits To study and understand the fundamental concepts of BJT, MOSFET and operational amplifiers To deal about specific design issues related to single and multistage amplifier and differential amplifiers

UNIT 1 INTEGRATED CIRCUIT BJT AND MOSFET MODELING 12 Hrs. Small signal models of BJTs and MOSFETs, short channel effects and scaling, and its impact on small signal parameters, biasing and operating regimes, parasitic elements, Frequency response of BJTs and MOSFETs.

UNIT 2 SINGLE AND MULTISTAGE AMPLIFIERS 12 Hrs. Small signal single stage amplifier such as Common Emitter stage, Common source stage, Source follower, Common gate stage, Cascode stage configurations and properties, multistage amplifier stages such as Darlington and cascade configurations, Small signal analysis of differential amplifiers, Balanced differential amplifiers, device mismatch effects, feedback configurations, properties, gain-bandwidth product, instability Nyquist criteria, compensation, root locus, slew rate.

UNIT 3 CURRENT MIRRORS AND LOADS 12 Hrs. Basic current mirrors, cascode current mirrors, active current mirrors, current mirror configurations, low current biasing sources, current matching considerations, temperature compensation, active load configurations, Miller effect, voltage references, supply independent biasing, temperature independent references, input bias current, offset voltage, common-mode rejection ratio, power supply rejection ratio.

UNIT 4 OPERATIONAL AMPLIFIERS AND FREQUENCY COMPENSATION 12 Hrs. Operational amplifier performance parameters, analysis of the simple op amp, Two-stage Op Amps, Input range limitations, Gain boosting, slew rate, power supply rejection, design considerations of integrated op-amps, Statistical characteristics of noise, noise in single stage amplifiers, noise in differential amplifiers, noise figure and noise temperature, General considerations, Multipole systems, Phase Margin, Frequency Compensation, Compensation of two stage Op Amps, Slewing in two stage Op Amps, Other compensation techniques.

UNIT 5 ANALOG MULTIPLIER AND IC DESIGN 12 Hrs. Bipolar analog multiplier, simple emitter coupled multiplier, a complete analog multiplier, Gilbert multiplier, Analysis of four quadrant and variable transconductance multiplier, voltage controlled oscillator, analysis of phase-locked loops, Low Power Analog Design, Bandgap References, Introduction to Switched Capacitor Circuits, Analog Layout Considerations and Packaging Issues.

Max. 60 Hours TEXT / REFERENCE BOOKS 1. Gray and Meyer, Analysis and Design of Analog ICs, Wiley International, 1996. 2. Gray, Wooley, Brodersen, Analog MOS Integrated Circuits, IEEE Press, 1989. 3. Kenneth R. Laker, Willy M.C. Sansen, William M.C.Sansen, Design of Analog Integrated Circuits and Systems ", McGraw

Hill, 1994. 4. Behzad Razavi, Principles of Data Conversion System Design, S. Chand & Company Ltd, 2000. 5. Behzad Razavi, Design of Analog CMOS Integrated Circuits, Tata McGraw Hill, 2002. 6. P.E. Allen and D.R. Holberg, CMOS Analog Circuit Design, Oxford University Press, 2011.


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SEC5116

MICROCONTROLLERS FOR EMBEDDED SYSTEM DESIGN

(For AE & EMB)


4 0 0 4 100

COURSE OBJECTIVES To study the architecture of 8051and 8 bit PIC Microcontrollers To understand the concepts of Memory and Peripheral Interfacing with microcontrollers To learn assembly language programming for microcontrollers To learn about software design tools used for programming microcontrollers

UNIT 1 REVIEW OF 8051 ARCHITECTURE 12 Hrs. Architecture – memory organization – addressing modes – instruction set –Timers - Interrupts -I/O ports, Interfacing I/O Devices – Serial Communication- Assembly language programming – Arithmetic Instructions – Logical Instructions –Single bit Instructions – Timer Counter Programming – Serial Communication Programming- Interrupt Programming

UNIT 2 8 BIT PIC MICROCONTROLLER 12 Hrs. Architecture – memory organization – addressing modes – instruction set – PIC programming in Assembly& C –I/O port, Data Conversion, RAM & ROM Allocation, Timer programming

UNIT 3 PERIPHERALS OF PIC MICROCONTROLLER 12 Hrs. Timers – Interrupts, I/O ports- A/D converter-UART- I2C bus –SPI- CCP modules -Flash and EEPROM memories-ADC, DAC and Sensor Interfacing

UNIT 4 DEVELOPMENT TOOLS 12 Hrs. Host and Target Machines- Linker/Locators for Embedded Software, Debugging Techniques- MPLAB overview: Using MPLAB, Toolbars, Select Development Mode and Device Type, Project, Text Editor-Assembler, MPLAB Operations – Emulators.

UNIT 5 SYSTEM DESIGN – CASE STUDY 12 Hrs. Interfacing LCD Display – Keypad Interfacing – Servo motor Control – Controlling DC/ AC appliances – Measurement of frequency – Stand alone Data Acquisition System- Interfacing Wireless Communication modules -RF, Zigbee and GSM modules with microcontrollers

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Muhammad Ali Mazidi, Rolin D. Mckinlay, Danny Causey ‘ PIC Microcontroller and Embedded Systems using Assembly and

C for PIC18’, Pearson Education 2008 2. John Iovine, ‘PIC Microcontroller Project Book ’, McGraw Hill 2000 3. MykePredko, “Programming and customizing the 8051 microcontroller”, Tata McGraw Hill 2001. 4. Muhammad Ali Mazidi, Janice G. Mazidi and Rolin D. McKinlay, ‘The 8051 Microcontroller and Embedded Systems’ Prentice

Hall, 2005. 5. Scott Mackenzie and Raphael C.W. Phan, “The Micro controller”, Pearson, Fourth edition 2012


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SEC5137 ADVANCED RF SYSTEM DESIGN

(For AE)


4 0 0 4 100 COURSE OBJECTIVES To understand the issues in RF design To learn the fundamental concepts in designing amplifiers, oscillators, mixers, receivers and antenna UNIT 1 RF DESIGN ISSUES 12 Hrs. Electromagnetic spectrum- Importance of RF design -Design and performance issues - Wireless system and markets- wireless system components-, RF behaviour of passive components, chip-Components and circuit board considerations, scattering parameters, smith chart and applications

UNIT 2 RF AMPLIFIER DESIGN 12 Hrs. Bilateral RF amplifier design for maximum small-signal gain- amplifier design for maximum gain, GMAX - Multistage amplifiers - Cascading impedance-matched stages - Cascading amplifiers by direct impedance matching - Output power and impedance match considerations of cascaded amplifiers- Stability considerations-operating gain design for maximum -linear power output - Output match considerations - Noise in RF circuits- Review of noise sources in RF systems- Two-port noise parameter definitions - Available gain design technique- Available gain design outline Low-noise amplifier design considerations- design of a single-ended LNA- Balanced amplifiers- design of a balanced LNA for the RF frequency range. UNIT 3 RF OSCILLATORS AND MIXERS DESIGN 12 Hrs. Principles of oscillator design- Two-port oscillator design approach - One-port oscillator design approach- Transistor oscillator configurations - Characterizing oscillator phase noise- Oscillator design examples -145.455-MHz Colpitts crystal oscillator design - Design of a 3.7- to 4.2-GHz voltage-controlled oscillator-Mixers and frequency multipliers - Mixer overview and their applications in systems-Diode mixers and their topologies- Single-ended mixer - Single-balanced mixer- Double-balanced mixer- The image problem in mixers - Harmonic components in mixers -Transistor mixer design- Active transistor mixers- Resistive FET mixers - Dual-gate FET mixers

UNIT 4 RF AND MICROWAVE ANTENNAS DESIGN 12 Hrs. Antenna noise temperature-Background and brightness temperature -Radiation from surface current and line current distribution, Basic Antenna parameters, Feeding structure-Design Calculations of Rectangular Patch Antenna, circular patch Antenna-Microstrip antenna arrays-Fractal antennas-Smart Antennas-Beamforming Networks-Design of Butler Matrix and Nolen matrix UNIT 5 RF RECEIVER DESIGN 12 Hrs. Receiver Architectures-Dynamic range-Frequency conversion and filtering-Examples of practical receivers-FM broadcast receiver-digital cellular receiver-millimetre wave point to point radio receiver-direct conversion GSM receiver Software-defined radio- RF digital processing -Digital processing of a wideband IF - Digital processing at baseband (direct conversion) - Transceiver issues associated with software-defined radio -

Max. 60 Hours TEXT / REFERENCE BOOKS 1. Reinhold Ludwig and Powel Bretchko, RF Circuit Design – Theory and Applications, Pearson Education Asia, First Edition,

2001. 2. Rowan Gilmore,Les Besser ,”Practical RF Circuit Design for Modern Wireless Systems -Active Circuits and Systems”,

Volume II,Artech House,Boston , London 3. David M pozar,Microwave and RF design of wireless systems, John Wiley and sons,inc,2003 4. Mathew M. Radmanesh, Radio Frequency & Microwave Electronics, Pearson Education Asia, Second Edition, 2002. 5. Kraus.J.D, Marhefka.R.J. Khan.A.S. “Antennas for all applications, “III edition, Tata McGraw Hill, 2006. 6. Balanis. A, “Antenna theory Analysis and Design “- John Wiley and Sons, New York, Third Edition, 2005.


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SEC5105

ADVANCED DIGITAL SIGNAL PROCESSING

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To necessitate students understand the basic principles of random signal processing, spectral estimation

methods, adaptive filter algorithms and their applications To facilitate the student to comprehend the different signal detection and estimation methods used in

communication system

UNIT 1 DISCRETE RANDOM SIGNAL PROCESSING 12 Hrs. Weiner Khitchine relation - Power spectral density – filtering random process, Spectral Factorization Theorem, special types of random process – Signal modeling-Least Squares method, Pade approximation, Prony’s method, iterative Prefiltering, Finite Data records.

UNIT 2 SPECTRUM ESTIMATION 12 Hrs. Non-Parametric Methods-Correlation Method - Co-Variance Estimator- Performance Analysis of Estimators -Unbiased, Consistent Estimators-Periodogram Estimator-Barlett Spectrum Estimation-Welch Estimation-Model based Approach - AR, MA, and ARMA Signal Modeling-Parameter Estimation using Yule-Walker Method

UNIT 3 ESTIMATION & PREDICTION 12 Hrs. Maximum likelihood criterion - Efficiency of estimator - Least mean squared error criterion - Wiener filter - Discrete Wiener Hof equations - Recursive estimators - Kalman filter – Linear prediction, Prediction error - Whitening filter, Inverse filter - Levinson recursion, Lattice realization, Levinson recursion algorithm for solving Toeplitz system of equations.

UNIT 4 ADAPTIVE FILTERS 12 Hrs. FIR Adaptive filters - Newton's steepest descent method - Adaptive filters based on steepest descent method - Windrow Hof LMS Adaptive algorithm - Adaptive channel equalization – Adaptive echo canceller - Adaptive noise cancellation - RLS Adaptive filters

UNIT 5 MULTIRATE SIGNALS PROCESSING 12 Hrs. Mathematical description of change of sampling rate - Interpolation and Decimation , Decimation by an integer factor - Interpolation by an integer factor, Sampling rate conversion by a rational factor, Filter implementation for sampling rate conversion- Direct form FIR structures, Polyphase filter structures, time-variant structures.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Monson H.Hayes, Statistical Digital Signal Processing and Modeling, John Wiley and Sons, Inc., Singapore, 2002. 2. John G.Proakis, Dimitris G.Manolakis, Digital Signal Processing Pearson Education, 2002. 3. John G.Proakis et.al.,’Algorithms for Statistical Signal Processing’, Pearson Education, 2002. 4. Dimitris G.Manolakis et.al.,’Statistical and adaptive signal Processing’, McGraw Hill, Newyork,2000. 5. Ifeachor.E.C., Jarvis.B.W., “Digital Signal Processing: A Practical Approach”, 2nd edition, Prentice Hall, 2002. 6. Glenn Zelinkar, Fred J. Taylor, “Advanced digital Signal processing, Theory and Applications”, Mc Graw Hill, 2000. 7. Sopocles J.Orfanidis, “Optimum Signal Processing”, McGraw Hill, 2000.


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SEC6530 CIRCUITS DESIGN LAB


SUGGESTED LIST OF EXPERIMENTS: 1. Negative Feedback Amplifier 2. Multistage Amplifier 3. Hartley Oscillator & Colpitts Oscillator 4. RC Phase Shift Oscillator 5. Mono Stable Multivibrator & Bi-Stable Multivibrator 6. Astable Multivibrator 7. Flip Flops 8. Carry look ahead adder & Comparator 9. Counters & Shift Registers 10. Encoder and Decoder 11. Multiplexer and Demultiplexer 12. Arithmetic Logic Unit

SEC6531 MATLAB PROGRAMMING LAB


SUGGESTED LIST OF EXPERIMENTS: 1. Linear and Circular Convolution 2. Auto Correlation and Cross Correlation 3. Up-Sampling and Down-Sampling 4. Decimation and Interpolation 5. Power Spectrum Estimation 6. Image Arithmetic & Logical Operations 7. Geometric Transformations of an Image 8. 2D Transforms of an Image 9. Edge Detection Using Derivative Filter Mask 10. Smoothing & Sharpening in Spatial and Frequency Domain 11. Image Enhancement using Point Processing and Spatial Operation 12. Binary Phase Shift Keying 13. M-ary Frequency Shift Keying 14. Quadrature Phase Shift Keying 15. Quadrature Amplitude Modulation

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SEC5107 ADVANCED DIGITAL IMAGE PROCESSING

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To describe and explain basic principles of digital image processing To design and implement algorithms that perform basic image processing To design and implement algorithms for advanced image analysis

UNIT 1 DIGITAL IMAGE FUNDAMENTALS 12 Hrs. Elements of Visual Perception; Image Sensing and Acquisition; Image Sampling and Quantization; Basic Relationships between Pixels; Monochromatic Vision Models; Colour Vision Models; Colour Fundamentals; Colour Models; Conversion of Colour Models; Colour Transformations.

UNIT 2 ENHANCEMENT & RESTORATION 12 Hrs. Introduction; Point Processing – Image Negatives, Log transformations, Power Law Transformations, Piecewise-Linear Transformation Functions; Arithmetic/Logic Operations – Image Subtraction, Image Averaging; Histogram Processing – Histogram Equalization, Histogram Matching; Spatial filtering – Smoothing, Sharpening; Smoothing Frequency Domain Filters – Ideal Low Pass, Butterworth Low Pass, Gaussian Low Pass; Sharpening Frequency Domain Filters – Ideal High Pass, Butterworth High Pass, Gaussian High Pass; Model of Image Degradation/Restoration Process; Noise Models; Inverse Filtering; Geometric Transformations.

UNIT 3 IMAGE ANALYSIS 12 Hrs. Introduction; Image Segmentation – Point, Line, Edge, Boundary Detection; Colour Image Segmentation; Thresholding – Basic Global Thresholding, Multiple Thresholding, Variable Thresholding; Region Based Segmentation; Feature Extraction – Amplitude Features, Histogram Features, Shape Features, Texture Features, Spectral Features.

UNIT 4 MORPHOLOGICAL PROCESSING & COMPRESSION 12 Hrs. Morphological Image Processing – Logic Operations involving Binary Images; Dilation and Erosion; Opening and Closing; Basic Morphological Algorithms – Boundary Extraction, Region Filling, Thickening, Thinning; Image Compression – Compression Model, Huffman Coding, Arithmetic Coding.

UNIT 5 3D IMAGE PROCESSING & APPLICATIONS 12 Hrs. Sources of 3D Data; 3D Data Sets; Slicing the Data set; Volumetric display; Stereo Viewing; Image processing in 3D; Measurements on 3D images; Applications of Image Processing – Motion Analysis, Image Fusion, Image Classification.

Max. 60 Hours TEXT / REFERENCE BOOKS 1. Rafael C. Gonzalez and Richard E. Woods, Digital Image Processing, 2nd Edition, Pearson Education, Inc., 2004. 2. Anil K. Jain, Fundamentals of Digital Image Processing, PHI Learning Private Limited, New Delhi, 2002. 3. John C. Russ, The Image Processing Handbook, 6th Edition, CRC Press, Taylor & Francis Group, 2011. 4. Rafael C. Gonzalez and Richard E. Woods, Digital Image Processing, 3rd Edition, Pearson Education, Inc., 2004. 5. William K. Pratt, Digital Image Processing, 3rd Edition, John Wiley & Sons, Inc., 2001. 6. Bernd Jähne, Digital Image Processing, 5th Revised and Extended Edition, Springer, 2002. 7. Rafeal C.Gonzalez, Richard E.Woods and Steven L. Eddins, Digital Image Processing using Matlab, Pearson Education,

Inc., 2004.


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SEC5201 RF MEMS AND ITS APPLICATIONS

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To introduce Micro fabrications techniques To understanding of the basics of RF networks To deal with the issues of MEMS and fabrication techniques To instill knowledge on the properties of various lithography methods To understand the design issues in RFMEMS components and its applications

UNIT 1 MEMS AND FABRICATION TECHNIQUES 12 Hrs. Micro fabrications for MEMS -Surface micromachining of silicon -Wafer bonding for MEMS-LIGA process- Electromechanical transducers-Piezoelectric transducers - Electrostrictive transducers –Magnetostrictive transducers –Electrostatic actuators-Electromagnetic transducers - Electrodynamics transducers- Electro thermal actuators.

UNIT 2 MICRO SENSING 12 Hrs. Piezoresistive sensing - Capacitive sensing - Piezoelectric sensing - Resonant sensing - Surface acoustic wave sensors. Semiconductors : Electrical and chemical properties-Growth and deposition, Thin films for MEMS and their deposition techniques -Oxide film formation by thermal oxidation -Deposition of silicon dioxide and silicon nitride - Polysilicon film deposition -Ferroelectric thin films.

UNIT 3 MICRO STEREO LITHOGRAPHY 12 Hrs. Materials for polymer MEMS: Classification of polymers -UV radiation curing –SU-8 for polymer MEMS. Microstereolithography for polymer MEMS –Scanning method - Two-photon Microstereolithography Surface micromachining of polymer MEMS -Projection method -Polymeric MEMS architecture with silicon, metal and ceramics.

UNIT 4 MEMS INDUCTORS AND CAPACITORS 12 Hrs. MEMS inductors : Self-inductance and mutual inductance - Micromachined inductors - Effect of inductor layout - Reduction of stray capacitance of planar inductors-Approaches for improving the quality factor -Folded inductors - Modeling and design issues of planar inductors MEMS capacitors: MEMS gap-tuning capacitors - MEMS area-tuning capacitors - Dielectric tunable capacitors. UNIT 5 SWITCHES AND APPLICATIONS 12 Hrs. Switch parameters- Basics of switching - Mechanical switches-Electronic switches- - Mechanical RF switches - PIN diode RF switches- Electrostatic switching - Mercury contact switches -Magnetic switching- Electromagnetic switching - Thermal switching. Dynamics of the switch operation: -Switching time and dynamic response - Threshold voltage. MEMS switch design, modeling and evaluation.

Max. 60 Hours TEXT / REFERENCE BOOKS 1. Vijay K.Varadan, Vinoy.K.J and Jose.K.A, “RF MEMS and Their Applications”, 1st edition, John Wiley & Sons Ltd., 2003 2. Gabriel M. Rebeiz, “RF MEMS: Theory, Design, and Technology”, , Wiley, 2003. 3. Hector J. De Los Santos, “Introduction to Microelectromechanical Microwave Systems”, Second Edition. Hector J. De Los

Santos, Artech House, 2004. 4. Gardner.J.W , Varadan .V.K., Awadelkarim.O, “Microsensors, MEMS & Smart Devices”, John Wiley Sons, 2001. 5. Maluf.N, “An Introduction to Microelectromechanical Systems Engineering”, Artech House.


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SEC6541 LABVIEW PROGRAMMING LAB (For AE)

L T P Credits Total Marks 0 0 6 3 100

SUGGESTED LIST OF EXPERIMENTS: 1. Experiments using arrays 2. Experiments using loops 3. Experiments using arrays 4. Experiments using structures 5. Sub vi 6. Thermometer 7. Random number generation and matching 8. Formula node & expression node 9. Sampling, Aliasing and quantization 10. Signal Transformation 11. Filters 12. Signal Denoising 13. Image processing application 14. Automotive applications 15. Biomedical Imaging 16. Feature extraction

SEC6542 VLSI DESIGN LAB (For VLSI)


SUGGESTED LIST OF EXPERIMENTS 1. Physical Design of Combinational Circuits

i). Adders & Subtractors ii). Encoder, Decoder, Multiplexer, and De multiplexer iii). ALU and MAC unit iv). Multipliers and FSM

2. Physical Design of Sequential Circuits i). Latches and Flip-Flops (SR, D, T, JK) ii). Shift registers iii). Asynchronous & Synchronous Counters iv). Barrel Shifters

3. Physical Design of Architectures i). RISC CPU ii). DSP Processor CPU iii). MEMORIES

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SEC5119 REAL TIME OPERATING SYSTEMS

(For AE & EMB)


4 0 0 4 100

COURSE OBJECTIVES To introduce the student to the fundamental problems and approaches in the design and analysis of real-time

systems To learn the fundamental differences between OS and RTOS To develop skills necessary to develop software for embedded systems using a real-time operating system

UNIT 1 INTRODUCTION TO REAL TIME SYSTEMS 12 Hrs. Introduction to real time systems- Hard Versus Soft Real-time Systems- Structure of a Real Time System – Typical Real-time systems Applications- Task Specification in RT system -Task States-Approaches to Real-time Task Scheduling-Cyclic Scheduling - Priority-Driven Scheduling of Periodic Tasks (RMA-DMA-EDF)- Scheduling Aperiodic and Sporadic Jobs - Critical Section - Scheduling of Periodic Tasks with Resource Constraints-Shared Data problem

UNIT 2 GENERAL PURPOSE OS 12 Hrs. Operating system functions and services- architecture of Windows and Linux operating system-–System Calls and APIs- OS kernel – File System – Processes – Design and Implementation of processes – Communication between processes : Message passing , shared memory-Remote procedure call-Sockets-–Issues in distributed system

UNIT 3 REAL TIME KERNEL 12 Hrs. Difference between general purpose OS and RTOS- Real time kernel architecture-Polled loop-cyclic executive - Interrupt service routine-function queue scheduling- RTOS based system design- RTOS Porting to Target – Features of freeware and commercial real time operating systems: Vxworks, Micrium OS, RTLinux, FreeRTOS and C Executive

UNIT 4 MICRIUM-OS AND RT LINUX APIS 12 Hrs. Task Management– Inter task communication and Synchronization-semaphores-Mutex-Message queues– Mail box –Time Management-Event Management -Memory Management-Scheduling and Dispatching - POSIX Threads-Developing simple multitasking applications using ucos-II and RTLinux

UNIT 5 RTOS APPLICATION DOMAINS 12 Hrs. Case studies-RTOS for Image Processing – Embedded RTOS for Network communication –RTOS for fault tolerant Applications – RTOS for Control Systems

Max. 60 Hours TEXT / REFERENCE BOOKS 1. Jane W. S Liu, “ Real Time Systems” Pearson Higher Education ,3rd Edition, 2000. 2. Philip.A. Laplante, “Real Time System Design and Analysis”, Prentice Hall of India, 3rdEdition.2006 3. Raj Kamal, “Embedded Systems- Architecture, Programming and Design” Tata McGraw Hill, 2006. 4. Jean J. Labrosse, “ Micro C/OS-II : The real time kernel” 2nd Edition,CMP Books 5. Li Q, Yao C: Real-Time Concepts for Embedded Systems. CMP Books, 1st Edition, 2003. 6. Doug Abbott, “ Linux for Embedded and Real-time Applications”, Newnes,3rd Edition, 2006


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SEC5130 ADVANCED WIRELESS COMMUNICATIONS

(For AE & EMB)


4 0 0 4 100 COURSE OBJECTIVES To introduce the student to the most recent techniques in the broad field of Wireless Communication To learn an entire system as well as thesub-systems in wireless communication To equip the student with basic skills required to design such systems as well as to work for future wireless

systems UNIT 1 MULTIPATH FADING CHANNELS AND DIVERSITY 12 Hrs. Multipath Propagation-Fading-intersymbol Interference-Spectrum Limitations-Fast Fading Wireless Channel Modeling-Rayleigh and Ricean Fading Channels-BER Performance in Fading Channels - Frequency Selective and Frequency Nonselective Fading Channels - Examples of Multipath Fading Channels- Diversity modeling for Wireless Communications- BER Performance Improvement with diversity. UNIT 2 OFDM SYSTEM 12 Hrs. History of OFDM – Single carrier Vs Multi carrier transmission – Basic principles of OFDM – Block diagram of transmitter and receiver in OFDM system- Effect of multipath channel on OFDM symbols using without guard interval, cyclic prefix and zero padding – BER performance of OFDM scheme – Performance of Coded OFDM System - Synchronization for OFDM - Effect of CFO- Introduction to PAPR- PAPR Reduction Techniques. UNIT 3 MC-CDMA AND OFDMA SYSTEMS 12 Hrs. Introduction to MC-CDMA System – Block diagram of Transmitter and receiver of MC-CDMA -Bit Error Rate of MC-CDMA System- Variants Based on MC-CDMA Scheme. Introduction to OFDMA - Block diagram of OFDMA uplink and downlink transmission- Resource Allocation- MA Optimization- RA Optimization- Resource Allocation Algorithms - Scheduling- Quality of Service- Adaptive Modulation Algorithms for OFDMA-OFDMA based Mobile WiMax (IEEE 802.16e) System Applications. UNIT 4 MIMO AND LTE 12 Hrs. Introduction to MIMO– Channel Capacity and Information rates of noisy, AWGN and fading channels – Capacity of MIMO channels – MIMO for multi-carrier systems (MIMO-OFDM) - MIMO Diversity (Alamouti, OSTBC)-Motivation and Targets for LTE- Overview of LTE- LTE network architecture – LTE Advanced- Architecture of LTE Radio Protocol Stacks. UNIT 5 COGNITIVE RADIO AND ITS APPLICATIONS 12 Hrs. Introduction to Cognitive Radio-Motivation and Purpose – Spectrum Allocation in Cognitive Radio Networks - Cognitive Transceiver architecture- Radio Resource Allocation for Cognitive Radio - Spectrum Sensing – Spectrum Sharing – Spectrum Mobility – Spectrum Management – Regulatory issues – Implications of Cognitive radio network- Emerging Cognitive Radio Applications in Cellular Networks.

Max. 60 Hours TEXT / REFERENCE BOOKS 1. Andreas F. Molisch, Wireless Communications, 2nd Edition, John Wiley & Sons Ltd, 2011. 2. Yong Soo Cho, Jaekwon Kim, Won Young Yang and Chung G. Kang, MIMO-OFDM Wireless Communications with

MATLAB, John Wiley & Sons (Asia) Pte Ltd, 2010. 3. Shinsuke Hara and Ramjee Prasad, Multicarrier Techniques for 4G Mobile Communications, 2003 4. Harri Holma and Antti Toskala, LTE for UMTS –OFDMA and SC-FDMA Based Radio Access, John Wiley & Sons Ltd., 2009. 5. Tao Jiang, Lingyang Song and Van Zhang, Orthogonal Frequency Division Multiple Access Fundamentals and Applications,

Taylor and Francis Group, 2010. 6. Tolga M. Duman and Ali Ghrayeb, Coding for MIMO Communication Systems, John Wiley & Sons Ltd, 2007.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration : 3 Hrs. PART A : 5 Questions of 4 Marks each – No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 Marks 50 Marks

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SEC5207

ALGORITHMS AND ARCHITECTURE FOR SIGNAL PROCESSING ICs

(For VLSI, E&C, AE & CS)


4 0 0 4 100

COURSE OBJECTIVES To understand the basic building blocks of a digital signal processor To learn the different processors in Texas family To implement the basic algorithms in signal processing To understand the methods of interfacing the memory devices To learn the interfacing of DSP processors with serial ports

UNIT 1 ARCHITECTURES FOR DIGITAL SIGNAL-PROCESSORS 12 Hrs. Introduction, Basic Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Features for External Interfacing.

UNIT 2 PROGRAMMABLE DIGITAL SIGNAL PROCESSORS 12 Hrs. Introduction, Commercial digital Signal-processing Devices, Data Addressing Modes of TMS32OC54xx., Memory Space of TMS32OC54xx Processors, Program Control, Detail Study of TMS320C54X & 54xx Instructions and Programming, On-Chip peripherals, Interrupts of TMS32OC54XX Processors, Pipeline Operation of TMS32OC54xx Processor.

UNIT 3 IMPLEMENTATION OF BASIC DSP ALGORITHMS 12 Hrs. Introduction, The Q-notation, FIR Filters, IIR Filters, Interpolation and Decimation Filters (one example in each case). An FFT Algorithm for DFT Computation, Overflow and Scaling, Bit-Reversed Index Generation & Implementation on the TMS32OC54xx.

UNIT 4 INTERFACING MEMORY AND PARALLEL I/O PERIPHERALS TO DSP DEVICES 12 Hrs. Introduction, Memory Space Organization, External Bus Interfacing Signals. Memory Interface, Parallel I/O Interface, Programmed I/O, Interrupts and I / O Direct Memory Access (DMA).

UNIT 5 INTERFACING AND APPLICATIONS OF DSP PROCESSOR 12 Hrs. Introduction, Synchronous Serial Interface, A CODEC Interface Circuit. DSP Based Bio-telemetry Receiver, A Speech Processing System, An Image Processing System,Vetterbi Decoder, Nanospa architecture.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Avatar Singh and S. Srinivasan, Digital Signal Processing, Thomson Learning, 2004 2. Ifeachor E. C., Jervis B. W, Digital Signal Processing: A practical approach, Pearson-Education, PHI/ 2002 3. B Venkataramani and M Bhaskar Digital Signal Processors, TMH, 2002 4. Peter Pirsch, Architectures for Digital Signal Processin, John Weily, 2007


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SEC5601 ADVANCED CRYPTOGRAPHY

(For AE & CS)


4 0 0 4 100

COURSE OBJECTIVES To examine new developments in cryptography in a critical problem solving context To build the strategic knowledge of the current and proposed cryptographic systems To recognize the practical implications of new theoretical developments

UNIT 1 TRUST PROBLEMS & PROXY RE-CRYPTOGRAPHY 12 Hrs. Trusted domain transfer problems- Trusted server problems- Cipher access control problems- Efficiency problem in multi message cryptography- Proxy Re_cryptography- Proxy re_signature- properties and definitions-security model- The AH model- Multi use, private proxy and bidirectional scheme- Incompleteness of AH model- AH+ model- Proxy Re_Encryption- Properties & definitions- security models.

UNIT 2 BATCH CRYPTOGRAPHY 12 Hrs. Introduction- Aggregate Signature and batch verification- Definitions- Identity based aggregate signatures- Batch decryption and batch key agreement- Review of RSA- Batch RSA implementation- Examples based on plus type equations- Example based on minus type equations- Algorithm for solving plus type equations- Algorithm for solving minus type equations.

UNIT 3 ELLIPTIC CURVE CRYPTOGRAPHY (ECC) 12 Hrs. Elliptic curve systems- Groups- Generalized discrete logarithm problem- Elliptic curve groups- Elliptic curve encryption scheme- Significance of ECC- Elliptic curve arithmetic- Group law- addition –doubling- group law for E/K- group law for non super singular E/F2m- group law for super singular E/F2m- group order – group signature- domain parameters- key pairs- Signature schemes- ECDSA- EC KCDSA- Implementation issues of ECC.

UNIT 4 IDENTIFICATION PROTOCOLS & ZERO KNOWLEDGE PROOF 12 Hrs. Identification protocols- definitions- Password based schemes- One way hash chains- Basic challenge response protocol- Zero knowledge identification protocols- witness hiding identification protocol- Zero knowledge proof- Σ_protocols- composition of Σ protocol- Non interactive Σ proofs- Digital signature from Σ protocol- Proof of correctness- Group signatures.

UNIT 5 QUANTUM CRYPTOGRAPHY 12 Hrs. Fundamental definitions in quantum mechanics- Qubits and qubit pairs- Density matrices and quantum systems- entropies and coding- Particularity of quantum information- Quantum optics- crypto system based on quantum key distribution (QKD)- key distribution scheme- secret key encryption scheme- Combining quantum and classical cryptography- Implementation of QKD based cryptosystems.

Max. 60 Hours

TEXT / REFERENCES BOOKS 1. Zhenfu Cao, “ New directions of modern cryptography”, CRC press , 2012. 2. Darrel Hankerson, Alfred Menezes,Scott Vanstone, “Guide to Elliptic Curve Cryptography”, 2004 Springer-Verlag New York,

Inc. 3. Berry Schoenmakers, “Lecture Notes Cryptographic Protocols “,Version 1.0, February 3, 2014. 4. Gilles Van Assche,” Quantum cryptography and secret-key distillation”, Cambridge University Press 2006.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration : 3 Hrs. PART A : 5 Questions of 4 marks each-No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 marks 50 Marks

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SEC5602 APPLIED CRYPTOGRAPHY AND DATA

SECURITY (For AE, EMB, VLSI & CS)


4 0 0 4 100

COURSE OBJECTIVES To explain basic number theory concepts and algorithms related to cryptography To understand both the importance of cryptographic key management To provide a deeper understanding into cryptography, its application to network security, threats/vulnerabilities to

networks and countermeasures

UNIT 1 CRYPTOGRAPHY BASICS 12 Hrs. Terminologies of Cryptography; Principles of Security – Confidentiality, Authentication, Integrity, Non-repudiation, Access Control, Availability; Steganography. Steganalysis; Classic ciphers- Substitution ciphers- Caesar-Mono alphabetic, poly alphabetic, Hill , Vigenere, Playfair – Transposition ciphers- rail fence, One time pad; Types of Attacks – Cipher text-only-Known plaintext-Chosen plaintext- Chosen cipher text- Side channel attack; Protocols- secret splitting, Secret sharing, Time stamping services, subliminal channel, Digital signature, proxy signature, group signature, bit commitment.

UNIT 2 CRYPTOGRAPHIC ALGORITHMS & SYMMETRIC KEY CRYPTOGRAPHY 12 Hrs. Algorithm types and modes-Stream ciphers-Block ciphers-Modes of operation-ECB-CBC-CFB-OFB-Countermode-Over view of symmetric key cryptography-Fiestal structure-Data Encryption Standard (DES)- Blowfish- AES; Cryptanalysis of symmetric ciphers – Brute force attack-Differential cryptanalysis-Linear cryptanalysis.

UNIT 3 ASYMMETRIC / PUBLIC KEY CRYPTOGRAPYHY 12 Hrs. Number theory-Prime numbers-Fermat’s and Euler’s theorem – Testing for primality -The Chinese remainder theorem- Public key crypto systems- requirements – applications – The RSA algorithm- Key management – Diffie Hellman key exchange- Elliptic curve cryptography- EC group over real numbers- EC Addition of two points- doubling of point P- ECC key exchange.

UNIT 4 HASH FUNCTIONS AND DIGITAL SIGNATURE 12 Hrs. Message authentication- requirements – functions – codes – Hash functions, Hash algorithms- MD5 message digest algorithm – Secure Hash algorithm= MAC – HMAC, Digital signature- Digital Signature Standard – DSS Approach – Digital Signature algorithm- RSA for digital signature.

UNIT 5 DATA SECURITY & CASE STUDIES ON CRYPTOGRAPHY AND SECURITY 12 Hrs. Internet security protocols- basic concepts – Secure socket layer(SSL)- transport layer security(TLS) – Secure electronic transaction (SET)- SSL Versus SET- Email security – Bio metric authentication – Kerberos- Single sign on (SSO) approaches. Case studies on Denial of service attacks, IP spoofing attacks. Cookies and privacy.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Bruce Schneier, “Applied Cryptography”, 2nd Edition, John Wiley & Sons. 2. Atul Kahate, “Cryptography and Network Security”, 2nd Edition, Tata McGraw Hill, 2009. 3. William Stallings, “Cryptography and Network Security”, 3rd Edition, Pearson Education, 2003. 4. Douglas R Stinson, “Cryptography – Theory and Practice”, CRC press.


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SEC5603

DISTRIBUTED PROCESSING AND NETWORKING (For AE & CS)


4 0 0 4 100

COURSE OBJECTIVES To learn the fundamentals of distributed algorithms and systems To expose students to current technology used to build architectures to enhance distributed computing

infrastructures To understand details and functionality of distributed computing networks

UNIT 1 FUNDAMENTALS 12 Hrs. Evolution of Computing and Networking; Distributed Processing; Application Areas; Computing Systems; System models; Challenges with Distributed Systems; Distributed Computing Environment.

UNIT 2 DISTRIBUTED ALGORITHMS 12 Hrs. Kinds of Distributed Algorithm; Timing Models; Synchronous Network Algorithms: Synchronous Network Model, Leader Election in a synchronous Ring; Asynchronous Network Algorithms: Asynchronous Network Model, Basic Asynchronous Network Algorithms.

UNIT 3 DISTRIBUTED SYSTEMS 12 Hrs. Architecture; Models - Communication, Synchronization Mechanism. Case Study: MPI and PVM Distributed Shared Memory: Design and Implementation issues of DSM, Granularity, Structure of Shared memory Space, Consistency Models, replacement Strategy, Thrashing, Other Approaches to DSM, Advantages of DSM.

UNIT 4 DISTRIBUTED APPLICATIONS 12 Hrs. Client-Server Interaction: Client-Server Paradigm, Iterative vs. Concurrent Servers, Connectionless vs. Connection-Oriented Servers, The Socket API; RPC/RMI: Programming Clients and Servers, RPC/RMI Paradigm, External Data Representation, Communications Stubs.

UNIT 5 DISTRIBUTED COMPUTING NETWORKS 12 Hrs. Introduction; Changing Trends; Massively Parallel Processors; Networks of Workstations; Single Stage Interconnection Networks; Multistage Interconnection Networks; Cube, Mesh Shuffle Exchange; Pyramid, Butterfly Networks.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Brooke, Phillip J., Paige, Richard F., Practical Distributed Processing, Springer, 2008. 2. Geral Tel, Introduction to Distributed algorithms, 2nd Edition, Cambridge, 2004. 3. Andrew Tanenbaum and Maarten van Steen, Distributed Systems: Principles and Paradigms, Prentice Hall, 2007. 4. Joel M. Crichlow, An Introduction to Distributed and Parallel Computing, Prentice Hall of India, New Delhi, 1997. 5. Bhavana Nagendra, Survey on Distributed Computing Networks - Networks of Workstations.


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SEC5604 HIGH PERFORMANCE NETWORKS

(For AE & CS)


4 0 0 4 100

COURSE OBJECTIVES To develop a comprehensive understanding of high speed networks and multimedia networking To study the concepts of VPN and internetworking To learn to perform different operations in communication networks

UNIT 1 HIGH SPEED NETWORKS 12 Hrs. Frame Relay Networks – Asynchronous transfer mode – ATM Protocol Architecture, ATM logical Connection, ATM Cell – ATM Service Categories – AAL, High Speed LAN’s: Fast Ethernet, Gigabit Ethernet, Fibre Channel – Wireless LAN’s: applications, requirements – Architecture of 802.11.

UNIT 2 ISDN 12 Hrs. Overview of ISDN – user interface, architecture and standards, packet switched call over ISDN, B and D channels, Link access procedure (LAPD),ISDN layered architecture, signaling, limitations of Narrow band ISDN(N-ISDN) and evolution of Broadband ISDN(B- ISDN).

UNIT 3 MULTIMEDIA NETWORKING APPLICATIONS 12 Hrs. Streaming stored Audio and Video – Best effort service – protocols for real time interactive applications – Beyond best effort – scheduling and policing mechanism – integrated services – RSVP- differentiated services.

UNIT 4 ADVANCED NETWORKS CONCEPTS 12 Hrs. VPN-Remote-Access VPN, site-to-site VPN, Tunneling to PPP, Security in VPN, MPLS operation, Routing, Tunneling and use of FEC, Traffic Engineering, MPLS based VPN, overlay networks-P2P connections

UNIT 5 TRAFFIC MODELLING & INTERNETWORKING CONCEPTS 12 Hrs. Little’s theorem, Need for modeling, Poisson modeling and its failure, Non- Poisson models, Network performance evaluation, IPv6, Internet Multicast, Domain Name Services, Service Discovery.

Max. 60 Hours

TEXT / REFERENCES 1. J.F. Kurose & K.W. Ross, Computer Networking: A top down approach featuring the internet, 2nd edition, Pearson, 2003 2. Walrand .J. Varatya, High performance communication network, 2nd Edition,2000. Morgan Kauffman – Harcourt Asia Pvt.

Ltd. 3. Leom-Garcia, Widjaja, Communication networks, TMH seventh reprint 2002. 4. Aunurag kumar, D. MAnjunath, Joy kuri, Communication Networking, Morgan Kaufmann Publishers, 1ed 2004.

END SEMESTER EXAM QUESTION PAPER PATTERN Max Marks : 70 Exam Duration : 3 Hrs. PART A : 5 Questions of 4 marks each-No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 marks 50 Marks

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SEC5605 WIRELESS SENSOR NETWORKS

(For AE, EMB, VLSI & CS)


4 0 0 4 100

COURSE OBJECTIVES To understand the basic concepts about wireless sensor networks. To study the communication protocols, Addressing and synchronization To learn concepts of localization, data storage and tools used for simulation

UNIT 1 OVERVIEW OF WIRELESS SENSOR NETWORKS 12 Hrs. Characteristics of WSN, Challenges for Wireless Sensor Networks, Enabling Technologies For Wireless Sensor Networks, Single-Node Architecture - Hardware Components, Energy Consumption of Sensor Nodes , Operating Systems and Execution Environments, Network Architecture -Sensor Network Scenarios, Optimization Goals and Figures of Merit, Gateway Concepts.

UNIT 2 COMMUNICATION PROTOCOLS 12 Hrs. Physical Layer and Transceiver Design Considerations, MAC Protocols for Wireless Sensor Networks- contention-based protocols, schedule-based protocols- Link Layer protocols-Error control-ARQ techniques-FEC techniques-Framing-Link Management.

UNIT 3 ADDRESSING & SYNCHRONISATION 12 Hrs. Naming and addressing: Address and Name Management, Assignment of MAC Addresses- content- based Addressing -Geographic Addressing; Time synchronization: Sender/ receiver synchronization-receiver/ receiver synchronization.

UNIT 4 INFRASTRUCTURE ESTABLISHMENT 12 Hrs. Localization and Positioning- Localization -Ranging Techniques -Time of Arrival - Time Difference of Arrival - Angle of Arrival - Received Signal Strength - Range-Based Localization - Triangulation -Range-Free Localization - Ad Hoc Positioning System (APS). Topology Control-Controlling topology in flat networks-Hierarchical networks; Routing: Geographic routing-Data centric routing-Qos Based protocols.

UNIT 5 SENSOR NETWORK PLATFORMS AND TOOLS 12 Hrs. Deployment & Configuration - Sensor deployment, scheduling and coverage issues, self configuration-Congestion control- Security - Privacy issues - Attacks and countermeasures.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Holger Karl & Andreas Willig, Protocols and Architectures for Wireless Sensor Networks, John Wiley, 2005. 2. Kazem Sohraby, Daniel Minoli and Taieb Znati, Wireless Sensor Networks Technology- Protocols and Applications, John

Wiley & Sons, 2007. 3. C.S.Raghavendra Krishna, M.Sivalingam and Tarib znati, Wireless Sensor Networks, Springer, 2006. 4. I.F. Akyildiz, W. Su, Sankarasubramaniam, E. Cayirci, Wireless sensor networks, Elsevier, 2010. 5. Feng Zhao & Leonidas J. Guibas, Wireless Sensor Networks- An Information Processing Approach, Elsevier, 2007.


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SEC5606 INTELLIGENT COMPUTING TECHNIQUES

(For AE, EMB & VLSI)


4 0 0 4 100

COURSE OBJECTIVES To comprehend the concepts of biological neuron and the learning algorithms To study the various methodologies to train the multi-hop network and to acquire knowledge about SOM and

special networks To study the basic principles of fuzzy logic and fuzzy operators and to understand the concept of fuzzy logic

controller and its applications

UNIT 1 INTRODUCTION TO FUZZY LOGIC 12 Hrs. Classical set- operations and properties -Fuzzy Set-operations and properties-problems ,Classical Relations- Operations and Properties, Fuzzy Relations-Operations and Properties -Compositions-Max-min, Max-Product-Problems, Membership function-features of membership functions-types, α cuts, Linguistic Hedges.

UNIT 2 FUZZY LOGIC CONTROL SYSTEM 12 Hrs. FLCS- Fuzzy logic control system-Need for FLCS-Assumptions in FLC design. Fuzzification – Defuzzification. Fuzzy decision making, Fuzzy Rule Based System- Knowledge Base System. Mamdani and sugeno FLC architectures, Introduction to ANFIS-Architecture. Fuzzy cognitive maps. Applications - speed control of induction motor, automatic train control.

UNIT 3 FUNDAMENTALS OF ANN 12 Hrs. Fundamentals of ANN - - Features of ANN, Biological Neural Network – structure, Features ,Functions of Synaptic junction ,Comparison of BNN & ANN, Topology, Models of ANN - Mc Culloch – Pitts model, Adaline , Madaline. Basic learning laws, Activation Functions - Types , Learning strategy - Learning Rules, Perceptron Model– Training Algorithm –Limitation of single layer network, Multi Layer Perceptron n/w – Algorithm, Problems in perceptron N/W.

UNIT 4 MULTILAYER & ADAPTIVE ARCHITECTURES 12 Hrs. BPN-Algorithm, Application, CPN-Training, Applications, Mexican Hat, Kohonan SOM, vector quantization, - Associate memory - Bidirectional Associative Memory (BAM) - Architecture – Hopfield – Discrete & Continuous types, Algorithm-Energy function, Adaptive Resonance Theory - ART1,ART2- training. Probabilistic neural network, Applications - Fault diagnosis, Motion control in robotics. Pattern Recognition. UNIT 5 GENETIC ALGORITHMS 12 Hrs. Introduction – Robustness of Traditional Optimization and Search Techniques – The goals of optimization - Evolutionary computation Vs Classical optimization –Fitness function, Reproduction Selection - Selective pressure, Random selection, Proportional, Tournament, Rank based, Boltzmann, Elitism, Hall of Fame – Stopping conditions - Cross over –Binary & Floating point representation, Mutation - Binary & Floating point representation & headless chicken method.

Max. 60 Hours TEXT / REFERENCE BOOKS 1. James A Freeman and Davis Skapura, Neural Networks, Pearson. 2. Jacek M. Zuarda, Introduction to Artificial Neural Systems, Jaico Publishing House, 1997. 3. Timothy J. Ross, Fuzzy Logic with Engineering Applications, MacGraw-Hill. 4. Jang JSR, Sun CT, Mizutani E, Neuro-Fuzzy and Soft Computing, PHI. 5. Kosko, Neural Networks and Fuzzy Systems, Pearson. 6. David E. Goldberg, Genetic Algorithms in Search, Optimization and Machine Learning, Addison Wesley, 1997. 7. Andries p Engelbrecht, Computaional intelligence An Introduction – 2 edition. 8. Laurene Fausett, Fundamentals of Neural Networks: Architecture, Algorithms and Applications, Pearson Education, 1994 9. Yadaiah and S. Bapi Raju, Neural and Fuzzy Systems: Foundation, Architectures and Applications, Pearson Education. 10. C.Eliasmith and CH.Anderson, Neural Engineering, PHI. 11. Shivanandam and Deepa, Principles of Soft Computing, Wiley series. 12. Rajasekharan and Rai, Neural Networks, Fuzzy logic, Genetic algorithms: synthesis and applications,PHI Publication.

END SEMESTER EXAM QUESTION PAPER PATTERN Max Marks : 70 Exam Duration : 3 Hrs. PART A : 5 Questions of 4 marks each-No choice 20 Marks

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PART B : 2 Questions from each unit with internal choice, each carrying 10 marks 50 Marks

SEC5607

SOFTWARE TOOLS FOR TECHNICAL COMPUTING

(For AE, EMB & CS)


4 0 0 4 100

COURSE OBJECTIVES To introduce the MATLAB software for numerical computations To construct systems using Simulink To learn how to develop basic applications using LABVIEW

UNIT 1 INTRODUCTION TO MATLAB 12 Hrs. Matlab environment–types of files-constants and variables- Matrices and Vectors, matrix manipulations – Cell Array – Structure Array -Strings – function Script files - Input and Output statements – File input and output – Opening & Closing – Writing & Reading data from files.

UNIT 2 PROGRAMMING IN MATLAB 12 Hrs. Arithmetic, Relational and logical operators - Control statements IF, SWITCH CASE, BREAK, CONTINUE –FOR loop – While loop – Matlab Debugger – polynomials.

UNIT 3 PLOTTING AND SIMULINK 12 Hrs. Basic 2D plots – modifying line styles – markers and colors – grids – placing text on a plot – Various / SpecialMatLab 2D plot types – Semilogx – Semilogy – Log Log – Multiple Plots-Subplots- Simulink-Modelling,Simulating a Model, Data Import/Export, State Space Modeling, Creating Sub-Systems.

UNIT 4 INTRODUCTION TO LABVIEW 12 Hrs. Introduction to Virtual Instrumentation- advantages- architecture of a Virtual Instrument-block diagram- front panel-VIs, loading and saving Vis-debugging techniques- creating sub Vis- loops and Charts-arrays- clusters and graphs.

UNIT 5 STRUCTURES, GRAPHS, FILE I/O AND INSTRUMENT CONTROL 12 Hrs. Shift registers-Case structure- Sequence structures-Formula node- Expression node -Strings and file input output- Data acquisition inLabview-Iinstrument control in Labview.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Raj kumar Bansal, Ashok kumarGoel, Manojkumar Sharma, Matlab and its applications in engineering, Pearson Education,

1st Edition, 2009. 2. Stephen J.Chapmen, Matlab Programming for Engineers, Thomson learning, 4thEdition, 2008. 3. RudraPratap, Getting Started with MATLAB, Oxford University press, 2nd Edition, 1999. 4. Jeffrey Travis, Jim Kring, Labview for Everyone: Graphical Programming Made Easy and Fun, 3rd Edition, 2009. 5. www.mathworks.com 6. www.ni.com


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SEC5615

MULTIDIMENSIONAL IMAGE PROCESSING

(For AE)


4 0 0 4 100

COURSE OBJECTIVES To comprehend the concepts of digital image processing To acquire knowledge about image prepocessing To study the various 2D transforms and their applications to image processing To study the various techniques involved in tomographic imaging and to understand the concept of 3D

visualization

UNIT 1 DIGITAL IMAGE FUNDAMENTALS 12 Hrs. Elements of Visual Perception; Image Sensing and Acquisition; Image Sampling and Quantization; Basic Relationships between Pixels; Monochromatic Vision Models; Colour Vision Models; Colour Fundamentals; Colour Models; Conversion of Colour Models; Colour Transformations.

UNIT 2 IMAGE PREPROCESSING 12 Hrs. Introduction; Point Processing – Image Negatives, Log transformations, Power Law Transformations, Piecewise-Linear Transformation Functions; Arithmetic/Logic Operations – Image Subtraction, Image Averaging; Histogram Processing – Histogram Equalization, Histogram Matching.

UNIT 3 2D TRANSFORMS 12 Hrs. 2D ORTHOGONAL, 2D UNITARY TRANSFORM,INTRODUCTION TO 2D Discrete Fourier Transform , Discrete Cosine Transform, Discrete Sine Transform, Welsh- Hadamard Transform, Haar Transform, Slant Transform, Singular Value Decomposition, ,Karhunen-Loeve Transforms.

UNIT 4 TOMOGRAPHIC IMAGING 12 Hrs. More than two dimensions, Volume imaging vs. sections, Basics of reconstruction, Algebraic reconstruction methods, Maximum entropy , Defects in reconstructed images, Beam hardening, Imaging geometries, Three-dimensional tomography, High-resolution tomography.

UNIT 5 3D VISUALIZATION 12 Hrs. Sources of 3D data,Serial sections,Optical sectioning, Sequential removal, Stereo measurement, 3D data sets, Slicing the data set, Arbitrary section planes, Volumetric display ,Stereo viewing ,Special display hardware, Ray tracing Reflection , Surfaces, Multiply connected surfaces, Image processing in 3D, Measurements on 3D images.

Max. 60 Hours

TEXST / REFERENCE BOOKS 1. Rafael C. Gonzalez, Richard E. Woods, Digital Image Processing, 2nd Edition, Pearson Education, Inc., 2004. 2. John C. Russ,The IMAGE PROCESSING, Handbook, Sixth Edition,CRC Press. 3. Anil K. Jain, Fundamentals of Digital Image Processing, PHI Learning Private Limited, New Delhi, 2002. 4. William K. Pratt, Digital Image Processing, 3rd Edition, John Wiley & Sons, Inc., 2001. 5. Rafeal C.Gonzalez, Richard E.Woods and Steven L. Eddins Digital Image Processing using Matlab, Pearson Education, Inc.,

2004. 6. Bernd Jähne, Digital Image Processing, 5th Revised and Extended Edition, Springer, 2002.


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SEC5620 REAL TIME EMBEDDED SYSTEM DESIGN

(For VLSI & AE)


4 0 0 4 100

COURSE OBJECTIVES To acquire knowledge on various real time embedded systems and validates the performance of each system. To develop an embedded system for specific applications

UNIT 1 INTRODUCTION TO EMBEDDED COMPUTING 12 Hrs. Complex systems and microprocessors – Design example: Model train controller –Embedded system design process – Formalism for system design – Instruction sets Preliminaries – ARM Processor – CPU: Programming input and output – Supervisor mode, exception and traps – Coprocessor – Memory system mechanism – CPU performance – CPU power consumption- CPU buses – Memory devices – I/O devices

UNIT 2 SYSTEM MODELLING WITH HARDWARE/SOFTWARE PARTITIONING 12 Hrs. Embedded systems, Hardware/Software Co-Design, Co-Design for System Specification and modelling- Single-processor Architectures &,Multi-Processor Architectures, comparison of Co-Design Approaches, Models of Computation, Requirements for Embedded System Specification, Hardware/Software Partitioning Problem, Hardware/Software Cost Estimation ,Generation of Partitioning by Graphical modelling, Formulation of the HW/SW scheduling, Optimization.

UNIT 3 MEMORY AND INTERFACING 12 Hrs. Memory: Memory write ability and storage performance – Memory types – composing memory –Advance RAM interfacing communication basic – Microprocessor interfacing I/O addressing –Interrupts – Direct memory access – Arbitration multilevel bus architecture – Serial protocol –Parallel protocols – Wireless protocols – Digital camera example.

UNIT 4 OPERATING SYSTEMS AND HARDWARE NETWORKS 12 Hrs. Multiple tasks and multi processes – Processes – Context Switching – Operating Systems –Scheduling policies - Multiprocessor – Inter Process Communication mechanisms – Evaluating operating system performance – Power optimization strategies for processes. Distributed Embedded Architecture –Networks for Embedded Systems – Network based design – Internet enabled systems.

UNIT 5 CONCURRENT PROCESS MODELS AND HARDWARE SOFTWARECO-DESIGN 12 Hrs. Modes of operation – Finite state machines – Models – HCFSL and state charts language –state machine models – Concurrent process model – Concurrent process – Communication among process –Synchronization among process – Implementation – Data Flow model. Design technology – Automation synthesis – Hardware software co-simulation – IP cores – Design Process Model.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Wayne Wolf, Computers as Components - Principles of Embedded Computer System Design, Morgan Kaufmann Publisher,

2006. 2. David E-Simon,An Embedded Software Primer, Pearson Education, 2007. 3. K.V.K.K.Prasad, Embedded Real-Time Systems: Concepts, Design & Programming, Dreamtech press, 2005. 4. Tim Wilmshurst, An Introduction to the Design of Small Scale Embedded Systems,Pal grave Publisher, 2004. 5. Raj Kamal, Embedded Systems- Architecture, Programming and Design, Tata McGraw Hill, 2006. 6. Frank Vahid and Tony Gwargie,Embedded System Design, John Wiley & sons, 2002. 7. Steve Heath, Embedded System Design, Elsevier, Second Edition, 2004. 8. Ralf Niemann, Hardware/Software Co-Design for Data Flow Dominated Embedded Systems, Kluwer Academic Pub, 1998. 9. Tammy Noergaard, “Embedded Systems Architecture”, Elsevier, 2006.


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SEC5625 LOW POWER VLSI DESIGN

(For VLSI, AE & CS)


4 0 0 4 100

COURSE OBJECTIVES This course will focus on sources of power dissipation, types of analysis, Low power VLSI design Techniques and

methodologies

UNIT 1 INTRODUCTION TO LOW POWER VLSI DESIGN 12 Hrs. Introduction- Need for Low power VLSI design– Charging and Discharging Capacitance- Short circuit current in CMOS– CMOS leakage current- Static current- Principles of Low power design- Low power figure of Merits.

UNIT 2 POWER ANALYSIS METHODS 12 Hrs. Simulation power analysis- SPICE circuit analysis- Discrete Transistor Modeling and analysis - Gate Level Logic simulation - Architecture level analysis - Data Correlation analysis in DSP systems - Monte Carlo Simulation – Random Logic signal- Probability Power analysis techniques- Signal entropy.

UNIT 3 GATING AND ENCODING TECHNIQUES 12 Hrs. Transistor and gate sizing-Network Restructuring and Reorganization- special latches and Flip flops-Low power digital cell library - Gate Reorganization- Signal Gating –Logic Encoding -State Machine encoding- Precomputation Logic.

UNIT 4 SPECIAL TECHNIQUES 12 Hrs. Special Techniques- Power reduction in clock networks- CMOS floating node -Low power Bus -Delay Balancing- Low power techniques for SRAM- Architecture and system- Power and performance management -Switching activity reduction -Parallel Architecture –Flow graph transformation.

UNIT 5 ADVANCED TECHNIQUES 12 Hrs. Advanced techniques- Adiabatic Computation- Pass transistor Logic synthesis -Asynchronous circuits – Software Design for Low power- Sources of software power dissipation- Software power optimization.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Gary Yeap "Practical Low Power Digital VLSI design", Kluwer Academic Publishers - 1998 Edition 2. Sharat Prasad and Koushik Roy "Low power CMOS VLSI Circuit design”, John Wiley Publications", 2000 Edition 3. Kiat Seng Yeo &Kaushik Roy “Low voltage, Low power VLSI subsystems”, McGraw-Hill 2009. 4. Meloberti Franco “Analog design for CMOS VLSI systems“, Kluwer Academic Publishers-2001 5. Abdellatif Bellaouar “Low-Power Digital VLSI Design: Circuits and Systems”, kluwer Academic Publishers - 1995 6. Saraju P. Mohanty- Nagarajan Ranganathan, Elias Kougianos, Priyardarsan Patra “Low-Power High-Level Synthesis for Nanoscale CMOS Circuits”, Springer-2008.


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SEC5629 ASIC DESIGN (For VLSI & AE)


4 0 0 4 100

COURSE OBJECTIVES To understand the basic concepts of ASIC design flow To acquire the knowledge about memory architectures and back end of VLSI design To learn the fundamentals and recent advancements of SOC and NOC

UNIT 1 INTRODUCTION TO ASICS, CMOS LOGIC AND ASIC LIBRARY DESIGN 12 Hrs. Types of ASICs - Design Flow - CMOS transistors, CMOS design rules - Combinational Logic Cell – Sequential logic cell - Data path logic cell - transistors as resistors - transistor parasitic capacitance - Logical effort - Library cell design - Library architecture.

UNIT 2 PROGRAMMABLE LOGIC CELLS AND I/O CELLS 12 Hrs. Anti fuse – static RAM – EPROM and EEPROM technology – PREP bench marks – Actel ACT – Xilinx LCA –Altera FLEX – Altera MAX DC & AC inputs and outputs – Clock and power inputs – Xilinx I/O blocks-Actel ACT – Xilinx LCA – Xilinx EPLD – Altera MAX 5000 and 7000 – Altera MAX 9000 Altera FLEX.

UNIT 3 FLOOR PLANNING, PLACEMENT AND ROUTING 12 Hrs. System partition - FPGA partitioning - partitioning methods - floor planning - placement - physical design flow -global routing - detailed routing - special routing - circuit extraction - DRC.

UNIT 4 SOC FUNDAMENTALS, SOFTWARE AND ENERGY MANAGEMENT 12 Hrs. Essential issues of SoC design – A SoC for Digital still camera – multimedia IP development: Image and video Codecs.SoC embedded software – energy management techniques for SoC design.

UNIT 5 NOC DESIGN 12 Hrs. Practical Design of NoC, NoC Topology-Analysis Methodology, Energy Exploration, NoC Protocol Design, Low-Power Design for NoC: Low-Power Signaling, On-Chip Serialization, Low-Power Clocking, Low-Power Channel Coding, Low-Power Switch, Low-Power Network on Chip Protocol.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. M.J.S. SMITH, “Application Specific Integrated Circuits”, Addison Wesley Longman Inc., 1997. 2. Youn-Long, Steve Lin, “Essential Issues of SoC Design: Designing Complex Systems- On- Chip”, Springer, 2006. 3. Wolf Wayne, “FPGA Based System Design”, Pearson Education India, 2004. 4. Axel Jantsch, Hannu Tenhunen, “Network on chips”, Kluwer Academic Publishers, 2003. 5. Hoi-jun yoo, Kangmin Lee, Jun Kyoung Kim, “Low power NoC for high performance SoC desing”, CRC press, 2008. 6. Vijay K. Madisetti Chonlameth Arpikanondt, “A Platform-Centric Approach to System- on- Chip (SOC) Design”, Springer,

2005.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration: 3 Hrs. PART A : 5 Questions of 4 marks each-No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 marks 50 Marks

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SEC5632

ELECTROMAGNETIC INTERFERENCE & COMPATIBILITY (For AE, EMB, CS)


4 0 0 4 100

COURSE OBJECTIVES To provide an understanding of Electromagnetic Interference (EMI)/Electromagnetic Compatibility (EMC)

methodology and concepts Become familiar with specifications, standards and measurements of EMI Learn EMI filter design and other mitigating solutions Understand circuit board layout and mechanical packaging considerations for EMI/EMC compliant designs

UNIT 1 EMI ENVIRONMENT 12 Hrs. Introduction to EMI/EMC-Basics of electro Magnetic interference (EMI) Fundamentals of electromagnetic compatibility (EMC)-Radiation hazards Transients and other EMI sources Electrostatics discharge (ESD) Phenomena and effects, Transient phenomena and suppression -Tempest- Lightning.

UNIT 2 EMI COUPLING 12 Hrs. EMI coupling modes - CM and DM -EMI from apparatus and circuits: Introduction-Electromagnetic emission-Appliances-noise from relays and switches-nonlinearities in circuits-Passive inter modulation-Cross talk in transmission lines - Transmission in power supply lines-Electromagnetic interference.

UNIT 3 EMI SPECIFICATION/STANDARDS AND MEASUREMENTS 12 Hrs. Units of specification - civilian standards and military standards. Basics of EMI measurements-EMI measurement tools-TEM cell-measurement using TEM cell-Reverberating chamber-GTEM cell-Anechoic chamber-Open area test site-RF absorbers-conducted interference measurements-conducted EMI from equipments-Experimental setup for measuring conducted EMI-Measurement of DM interferences.

UNIT 4 EMI CONTROL TECHNIQUE 12 Hrs. Shielding technique-Filter techniques-Grounding techniques-Bonding techniques-Cable connectors and components-Isolation transformer-Transient suppressor- EMI gasket- Opto-Isolator.

UNIT 5: EMC DESIGN OF PCB 12 Hrs. Designing for EMC:Introduction-Different techniques involved in designing for EMC-EMC guide lines for PCB designs-EMC design guide line for audio and control circuit design, RF design, power supply design-Mother board designs and propagation delay- Trace routing, Impedance control, decoupling, Zoning and grounding.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Bernhard Keiser, “Principles of Electromagnetic Compatibility”, Artech House, 3rd Edition 1987. 2. Henry W.Ott, “Noise Reduction Techniques in Electronics Systems”, John Wiley and Sons. New York, 1976. 3. DonWhite, “Consultant incorporate-Handbook of EMI/EMC”, Vol 1, 1985. 4. Clayton R. Pau, “Introduction to EMC”, Wiley & Sons, 2006. 5. Sathyamurthy.S, “Basics of Electro Magnetic Compatibility”, Society of EMC Engineerirs (India), 2003. 6. Kodali.V.P., “Engineering EMC Principles, Measurements and Technologies”, IEEE Press, 2001.

END SEMESTER EXAM QUESTION PAPER PATTERN Max Marks : 70 Exam Duration: 3 Hrs. PART A : 5 Questions of 4 marks each-No choice 20 Marks PART B : 2 Questions from each unit with internal choice, each carrying 10 marks 50 Marks

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SEC5633 EMBEDDED CONTROL SYSTEMS

(For AE, EMB, E&C, PEID & PSE)


4 0 0 4 100

COURSE OBJECTIVES To learn the fundamental principles of various peripherals and its operation To learn the principles of DAC and ADC conversions To discuss about the operation of Asynchronous serial communication To apply the basic concept of control system in real time embedded application

UNIT 1 INTRODUCTION 12 Hrs. Nonlinear controller elements - Controller implementation and testing in Embedded Systems. Controlling the hardware with software – Data lines – Address lines - Ports – Schematic representation – Bit masking – Programmable peripheral interface – Switch input detection – 74 LS 244.

UNIT 2 INPUT-OUTPUT DEVICES 12 Hrs. Keyboard basics – Keyboard scanning algorithm – Multiplexed LED displays – Character LCD modules – LCD module display – Configuration – Time-of-day clock – Timer manager - Interrupts - Interrupt service routines – IRQ - ISR - Interrupt vector or dispatch table multiple-point - Interrupt-driven pulse width modulation.

UNIT 3 D/A AND A/D CONVERSION 12 Hrs. R 2R ladder - Resistor network analysis - Port offsets - Triangle waves analog vs. digital values - ADC0809 –Auto port detect - Recording and playing back voice - Capturing analog information in the timer interrupt service routine - Automatic, multiple channel analog to digital data acquisition.

UNIT 4 ASYNCHRONOUS SERIAL COMMUNICATION 12 Hrs. Asynchronous serial communication – RS-232 – RS-485 – Sending and receiving data – Serial ports on PC –Low-level PC serial I/O module - Buffered serial I/O.

UNIT 5 CASE STUDIES: EMBEDDED C PROGRAMMING 12 Hrs. Multiple closure problems – Basic outputs with PPI – Controlling motors – Bi-directional control of motors – H bridge – Telephonic systems – Stepper control – Inventory control systems- Burger alarms- Fire alarms.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Jean J. Labrosse, “Embedded Systems Building Blocks: Complete and Ready-To-Use Modules in C”, CMP, 2nd Edition,

2009. 2. Jim Ledin, “Embedded control systems in C/C++”, CMP Books, 3. Ball S.R., “Embedded microprocessor Systems – Real World Design”, Prentice Hall, 2nd Edition, 1996. 4. Herma K, “Real Time Systems – Design for distributed Embedded Applications”, Kluwer Academic, 1st Edition, 1997. 5. Daniel W. Lewis, “Fundamentals of Embedded Software where C and Assembly meet”, Prentice Hall of India, 2nd Edition,

2002. 6. Ben-Zion Sandler, “Robotics”, Elsevier Publications, 1999


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SEC5666

MODELING & SIMULATION OF COMMUNICATION NETWORK

(For AE & CS)


4 0 0 4 100

COURSE OBJECTIVES To understand the behaviour of the system and identify the aspects To know both analytical methods and simulation techniques (Monte Carlo Techniques) applied in performance

modeling of communication systems and networks

UNIT 1 SIMULATION METHODOLOGY 12 Hrs. Introduction, Aspects of methodology, Performance Estimation, Simulation sampling frequency, Low pass equivalent simulation models for bandpass signals, Multicarrier signals, Non-linear and time-varying systems, Post processing – Basic graphical techniques and estimations.

UNIT 2 RANDOM SIGNAL GENERATION & PROCESSING 12 Hrs. Uniform random number generation, mapping uniform random variables to an arbitrary pdf, Correlated and Uncorrelated Gaussian random number generation, PN sequence generation, Random signal processing, testing of random number generators.

UNIT 3 MONTE CARLO SIMULATION 12 Hrs. Fundamental concepts, Application to communication systems, Monte Carlo integration, Semianalytic techniques, Case study: Performance estimation of a wireless system.

UNIT 4 ADVANCED MODELS & SIMULATION TECHNIQUES 12 Hrs. Modeling and simulation of non-linearities: Types, Memoryless non-linearities, Non-linearities with memory, Modeling and simulation of Time varying systems : Random process models, Tapped delay line model, Modelling aand simulation of waveform channels, Discrete memoryless channel models, Markov model for discrete channels with memory, Tail extrapolation, pdf estimators, Importance sampling methods.

UNIT 5 NETWORK AND TRAFFIC MODELLING 12 Hrs. Queuing theory related to network modeling, Poissonian and NonPoissonian modeling of network traffic; Specific Examples.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. William.H.Tranter, K. Sam Shanmugam, Theodore. S. Rappaport, Kurt L. Kosbar, Principles of Communication Systems

Simulation, Pearson Education (Singapore) Pvt. Ltd,2004. 2. M.C. Jeruchim, P.Balaban and K. Sam Shanmugam, Simulation of Communication Systems: Modeling, Methodology and

Techniques, Plenum Press, New York, 2001. 3. Averill.M.Law and W. David Kelton, Simulation Modeling and Analysis, McGeaw Hill Inc., 2000. 4. Geoffrey Gorden, System Simulation, Prentice Hall of India, 2nd Edition, 1992. 5. Jerry Banks and John S. Carson, Discrete Event System Simulation, Prentice Hall of India, 1984.

END SEMESTER EXAM QUESTION PAPER PATTERN Max Marks : 70 Exam Duration : 3 Hrs. PART A : 5 Questions of 4 marks each-No choice 20 marks PART B : 2 Questions from each unit with internal choice, each carrying 10 marks 50 marks

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SEC5667 TIME FREQUENCY ANALYSIS

(For AE & CS)


4 0 0 4 100

COURSE OBJECTIVES To provide fundamental concepts of time-frequency analysis techniques converging to the subject of wavelet

transforms To understand multiresolution analysis To Appreciate the important features of wavelets, and perform simple analyses and computations

UNIT 1 INTRODUCTION 12 Hrs. Review of Fourier Transform, Parseval’s Theorem and need for joint time-frequency Analysis, Concept of non-stationary signals, Short-time Fourier transform (STFT), Uncertainty Principle, Localization/Isolation in time and frequency, Hilbert Spaces, Banach Spaces, Fundamentals of Hilbert Transform.

UNIT 2 BASES FOR TIME-FREQUENCY ANALYSIS 12 Hrs. Wavelet Bases and filter Banks, Tilings of Wavelet Packet and Local Cosine Bases, Wavelet Transform, Real Wavelets, Analytic Wavelets, Discrete Wavelets, Instantaneous frequency, Quadratic time-frequency energy, Wavelet Frames, Dyadic wavelet Transform, Construction of Haar and Roof scaling function using dilation equation and graphical method.

UNIT 3 MULTIRESOLUTION ANALYSIS 12 Hrs Haar Multiresolution Analysis, MRA Axioms, Spanning Linear Subspaces, nested subspaces, Orthogonal Wavelets Bases, Scaling Functions, Conjugate Mirror Filters, Haar 2-band filter Banks, Study of upsamplers and downsamplers, Conditions for alias cancellation and perfect reconstruction, Discrete wavelet transform and relationship with filter Banks, Frequency analysis of Haar 2-band filter banks, scaling and wavelet dilation equations in time and frequency domains, case study of decomposition and reconstruction of given signal using orthogonal framework of Haar 2-band filter bank.

UNIT 4 WAVELETS 12 Hrs. Daubechies Wavelet Bases, Daubechies compactly supported family of wavelets, Daubechies filter coefficient calculations, Case study of Daub-4 filter design, Connection between Haar and Daub-4, Concept of Regularity, Vanishing moments. Other classes of wavelets like Shannon, Meyer, Battle-Lamarie.

UNIT 5 BI-ORTHOGONAL WAVELETS AND APPLICATIONS 12 Hrs. Construction and design. Case study of bi-orthogonal 5/3 tap design and its use in JPEG 2000. Wavelet Packet Trees, Time-frequency localization, compactly supported wavelet packets, case study of Walsh wavelet packet bases generated using Haar conjugate mirror filters till depth level 3. Lifting schemes for generating orthogonal bases of second- generation wavelets.

Max. 60 Hours

TEXT / REFERENCES 1. S. Mallat, A Wavelet Tour of Signal Processing, Academic Press, Second Edition, 1999. 2. L. Cohen, “Time-frequency

analysis”, Prentice Hall, 1995. 2. G. Strang and T. Q. Nguyen, Wavelets and Filter Banks, Wellesley-Cambridge Press, Revised Edition, 1998. 3. Daubechies, "Ten Lectures on Wavelets", SIAM, 1992. 3. P. P. Vaidyanathan, Multirate Systems and Filter Banks, Prentice

Hall, 1993. 4. M. Vetterli and J. Kovacevic, Wavelets and Subband Coding, Prentice Hall, 1995


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SIC5603 ADVANCED DIGITAL CONTROL SYSTEM (Common to E&C, Applied Electronics)


COURSE OBJECTIVES To impart knowledge on various types of controllers. To provide advanced understanding of adaptive principles. To understand the basic digital control systems and their relationship to continuous systems. To understand of controller design methods based on z-plane.

UNIT 1 PRINCIPLES OF CONTROLLERS 12 Hrs. Review of frequency and time response analysis and specification of control system, need for controller, continuous time compensation, continuous time PI, PD, PID controllers, Digital PID Controllers - Sampling and holding – Sample and hold devices – D/A and A/D conversion – observability.

UNIT 2 DESIGN USING TRANSFORM AND STATE SPACE TECHNIQUES 12 Hrs. Reconstruction – Z transform – Inverse Z transform – Properties – Pulse transfer function and state variable approach – Review of controllability, Methods of discretisation – Comparison – Direct design – Frequency response methods – State space design – Pole assignment – Optimal control – State estimation in the presence of noise – Effect of delays.

UNIT 3 COMPUTER BASED CONTROL 12 Hrs. Selection of processors – Mechanization of control algorithms – PID control laws -Predictor merits and demerits – Application to temperature control – Control of electric drives – Data communication for control.

UNIT 4 PRACTICAL ASPECTS OF DIGITAL CONTROL ALGORITHMS 12 Hrs. Algorithm development of PID control algorithms-Software implementation- Implementation using microprocessors and microcontrollers-Finite word length effects-, Choice of data acquisition systems- Microcontroller based temperature control systems-Microcontroller based motor speed control systems.

UNIT 5 QUANTIZATION EFFECTS AND SAMPLE RATE SELECTION 12 Hrs. Analysis of round off error – Parameter round off – Limit cycles and dither – Sampling theorem limit – Time response and smoothness – Sensitivity to parameter variations – Measurement noise and antialising filter – Multirate sampling.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Ogata.K (1987)- Discrete time control systems PHI. 2. Gopal.M., “Digital control Engineering “, Wiley Eastern Ltd.,1989. 3. Franklin G.F. David Powell.J Michael Workman, “Digital control of Dynamic Systems”, 3rd Edition, Addison Wesley, 2000. 4. Paul Katz, “Digital control using Microprocessors”, Prentice Hall International, 1982. 5. Forsytheand.W.Goodall.R.N., “Digital Control”, McMillan,1991. 6. Chesmond, Wilson, Lepla, “Advanced Control System Technology”, Viva – low price edition, 1998.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration : 3 Hrs. PART A : 5 questions of 4 marks each – No choice 20 Marks PART B : 2 questions from each unit of internal choice, each carrying 10 marks 50 Marks

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SIC5608 ADVANCED ROBOTICS AND AUTOMATION (Common to E&C, Applied Electronics)


COURSE OBJECTIVES To understand robot programming languages. To introduce robot arm kinematics To understand the concept of material transfer & machine loading / unloading To educate robotic assembly automation and inspection automation.

UNIT 1 INTRODUCTION 12 Hrs. Geometric configuration of robots - manipulators - drive systems - internal and external sensors - end effectors - control systems - robot programming languages and applications - Introduction to robotic vision.

UNIT 2 ROBOT ARM KINEMATICS 12 Hrs. Direct and Inverse Kinematics - rotation matrices - composite rotation matrices - Euler angle representation - homogeneous transformation - Denavit Hattenberg representation and various arm configurations.

UNIT 3 ROBOT ARM DYNAMICS 12 Hrs. Lagrange - Euler formulation, joint velocities - kinetic energy - potential energy and motion equations - generalized D’Alembert equations of motion.

UNIT 4 ROBOT APPLICATONS 12 Hrs. Material Transfer & Machine Loading / Unloading General Consideration in robot material handling transfer applications – Machine loading and unloading. Processing Operations Spot welding – Continuous arc welding - spray coating – other processing operations using robots.

UNIT 5 ASSEMBLY AND INSPECTION 12 Hrs. Assembly and robotic assembly automation – Parts presentation methods – assembly operation – Compliance and the Remote Center Compliance(RCC) device – Assembly system Configurations – Adaptable, Programmable assembly system – Designing for robotic assembly – Inspection automation.

Max. 60 Hours

TEXT / REFERENCE BOOKS 1. Fu,Gonazlez K.S, and Lee, C.S.G. “Robotics” (Control, Sensing, Vision and Intelligence),McGraw Hill, 1968(II printing). 2. Wesley E Snyder R, ‘Industrial Robots, Computer Interfacing and Control’, Prentice Hall International Edition, 1988. 3. Asada and Slotine, “Robot analysis and Control”, John Wiley and sons, 1986. 4. Philippe Coiffet, “Robot technology” Vol.II (Modelling and control), Prentice Hall INC., 1983. 5. Groover M.P.Mitchell Weiss “Industrial Robotics Technology Programming and Applications”, Tata McGraw Hill, 1986.

END SEMESTER EXAM QUESTION PAPER PATTERN Max. Marks : 70 Exam Duration : 3 Hrs. PART A : 5 questions of 4 marks each – No choice 20 Marks PART B : 2 questions from each unit of internal choice, each carrying 10 marks 50 Marks

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Documents

PROGRAMME : M.E - PART TIME APPLIED ELECTRONICS · PDF file... PART TIME APPLIED ELECTRONICS CURRICULUM ... Weste and K.Eshragian, “Principles of CMOS VLSI Design”, 2nd Edition,