Principles of Semiconductor Devices-L37a

8/8/2019 Principles of Semiconductor Devices-L37a

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Topic Map

signal

SignalDiode

Schottky

BJT/HBT

MOS

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Outline

1. Flat band voltage

2. Threshold voltage shift due to trapped charges

3. Physics of interface traps20 ( )= ox

D Gch

th I V

LV

C

.

( )= + M M F IT sQ Q QV V ,ox xox oC C C

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REF. C apter 18, SDF


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(1) Idealized MOS Capacitor

Vacuum level

Substrate (p)ys

i

mEC

EVF

,( )= i ox G th idealQ C V V

semiconductormetal insulator,= Bth ideal s

QV

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2=s F ox


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Potential, Field, Charges

V

s

ix

m

E x

Vbi=0 x

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Real MOS Capacitor with M < S

EVACNote the difference

M = q m SS

q S > 0 ECEC

EF

EF

EV

V

6Do we need to apply less or more V G to invert the channel ?


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Physical Interpretation of Flatband Voltage

0FB ms biV V = =

+


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How to Calculate Builtin or Flat band Voltage

Vacuum level

s

= =

bi g p

FB MS

s M

qV qV bi

m EC

EVF

( )i ox G thQ C V V =

ere ore,

2 = Bth F FB

QV V

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ox


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Measure of Flat band shift from CV Characteristics

C/C

VGea th

Actual V

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Outline

. v

2. VTshift due to trapped charges

3. Physics of interface traps

4. Conclusion

,

( )= + M M F IT sth th ideal MSQ Q

V V Q

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ox ox ox


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(2) Idealized MOS Capacitor

Vacuum level

siSubstrate (p)y

mEC

x = 0

EVF

,( )= i ox G th idealQ C V V

Recall that Q o

semiconductormetal insulator, = Bth ideal s

QV

C

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s F


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Distributed Trapped charge in the Oxide

O x

EC0

( )O X

M ox xQ dx = EF 0

( ) ox x

x dx x

0 x

0

0

00 ( )

=

ox M

M x x

x x dx

= F M Q Q

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th So

M x oxC C


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An Intuitive View Reduced gate charge

Bulk charge

E

E

0Interface charge

0

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Gate Voltage and Oxide Charge

G ox sV V = +

2

2

( ) = =ox o x x od V d dx d

x x

E 0 0( ) ( ') ' x x oxox

x dxd

= E

E

ox

0

'( ) ( ) ( ')ox x

ox xdV dx x x = = E E 0ox x x

0 0 '( ') x x

S ox dx x E

0

0 000

( )( )=

ox Sox ox x

x

S ox dx x x xx

E 0

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00 oxox


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Gate Voltage and Oxide Charge

0

0

0

0

0

( )( )

x

Sox S

ox

x

o

o x x dxV x

x

x

= E

0 x 0

0 0( () )1= ox

x

SS x x x dx x

E

( 2 )= = + th s F ox

V V

0 0oox x

0 00 0

(1

( 2 ) )) (= = + S os F xSox o

x x x dxC x

x

E

0

,0 0

( )1= o x

th idealox

xV x dxC x x

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,= M th idealox

M V

C


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Interpretation for Bulk Charge

ox

0

1,0 0

( ) ( )1=

x

th th idealo

oxV V x x x dx xC x

1,

0

1( )= th id o

M eal

Q x xV x C VG

Ideal VT

New VT

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Interpretation for Interface Charge

C/C

0

*

0 0

( ) ( )1

ox o

x

th tho

V V x dxC x

x x x = * F

tho

V C Q= V GIdeal V

T

New VT

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Time dependent shift of Trapped Charge

C/C

E

0

, 10 0

1( ) ( ( ))=

x

th th ideal oxox

V V xQ x x x t dxC x

1,

0

( ) ( )= oxth idealox

x t Q xV x C V G

Ideal VT

18

Sodium related bias temperature instability (BTI) issue


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Bias Temperature Instability (Experiment)

M O S M O S

+++

++

+++++

+++

++

+++++

() biases

(+) biases

i o n

i o n

0.1x ox x

0.9x o

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0 xo 0 xo

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Principles of Semiconductor Devices-L37a