Presentation on ADS Solutions for Signal Integrityliterature.cdn.keysight.com/litweb/pdf/5989-9587EN.pdf · CONVOLUTION SIMULATION DESIGN OF EXPERIMENT ... • Flowchart of the tool

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Presentation on ADS Solutions for Signal Integrity

3DEM, Simulation and Measurement Advances for 2006

Expands SI HorizonsPage 1

“Expands SI Horizon”Signal Integrity Simulations Using Advanced Design System

Overview - ADS Solutions for Signal Integrity

Overview - ADS Solutions for Signal Integrity



YEAR

TECH

NOLO

GY

YIELD OPTIMIZATION

PARAMETERIZED EM MODELS

1980

1990

2006

DISCRETE VALUE OPTIMIZATION

TRANSIENT CONVOLUTION SIMULATION

DESIGN OF EXPERIMENT

YIELD NALYSIS

2.5D EM ADAPTIVE POLYGONAL MESHINGHIGH-FREQUENCY SPICE

FULL-WAVE 2D EM ANALYSIS

PC-BASED LINEAR SIMULATOR

LAYOUT DRIVEN SIMULATION

25 Years of Technological Innovation 25 Years of Technological Innovation

EEsof Touchstone & Libra, Academy, Series IV

Advanced Design System & RFDE

MDS

OPTIMIZATION FROM LAYOUT

DSP / ANALOGCO-SIMULATION

FAST 2.5D EM SIMULATOR

SMART SIMULATION

WIZARD

ELECTRONIC LAB NOTEBOOK

FULL-WAVE 3D EM ANALYSIS

PHYSICAL CONNECTIVITY

ENGINE

AUTOMATED FINITE METAL THICKNESS

LINUX SUPPORT

We combine proven technology with new innovations, a flexible, open, and proven architecture.

MULTI-LAYER INTERCONNECT

MODELS

Patent Pending Convolution Technology

Verilog-A

MATLAB Co-simulation in ADS



Typical SI Problem ( Ensuring Signal Quality and Timing)

Pattern Generator

Pre-emphasis/Driver

Encoder

DecoderReceiver

Equalizer

Physical ChannelBoard Traces 2” (51mm) – 10” (254mm)

Card

CardPackage

Die

Package

Die Driver

Receiver

CardHigh speed Connectors

Backplane Traces 10” (254mm) –40” (1016mm)

Physical ChannelChannel Adaptation

Signal Recovery

IBIS or Spice model

IBIS or Spice model



ADS Ptolemy for Serial Link Analysis

February, 2007Page 4

Serial Link Analysis - Simulation Challenges

S-parameter channel simulation with non-linear driver/receiver modelsSimulating SERDES models in a link containing analog non-linear and linear components Post-processing waveform for BER and Jitter measurementsValidation with measured data



ADS supports all implementation domains (IC, Module, Board)ADS can analyze the full digital channel – data in to data outIntegrated data models and simulation technology

High Speed Digital Channel DesignExpands SI Horizon - Simulates Complete Channel

Driver BoardPackage Backplane BoardEncoder, Serializer

Decoder, De-serializerPackage Receiver

ADS ADS



Combining Simulation Technologies for a Successful Design

FrequencyDomain

TimeDomain

NumericDomain

ElectromagneticDomain

• S-Parameter• AC-Simulation• Harmonic Balance

HDL

• Convolution• High Frequency SPICE

• Circuit Envelope• Verilog-A

• Matlab• HDL, C++, System-C• Agilent Ptolemy

• Method of Moment• Finite Element Analysis• Finite Difference Time Domain



Seamless Integration of simulation technologiesADS - Signal Integrity Simulation

ADS DSP Simulator(Agilent Ptolemy)

ADS Analog Simulators( Time, Frequency and Envelope)

ADS EM Simulators( MOM, FEM, FDTD)

FIR, DFE, MATLAB, System-C, C++, HDL, …

Interconnect Models, Driver Models

Physical Models

Seamless integration of simulation technologies

Accurately simulates SERDES models in a link containing analog non-linear and linear components including S-parameters



Enhanced Signal Integrity Simulation Capability ADS 2006 Update 1

Faster Transient Simulation

Advanced Convolution

IBIS I/O Models

Broadband SPICE Model Generator

Improved Design Flow Integration

Superior Via Modeling Capability



Faster Transient Simulation

In ADS 2006A, High-Frequency SPICE is 10% to 40% faster. Update 1 adds another 10% improvement due to:

– Algorithmic improvements– Device optimization– Code optimization Transient Speed-up

0.500.600.700.800.901.001.101.201.301.401.50

0 10 20 30 40 50 60

Spe

ed-u

p

Circuit #



Convolution Technology AdvancesNew engine for robust handling of S-parameter data in the time-domain, employing:

• Breakthrough technology accurately finds the causal time-domain response from the original S-Parameters

Low impedance power/ground plane (mOhms) into a 50-Ohm reference impedance

Result: Correct time-domain response

•Optional passivity detection and correction – prevents Teravolt outputs that could solve the world’s energy problems ☺New Update 1 Engine

Reference Results

2006A EngineReference Results

Typical SPICE simulators don’t do this very well:

high-speed digital board designers need this!



IBIS Simulation in ADS

• Native IBIS Models in ADS in 2006 Update 1Fast, robust and convenient to use



IBIS DeviceFunctionality – Driver Schedule

• New capability supports driver schedule• Combines several IBIS models to simulate multi-stage drivers • Provides modeling capabilities for pre-emphasis or de-emphasis

buffers• Vt table supported for complex terminations



Design Flow Integration with Other EDA Tools

Allegro ®

ADS/MomentumBBSPICE

HSPICE/PSPICE

Allegro® import

Broadband SPICE

Import critical nets from Allegro environment to ADS for Momentum

simulation

Export Momentum results to HSPICE

Links ADS and Momentum to external tools

® ®



Allegro Design Flow Integration - ADS

Allegro PCB Design Environment Advanced Design System design and simulation environment



New E4687 Broadband SPICE Model Generator

Input File Format

• ADS dataset• Citifile format• Touchstone file format• Momentum RAT

Output Netlist Format

• ADS• SPICE2• SPICE3

Fast and efficient way to convert S-parameter models to their SPICE equivalent



Broadband SPICE Model Generator• S-parameter data of passive components → equivalent circuit models.

• Flowchart of the tool

A rational fit is performed on the input S-parametersThe fitting procedure is based on the vector fitting algorithm The passivity enforcement step modifies the residues of the model in order to obtain a passive model.



slot

stripvia

mesh density = 50, 80, 100, 120, 150

Electromagnetic SimulationPhysical simulation of interconnects using• Method of Moments• Finite Element Analysis

Superior via hole modeling technology in ADS2006 update release



Meeting our Promise…

To provide you with the best high frequency time-domain design technology

– Powerful convolution technology ensuring causality and passivity of frequency domain models

– Industry best broadband SPICE model generator– Native IBIS models in ADS (new IBIS interface, faster, and

robust models)– Allegro layout integration– Transient Speed improvement by 30% ( already delivered in

ADS2006A)– Improved via modeling

All these new features are shipping with ADS2006 Update 1 22 February, 2007



ADS2006 Update 2

• Encrypted HSPICE simulation in ADS environment

• New digital source in ADS

• Jitter analysis in ADS using Agilent’s patented technology

• EMDS for ADS – 3D EM (FEM) in ADS

• Link level components– FFE– DFE– Encoders/Decoders ( 8B10B, 64B66B..)

Shipment Late May 2007



Encrypted HSPICE Simulation in ADS Environment

Step I : Import the encrypted HSPICE sub-circuit definition into ADS. From the ADS main window menu, choose File->ImportFrom the Import dialog box, click on the “More Options” button to specify the netlist import

options.Using the “Import Netlist Options” dialog box, specify:

“HSPICE” for the “Input Netlist Dialect”“ADS Schematic” for the “Translated Output Format”




Select HSPICE netlist on the “Import” dialog boxThis will create and open an ADS design with interfacing pins and an “HSPICE_INCLUDE” component. The HSPICE_INCLUDE component instructs the simulator to treat this sub-circuit as an encrypted sub-circuit



Step II : Build your circuit using the imported encrypted HSPICE. Note that the name of this sub-circuit will be the same name as the encrypted HSPICE netlist file.For the transient controller use the HS_Tran controller. Note that this is different than the regular ADS transient controller.




FeaturesFive distinct modes of supplying digital data

Maximal length LFSRUser defined LFSRExplicit bit sequenceFile based bit sequenceExternal trigger mode

Familiar waveform description parametersThree distinct types of transition edge shapingFive built-in transition duration standardsDifferential voltage outputDifferential external trigger (if needed)Choice of %- or dB-based de-emphasis for equalizationSupport for pre-emphasis over fractional bit periods Random jitter behavior on demandUp to three distinct sources of periodic jitter on demandThree choices of period jitter waveforms

Digital Source in ADS 2006 Update 2



Total Jitter = Random Jitter + Σi=1,2,3 Periodic Jitter [i]




Mode = Maximal Length LFSR, RegisterLength = 4 Mode = Explicit Bit Sequence, BitSequence =“101100”15-bit sequence Mode = Bit File, BitFile = “data/prbs.txt”

Mode = External Trigger, VtriggerThreshold = 0.7 V

Mode = User Defined LFSR, Taps = “1010”, Seed = “1010”7-bit sequence, with initial settling time




Vlow, Vhigh

DeEmphasisMode, DeEmphasisPreEmphasisSpan = 1.0

DeEmphasisMode= %, DeEmphasis=30PreEmphasisSpan




BitRate, FallTime

BitRate, RiseTime

TransitionStd

1/BitRate = BitInterval




Signal Integrity Roadmap – Short termProvide powerful jitter generation and analysis capability in ADS

• Accurately predict bathtub/BER performance

• Separate out jitter components

0.2 0.4 0.6 0.80.0 1.0

1E-21

1E-11

1E-1

1E-31

4E-1

UI

BER

m1Data and Modeled Bathtub Curve

m1UI=BTMdl=5.030E-5

0.027

0.2 0.4 0.6 0.80.0 1.0

-10

-8

-6

-4

-2

-12

0

UI

Q(x)

Q-Scale Bathtub Plot

-1.0E-11-8.0E-12-6.0E-12-4.0E-12-2.0E-120.02.0E-124.0E-126.0E-128.0E-12

-1.2E-11

1.0E-11

100

200

300

400

0

500

indep(TJHist)

TJHi

st

-8.0E-12-6.0E-12-4.0E-12-2.0E-120.02.0E-124.0E-126.0E-128.0E-12

-1.0E-11

1.0E-11

20406080

100

0

120

indep(RJPJHist)

RJPJ

Hist

-4E-13

-2E-13

0 2E-13

4E-13

-6E-13

6E-13

0.2

0.4

0.6

0.8

0.0

1.0

indep(DDJHist)

DDJH

ist

indep(DDJFHist)

DDJF

Hist

indep(DDJRHist)DD

JRHi

st

DDJ Composite Histogram

-1.0E-11-8.0E-12-6.0E-12-4.0E-12-2.0E-120.02.0E-124.0E-126.0E-128.0E-12

-1.2E-11

1.0E-11

100

200

300

400

0

500

indep(TJHist)

TJHi

st

indep(RJPJHist)

RJPJ

Hist

indep(DDJHist)

DDJH

ist

Composite Histogram



Comparison of ADS Simulation vs. EZJit+

-4 -2 0 2 4 6-6 8

5.0E3

1.0E4

0.0

1.5E4

Time, psec

TJHi

st

TJ Histogram

-2 0 2 4 6-4 8

50100150200250

0

300

Time, psec

RJPJ

Hist

RJPJ Histogram

-400 -200 0 200 400 600-600 800

1

2

0

3

Time, fsecDD

JHist

DDJF

Hist

DDJR

Hist

Composite DDJ Histogram

-4 -2 0 2 4 6-6 8

5.0E3

1.0E4

0.0

1.5E4

Time, psec

RJPJ

Hist

TJHi

stDD

JHist

Composite Histogram



-4 -2 0 2 4 6 8-6 10

5.0E3

1.0E4

0.0

1.5E4

Time, psec

TJHi

st

TJ Histogram

-4 -2 0 2 4 6-6 8

50100150200250

0

300

Time, psec

RJPJ

Hist

RJPJ Histogram

-400 -200 0 200 400-600 600

0.5

1.0

1.5

0.0

2.0

Time, fsec

DDJH

istDD

JFHi

stDD

JRHi

st

Composite DDJ Histogram

-4 -2 0 2 4 6 8-6 10

5.0E3

1.0E4

0.0

1.5E4

Time, psec

RJPJ

Hist

TJHi

stDD

JHist

Composite Histogram

Comparison of ADS Simulation With EZJit+



“A nice complementary full 3D EM simulator to Momentum in ADS at half of the price!”EMDS for ADS Key Features:• Use directly from ADS Layout• New, user-friendly 3D pre-viewer • Parameterized EM components for

circuit co-simulation/co-optimization• Include simulation of bond wires &

dielectric bricks (finite dielectrics)• Momentum-like usage and flow• View currents, EM fields & radiation• View results with ADS powerful data

display• Includes 64-bit simulation capability• Multi-mode impedance & propagation

constants overcomes single mode modeling limitation



• Q & A • Demo• Q & A • Demo



Today’s Highlight

• Accurate Transient Simulation at Gigabit/s Data Rate Demonstrate breakthrough convolution simulation technology with real world example

• System Level Simulation and Verification Using ADS Discuss the serial link simulation flow in ADS and validate simulation flow by comparing with measured data

• Designing a Transparent Via Demonstrate a simple yet robust methodology to evaluate design tradeoff for a transparent via

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© Agilent Technologies, Inc. 2008

For more information about Agilent EEsof EDA, visit:

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Printed in USA, May 26, 2007 5989-9587EN

Documents

Presentation on ADS Solutions for Signal Integrityliterature.cdn.keysight.com/litweb/pdf/5989-9587EN.pdf · CONVOLUTION SIMULATION DESIGN OF EXPERIMENT ... • Flowchart of the tool