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Power Factor Correction Input
Circuit
Kevin Wong, Paul Glaze,
Ethan Hotchkiss, Jethro Baliao
Advisor: Prof. Ali Bazzi
Sponsored by: Lenze Americas
3/7/2017
1Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Outline
▪ Background
▪ Power Factor (PF)
▪ Power Factor Correction (PFC)
▪ Block Diagram
▪ Specifications
▪ Approach
▪ DC/DC Design Topologies
▪ Pros/Cons
▪ Design simulations
▪ Workbench
▪ First Prototype
▪ PCB Design
▪ Testing Results
▪ Timeline moving forward
2Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
▪ True PF: the product of displacement and distortion power factor.
3Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
What is Power Factor?
▪ Distortion PF: the deviation of
the current waveform from a
sinusoid.
▪ Displacement PF: the ratio
of real and apparent power
▪ Our goal is to make the current waveform match
the shape and phase angle of the voltage.
Block Diagram
4Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Specifications
• Input Requirements• Voltage Input: 90Vac-132Vac
• Power Factor: >0.95
• Frequency: 48-62Hz
• Inrush Current: <40A
• Output Requirements• Voltage Output: 325Vdc
• Max Continuous Power: 1472W
• Voltage Ripple: 20Vpk-pk
• System Requirements• Operating Temperature: -10 to 55 °C
• Switching Frequency: >20KHz
5Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
6Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Possible DC/DC Topologies
▪ Boost
▪ Flyback
▪ SEPIC
▪ Buck Boost
DC/DC Converter Pros & Cons
7
Topologies Pros/Cons
Factors Boost Buck-Boost Flyback SEPIC
Simplicity 1st 4th 2nd 3rd
Size 1st 2nd 3rd 4th
Cost 1st 4th 2nd 3rd
Power Level 1st 3rd 4th 2nd
Voltage Regulation 4th 2nd 3rd 1st
Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Boost Converter Diagram
8Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Ideal Boost Waveforms
9Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Control Options
10
Infineon ICE3PCS01G
● Existing control chip
● Greater stability
● Lower production costs
DSP
● Adjustability
● Expansion
● No reliance on a 3rd
party chip
Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Workbench
11Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
First Prototype
12Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Schematic
13Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
PCB Design
14Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Testing Results
• First tested at 130 Vac input with the physical prototype
• Current Sense Resistors failed from the inrush
• Infineon Chip, MOSFET, and Pre-Charge Circuit Failed
• As a result:
• Rebuilt with a better MOSFET, 700V 46A and manual
control of precharge.
• Tested with a DC input in an Open Loop Circuit
• With an input voltage from 5V to 75V
• Thermals were significantly better with the replacement
MOSFET
• Unfortunately, MOSFET failed as well reaching a 75V DC input
due to improper gate driving.
15Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Testing Results
• Rebuilt again with 650V IGBT and observed current waveforms
closely. Found issues with the inductor current waveform.
16Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
• After replacing the inductor, the waveforms and results are
much better.
• We suspect that this high current may have been an influence
on the conditions that lead to previous failures
IGBT Testing Results
17
IGBT Test Waveform
Vin=130VDC • D=0.5 • Fsw=40kHz • Vout=257V
ΔVout = 16V • ILavg=5.4A • ΔILripple=5.6Apk-pk
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IGBT Testing Results
• After MOSFET Shorted,
tested with an IGBT
• Inductor saturation
current was probably the
cause for our MOSFETS
shorting
• IGBT proved successful at
various DC voltages from
30V-130V using a 100ohm
Load
• The efficiency was very
consistent
• Thermals were not much
of an issue
19Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
What’s next?
• Full Power Tests in DC before AC tests
• AC input tests
• Contact Lenze to have new VFD shipped with inputs
for 325VDC
• Completion of PCB design and Order placed
• Have complete working design at Full Power by
early April
20Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Spring Timeline
21Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Resources
•H. Wei, and I. Batarseh. (1998) “Comparison of Basic Converter Topologies For
Power Factor Correction.” [September 20, 2016]
•J.W. Kolar and T. Friedli. “The Essence of Three-Phase PFC Rectifier Systems-Part
I.” IEEE Transactions on Power Electronics, Vol. 28, No.1,pp176-198, [ September 20,
2016].
• J. Betten. (2011, Q2) “Benefits of a coupled-inductor SEPIC converter” Analog
Applications Journal [Online] Available: http://www.ti.com/lit/an/slyt411/slyt411.pdf
[October 14 2016].
• G. Sharp. “Sepic Converter Design and Operation.” BS, WPI, Worcester, MA, 2014.
• ST. “TM sepic converter in PFC pre-regulator.” Internet:
http://www.st.com/content/ccc/resource/technical/document/application_note/48/9d/
34/73/b9/27/48/65/CD00134778.pdf/files/CD00134778.pdf/jcr:content/translations/en.C
D00134778.pdf, March 2007[October 10, 2016].
• "The Flyback Converter," in University of Colorado. [Online]. Available:
http://ecee.colorado.edu/~ecen4517/materials/flyback.pdf. [Oct. 27, 2016].
•De Nardo et al, “Power Stage Design of Fourth-Order DC-DC Converters by Means
of Principal Components Analysis.”IEEE Transactions on power Electronics, Vol. 23
No. 6,pp2867-2877
22Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
23
Questions?
Additional information can be found on
our website:
http://ecesd.engr.uconn.edu/ecesd1703/
Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
MOSFET Testing Results
24Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
MOSFET Testing Results
• Testing at various duty
cycles and frequencies with
a 100ohm load we
concluded:
• As frequency increases
the input current
decreases
• At 60kHz the efficiency
peaks
• Decreasing gate voltage
decreased the current
• Lower Duty Cycles
exhibited greater
efficiency
25Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Active vs Passive Rectification
Active:
Pros:
• Lower voltage drop
• Bi-directional current
• Higher efficiency
Cons:
• Requires control
• More expensive
• More complex
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Passive:
Pros:
• No external control
• Simple
• Inexpensive
Cons:
• Uni-directional current
• Higher voltage drop
• Lower efficiency
Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Semiconductor Options
27
MOSFET
● Voltage Rating: <1kV
● Current Rating: <200A
● Faster switching
● Less expensive
IGBT
● Voltage Rating: >1kv
● Current Rating: >500A
● Slower switching
● More expensive
Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)
Which methods fit our needs?
DC/DC Converter Topology• We presented the pros and cons of each topology
along with preliminary simulations to Lenze on
Monday and they have decided that they want us to
move forward with the boost converter.
Active vs. Passive Rectification• Lenze has also stated that they would like us to
start with passive rectification in order to simplify
the design.
28Copyright © 2016 – Advanced Power Electronics & Electric Drives Lab (APEDL)