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Non-volatile Memories and Their Space Applications
A. S. Gerardin, M. Bagatin, A. Paccagnella
DEI - University of PadovaReliability and Radiation Effects on Advanced
CMOS Technologies Group
SERESSA 2015
S. Gerardin, SERESSA 2015 2
Outline
IntroductionOverview Storage mechanisms Array organization and peripheral circuitry Commercial and space market
Details and radiation effects Charge-based Cells
• Floating Gate devices• Radiation effects on FG cells• Radiation effects on peripheral circuits
Phase change memories
Conclusions
S. Gerardin, SERESSA 2015 3
Non-volatile Memories
A memory which retains information when powered off
Key metrics Speed, density, power (cost) Retention: amount of time a memory is able to retain
information (e.g., 10 years) Endurance: maximum number of program/erase (read)
cycles which can be performed on a memory (e.g., 105
cycles)Erase An erase operation may be needed before program
S. Gerardin, SERESSA 2015 4
Non-volatile Storage Concepts
What physical quantity can be used to store information in a non-volatile way? Charge
• use a potential well to store charge• floating gate, nanocrystals, charge trap (SONOS, TANOS, NROM)
Phase • use materials which may be switched from amorphous to
crystalline and vice versa• phase-change memories (PCM), calchogenide RAM (C-RAM)
Dielectric Polarization• use materials that retain their polarization (ferroelectric)• Ferroelectric RAM (FeRAM)
Magnetization• use materials that retain their magnetization (ferromagnetic)• Magnetic RAM (MRAM)
Other concepts: • Nanotube RAM (NRAM), Resistive RAM (RRAM), Conductive-
bridging RAM (CBRAM), Millipede
S. Gerardin, SERESSA 2015 5
Array Architecture
Depending on the type of cell, different architectures are possible/needed: Selection device for each cell
• PCM, FeRAM, MRAM, … Flash arrays for charge-based cells
• NOR: cells in parallel• NAND: strings of memory cells (in series), two
selection devices for each string of 16/32 cells Crosspoint (no selection devices)
• Memory elements at the intersection between bitlines and wordlines, no selection devices!
• Ideal, best density, but parasitics…
S. Gerardin, SERESSA 2015 6
Peripheral Circuitry
Row and Column Decoders: block/page/cell selection
Microcontroller/State machine: executes complex program and erase algorithms
Charge pumps: provide high voltages/currents needed in some memories (e.g., floating gates)
Buffers: always, but may have different sizes
CellArray
Decoders
Charge PumpsBuffers
C
S. Gerardin, SERESSA 2015 7
Radiation Effects
Mix of elements determines radiation sensitivity Storage mechanism Architecture Peripheral circuits elements
Rules of thumb Cells may be hard, but periphery may be soft Charge based cells more sensitive When high voltages are needed for program/erase (or
even read) operations, radiation sensitivity gets worse
S. Gerardin, SERESSA 2015 8
NAND FLASH Scaling Trends
S. Gerardin, SERESSA 2015 9
Mainstream Market
0
5
10
15
20
25
30
1985 1990 1995 2000 2005 2010
Year
Tota
l Sal
es (B
$)
0.001
0.01
0.1
1
10
100
Tota
l Vol
ume
(Eb)
B$ Eb
S. Gerardin, SERESSA 2015 10
Mainstream Market Large (ever-increasing) capacity now 128 Gbit at 16 nm, larger than SDRAM, and pushing
Moore’s law, ahead of microprocessors; 3-D chips (V-NAND) Non-volatile’s are a growing share of the semiconductor
memory market (Digital cameras, MP3 Players, …) So far dominated by Flash Floating Gate (FG)
technology How long will survive FG/Charge-based beyond 20nm? Radiation Sensitivity Low (100 krad or less, SEFI, SEU, SEL) because of cells (FG)
and peripheral circuitry (all) Possible replacements (short/medium term?) Phase change memories (good for radiation) for the NOR
architecture
S. Gerardin, SERESSA 2015 11
Rad-hard Memories
Small capacity Few Mbits, typically <64 Mbit
Technologies Charge Trap/SONOS devices Magnetic RAM (MRAM) Phase Change/Chalcogenide RAM (C-RAM) Ferroelectric (FeRAM)
Radiation Hardness ~ Mrad Robust cells (intrinsically or because of large feature size) Rad-hard peripheral circuitry
Future Nanotube-based memories? …
S. Gerardin, SERESSA 2015 12
Space Applications
For space storage applications, flash NVMs feature: the highest available storage density substantial
savings in mass and volume occupancy when in idle state, they may be kept unbiased without
losing data energy saving In case of device functional interrupts, power cycling can
be used to restore the correct functionality without any data loss
Yet, NVMs suffer, in comparison with SDRAM, of: moderate data transfer rate program/erase only at page/block level limited endurance (105 cycles)
S. Gerardin, SERESSA 2015 13
Space Applications/2
Flash NVMs are not ideal for the workspace memories: They cannot grant fast random access to small data entries
Instead, NVMs are the right choice for mass storage applications: mass memories typically buffer data entities of many kbytes
without any need for data modification the frequency of write accesses to the same storage location is
often rather low, less than 10 write accesses/day less than 3.6 ∙ 104 operations within 10 years (i.e., less than 60 % of the endurance window)
wear-out issues can be mitigated by more storage capacity. Further, wear leveling distributes the storage locations rather uniformly over the address space, with integrated bad block management
S. Gerardin, SERESSA 2015 14
Charge-based Cells
Storage concept: Inject or remove charge between the control gate and the channel, for instance in a floating gate
Charge storage element: floating polysilicon gate (FG), charge-trap layer, nanocrystals
Source/Drain
Charge-storageelement
Control Gate
TunnelOxide
BlockingDielectric
- - - - -
S. Gerardin, SERESSA 2015 15
Charge-based Cells
Floating Gate
Control Gate
DrainSource
Control Gate
Interpoly
DrainSource
Control Gate
DrainSource
Floating Gate
Control Gatedielectric
Tunnel
oxide
CHARGE STORAGEELEMENT
S. Gerardin, SERESSA 2015 16
Charge-based Cells: Vth
The presence of electrons/holes in the charge-storage element alters the device threshold voltage
Read: sense the drain current at a proper gate bias and compare it with a reference currentD
rain
Cur
rent
[A]
Gate voltage [V]
With negative charge in the
storage element
Programmed
Positive or no charge in the
storage element
Erased
VthVread
Q+ Vth Q- Vth
S. Gerardin, SERESSA 2015 17
FG: History
History 1967: first proposal of Floating Gate memory (Kahng & Sze) 1971: Electrical Programmable Read Only Memory (EPROM) is
invented, after investigations of faulty MOSFET where the gate connection had broken (Frohman)
1978: Electrically Erasable ROM (E2PROM) is introduced (Perlegos) 1985: First attempts to build a NOR Flash memory Mid 1990s: NAND Flash enjoys commercial success 2003: NAND Flash overcomes NOR in terms of volumes
State-of-the-art NAND: 16-nm 128 Gbit NOR: 45-nm 8 Gbit multi-level
Future Replacements are needed because development of FG cells is
rapidly approaching scaling limits, but some countermeasures are already in place: 3-D NAND memories!
S. Gerardin, SERESSA 2015 18
FG: Coupling
Floating Gate (FG) potential is the key Coupling with the other
terminals FG device equations
can be obtained by substituting gate voltage with floating gate voltage in standard MOSFET’s equations
Important differences Drain turn-on No saturation with VD
occurs
Vth = - QFG/CPP
VFG = G(VG-Vth) + DVD + …G=CPP/(CPP+CD+…)x are coupling coefficients
- - - - -CPP
CS CD
CB
CP
Source Drain
other cells
Control gate
S. Gerardin, SERESSA 2015 19
FG: Band Diagram
Erased Programmed
-----
Ideal energy band diagram
Cell structure
Control gate
Floatinggate
TunnelOxide
~10 nm
BlockingONO
- -
Source
Drain
S. Gerardin, SERESSA 2015 20
Injection/Removal Mechanisms
Channel hot electrons (holes) Carriers are heated in the channel and acquire enough
energy to surmount the potential barrier Efficiency is low, a lot of drain current for a just a few
injected carriersFowler-Nordheim tunneling Quantum-mechanical tunneling. The carriers do not have
the energy classically needed to overtake the potential barrier
Slower than CHE/CHH (UV exposure)High voltages are required charge pumps are needed to generate high voltages for
single supply operation
S. Gerardin, SERESSA 2015 21
Threshold Voltage Distributions
Especially with large arrays, the statistical distributions of parameters are extremely important
Cel
l Dis
tribu
tion
[log#
]
Read voltage“1” “0”
Vth [V]
Ideal distributions
S. Gerardin, SERESSA 2015 22
Threshold Voltage Distributions
Especially with large arrays, the statistical distributions of parameters are extremely important
Vth distributions are typically gaussian
Tightening program/erase algorithms are used
Behavior of tail bitsmay be dominant
Distributions are not visible to the end-user, only digital values
Cel
l Dis
tribu
tion
[log#
]
Read voltage
“1”“0”
Programverify
Erase verify
Vth [V]
Actual distributions
S. Gerardin, SERESSA 2015 23
FG: Multiple Bits per Cell
More than one bit per cell can be stored, by modulating the amount of charge injected in the floating gate
Rely on tight statistical control of Vth distribution More complex (and slower) program algorithms Increased density, lower cost but poorer performance and
reliabilty
Cel
l Dis
tribu
tion
[log#
] “11”“00”
Vth
“10” “01”
L0 L1 L2 L3
S. Gerardin, SERESSA 2015 24
Array Architecture
Electrically Programmable ROM (EPROM) Erasable through UV exposure
Electrically Erasable and Programmable ROM (E2PROM ) Erasable at the single cell level Requires a selection device for each cell density
penaltyFlash arrays Erasable in blocks No/few selection devices Higher density Combine the best of EPROM (density) and EEPROM
(usability)
S. Gerardin, SERESSA 2015 25
NOR
NOR Cells in parallel, bit size ~
10 F2 (F=Feature size)Performance Fast random access ~100
ns Word program ~ 5s Block (Mb) erase ~200 ms
Applications Read-mostly memory Code storage
Bit Lines (BL)
Wor
d Li
nes
(WL)
Sour
ce li
nes
S. Gerardin, SERESSA 2015 26
NOR Operation
Program Channel hot electrons WL high & BL high & SL
GND High programming HC
current low parallelism
~9V
~5V
0V
S. Gerardin, SERESSA 2015 27
NOR Operation
Program Channel hot electrons WL high & BL high & SL GND High programming current
low parallelism Erase FN tunneling Low WL & high SL & float BL Sequence of pulses, erase
verify reliability margin
~-9V
FLOAT
~-9V0V
~-9V0V
FLOAT FLOAT
~-9V
S. Gerardin, SERESSA 2015 28
NOR Operation
Program Channel hot electrons WL high & BL high & SL GND High programming current
low parallelism Erase FN tunneling Low WL & high SL & float BL Sequence of pulses, erase
verify reliability margin Read WL on & sense BL ECC may be present in MLC
~5V0V
S. Gerardin, SERESSA 2015 29
NAND NAND
Cells arranged in strings (16/32), bit size ~ 4F2
The smallest feature size! Source Selection Line (SSL), and
Drain Selection Line (DSL) devices for each 16-32 FG string
Performance Series arrangement, - speed, +
density and parallelism High throughput ~ 40MB/s Page (kB) program ~0.2 ms Block (MB) erase ~2ms Compulsory use of ECC
Applications Used for data storage
Bit Lines BL
Wor
d Li
nes
WL
Sour
ceSe
lect
ion
Dra
inSe
lect
ion
S. Gerardin, SERESSA 2015 30
NAND Operation
Program FN tunneling Selected WL very high &
other WL’s high & BL GND
~18V
~3V
~3V
~10V
~10V
FLOAT 0V 0V
S. Gerardin, SERESSA 2015 31
NAND Operation
Program FN tunneling Selected WL very high &
other WL’s high & BL GNDErase FN tunneling with reversed
polarity
~0V
~0V
~0V
Body~20V
FLOAT
FLOAT
FLOAT
S. Gerardin, SERESSA 2015 32
NAND Operation
Program FN tunneling Selected WL very high & other
WL’s high & BL GND Erase FN tunneling with reversed
polarity Read Unselected WL’s biased at
Vread both erased and programmed cells are on at Vread
Selected WL biased at 0V only erased cells are on
ECC needed
~0V
~4.5V
~4.5V
~4.5V
~4.5V
S. Gerardin, SERESSA 2015 33
Reliability of FG’s
Complex and critical Intrinsic phenomena occurring in all cells in a uniform way Single-bit failures occurring just in a few bits out of a large
number of cells, due to • extrinsic defects (particles)• unfortunate configurations (alignment) of intrinsic point
defects Endurance Limited by generation of traps and charge trapping during high-
voltage operations (10 MV/cm) in the tunnel oxide Typical = 105 cycles
Retention Limited by Stress induced leakage current Typical = 10 years
S. Gerardin, SERESSA 2015 34
FG: Radiation EffectsUntil a few years ago… Only effects in the peripheral circuitry were of concern Charge pumps weakest component
…but nowadays Effects in the peripheral circuitry are still very important
but FG array sensitivity is an issue as wellTIDSEEs on: Cells Periphery:
• Page buffer• Microcontroller
S. Gerardin, SERESSA 2015 35
FG: from Vth Shifts to Errors
When the threshold voltage shift is large enough to bring the cell beyond the read voltage, an error occurs
Intermittent errors may take place when Vth close to read voltage
Cel
l Dis
tribu
tion
Read voltage
“1”“0”
Vth,CLError
No Error
S. Gerardin, SERESSA 2015 36
FG: TID
Uniform shifts of the Vth distributions
Movement towards the intrinsic distribution, i.e., the one the cells would have with no net charge in the FGdischarge of the FG
Typical doses for errors ~ nx10 krad(Si)
Dosimeters?G. Cellere, et al., TNS 2004
Intrinsic distribution
10-7
10-6
10-5
10-4
0.001
0.01
0.1
1
0 1 2 3 4 5 6 7 8 9 10Vth [V]
Perc
enta
ge o
f cel
ls
Fresh10krad(Si)100krad(Si)
"1" "0"
S. Gerardin, SERESSA 2015 37
TID: FG cells
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Vth distributions
M. Bagatin, et al., TNS 2009
Device irradiated during read cycles: Vth distributions and errors build-up as a function of accumulated dose
Errors at the output pins
S. Gerardin, SERESSA 2015 38
TID: FG cells
Device irradiated during read cycles: Vth distributions and errors build-up as a function of accumulated dose
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Vth distributions
M. Bagatin, et al., TNS 2009
Errors at the output pins
S. Gerardin, SERESSA 2015 39
TID: FG cells
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Vth distributions
M. Bagatin, et al., TNS 2009
Device irradiated during read cycles: Vth distributions and errors build-up as a function of accumulated dose
Errors at the output pins
S. Gerardin, SERESSA 2015 40
TID: FG cells
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Vth distributions
M. Bagatin, et al., TNS 2009
Device irradiated during read cycles: Vth distributions and errors build-up as a function of accumulated dose
Errors at the output pins
S. Gerardin, SERESSA 2015 41
TID: FG cells
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Errors at the output pins
Vth distributions
M. Bagatin, et al., TNS 2009
Device irradiated during read cycles: Vth distributions and errors build-up as a function of accumulated dose
S. Gerardin, SERESSA 2015 42
TID: FG cells
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Vth distributions
M. Bagatin, et al., TNS 2009
Device irradiated during read cycles: Vth distributions and errors build-up as a function of accumulated dose
Errors at the output pins
S. Gerardin, SERESSA 2015 43
TID: FG cells
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
0
200000
400000
600000
800000
0 100 200 300 400Dose [krad]
# bi
t erro
rs
Programmed ("0")
Erased ("1")
1
10
100
1000
10000
100000
1000000
Vref
num
ber o
f cel
ls
Vth distributions
M. Bagatin, et al., TNS 2009
No errors are observed in erased cells because the neutral distribution is below Vref in these devices
Errors at the output pins
S. Gerardin, SERESSA 2015 44
FG: TID Basic Mechanisms
Three basic mechanisms:1. Charge injection in
the FG2. Charge trapping in
the tunnel oxide3. Internal
PhotoemissionEffects do not
depend much on scaling (remember oxides can hardly be scaled because of reliability)
+
- Ionizingradiation
+
-
--
-- +
Control gate
Floatinggate
Siliconbulk
(1)
(2)
(3)
S. Gerardin, SERESSA 2015 45
Flash: Charge Pumps Radiation Effects
TID, shift in the threshold voltage Failure dose usually
< 100 krad Single Event Gate
Rupture, rupture of the gate oxide
One of the most sensitive building blocks
Degradation of program charge pump in a NAND Flash memory
M. Bagatin, et al., TNS 2009
S. Gerardin, SERESSA 2015 46
Total Dose Effects
Use cases1. Mostly off: memory off most of the time and powered
at regular intervals (about 2 krad), during which operating and retention tests are carried out
2. Low duty: memory powered in the selected state(ready to operate) and exercised at regular intervals (about 2 krad), during which operating and retention tests are carried out
3. High duty: memory continuously operated through a sequence of E/R/P/R operations with no dead time. Every 10 E/R/P/R cycles a retention test is carried out.
S. Gerardin, SERESSA 2015 47
Total Dose Fails in SLC memories
Failure criteriaRetention: 1% of bit
corruptedErase: failure to
erase a blockProgram: failure to
program a pageIn SLCRetention failures
independent of operating conditionsErase and program
fails occur later when memory is mostly off
Failure levels for 34-nm SLC NAND Flash manufactured by Micron
0
20
40
60
80
100
120
140
SLC Mostly Off SLC Low Duty SLC High Duty
Failu
re D
ose
[kra
d(Si
)
Erase
Retention 1%
Program
S. Gerardin, et al., TNS 2010
S. Gerardin, SERESSA 2015 48
Total Dose Fails in MLC memories
Retention errorsOccur at a higher
rate than in SLC and earlier than P/E fails
Program/EraseFailure levels lower
than SLCContrary to SLC,
mostly-off and low duty are almost equivalent conditions for this type of failuresHigh duty most
severe condition
Failure levels for 25-nm MLC NAND Flash manufactured by Micron
0
10
20
30
40
50
60
70
80
MLC Mostly Off MLC Low Duty MLC High Duty
Failu
re D
ose
[kra
d(Si
)]
Erase
Retention 1%
Program
S. Gerardin, et al., TNS 2010
S. Gerardin, SERESSA 2015 49
FG: Heavy ions
A secondary peak appears in the distributions right after exposure to heavy ions Distance between
the two peaks is average Vth
Height of the peak (number of cells in the secondary distribution) related to the number of struck FGs
G. Cellere, et al., TNS 2001
1
10
100
103
104
105
4 5 6 7 8Vth [v]
Num
ber o
f cel
ls FreshAfter rad
Read voltage
Errors
S. Gerardin, SERESSA 2015 50
FG: Heavy ions
A transition region appears in the distributions between the primary and secondary peaks
Such region is correlated to energetic delta electrons emitted by the ion hitting outside the FG cell areaG. Cellere, et al., TNS 2001
1
10
100
103
104
105
4 5 6 7 8Vth [v]
Num
ber o
f cel
ls FreshAfter rad
Read voltage
Errors
S. Gerardin, SERESSA 2015 51
FG & Heavy Ions: LET and Electric Field (1)
G. Cellere, et al., TNS 2004
Tunnel oxide electric field [a.u.]
-0.5
0.5
1.5
2.5
3.5
-1 1 3 5 7
V t
h[V
]
Charge loss linearly dependent on electric field LET
Not dependent on charge yield!
Strong function of scaling: the smaller the FG, the more severe the effect
S. Gerardin, SERESSA 2015 52
FG & Heavy Ions: LET and Electric Field (2)
G. Cellere, et al., TNS 2004
Large FG
Small FG
LET [MeV·cm2/mg]
0
1
2
3
4
V t
h[V
]
0
1
2
3
4
0 50 1000 50
Charge loss linearly dependent on electric field LET
Not dependent on charge yield!
Strong function of scaling: the smaller the FG, the more severe the effect
S. Gerardin, SERESSA 2015 53
FG & Heavy Ions: Basic Mechanisms
Transient leakage path due to high density of electron/hole pairs created by radiation
- - - - -
Charge loss linearly dependent on electric field LET
Not dependent on charge yield!
Strong function of scaling: the smaller the FG, the more severe the effect
Heavy ion strikes can discharge the FG Transient conductive
path Transient carrier flux
S. Gerardin, SERESSA 2015 54
Angular effects of heavy ions
What happens when changing the irradiation angle? In real world (e.g., space) the ion flux is ~isotropic
After 1217-MeV Xe irradiation0°0°15°15°30°30°45°45°60°60°75°75°
At 75° more than 20 FGs corrupted by a
single ion!
Cellere et al, TNS 2007
S. Gerardin, SERESSA 2015 55
10
100
1000
10000
100000
1000000
Dens
ity d
istri
butio
n [a
.u]
Vth [a.u.]
Pre‐rad
Post‐rad
Heavy-ion Induced Vth Tails
Heavy ionscollectively produce:Secondary Peak:
the number of cells is in good agreement with the number of strikes going through FGsTransition Region:
origin not yet completely clear
65-nm Micron NOR Flash memories irradiated with 3∙107 cm-2 Silicon ions (E=121 MeV, LET=9.8 MeV∙cm2∙mg-1)
SecondaryPeak
TransitionRegion
S. Gerardin, et al., TNS 2010
S. Gerardin, SERESSA 2015 56
Geant4 Application
WL
Substrate, Silicon
M1(BL)
M2
M3
Floating gates
65-nm NOR devices were modeled in 3D
Heavy-ions and neutrons strikes were simulated
Simulations provide energy deposition in the floating gate and in the tunnel oxide of particles crossing cells
S. Gerardin, SERESSA 2015 57
Simulations
The experimental data and the energy deposition can be experimentally related through a Vth(LET)
Experimental Vth shifts Simulated energy deposition in the FG
10
100
1000
10000
100000
1000000
0.2 2.2 4.2
Dens
ity d
istri
butio
n [a
.u]
Vth [V]
10
100
1000
10000
100000
1000000
0 20 40
Dens
ity d
istri
butio
n [a
.u]
LET [MeV·cm2·mg-1]65-nm NOR irradiated with Ni
S. Gerardin, SERESSA 2015 58
Vth vs LET
y = 0.2988x0.6739
R² = 0.9959
y = 0.0874x + 0.3962R² = 0.9988
0
0.5
1
1.5
2
2.5
3
3.5
0 10 20 30 40
V t
h[V
]
LET [MeV∙cm2∙mg-1]
65nm
The experimental Vth vs LET can be fitted with a simple relation, either a power law or linear relation
Linear relation with non-zero intercept is non-physicalExperimental data on 65-nm NOR Flash
memories irradiated with ions having different LETs
S. Gerardin, SERESSA 2015 59
10
100
1000
10000
100000
1000000
0.2 2.2 4.2
Dens
ity d
istri
butio
n [a
.u]
Vth [V]
ExperimentalSimulations
110
1001000
10000100000
100000010000000
100000000
0.2 2.2 4.2
Dens
ity d
istri
butio
n [a
.u]
Vth [V]
ExperimentalSimulations
Secondary peak
Energy deposition in Floating Gate
Energy deposition in Tunnel Oxide
Agreement is much better when considering energy deposition in the FG as opposed to the tunnel oxide
Width of the secondary peak related mostly to variability in energy deposition
65-nm NOR irradiated with Ni
S. Gerardin, SERESSA 2015 60
Small Events
Large eventSmall events
In addition to the large energy depositions caused by ions going through FG (large events)…
there are several small depositions by energetic electrons going through FG (small events), we can think of them in terms of total dose
S. Gerardin, SERESSA 2015 61
Vth vs TID
y = 0.0154x
00.050.1
0.150.2
0.250.3
0.350.4
0.450.5
0 10 20 30 40
V t
h[V
]
TID [krad]
65nm
The experimental Vth vs TID can be fitted with a simple linear relation
The extracted conversion coefficient is 15.4 mV/krad
If we weigh the small events with this number…
Experimental data on 65-nm NOR Flash memories irradiated with x rays
S. Gerardin, SERESSA 2015 62
10
100
1000
10000
100000
1000000
0.2 2.2 4.2
Dens
ity d
istri
butio
n [a
.u]
Vth [V]
ExperimentalSim. Large EventsSim. Small Events
10
100
1000
10000
100000
1000000
0.2 1.2 2.2
Dens
ity d
istri
butio
n [a
.u]
Vth [V]
ExperimentalSim. Large EventsSim. Small Events
Transition Regions
Ni E=212.8 MeV LET=28.4 MeVcm2mg-1
Si E=121 MeV LET=9.8 MeVcm2mg-1
A good agreement is obtained with different ions
65-nm NOR
S. Gerardin, SERESSA 2015 63
FG & Heavy Ions: Annealing
Even though, the oxides surrounding the FG are quite thin (8.5 nm in NAND FG) charge trapping can take place
Removal of trapped charge may cause some errors to disappear both after TID and heavy-ion exposures
M. Bagatin, et al., TNS
0.1 1 10 100 100016
18
20
22
24
26
FG e
rrors
x 10
4
Time after irradiation [hours]Silver E=266 MeV, LET=57 MeV cm2/mg
S. Gerardin, SERESSA 2015 64
FG & Heavy Ions: Permanent Leakage Paths
In addition to prompt discharge, permanent damagecan occur
Cells hits by high-LET heavy-ions and then reprogrammed, experience a charge loss over time
Caused by permanent defects in the tunnel oxide leading to Radiation-Induced Leakage Current(compare with SILC)
- - - - -
Permanent leakage path due to defects created by radiation
S. Gerardin, SERESSA 2015 65
3 4 5 6 7 8VTH (V)
Cum
ulat
ive
prob
abilit
y
0.002%
0.012%
0.09%
0.67%
4.8%
30.7%
93.4%
99.99%
2x107ions/cm2
FreshNi Ag
I
Radiation Effects on VTH distributions
Large tails after irradiation
Number of bits in tail does not depend on ion LET (it depends on fluence)
VTH strongly depends on ion LET
• These cells (hit) only are considered in the next experiments
S. Gerardin, SERESSA 2015 66
Data retention in hit FG cells
• Hit devices only were re-programmed
• After only 30min a clear tail appears…
• …which increases more and more with time
After 20 days, VTH~4V!!!
3 4 5 6 7 8
VTH (V)
Cum
ulat
ive
prob
abili
ty
0.002%0.012%
0.09%0.67%4.8%
30.7%93.4%
99.99%
After program
After 30 min
After 20 days
S. Gerardin, SERESSA 2015 67
Model vs. Experimental
Model: multi-trap assisted tunnelingcurrent through tunnel oxide
Experimental data obtained from 0.04m2 device irradiated with I previously shown
Bars variance (spread) of experimental data
Lines calculations
FOX (MV/cm)
IG (A
)ExperimentalSimulated
0.8 1 1.2 1.4 1.6 1.8
10-18
10-19
10-20
10-21
10-22
10-23
10-24
10-25
10-26
FOX (MV/cm)
IG (A
)ExperimentalSimulated
0.8 1 1.2 1.4 1.6 1.8
10-18
10-19
10-20
10-21
10-22
10-23
10-24
10-25
10-26
• With 20 defects in the tunnel oxide, good agreement on:– Mean value– Extreme values (spread)
S. Gerardin, SERESSA 2015 68
NAND Flash: Dynamic Errors and SEFIs
Typical errors during read operation under exposure to heavy ions Static errors, linked
to FG cells Dynamic errors,
linked to the peripheral circuitry
Single Event Functional Interruptions, due to strikes in the microcontroller memory
M. Bagatin, et al., TNS 2008
0 105 2x105 3x1050
20406080
100120
105106
Tota
l erro
rs
Fluence [ion cm-2]
Dynamic errorsStatic errors
SEFI
S. Gerardin, SERESSA 2015 69
NAND Flash: Read Protocol
FG Array
FG Array
In the NAND architecture a large page buffer (PB) is present
A page is transferred from (to) the FG array into the PB before (after) being read (written) at the pins
S. Gerardin, SERESSA 2015 70
NAND Flash: Read Protocol
FG Array
FG Array
Row Decoder
1010..01
Page
In the NAND architecture a large page buffer (PB) is present
A page is transferred from (to) the FG array into the PB before (after) being read (written) at the pins
S. Gerardin, SERESSA 2015 71
NAND Flash: Read Protocol
Page Buffer (PB)
1010..01
Page
In the NAND architecture a large page buffer (PB) is present
A page is transferred from (to) the FG array into the PB before (after) being read (written) at the pins
S. Gerardin, SERESSA 2015 72
NAND Flash: Read Protocol
BYTE
Page Buffer (PB)
1010..01
Page
In the NAND architecture a large page buffer(PB) is present
A page is transferred from (to) the FG array into the PB before (after) being read (written) at the pins
While in the PB, data are sensitive to radiation Dynamic Errors
S. Gerardin, SERESSA 2015 73
Flash: Single Event Functional Interruption
Strikes in the microcontroller may lead to inconsistent states Read fails on whole
pages/blocks Program/Erase failure
Functionality can usually be restored through: Repeat operation Reset Power-cycle
D.N. Nguyen, et al., REDW2002
Error Type
Description Solutions
Block-erase SEFI
The device’s readysignal never exits the busy state.
Reset power only.
Partial erase SEFI
Block-erase suspends at the first address. Few blocks are erased.
Repeat the erase process.
Write SEFI
Write operation completion’s status suspends
Reset power only.
Read SEFI
Sensing circuitry suspends due to charge built-up. Next read operation doesn’t clear errors.
Repeat the read process or cycle power.
IrregularSEFIs
Read operation locks into endless loop. Write operation stops.
Reset power only.
S. Gerardin, SERESSA 2015 74
Future Memories Phase change memories
Phase Change Materials (e.g., chalcogenides) can be electrically switched between the amorphous and crystalline state, through Joule heating
These two states feature one or two orders of magnitude of difference in resistivity, which can be sensed with a proper scheme
Nanotube RAM (NRAM) Cell: single walled nanotube suspended over an electrode “0” = suspended “1” = in contact (van der Waals forces) Great potential for radiation hardness
Resistive RAM (RRAM) Based on materials whose resistivity can be changed electrically, with a
breakdown-like path Good scalability, cross-point arrays
Conductive-bridging RAM (CBRAM, PMC) Relocation of ions inside an electrolyte Presence or absence of a nanowire between two electrodes
Millepede Use pits in a polymer material created with a MEMS-probe Great scalability
S. Gerardin, SERESSA 2015 75
Phase Change Memories
Memory Cells Based on the reversible
phase transition of a chalcogenide material Ge2Sb2Te5 (GST):amorphous XTL RESET SET
S. Gerardin, SERESSA 2015 76
Phase Change Memories
Phase Change Memories Periphery
• Many of the same issues as in standard CMOS circuits, but it may be hardened by design/process
Memory Cells• Believed to be hard and totally immune to
radiation effects, because storage mechanism is not based on charge
• As we will see that’s not entirely true
S. Gerardin, SERESSA 2015 77
Neutron Results
Devices in retention mode (i.e. off)
No significant increase in bit errors caused by neutrons, regardless of pattern
012345678910
0 1 2 3 4 5 6 7
Bit e
rror ra
te [p
ost rad/ p
re ra
d]
Irradiated site
1CK
0CK
ALL0
Irradiated with neutrons @ ISIS
Meas.noise
45-nm PCM
S. Gerardin, SERESSA 2015 78
Heavy Ions along the Bit line
Highest used LET(Si) = 59.2 MeV∙mg-1∙cm2
High fluence = 3∙107 ions/cm2
No significant increase in bit errors
Irradiated with 267-MeV iodine @ SIRAD
012345678910
0 20 40 60 80
Bit e
rror ra
te [p
ost rad/ p
re ra
d]
Irradiation angle along BL [°]
Meas.noise
45-nm PCM
S. Gerardin, SERESSA 2015 79
Heavy Ions along the Word line (1)
Highest used LET(Si) = 59.2 MeV∙mg-1∙cm2
High fluence 3∙107 ions/cm2
Large increase at high incidence angles > 40°
Errors only in cells set to ‘1’ prior to the exposure (crystalline)
Cells set to ‘1’.Irradiated with 267-MeV iodine
@ SIRAD
0
10
20
30
40
50
60
0 20 40 60 80
Bit e
rror ra
te [p
ost rad/ pre rad]
Irradiation angle along WL [°]
Meas.noise
45-nm PCM
S. Gerardin, SERESSA 2015 80
Heavy Ions along the Word line (2)
Threshold LET ≥ than 40 MeV∙mg-1 cm2
Consistent with neutron results: no effect expected
0
10
20
30
40
50
60
0 10 20 30 40 50 60 70
Bit e
rror ra
te [p
ost rad/ p
re ra
d]
LET [MeV cm2/mg]
Cells set to ‘1’.Irradiated @ SIRAD
Meas.noise
45-nm PCM
S. Gerardin, SERESSA 2015 81
Current Distributions
Errors only in cells set to ‘1’ prior to the exposure (crystalline)
About one order of magnitude between the lower edge of the ‘1’ current distribution and the upper edge of the ‘0’ distribution
1.0E‐091.0E‐08
1.0E‐071.0E‐06
1.0E‐051.0E‐041.0E‐03
1.0E‐021.0E‐01
1.0E+00
0.1 1 10 100
Cell distrib
ution
Current [a.u.]
'0'
'1'
Representative pre-rad current distribution
S. Gerardin, SERESSA 2015 82
Cell Design Cell is asymmetrical In particular, the
heater section has one litho-driven dimension and one sub-litho dimension
The interface between the heater and the chalcogenide material is rectangular, with the long side oriented along the word line
Damage at the heater/GST interface
Heater
Heavy‐iondamage track
Crystalline GST storage element
Word line
Cartoon of a PCM cell (not to scale)
S. Gerardin, SERESSA 2015 83
Latent Track
Energetic heavy ions can create latent tracks of damage in several materials, including insulators and semiconductors
Thermal spike model: due to electron-phonon coupling, a heavy ion heats the material in a small cylinder around its trajectory, causing the melting temperature to be locally reached
No data exist for Ge2Sb2Te5, and no general rules are available to predict latent track formation
Due to the quick cooling, the GST material may be amorphized after the heavy-ion strike!
S. Gerardin, SERESSA 2015 84
Conclusions
Non-volatile memories have been dominating the commercial market
They have become more and more appealing for space applications, thanks to their non-volatility and high density, not matched by rad-hard components
Yet, these devices are sensitive to both TID and SEEs, in both the cell arrays and peripheral circuitry
They are intensively studied, in order to evaluate the more resilient devices and, correspondingly, the best conditions for their use in different radiation environments
New unexpected effects may appear due to nano-size!
S. Gerardin, SERESSA 2015 85
Terrestrial Effects: Neutrons
Atmospheric neutrons Not charged, they do not directly ionize materials They can give rise to secondary charged byproducts
(= heavy ions) by interacting with chip materials Wide range of energies The generated charge particles have a wide
distribution of LETs
S. Gerardin, SERESSA 2015 86
Neutron Induced Vth Tails
Atmospheric-like neutrons produce:Secondary charged
byproductsLinear Vth tails in
log-lin scale
65-nm NOR Flash memories irradiated with 3.6∙1010 cm-2 neutrons with atmospheric-like
spectrum
1
10
100
1000
10000
100000
1000000
10000000
100000000
Density
distribution [a.u]
Vth [a.u.]
Pre‐rad
Post‐rad
S. Gerardin, SERESSA 2015 87
Neutrons
Geant4 used to assess neutron byproducts, heavy-ion and x-ray data for conversion coefficients
Small events fit the tail at lower Vth
Large events fit the tail at higher Vth
Good agreement despite limitations (energies, angles of heavy ions used for conversion)
Tail on L3 for 65-nm NOR Flash memories irradiated with 3.6∙1010 cm-2 neutrons with
atmospheric-like spectrum
1
10
100
1000
10000
0.25 0.75 1.25 1.75
Dens
ity d
istri
butio
n [a
.u]
Vth [V]
Experimental
Sim. Large Events
Sim. Small Events
S. Gerardin, SERESSA 2015 88
The number of errors due to neutrons is significantly larger than pre-rad errors during our accelerated tests
exponentially increases as the cell feature size is reduced The FG error bit averaged on all levelsfor 25-nm samples is
more than one order of magnitude larger than for 50-nm samples
Neutron FG error cross section
1.E‐201.E‐191.E‐181.E‐171.E‐161.E‐151.E‐141.E‐13
20 30 40 50 60 70 80 90 100
Bit
[cm
2 ]
Node [nm]
Vendor AVendor Bref Vendor Aref Vendor B
10‐13
10‐14
10‐15
10‐16
10‐17
10‐18
10‐19
10‐20
NAND MLC samplesNon-zero error rate (pre-rad errors) even without radiation, due to read and program disturb, erratic tunneling, stress induced leakage current, etc.
S. Gerardin, SERESSA 2015 89
34-nm SLC (vendor A) is one of the first generations of single-bit cells to be sensitive to neutrons
Errors are all ‘0’ to ‘1’ flips (programmed to erased) The neutron cross section of 34-nm SLC is more than 3 orders of
magnitude smaller with respect to 25-nm MLC samples
Neutron FG error cross section
1.E‐20
1.E‐19
1.E‐18
1.E‐17
1.E‐16
1.E‐15
1.E‐14
1.E‐13
20 30 40 50 60 70 80 90 100
Bit
[cm
2 ]
Node [nm]
Vendor AVendor Bref Vendor A
10‐13
10‐14
10‐15
10‐16
10‐17
10‐18
10‐19
10‐201.E‐201.E‐191.E‐181.E‐171.E‐161.E‐151.E‐141.E‐13
20 30 40 50 60 70 80 90 100
Bit
[cm
2 ]
Node [nm]
Vendor AVendor Bref Vendor Aref Vendor B
10‐13
10‐14
10‐15
10‐16
10‐17
10‐18
10‐19
10‐20
SLC samplesMLC samples
No errors
S. Gerardin, SERESSA 2015 90
Model: Neutron Scaling Trends
1E‐221E‐211E‐201E‐191E‐181E‐171E‐161E‐151E‐141E‐131E‐12
0 25 50 75 100 125 150
Neu
tron
[cm
2 ]
Feature size [nm]
Vendor AVendor BModelObservability Limit
10‐1210‐1310‐1410‐1510‐1610‐1710‐1810‐1910‐2010‐2110‐22
Through the modeling of threshold LET, neutron cross section is modeled and fitted to our experimental data
A turnaround is expected between 10 and 20 nm For one or few more
generations we expect the neutron to increase
Afterwards a significant decrease should occur, due to the fact that the FG becomes smaller and smaller than the heavy-ion track
M. Bagatin, et al., TNS 2014
S. Gerardin, SERESSA 2015 91
Alpha FG error cross section
1 E‐191 E‐181 E‐171 E‐161 E‐151 E‐141 E‐131 E‐121 E‐111 E‐10
10 20 30 40 50 60 70
Bit
[cm
2 ]
Feature size [nm]
MLCSLC
10‐18
10‐1010‐1110‐1210‐1310‐1410‐1510‐1610‐17
10‐19
- MLC and SLC samples by vendor A irradiated with 241Am alpha particles
- Empty symbols indicate the observability limit of events after a fluence of 3·107 cm-2
For MLC samples the alpha error is about 3 orders of magnitude larger with respect to the neutron error
From 50-nm MLC devices to 25-nm ones, the error sensitivity increases by almost 2 orders of magnitude
The most scaled SLCsamples we tested (34 nm) are not sensitive to alpha particles yet
No errors