No Slide Title · HiLight Semiconductor Ltd 1 HiLight CONFIDENTIAL Don’t forget the electronics! Considerations for highly integrated silicon photonics devices Photenex –Wednesday

1HiLight Semiconductor Ltd

HiLight

CONFIDENTIAL

Don’t forget the electronics!Considerations for highly integrated silicon photonics devices

Photenex – Wednesday 11th OctoberSilicon Photonics Adoption in UK Industry

HiLightSemiconductor Ltd

Christian Rookes [email protected]

VP Marketing


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HiLight Semiconductor Introduction

Founded 2012; Experienced Optical Team

VC backed, private company

Four previous successful IC company ‘exits’

>20 CMOS IC Designers

Southampton & Bristol Design Centres

Optical PMD Chipsets to 100Gbps+

Pure CMOS on 12” wafers

Now 55nm, 40nm and 28nm

Next 22nm/16nm

40M+ ICs shipped


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Optical ‘PMD’ Transceivers and ICs

Nx 25Gbps PMD examples 25GbE SFP28 LR

Integration in CMOS

100GbE QSFP28 SR4

PMD ICs:

Bare Die & Packaged Parts Transimpedance Amplifiers (TIAs) Limiting Amplifiers (LAs) Laser/VCSEL Drivers (DML) Modulator Drivers (EML) CDRs Integrated Combinations of above


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Optical Transceivers

ROSA = Receiver Optical Sub-AssemblyTOSA = Transmitter OSA

SFP+ QSFP+SFF (FTTH)

BOSA = Bi-Directional OSA

1.25/2.5G 1 – 10G 40G

LDD/VCSEL & L.A.(+ CDR)

Access

Telecom/Wireless/Datacom

Data CentreHiLight Product

QSFP28100G

SFP2825~28G

x1/x4 TIA+LA+CDRx1/x4 Tx Driver + CDR

‘Combo’ IC

TIA

‘Chip-On-Board’ IC

Optical Engines100G+

Bulk Optics Integrated Photonics

IntegratedPhotonics

200G400G800GTBD+


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Motivation? Cloud Scale Computing

Bandwidth demand == Increasing data rate Increase/Maintain Port Density & Lower Power

Leaf/ToR

Spine

48xSFP28 25G

32xQSFP28 100G


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Bulk Optics >> Integrated Photonics

Bulk Optics Bulk Optics used up to 100Gbps Well defined: Many Standards and

industry MSAs Many varied & manual processes

Known E/O and O/E interfaces 50Ω/100Ω Electrical interfaces Defined packaging technologies Electrical modelling available

Function blocks as separate elements

Integrated Photonics From 100Gbps + Target high automation Requires new tools, methods and

manufacturing processes

Re-define E/O and O/E interfaces? Optimise electrical interfaces? New approaches to packaging possible Measure & model electrical interfaces

Needs a holistic approach- Consider electronics from the start


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Why HiLight uses CMOS for PMD ICs

Advantages

Cost!

Power consumption

Capacity – 12” Wafers

Low noise TIAs- High sensitivity receivers

Digital integration- MCU, Memory, Control

Enables volume- Same process as high volume

consumer ICs

Low wafer/chip cost

Challenges

Experienced Analogue CMOS designers

NRE (mask set) costs

Layout:Schematic ratio

Requires volume

Tx drive capability- Lower voltages

- Smaller currents


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HLx100G – 4x 25Gbps integrated CMOS chipset

100Gbps Integrated Receiver

4x TIA+LA+CDR

MMF and SMF

Low Power

100Gbps Integrated Transmitter

4x VCSEL+CDR

Low Power

Overview

Target < 1W total (Tx+Rx)

Rx 0.5dB x-talk (channel to channel)

TIA LA CDR

x4


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Photonic Integration

Hybrid Integration

Photonics separate from electronics

Choose best process technology for each functional element- Electronics – CMOS (≤28nm)- Optics - SiP (45~130nm)- Light Source (III-V)

Flexible & Scalable- Die sizes won’t be the same

Challenges for electro-optical interfaces- Bonding/Packaging

Full Integration

Photonics and electronics integrated on monolithic chip- But still need III-Vs! (Lasers)- SiGe for SiP, PDs & Electronics

Dedicated process- Selected for Photonics capability- Compromise elsewhere- Scalable/portable?

Electronics ‘shoe-horned’ into best process for photonics –compromises

Development time Vs Industry rate of change


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Electrical Interfacing with PMD ICs

Photo-detector <> TIA- Low capacitance vs active area; Wire-bond ‘peaking’

Modulator|Laser <> Driver IC- Bonds, microstrip >> direct wire-bonds/flip or bumped

Interface – Bond Wires, Flip Chip- Alternatives to wire-bonding or flip-bumping?

Driving Lasers – impedance matching- Impedance matching on-chip; previously off-chip- Wave-shaping to compensate for mismatch/bandwidth

Driving Modulators low power/low voltage- Modulator voltage drive; DML modulation current

X-talk/EMI (electrical)- Consider effects in photonics IC as well as electronic IC


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Example – 10G APDs

Was thought given to electrical interface? Was RF performance considered?

APD chip

Chip-on-Carrier

G-S-G;optimum pad sizes

G-S; Large anode padCathode on underside

Non symmetric;Large bond pads

Symmetric G-S-G

None of the above APD vendors provides a good electrical model!


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Example - GND provision on silicon µbench

Example of an integrated optical engine

No provision for RF GND between optics and Rx IC!

Integrated Photonicsmicrobench

Receiver ICHiLight HLR100G (4x 25G)


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Example – 25G VCSEL Model

Provided LIV data S-parameters

Not provided Electrical equivalent model E-O model (Rate equation)

Not considered RF metalisation Electrical variation


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Holistic Approach Required

If the end goal is ‘optical transceivers on chips’…Lowest power, smallest form-factor, least cost

Then all aspects of transceiver design need to be considered whilst developing the photonics

Including electronics, interface, packaging


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Opportunities from holistic approach

Integrated control- Automatic control of Tx Extinction Ratio (in addition to mean power)- On-chip, highly accurate, temperature sensors- Performance monitoring (Bias, VDD)

Lower power- Reduce power in E/O and O/E interfaces- Reduce power required in photonics == reduce power in electronics- Reduce optical losses == reduce power in electronics

Performance- Reduce interface parasitics (Ls, Cs) == increased bandwidth- Improved receiver sensitivities- Increased transmission distances (EQ/EDC/Pre-Emphasis)

Manufacture & Cost- Scalable, highly automated- Built-in self test (BIST); Used widely in IC industry- High capacity, lower cost


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Areas for Collaboration (wish list)

Low power transmitters (modulators / lasers)- Lower modulator voltages [≤ 1V] == low power (CMOS compatible)- More efficient lasers (DML) == less modulation current

• Impedances closely matched to output drive stages

Improved receivers (photodiodes)- Low capacitance == low TIA noise- High responsivity/gain

Reduced optical interfaces losses- Lower loss == Easier TIA & Driver design! == Lower Power

Improved electrical connections- Consider metalisation RF effects – symmetry and reduced parasitics- Beyond wire-bonding: Flip-chip/bumping alternatives

Photonics device modelling – electrical interface- Electrical characteristics of Photodiode, Laser, Modulator, VCSEL


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Summary

HiLight has significant experience developing highly integrated, high-speed PMD functions in pure CMOS- Low power, high performance- Low cost, high yield & capacity- Highly integrated functions

Silicon Photonics can benefit from CMOS IC/IP integration but need to consider the electronics capability whilst developing optics

Closer collaboration between Photonics and Electronics desirable

Holistic approach for optimised power, performance and cost


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Thank you

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No Slide Title · HiLight Semiconductor Ltd 1 HiLight CONFIDENTIAL Don’t forget the electronics! Considerations for highly integrated silicon photonics devices Photenex –Wednesday