NIPHAD June 27, 2001 Freya Blekman, NIKHEF Amsterdam 1 NIPHAD meeting June 27,2001 Freya Blekman D0 S ilicon C alibration and R eadout M anagement

NIPHADJune 27, 2001

Freya Blekman, NIKHEF Amsterdam1

NIPHAD meeting

June 27,2001

Freya Blekman

D0 Silicon Calibration and Readout Management

2 Freya Blekman, NIKHEF Amsterdam

NIPHADJune 27, 2001

OutlineThis presentation will contain:

1. A short intro to D0 and its readout system

2. A status report3. A more elaborate introduction to

the Silicon Micro strip Tracker4. Readout tests at the 10% test5. SMT calibration overview (with

some results)

NIPHADJune 27, 2001


Part 1:

D0 and its

Readout System

NIPHADJune 27, 2001


The D0 ExperimentTevatron Upgrade (Run II a)

Improved/new: Linac, main injector, pbar storage ring and sourcep-pbar, 2.0 TeV 36 x 36 bunch spacing 396 ns (132 ns)2.3 interactions/crossingIntegrated Luminosity 17 pb-1/week

Detector Upgrade New in D0: upgraded tracking, with B-field! (2 T

solenoid), pre-shower Readout Hardware upgraded Most software re-written in C++ or python

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The Detector

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The Detector (IRL)

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Upgraded TrackingSilicon Micro strip Tracker

4 layer barrels (double/single sided)Disks (in between and forward reg.)793,000 channels

Central Fiber Tracker

8 cylinders with axial and stereo doublet layers of scintillating fibers76,800 channels with VLPC readout

2T magnetic field Central Pre-shower

8,000 channels3 layers triangular

strips behind solenoid and 1 X0 Pb

Forward Pre-shower

4 layers triangular strips, in front of and behind 2 X0 Pb

16,000 channels

NIPHADJune 27, 2001


Part 2:

Detector Status

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First p-pbar Collisions of Run 2 at DØ: April 3, 2001

Luminosity counters

Vertex distribution along z of min bias events:

[cm]

Luminosity( coincidence)

Proton halo

~5 1027 cm-2 sec-1

Antiproton halo

M. Begel,Rochester

NIPHADJune 27, 2001


100%100%100%Muon Trigger

45%45%100%L1 Muon

0%0%100%FPS

60%60%98.5%ICD

100%100%100%Muon MDTs

80%100%100%Muon PDTs

33%80%80%CAL-Trigger

95%95%100%Calorimeter

6%6%100%CFT/CPS

90%100%100%SMT

OperationalInstrumentedInstalledSub-system

Global D0 statusJune 1, 2001

J. WomersleyFermilab

NIPHADJune 27, 2001


Assume:Some access time during July & August, but mainly running.Shutdown in SeptemberRun uninterrupted after September shutdown

Projections & Goals:

•Install ~50% of CFT electronics during July/August•Increase bandwidth continuously ( trigger completion) in June/July/August

•Start alignment & calibration in June•Complete the detector in September•Establish stable operations during October & November•Start stable physics running on Dec 1, 2001•First results for spring conferences 2002•First physics results for summer conferences 2002

Projections and GoalsJ. WomersleyFermilab

NIPHADJune 27, 2001


Calorimeter Triggered Events

EM Energy in Calorimeter Towers

Hadronic Energy inCalorimeter Towers

Lego plot

L. GroerColumbia

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CFT (FPS) Status

Instrumented regionin Fiber Tracker

Problem with readout electronics: AFE boards for CPS and CFT are still in prototype stage.

A small part of the detector is now instrumented with ‘hacked’ prototype boards.

Guesstimates for arrival (and instrumentation) of the boards vary from July to sometime in the fall.

T. Nunneman,fermilab

NIPHADJune 27, 2001


SMT Status 100% of the SMT is now cabled.95 % of the barrels has been read out.For the F-disks and H-disks, this is a bit lower (85%).Still some HV problems, nothing major.Cooling not operational.Still only running in full-readout mode.

0%

20%

40%

60%

80%

100%

SE SW NE NW

HV problem

Readoutproblem

OK

Total : 90 % OK 8 % readout problems 2 % HV problems

E. Kajfasz,CPPM

NIPHADJune 27, 2001


SMT Status (2)

HV monitoring (screenshot)

E. Kajfasz,CPPM

HV LV connection

Download Readout

Temp trip Fuse panel

LV Power Supply Readout but usable

Problem HDI statistics

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Tracks!

Track has 5 CFT hits, 5 3D SMT Hits

Run 119679, Event 232931L3 Global Tracking

D. Whiteson,Berkeley

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Part 3:

The

Silicon Micro Strip Tracker

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The D0 SMT

Silicon micro strip detectorsSVX IIє chips792.576 channels

5 different detector types3, 6, 9 chips on ladders6, 8 chips on F-H disk wedges

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platformplatform

SEQ

SEQ

SEQ

SEQ

SEQ

SEQ

platformplatform

SEQ

SEQ

SEQ

SEQ

SEQ

SEQ

VRB Controller

Optical Link1Gb/s

3/6/8/9 Chip HDI

Sensor

V

B

D

V

R

B

V

R

B

V

R

B

V

R

B

68k Bit3

PC

Secondary DAQ

L3MPM

VME

Low Mass 3M

1553

NRZ / CLK

HV / LV

Interface Card

SMT Data Acquisition

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SMT readout management

Mapping the readout chainCabling was stored in ExcelDAQ works on UnixDAQ needs cabling infoCabling information stored and maintained (by me) in an ORACLE database

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SMT Readout MappingORACLE database (use SQL)

Stores readout components, and their connections

No 1-1 mapping because of STTCable names and numbers also in DB

Wrote python to enter the basic map structure into the databaseUsed VB to get exact mapping from excel documents used by engineers

Mapping has been changed often

NIPHADJune 27, 2001


SMT DownloadingSVX chips have loads of adjustable parameters, which can be set when the chip is in a separate mode

Examples: ADC threshold, gain, set of zero-surpression (‘sparse mode’), # of neighboring channels to be read out in sparse mode

When downloading these parameters, the SVX and VME bus have to be free : NO DATA TAKINGDownload uses database information, to direct VME components to the appropriate SVX chipDownloads preferred to take place when there is no beam, and not too often

NIPHADJune 27, 2001


Part 4:

The SMT 10% Test

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The SMT 10% Test (Theory)

Testing of components of readout, separately:Cables

Readout ComponentsSVX chip settings

Data flowData integrityCalibration

NIPHADJune 27, 2001


The SMT 10% Test (IRL)

Detector

Adaptercards

VRBs

Sequencers

Cables HV control

InterfaceBoards

Cables

Cables

Cables

Cables

Cables

Cables

PC for readout

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Our guinea pig: F-Disk 14

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This is what happened: (DØ news 9-18-2000)

• The achieved data integrity was excellent (3•1013 data without any errors).

• 44,928 Channels could be read out.57 ladders (30 9-chip HDIs, 27 3-chip HDIs), this

number was mainly limited by the number of working VME components)

10% test results

NIPHADJune 27, 2001


Part 5:

SMT Calibration Overview

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What is the next step?We can now only run whilst reading out all (=95% of 800,000) channels of the SMTThis load is not possible for the DAQ (nor will it ever be)SMT will eventually be running in sparse mode

‘sparse’ = with pedestal subtraction on the svx readout chip (~= ADC) and zero-suppression

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What to Do: Get Those Pedestals!

Every channel has its own ADCThe pedestal values have only been measured in lab, and even there not very wellWhen downloading the chip, the pedestals can be setPedestal values are retrieved (per channel) in the calibration database and in the online (=‘hardware’) database

NIPHADJune 27, 2001


Pedestal measurementAt D0, there are two ways to measure the pedestal values of the silicon

1. Take data and look at the average data per channel(= Primary Data Acquisition)

2. When not running, put charge on every channel and do a raw pedestal measurement(=Secondary Data Acquisition)

NIPHADJune 27, 2001


SDAQ vs. PDAQPDAQ + : Use the data

you already have to compensate. ‘Standard’ way to do it.

PDAQ - : You need data ! (and lots of it)

PDAQ - : Cannot readout full SMT unless sparse mode: will only be reading out channel with hit and two neighbors.

SDAQ + : It’s relatively quick.(few hours)

SDAQ - : It’s not clear that charge deposition on Si strips has the same result as real life.

SDAQ - : Remove SMT from global run.

SDAQ - : Program still unreliable

(for instance, it ignores the 9th chip on 9-chip ladders. 50% of the SMT barrel detectors are 9-chip ladders.)

NIPHADJune 27, 2001


Several SDAQ runs (unbiased ladders)Runs with biased detectors are being done now (I haven’t seen the results yet) smt_ped_tools © freya (in cvs)

ROOT-based guiCreate_ntuple program Some macros for common tasks (like channel vs. pedestal plotting)

Current Status SDAQ

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Smt_ped_gui.CUses ROOTROOT has gui classesIs essentially one big ROOT MacroPlots averages as a function of run numberOptions for HDI type selection

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Results (1)

Direct output of

smt_ped_tools/

smt_ped_gui.C

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Results (2)Run 121545Ladder type

Barrel 4Layer 2Ladder3

Double-sided,

6 svx chips

one of the detectors closest to (0,0,0)

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Results (3)Run 121545Ladder type

Barrel 4Layer 3Ladder3

Double-sided,

9 svx chips

SDAQ 9th chip problem visible

NIPHADJune 27, 2001


Part 6:

Conclusion

Future plans

NIPHADJune 27, 2001


The near futureD0 is seeing collisions (the part that is instrumented, at least)By the end of this year, the detector is planned to be fully operationalIt’s very inspiring to work in an environment where so many people are working 24-7 towards one single goalSome major changes in data acquisition are coming up after that:

The implementation of the Silicon Track Trigger in L2The transfer from windows NT to Linux-based farms

NIPHADJune 27, 2001


The near futureBy the start of June, I have finished most of my SMT database work

I am still responsible for maintenance of the SMT readout database, but this only takes time when there is actually re-cabling being done

Putting my DAQ expertise to work for the experiment:

Spending time in the Control Room, as a DAQ expert

It’s time to start thinking about physicst-tbar to all jets (difficult but interesting, neural networks necessary, lots of correlated variables)

Documents

NIPHAD June 27, 2001 Freya Blekman, NIKHEF Amsterdam 1 NIPHAD meeting June 27,2001 Freya Blekman D0 S ilicon C alibration and R eadout M anagement