New Resonant Step Up Down Converters

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 1, JANUARY 2010 249

New Resonant Step-Down/Up ConvertersMasoud Jabbari, Student Member, IEEE, and Hosein Farzanehfard, Member, IEEE

Abstract—This paper presents two new resonant step-down/upconverters, where all active elements operate under soft-switchingcondition independent of load and operating voltages. One of theproposed converters has positive voltage gain and the other hasnegative voltage gain. Although, the proposed topologies are simi-lar to that of the single ended primary inductor converter, opera-tions of the proposed converters are completely different. In fact,the inductors and coupling capacitor create resonant networks.Thereby, not only soft-switching condition is achieved, but alsothe passive components size is reduced considerably. Experimentalresults from a 250 W laboratory prototype verify the presentedoperation and theoretical analysis of the proposed converters.

Index Terms—Resonant converter, soft-switching, step-down/upconverter, zero current switching (ZCS).

I. INTRODUCTION

SOFT-SWITCHING techniques are developed to reduceswitching losses and electromagnetic interference (EMI).

At soft-switching condition, switching frequency can be in-creased to enhance the converter power density. This conditionis commonly attained by zero voltage switching (ZVS) and zerocurrent switching (ZCS) [1]–[3]. An insulated gate bipolar tran-sistor (IGBT) is a proper switch for power applications. ZCStechnique is compatible with the IGBT characteristics becausetailing-current losses are eliminated. Since conduction losses ofIGBT are mainly a function of the average rather than the rmscurrent, higher peak-to-average due to the sinusoidal currentwaveforms of the resonant converters is not detrimental [1], [4],and [5]. In order to decrease current stresses, unnecessary en-ergy circulation should be prevented and hence unidirectionalswitches are employed [1]–[3].

Conventional buck-boost-type converters include the basicpulsewidth modulation (PWM) buck-boost and Cuk converters,which provide negative voltage gain, and, single ended pri-mary inductor converter (SEPIC) and Zeta converters whichprovide positive voltage gain [6]–[29]. These converters arewidely employed as power supplies [9]–[29] and PFC regula-tors [6]–[8]. In Cuk, SEPIC, and Zeta converters, the couplingcapacitor is the main energy storage element and thus its volt-age should be almost constant. A significant disadvantage isthe requirement of a large capacitor with a high ripple-current-carrying capability [1]. Various methods have been presented inthe literature to provide soft-switching condition for the SEPICconverter [6]–[29]. Almost all of these methods preserve the

Manuscript received January 20, 2009; revised June 7, 2009. Current versionpublished January 29, 2010. Recommended for publication by Associate EditorM. Vitelli.

The authors are with the Department of Electrical and Computer Engineer-ing, Isfahan University of Technology, Isfahan 84154, Iran (e-mail: [email protected]; [email protected]).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2009.2028734

Fig. 1. (a) Proposed noninverting. (b) Inverting step down/up converters.

overall operation of the SEPIC converter while attempting toachieve soft-switching condition by adding auxiliary elements.The number of added elements is between 2 for quasi-resonanttype [2], [3] and 7 in complex cells [18], [19]. However, thenumber of elements of a converter is one of the most importantconsiderations, since it greatly affects on the converter cost andvolume.

In this paper, two new resonant step-down/up dc–dc convert-ers are presented where both have exactly the same operationexcept the sign of voltage gain [Fig. 1(a) and (b)]. All switchesare turned on and off at ZCS and the diode operates at ZCS orZVS. In view of step down/up voltage gain with positive outputvoltage polarity and the general topology of the proposed circuitas shown in Fig. 1(a), it is very similar to the SEPIC converterwith only one extra switch at input. The coupling capacitor Cr

which still provides magnetic isolation, is now a resonant ca-pacitor and hence its capacity becomes much less than that ofthe conventional SEPIC converter. Consequently, the operationof the proposed converters is completely different than the con-ventional SEPIC converter. In other words, in the proposed con-verters, Cr and inductors constitute resonance networks. Thetransistors Q1 and Q2 , which in fact construct a half-bridgestructure, are unidirectional switches and thus energy does notreturn to source. Moreover, the inductor L1 eliminates the spikycurrent flowing through the on switch and the output capaci-tance of the off switch. The converters can operate at DCM andCCM where soft-switching condition is always attained inde-pendent of load and operating voltages. In the proposed topolo-gies, soft-switching condition is provided by adding only oneextra element, and current stresses and size of the passive com-ponents are considerably reduced. All these merits are obtainedonly at the cost of relatively higher voltage stress of one of theswitches. However, in comparison to current stress and energy

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250 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 25, NO. 1, JANUARY 2010

circulation, voltage stress does not produce extra conductionlosses. Thus, the proposed converters are suitable for high cur-rent applications but not suitable for high voltage purposes. Incomparison with the conventional SEPIC converter, the inputcurrent is discontinuous. Considering the major advantages cre-ated by this topology, an LC filter can be added at the input tomake the source current continuous if deemed necessary.

II. ANALYSIS OF THE CONVERTERS

Both proposed converters have four operating conditions; twostates at discontinuous conduction mode (DCM) and two statesat continuous conduction mode (CCM). These conditions areviewed for the current of L2 which is defined as resonance cur-rent, ir . In the following discussions, the converter of Fig. 1(a)is considered. To simplify the analysis, it is assumed that theconverter is in steady state, all elements are ideal, and output ca-pacitor C is large enough such that the output voltage is constantduring one switching cycle. Following definitions are made:

Lr = L1 + L2 (1)

α =L2

Lr, α ≤ 1 (2)

ωr =1√

LrCr

, fr =1Tr

=ωr

2π(3)

Zr =√

Lr/Cr (4)

r =R

Zr(5)

A =|VO |VS

. (6)

In the converter of Fig. 1(a), assume that the resonance voltagevr is −VO , and all semiconductor devices are off. By turningQ1 on at t = t1 , the voltage across L2 is as (7). Thus D does notturn on if vL2 (t

+1 ) < VO , or α < A/(1 + A)

vL2 (t+1 ) =

L2

L1 + L2(VS + VO ) . (7)

A. DCM Operation with α < A/(1 + A)

Fig. 2 illustrates key waveforms of the converter at DCMcondition with α < A/(1 + A). The modal analysis is as follows.

1) Mode I (t1 − t2): At t1 , Q1 is turned on at ZCS and Cr ischarged through a resonance with L1 and L2 . At t2 , ir reacheszero and Q1 is turned off at ZCS. At this time vr has reached2VS + VO

vr (t)VS

= 1 − (1 + A) cos(ωr (t − t1)) (8)

ir (t) =VS + VO

Zrsin(ωr (t − t1)) (9)

t2 − t1 =Tr

2. (10)

Fig. 2. DCM operation with α < A/(1 + A).

2) Mode II (t2 − t3): At t2 , Q2 is turned on at ZCS and thepolarity of vr starts reversing until it reaches −VO at t3

vr (t)VS

= (2 + A) cos(

ωr√α

(t − t2))

(11)

ir (t) = −2VS + VO√αZr

sin(

ωr√α

(t − t2))

(12)

t3 − t2 =√

α

ωr

[π − cos−1 A

2 + A

](13)

ir (t3) = − 2VS√αZr

√1 + A. (14)

3) Mode III (t3 − t4): At t3 , the diode D becomes forwardbiased at ZVS, hence vr stays constant at −VO and ir is divertedto the diode since C is much larger than Cr . The magnitude ofir decreases linearly until at t4 it reaches zero. At this time D isturned off at ZCS. Any time during this mode Q2 can be turnedoff at ZVZCS. The entire energy absorbed by Cr in Mode I isnow pumped to the output

ir (t) = ir (t3) +VO

L2(t − t3) (15)

t4 − t3 =2√

α

ωr

√1 + A

A. (16)

4) Mode IV (t4 − t5): In this mode, all switches are off andthe load is supplied by the output capacitor. Duration of thisinterval is determined by the controller, so that proper voltageregulation is attained (deadtime control).

According to the equivalent circuits of each operating mode,all stray inductors and the switches parasitic inductances areabsorbed by L1 and L2 . Since the diode is turned on at ZVS,its parasitic capacitor has been absorbed by Cr . In other words,when Q2 is turned on, C and Cr are set in parallel with D. These

JABBARI AND FARZANEHFARD: NEW RESONANT STEP-DOWN/UP CONVERTERS 251

Fig. 3. DCM operation with α > A/(1 + A).

features are common characteristics in the all-remaining statesas discussed in the following paragraphs.

At steady state, the converter voltage gain A can be calculatedby satisfying energy conservation principle in one switchingcycle as (17) where fS = T−1

S is the switching frequency. Bysubstituting (9) in (17), and defining S as (18), A is obtained as(19)

∫

TS

VS i1dt =∫

TS

V 2O

Rdt (17)

S = 2RCrfS =r

π

fS

fr(18)

S =A2

1 + A⇒ A =

S +√

S2 + 4S

2. (19)

In the absence of deadtime (Mode IV), the converter operatesat its maximum power handling capability where the switchingfrequency is also at maximum. By substituting TS = t4 − t1in (18) and applying (10), (13), and (16), maximum attainablevoltage gain Am is obtained as (20). This equation is requiredfor the converter design

r =√

αA2m

1 + Am

[π

2

(1+

1√α

)+

√1 + Am

Am− 1

2cos−1 Am

2+ Am

].

(20)

B. DCM Operation with α > A/(1 + A)

Operation of the converter at DCM with α > A/(1 + A) isshown in Fig. 3.

1) Mode I (t1 − t2): At t1 , Q1 is turned on at ZCS and Cr ischarged through a resonance with L1 . The diode D also conductsand thus ir increases linearly until at t2 reaches i1 . Duration of

this mode is obtained form ir (t2) = i1(t2)

vr (t)VS

= (1 − A) − cos(

ωr√1 − α

(t − t1))

(21)

i1(t) =VS√

1 − αZr

sin(

ωr√1 − α

(t − t1))

(22)

ir (t) =VO

L2(t − t1) . (23)

2) Mode II (t2 − t3): At t2 , D is turned off at ZCS, and theresonance current which is now equal to i1 continues via Q1until at t3 it reaches zero and thereby Q1 is turned off at ZCS

[ir (t)

vr (t) − VS

]

=

VS − vr (t2)

Zrir (t2)

Zr ir (t2) vr (t2) − VS

×[

sin(ωr (t − t2))

cos(ωr (t − t2))

]

. (24)

3) Mode III (t3 − t4): Similar to Mode II for the case ofα < A/(1 + A)

vr (t) = vr (t3) cos(

ωr√α

(t − t3))

(25)

ir (t) = − vr (t3)√αZr

sin(

ωr√α

(t − t3))

. (26)

4) Mode IV (t4 − t5): Similar to Mode III for the case ofα < A/(1 + A)


L2(t − t4). (27)

5) Mode V (t5 − t6): The same as Mode IV for the case ofα < A/(1 + A).

C. CCM Operation

When switching pattern includes deadtime, the proposed con-verters operate at DCM in which operating modes depend onA and α. By eliminating deadtime, CCM operation is achievedindependent of A and α, where Q1 is turned on prior to zero-crossing instant of ir . As shown in Fig. 4, ir goes positive withinon time duration of Q1 and thus i1 intersects ir at t2 . At thiscondition, except (22), other equations and all modes are exactlythe same as the DCM condition with α > A/(1 + A) illustratedpreviously. Equation (22) is now replaced by (28)


L2(t − t1). (28)

D. Deep-CCM Operation

This condition, deep-CCM, is illustrated in Fig. 5, where iris always nonpositive and Q2 is turned on after zero-crossinginstant of ir . At deep-CCM, except a short interval from t2 tot3 , charge is transmitted to the load and therefore lower outputvoltage ripple and current stresses are achieved. In other words,during t5 to t6 , simultaneously Cr is charged and load is suppliedby both VS and current of L2 .


Fig. 4. CCM operation.

Fig. 5. Operation at deep-CCM.

1) Mode I (t1 − t2): At t1 , Q1 is turned on at ZCS, energyis transferred to the load, and Cr is charged. At t2 , i1 reacheszero and then Q1 is turned off at ZCS

vr (t)VS

= (1 − A) − cos(

ωr√1 − α

(t − t1))

(29)

i1(t) =VS√

1 − αZr

sin(

ωr√1 − α

(t − t1))

(30)


L2(t − t1) (31)

t2 − t1 =π√

1 − α

ωr. (32)

2) Mode II (t2 − t3): At t3 , ir reaches zero, D is turned offat ZCS, and Q2 is turned on at ZCS.

vr (t)VS

= (2 − A) = cte. (33)


L2(t − t2) (34)

t3 − t2 = −L2ir (t2)VO

. (35)

3) Mode III (t3 − t4): Similar to Mode II for the case ofα < A/(1 + A)

vr (t)VS

= (2 − A) cos(

ωr√α

(t − t3))

(36)

ir (t) = −2VS − VO√αZr

sin(

ωr√α

(t − t3))

(37)

t4 − t3 =√

α

ωr

[π − cos−1 A

2 − A

](38)

ir (t4) = − 2VS√αZr

√1 − A. (39)

4) Mode IV (t4 − t5): Similar to Mode III for the case ofα < A/(1 + A)


L2(t − t4) (40)

t5 − t4 =2√

α

ωr

√1 − A

A. (41)

Similar to (20), maximum attainable voltage gain Am at deep-CCM is given by (42). Since the converter output power is notincreased by reducing the interval t4 to t5 , deep-CCM can beonly one point of operation. As a result, the converter voltagegain at deep-CCM is A = Am as (42) where Am is always lessthan unity.

r =√

αA2m

[π

2+

√1 − Am

Am− 1

2cos−1 Am

2 − Am

]. (42)

State of deep-CCM can be achieved if (t7 − t4) > (t6 − t5).By using (32) and (41), (43) is obtained. By simplifying thisinequality, constrain of deep-CCM is achieved as (44)

2√

α

ωr·√

1 − A

A>

π√

1 − α

ωr(43)

α >π2A2

π2A2 − 4A + 4. (44)

For A < 1, the right side of (44) is ascending. Thus, minimumof α is obtained as (45). Since Amax is determined, deep-CCMcan be achieved by choosing α ≥ αmin

αmin =π2A2

max

π2A2max − 4Amax + 4

. (45)

Although deep-CCM can be only one point of operation, itprovides a good insight to design of the converter. The converteris designed such that it sets at deep-CCM at its maximum outputpower. By decreasing the load, or increasing the source voltage,


Fig. 6. Maximum achievable voltage gain (Am ) versus r/π , in DCM (left), and in CCM (right).

the converter goes to CCM. Further decrease of load leads toDCM operation.

III. DESIGN GUIDELINES

Maximum achievable voltage gain Am versus r/π with log-log scale is plotted in Fig. 6. In a certain design, Amax is deter-mined and thus r is obtained by equating Am = Amax . Then Zr

is obtained from Zr = Rmin/r where Rmin = V 2O /Pout,max . In

DCM, there is no limitation for Am and, therefore, the con-verter can operate as a step-down/up converter. In DCM withα < A/(1 + A), first Cr is charged completely and then its storedenergy is pumped to the output. In DCM with α > A/(1 + A), thereceived energy from VS charges Cr and simultaneously feedsthe output. Then the energy which was absorbed by Cr is de-livered to the output as well. Consequently, Cr gets less chargewith respect to the previous state and thus its voltage does notreach 2VS + VO . As a result, less current stress, voltage stress,and output voltage ripple is obtained for this state. Consider thatat startup (A = 0), the scenario of α > A/(1 + A) is performed.At deep-CCM, the converters can only operate as a step-downconverter. Am in CCM places between deep-CCM and DCMas shown in Fig. 6 for α = 0.75. In CCM, the converter canoperate as a step-down/up regulator similar to that of DCM butwith lower stresses and output voltage ripple.

To control the converter, beginning of switching pattern canbe set at turn-on instant of Q2 . Therefore, Q2 is first turned on;then, is turned off when its current crosses zero. Since the emitterof Q2 is grounded, zero-crossing instant of its current can bedetected easily. After an interval equal to TC (control time), Q1is turned on. When the zero-crossing instant of Q1 current isdetected, this switch is turned off. Always, by decreasing TC ,the converter voltage gain is increased. Thus, the control circuitis simple and voltage regulation is easily attained by controllingTC .

IV. DESIGN PROCEDURE

As an example, consider a 250 W voltage regulator, 310 V ±20% source voltage to 156Vdc ± 1% output voltage.

Step 1) By substituting Amax = 156/248 in (45), αmin =0.725 is obtained; then α = 0.75 is chosen.

Step 2) By applying Am = Amax in (42), r = 0.683 is at-tained. With 20% overdesign, the minimum of loadresistance is R = 1562/(1.2 × 250). By substitutingthese values in (5), Zr = 119 Ω is achieved.

Step 3) On time durations of the switches is proportionalto Tr . Using Tr = 25 µs leads to Cr = 33.5 nF,L1 = 118 µH, and L2 = 355 µH. With these val-ues, maximum switching frequency is 78 kHz, whichoccurs at deep-CCM.

Step 4) In order to achieve peak-to-peak output voltage rippleequal to 0.02× 156 V, simulation shows that the valueof the output capacitor should be C = 15.6 µF. Thisvalue is obtained for the worst case (Pout = 25 W andVS = 372 V).

In this design, the condition α > A/(1 + A) is always held.

V. EXPERIMENTAL RESULTS

Experimental results of the designed converter are presentedin this section. Employed switches are Q1 = APT27GA90K,Q2 = APT28GA60K and D = MUR860. For VS = 310 V andPout = 200 W, soft-switching performance of Q1 and Q2 arepresented in Figs. 7 and 8, respectively. In both figures, wave-forms of collector–emitter voltage and collector current of theswitches are shown respectively from top. The small spiky cur-rent created at Q2 turn on instant is due the reverse–recoveryproblem of the diode. The resonance voltage vr and diode cur-rent are presented in Fig. 9, and output voltage ripple is shown inFig. 10. Voltage regulation, switching frequency, and efficiencyversus output power are illustrated in Figs. 11 to 13.

VI. EVALUATION

According to the presented analysis, operation of the pro-posed non-inverting converter [Fig. 1(a)] is completely differentfrom the operation of the conventional SEPIC converter. How-ever, both converters have almost similar topologies and providea non-inverting voltage gain. Comparison of the designed con-verter with an ideal SEPIC converter is presented in Table I.


Fig. 7. Soft-switching operation of Q1 (5 µs/div), VCE : 200 V/div (top), IC :2.5 A/div (bottom).

Fig. 8. Soft-switching operation of Q2 (5 µs/div), VCE : 200 V/div (top), IC :2.5 A/div (bottom).

Fig. 9. Resonance voltage: 200 V/div (top), and diode current: 2.5 A/div(bottom) – (5 µs/div).

Fig. 10. Output voltage ripple: 0.5 V/div, 10 µs/div.

Maximum switching frequency of the proposed converter is78 kHz that occurs at deep-CCM. In the SEPIC converter, itis assumed that its switching frequency is constant and equalto 78 kHz. The values of L1 and L2 are set the same as thoseof the proposed converter, but Cr is designed such that voltageripple of Cr to be less than 5%. As mentioned in Table I, at

Fig. 11. Voltage regulation versus output power (W).

Fig. 12. Switching frequency versus output power (W).

Fig. 13. Efficiency versus output power (W).

TABLE ICOMPARISON OF THE SEPIC AND PROPOSED CONVERTER

the same operating conditions, the required Cr coupling (cou-pling capacitor) in an ideal SEPIC converter is 20 times largerthan Cr (resonant capacitor) in the proposed converter. More-over, the current stress of the semiconductor devices is lower.Voltage stress of Q1 in the proposed converter is always less


TABLE IIDISTRIBUTION OF THE EMPLOYED AUXILIARY ELEMENTS IN SEVERAL PAPERS

than or equal to that of an ideal SEPIC converter but voltagestress of Q2 is about 2VS which is due to the resonant operationof the proposed converter. Since an ideal SEPIC converter isconsidered (the switching losses are neglected and all elementsare supposed to be ideal), these assessments can be viewed as acomparison between the proposed converter and the best possi-ble soft-switching SEPIC converter. On the other hand, in a morerealistic design for the hard-switching SEPIC converter withIGBT, the switching frequency is limited to 20 kHz. Therefore,capacity of the coupling capacitor of SEPIC converter becomesabout 2700 nF (against 33.5 nF for the proposed converter) andits current stress becomes about 33 A. Certainly, the currentstress can be reduced at the expense of increasing L1 and L2 .Moreover, the switch voltage spikes created by hard-switchingoperation should be taken into account.

Various methods have been presented in the literature to re-alize a soft-switching step down/up converter based on SEPICtopology [2], [3], [6]–[29]. Their employed auxiliary circuit ele-ments presented in Table II show that the proposed topologies inthis paper have minimum number of additional element. More-over, unconstrained soft-switching condition is provided for allactive elements. Since ZCS turn-off is always attained, silicon-controlled rectifier (SCR) can be employed for high-power/low-cost applications. Ignoring the fact that passive components inthe proposed converters create resonant networks and therebytheir values are significantly reduced, the following comparisonsare performed. The advantage of ZCS quasi-resonant convert-ers [2], [3] is that only a passive resonant cell is added. However,in these converters, soft-switching condition is constrained andis lost at transient states. In all six quasi-resonant classes withtwo additional elements, voltage and current stresses are highand operation at light-load is problematic [2], [3].

In the recent method [26], an additional transformer is em-ployed to reduce voltage ripple (not to provide isolation) wherethe auxiliary network contains one switch, one diode, andone capacitor. However, the presented circuit in [26] is hard-switching and can operate as either a step-down or step-up con-verter. In [27], a transformer with two output windings providesisolation, rectifiers exist at the secondary side, and an activesnubber (a switch and a capacitor) is used to absorb the energystored in the transformer leakage inductance. Even though theadvantages of current sharing are achieved, but ZVS conditionis attained only at turn on instant. In [28] two extra capacitorsare used to create a resonant SEPIC converter, however, the pre-sented converter is very low power (3 W). In the most recent

ZCT cell presented in [29] two switches operate out of phase andshare the output current while providing soft-switching condi-tion for each other. The operation of this converter is very simpleand enjoys high efficiency among its rivals. In this method, atransformer ought to be used and the voltage stress of the auxil-iary diode is very high. According to the design considerationsand tradeoffs presented in [29], a laboratory prototype at thesame conditions is implemented. In Fig. 13, efficiency of thisconverter is compared with the efficiency of the proposed con-verter in this paper. Efficiency of the proposed converter is about1% less because its conduction losses are more. However, thereare fewer additional elements in the proposed converters andalso the size of passive components employed in the proposedconverters is considerably lower.

VII. CONCLUSION

Two new resonant step-down/up converters were presentedwhere all active elements operate under soft-switching condi-tion independent of load and operating voltages. In the proposedconverters, inductors and coupling capacitor create resonant net-works. Thereby, not only soft-switching condition is achieved,but also the passive components size is small. The converterscan operate in DCM and CCM. Experimental results from a 250W laboratory prototype verified the presented operation andtheoretical analysis of the proposed converters.

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Masoud Jabbari (S’08) was born in Isfahan, Iran, in1979. He received the B.S. degree from Kashan Uni-versity, Kashan, in 2001, and the M.S. degree from theIsfahan University of Technology, Isfahan, in 2003,both in electrical engineering. He is currently work-ing toward the Ph.D. degree at the Department ofElectrical and Computer Engineering, Isfahan Uni-versity of Technology.

His current research interests include soft-switching techniques in high-frequency high-powerdc–dc and dc–ac converters, power factor corrections,

and active power filters.

Hosein Farzanehfard (M’08) was born in Isfahan,Iran, in 1961. He received the B.S. and the M.S. de-grees in electrical engineering from the University ofMissouri, Columbia, in 1983 and 1985, respectively,and the Ph.D. degree from Virginia Polytechnic In-stitute and State University, Blacksburg, in 1992.

Since 1993, he has been a Faculty Member at theDepartment of Electrical and Computer Engineering,Isfahan University of Technology, Isfahan, where heis currently an Associate Professor and the Presidentof the Information and Communication Technology

Institute. His current research interests include high-frequency soft-switchingconverters, pulse power applications, power factor correction, active power fil-ters, and high-frequency electronic ballasts. He is the author or coauthor ofmore than 70 technical papers published in various journals and conferenceproceedings.

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