Nanomanufacturing Presentation for UT in Silicon Valley 2013

March 6th, 2013

Roger Bonnecaze, S.V. Sreenivasan, John Ekerdt

UT-Austin Silicon Valley Event

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Agenda• NASCENT’s vision and transformational manufacturing

technologies– Roger Bonnecaze, NASCENT co-Director

• NASCENT enabled nanodevices and impact on mobile computing– S.V. Sreenivasan, NASCENT co-Director

• NASCENT unique facilities for scalable nanofabrication and computational nanomanufacturing– John Ekerdt, NASCENT Research Thrust Leader

UT Austin in Silicon Valley Event

NASCENT

Machines, Materials, Models

& Devices

NASCENT Vision

Systems

Enabling Technologies

Fundamental Knowledge

3UT Austin in Silicon Valley Event

Nano-Enabled Electronic, Energy & Healthcare

Device Needs

Nano-scale manufacturers

NASCENT

NASCENT Transformative Nanomanufacturing Systems

UT Austin in Silicon Valley Event 4

• Wafer-scale nanosculpting

• Roll-to-roll (R2R) self-aligned nanosculpting and nanomaterials

• Exfoliated silicon

• In-line nanometrology

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• Low Waste– Near-zero waste ink jet functional and sacrificial material deposition– Efficient use of crystalline materials via exfoliation– Reuse of expensive materials such as copper in graphene fabrication

• Low Fiscal Cost– High throughput systems– Reliable precision systems – Enhanced process yields

Low Fiscal and Environmental CostsNASCENT Transformational Technologies


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Research ThrustsNanoscale

Manufacturing and Metrology

Precision, reliability,metrology, and yield

Nano-Enabled Mobile DevicesOptimal design for

device performance and manufacturability

IntegratedNanomaterials

Processable materials for devices and

machines

MultiscaleManufacturing

ModelingValidated, UQ models

for scale-up and process control

High-ValuenMfg


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Generic Mobile Computing/Energy Devices• GOAL

Exploit NASCENT transformational nanomanufacturing systems to engineer device solutions for mobile computing/energy

– Wafer scale nanomanufacturing solutions– Roll-to-roll nanomanufacturing solutions


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Competitive Memory Landscape

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SRAM DRAM Flash (NOR)

Flash(NAND) FeRAM MRAM PRAM RRAM STT-RAM

Non-volatile No No Yes Yes Yes Yes Yes Yes Yes

Cell size (F2) 50-120 6-10 10 5 15-34 16-40 6-12 6-10 6-20

Read time (ns) 1-100 30 10 50 20-80 3-20 20-50 10-50 2-20

Write/Erasetime (ns) 1-100 15 1μs/

10 ms1 ms/ 0.1 ms 50/50 3-20 50/120 10-50 2-20

Endurance 1016 1016 105 105 1012 >1015 108 108 >1015

Write power Low Low Very high Very high Low High Low Low Low

Other power consumption

Current leakage

Refresh current None None None None None None None

High voltage required No 3 V 6-8 V 16-20 V 2-3 V 3 V 1.5-3 V 1.5-3 V <1.5 V

Ref: Grandis Existing Products Prototype


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STT memory cellReference layer

Barrier

Storage layer

Universal bit line

Inter-STT-cell dielectric

memory plane

Si CMOS logic & interconnects

STT contact pad CMOS contact pad

Project 1: Low Power Logic using STTRAM


MULTI-BIT MEMORY

BASED ON STT-RAM

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Generic Mobile Computing/Energy Devices• GOAL

Exploit NASCENT transformational nanomanufacturing systems to engineer device solutions for mobile computing/energy

– Wafer scale nanomanufacturing solutions– Roll-to-roll nanomanufacturing solutions


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Roll to Roll NanophotonicsSub-50nm Wire Grid Polarizers (WGP)

Backlighting

Large AreaWire Grid Polarizer

Brighter and higher contrast with less backlighting

• Improved Contrast Ratio• Longer Battery Life• Thinner Display• Reduced BoM

Second PolarizerFirst Polarizer

Traditional Organic Polarizer

Backlighting

Absorptive film that is laminated on LCD glass

Aluminum lines of a WGP

50nm half pitch


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Smart Cameras:Graphene-Polymer Plasmonic Photodiode Architecture


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NASCENT Infrastructure

High Speed R2RFacility

Large Area Wafer-Scale Facility

Leveraged

• Distributed NNIN and Other Fabrication Facilities

• Texas Advanced Computing Center (TACC)

• NanoHUB Resource for Simulations

• Exfoliated single crystal films, nanomagneticmaterials, etc.

• Flex materials including carbon based & organic semiconductors

• Nanomanufacturing Process Development• Nano-Enabled Device Prototyping • Multiscale Modeling and Simulation

p gMultiscale Modeling and Simulation Facility

• Scale-Up and Real-Time Decision Making

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Nanomanufacturing FacilityWafer-Scale and R2R Fabrication Facility

• Established processes complemented by NASCENT test-beds

– Example of wafer-scale fabrication facility


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Machines, Materials, Models

& DevicesNanomanufacturing SystemsNano-Enabled

Needs

Nano-Enabled Electronic, Energy & Healthcare Device

Needs

Nano-scale manufacturers

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Cross-cutting Modeling Vision: Computational tools to rapidly create and evaluate nanomanufacturing processes and systems.

Goals:• Create multiscale process models for for scale-up, design

and optimization.• Derive reduced-order models suitable for fault detection

and process control.• Verify, validate and quantify uncertainty in model

predictions.

Outcome: Accelerated process development and deployment.


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NASCENT Summary

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Transformative Research

Educating Innovators

IndustryPartners


Documents

Nanomanufacturing Presentation for UT in Silicon Valley 2013