MOSFET/IGBT DRIVERS THEORY AND APPLICATIONSread.pudn.com/downloads157/ebook/699784/mosfet igbt drivers.pdf · IXYS Line of MOSFET/IGBT Drivers 4.1. Technical details of all IXYS Drivers

IXYS Corporation; 3540 Bassett Street; Santa Clara, CA 95054; Tel: 408-982-0700; Fax: 408-496-0670IXYS Semiconductor GmbH; Edisonstr. 15; D-68623; Lampertheim, Germany; Tel: +49-6206-503-0; Fax: +49-6206-503627

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MOSFET/IGBT DRIVERSTHEORY AND APPLICATIONS

By Abhijit D. Pathak

© 2001 IXYS Corporation

APPLICATION NOTE AN-0002

1. Introduction

1.1. MOSFET and IGBT Technology.1.2. MOSFET Models and critical parameters1.3. Turn-on and Turn-off phenomenon and their explanations1.4. Power losses in Drivers

2. Types of Drivers

2.1. IC Gate Drivers2.2. Techniques available to boost current outputs2.3. Techniques available to generate negative bias during turn-off2.4. Need for under-voltage protections2.5. Overload and Short Circuit Protection

3. Isolation Techniques

3.1. Employing Charge-pump and Bootstrap Techniques3.2. Examples of use of Opto-couplers in practical Driver Circuits3.3. Examples using transformers in practical Driver Circuits

4. IXYS Line of MOSFET/IGBT Drivers

4.1. Technical details of all IXYS Drivers4.2. Features and Advantages of IXYS Drivers4.3. Applying IXYS Drivers in various topologies


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1. INTRODUCTION

Modern Power Electronics makes generous use ofMOSFETs and IGBTs in most applications and, if thepresent trend is any indication, the future will see moreand more applications making use of MOSFETs and IGBTs.

Although sufficient literature is available on characteristicsof MOSFETs and IGBTs, practical aspects of driving themin specific circuit configurations at different power levelsand at different frequencies require that design engineerspay attention to a number of aspects.

An attempt is made here to review this subject with someillustrative examples with a view to assist both experienceddesign engineers and those who are just initiated into thisdiscipline .

1.1 MOSFET AND IGBT TECHNOLOGY

Due to the absence of minority carrier transport, MOS-FETs can be switched at much higher frequencies. Thelimit on this is imposed by two factors: transit time of elec-trons across the drift region and the time required to chargeand discharge the input Gate and ‘Miller’ capacitances.

IGBT derives its advantages from MOSFET and BJT. Itoperates as a MOSFET with an injecting region on its Drainside to provide for conductivity modulation of the Drain driftregion so that on-state losses are reduced, especially whencompared to an equally rated high voltage MOSFET.

As far as driving IGBT is concerned, it resembles aMOSFET and hence all turn-on and turn-off phenomenacomments, diagrams and Driver circuits designed for driv-ing MOSFET apply equally well to an IGBT. Therefore, whatfollows deals only with MOSFET models.

1.2 MOSFET MODELS AND CRITICAL PARAMETERS

Fig. (1A) shows the internal cell structure of a DMOSMOSFET. As can be seen, the Gate to Source Capaci-tance consists of three components, viz, Cp, the compo-nent created by the Gate Electrode over the P-base re-gion; CN+, due to the overlap of the Gate Electrode abovethe N+ source region and, CO, arising due to the proximityof the Gate Electrode to the source metallization. In fact,all these are added to yield CGS, which we call Gate-to-Source Capacitance. It is this total value of capacitancethat needs to be first charged to a critical threshold voltagelevel VGS(th), before Drain Current can begin to flow. TheGate-to-Drain capacitance, CGD, is the overlap capacitancebetween the Gate electrode and the N-drift Drain region.CGD is sometimes referred to as the ‘Miller’ capacitanceand contributes most to the switching speed limitation ofthe MOSFET. The junction capacitance between the drainto the P-Base region is CDS. The P-Base region of theMOSFET is shorted to the N+ source. This is shown in theFig. (2), wherein curve of ID (Drain Current) versus VGS (Gate

Fig. (1A). MOSFET cell internal structure

Fig.(1B)Cross sectional view of N-Channel MOSFETshowing various inter-junction capacitances

FIG. (2). Transfer characteristics of a power MOSFET


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Source Voltage) is plotted. The graph has a slope (∆IDS/∆VGS) equal to gm, which is called transconductance.Please note that the actual relationship between VGS andID is shown by dotted line and it can be observed that inthe vicinity of VGS(th), the relationship between VGS and ID isparabolic in nature:

ID= K [VGS-VGS(th)]2

However, for Power MOSFETs, it is appropriate to con-sider the relationship to be linear for values of VGS aboveVGS(th).

Fig. (3A) shows a symbol of N-Channel MOSFET and anequivalent model of the same with three inter-junction para-sitic capacitances, namely: CGS, CGD and CDS. I have shownall these as variable as they indeed are. For example theCGD, decreases rapidly as the Drain to Source voltage rises,as shown in Fig. (3B). In Fig. (3B), the high value of CGD iscalled CGDh,while the low value of CGD is termed CGDl. Fig.(1B) shows another cross-sectional view of a MOSFET

with all these capacitances. In addition, It also shows theinternal body diode and the parasitic BJT.

1.3 Turn-on and Turn-off Phenomena

1.3.1 Turn-on Phenomenon

To understand Turn-on and Turn-off phenomena of the PowerMOSFET, we will assume clamped inductive switching asit is the most widely used mode of operation. This is shownin Fig. (4A) and Fig. (4B). A model of MOSFET is shownwith all relevant components, which play a role in turn-onand turn-off events. As stated above, MOSFET’s Gate toSource Capacitance CGS needs to be charged to a criticalvoltage level to initiate conduction from Drain to Source. Afew words of explanation will help understand Fig. (4A)and Fig. (4B). The clamped inductive load is being shownby a current source with a diode D connected antiparallelacross the inductor. The MOSFET has its intrinsic internalGate resistance, called RGint. As described above, the in-ter-junction parametric capacitances (CGS, CGD and CDS)are shown and connected at their proper points. VDD repre-sents the DC Bus voltage to the Drain of the MOSFETthrough the clamped inductive load. The Driver is suppliedby Vcc of value Vp and its ground is connected to thecommon ground of VDD and is returned to the Source ofthe MOSFET. The output from the Driver is connected tothe Gate of the MOSFET through a resistor RGext.

Now when a positive going pulse appears at the input ter-minal of the Driver, an amplified pulse appears at the out-put terminal of the Driver with an amplitude Vp. This is fedto the Gate of the MOSFET through RGext. As one can seethe rate of rise of voltage, VGS, over Gate and Source termi-nals of the MOSFET is governed by value of the total resis-

Fig. (3A). Symbol and equivalent circuit of a MOSFET

Fig. (3B). CGD variation with respect to VDS

Fig. (4A). A MOSFET being turned on by a driver in aclamped inductive load.


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tance in series (Rdr+RGext+RGint) and total effective value ofcapacitance (CGS+CGD). Rdr stands for the output sourceimpedance of the Driver. Rgext is the resistance one gener-ally puts in series with the Gate of a MOSFET to controlthe turn-on and turn-off speed of the MOSFET.

The waveforms drawn in Fig. (5) show variation of differentparameters with respect to time, so as to clearly explainthe entire turn-on sequence. In Fig. (4A) and Fig. (4B), theFree Wheeling Diode D is assumed to be ideal with zeroreverse recovery current. The waveforms shown in Fig. 5are based on this assumption.

From time zero to t1, (CGS+CGDl) is exponentially chargedwith a time constant T1=(Rdr+RGext+RGint)x(CGS+CGDl), untilGate-to-source voltage reaches VGS(th). In this time pe-riod, neither the Drain voltage nor the Drain current areaffected, i.e. Drain voltage remains at VDD and Drain cur-rent has not commenced yet. This is also termed turn-ondelay. Note that between 0 to t1, as VGS rises, IGS fallsexponentially, more or less like a mirror image of VGS, be-cause from the point of view of circuit analysis, it is an RCCircuit.

After time t1, as the Gate-to-Source voltage rises aboveVGS(th), MOSFET enters linear region as shown in Fig. (2).At time t1, Drain current commences, but the Drain toSource voltage VDS is still at VDD. However, after t1, ID buildsup rapidly. As can be seen in Fig. (3B), from time t1 to t2,CGD increases from C GDl to CGDh and current available fromthe Driver is diverted to charge this increased value of CGDh.As we shall see later, this is the real test of a Driver-howfast it can charge CGDh in addition to CGS.

Between t1 and t2, the Drain current increases linearly withrespect to VGS. At time t2, the Gate to Source voltage en-ters the Miller Plateau level. At time t2, the Drain voltagebegins to fall rapidly, while the MOSFET is carrying fullload current. During the time interval, t2 to t4, VGS remainsclamped to the same value and so does IGS. This is calledthe Miller Plateau Region. During this interval most of thedrive current available from the driver is diverted to dis-charge the CGD capacitance to enhance rapid fall of Drainto Source voltage. Only the external impedance in serieswith VDD limits drain current.

Beyond t4, VGS begins to exponentially rise again with atime constant T2= (Rdr+RGext+RGint)x(CGS+CGDh). During thistime interval the MOSFET gets fully enhanced, the finalvalue of the VGS determining the effective RDS(on). WhenVGS reaches its ultimate value, VDS attains its lowest value,determined by VDS= IDSxRDS(on).

In Fig. (5), A1 represents area of IG curve from time t1 to t2.This represents charge on (CGS +CGD), as it is the integra-tion of Gate current over a time period. Similarly A2 repre-sents charge on CGD, because it is an integration of IG withrespect to time from t2 to t3, during which time the Millereffect is predominant.

If one considers diode ‘D’ not to be ideal, then the reverserecovery of the diode will influence the turn on behavior and

F

Fig.(4B). A driver turning off a MOSFET controlling aclamped inductive load.

Fig. (5). MOSFET turn on sequence


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the waveforms would look like what is drawn in Fig. (6). Asthe diode undergoes reverse recovery, you can see a humpin the waveform of VGS as well as ID. This occurs aroundtime t2.

1.3.2 The Turn-off Phenomenon

The turn-off phenomenon is shown in Fig. (7). As can beexpected, when the output from the Driver drops to zero forturning off MOSFET, VGS initially decays exponentially atthe rate determines by time constant T2=(Rdr+RGext+RGint)x(CGS+CGDh) from time 0 to t1; however, af-ter t4, it decays exponentially at the rate determined byT1=(Rdr+RGext+RGint)x(CGS+CGDl). Please note that the firstdelay in the turn off process is required to discharge theCISS capacitance from its initial value to the Miller Plateaulevel.

From t=0 to t=t1, the gate current is flowing through CGSand CGD capacitances of MOSFET. Notice that the draincurrent ID remains unchanged during this time interval, butthe Drain Source voltage VDS just begins to rise. From t1 tot2, VDS rises from ID x RDS(on) towards its final off state value

of VDS(off), where it is clamped to the DC Bus voltage levelby the diode in the clamped inductive switching circuitbeing studied. This time interval also corresponds to theMiller region as far as the gate voltage is concerned asmentioned above, which keeps VGS constant.

During the next time interval, the VGS begins to fall furtherbelow VGS(th). CGS is getting discharged through any exter-nal impedance between Gate and Source terminals. TheMOSFET is in its linear region and Drain current ID dropsrapidly towards zero value. Remember that the Drain Volt-age VDS was already at its off state value VDS(off) at thebeginning of this interval. Thus at t4, the MOSFET is fullyturned off.

1.4 POWER LOSSES IN DRIVERS AND DRIVEN MOS-FET/IGBT

For determining the power loss in a Driver while driving apower MOSFET, the best way is to refer to the Gate ChargeQG vs. VGS curve for different values of VDS(off).

Fig. (6). MOSFET turn on sequence showing the effectof body diode reverse recivery.

Fig. (7). MOSFET turn off sequence


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PGATE= Vcc*QG*fsw

wherein Vcc is the Driver’s supply voltage, QG is the total

Gate Charge of the MOSFET being driven and fsw is theswitching frequency. It is prudent then to choose a MOS-FET with lower value of Qg and it is here that IXYS’ seriesof low Gate Charge MOSFETs with a suffix ‘Q’ are pre-ferred because they as well as the drivers incur lowerlosses.

As far as switching losses in a MOSFET are concerned,as can be seen in Fig. (5), Fig. (6) and Fig. (7), there aresome short time-intervals, during which finite VDS and finiteID coexist, albeit momentarily. When this happens duringturn-on, the actual integration

∫ VDS(t) ID(t) dt

is defined as Turn-On switching energy loss. Likewise,during turn-off, when finite values of ID and VDS coexist,integration of ∫ VDS(t)ID(t) dt

is called Turn-off switching energy loss in a MOSFET.Amongst the responsible parameters determining theseswitching energy losses, CISS, COSS and CRSS affect the turn-on and turn-off times as well as turn-on and turn-off delays.

For an IGBT, it would be similarly shown that

∫ VCE(t)IC(t)dt

represents switching energy loss. Needless to emphasizethat the time interval for these integrals would be the ap-propriate time during which finite values of ID and VDS orVCE and IC coexist in a MOSFET or IGBT respectively. Av-erage switching energy lost in the device can be com-puted thusly:

MOSFET: Ps=1/2*VDS*ID*fsw*(ton+toff)IGBT: Ps=1/2*VCE*IC*fsw*(ton+toff)

Main emphasis in modern Power Electronics is on reduc-ing total losses dissipated in devices and subsystems forhigher operating efficiency and achieving more compactdesigns, reducing volume and weight of resultant systems.Thus, operation at higher and higher switching frequenciesis now a necessity, and as a result, switching losses pre-dominate in power-loss-budget in semiconductor switches.Reducing switching losses then becomes the single mostcrucial goal. Keeping this goal in mind, the entire line ofIXYS MOSFET/IGBT Drivers are designed to facilitate thedesign of drive circuits that yield fast rise and fall times.

2. TYPES OF DRIVERS

2.1 IC DRIVERS

Although there are many ways to drive MOSFET/IGBT, ICDrivers have many features and convenience to offer fordesigners. Both Low-side and High-side Drivers are avail-able in IC forms.

2.2 TECHNIQUES AVAILABLE TO BOOST CURRENTOUTPUTS

Totem pole stage with N-Channel and P-Channel MOSFETscan be used to boost the output from an IC Driver. Thedisadvantage is that the signal is inverted and also thereexists shoot through when common gate voltage is in tran-sition.

Totem pole arrangement using matched NPN-PNP tran-sistors, on the other hand, offer many advantages, whileboosting the output currents from IC Drivers. Shoot throughphenomenon is absent in this case. The pair of transistorsprotects each other’s base-emitter junctions and handlecurrent surges quite well. One such arrangement is shownin Fig. (14). Here Q1 is a NPN transistor, while Q2 is amatched PNP transistor with appropriate collector currentrating and switching speed to satisfy Drive requirement forthe High Power IGBT. Another feature added is –ve bias forguaranteed fast switch-off even in electrically noisy envi-ronment. This is done, by utilizing power supply with +15and –5 Volts output, whose common ground is connectedto the IGBT emitter.

IXDD408 is a very high speed IC Driver with extremely shortrise and fall times and propagation delays. Its Vcc ratingis 25 VDC and can actually deliver 8 Amperes peak outputcurrent. The arrangement shown in Fig. (14) does a fewmore things in addition to boosting the output current stillhigher. It allows one to choose different Turn-On and Turn-Off times by choosing different values of Rgon and Rgoff. Itallows for incorporating –ve bias for reasons explainedabove. A pair of 18V Zener diodes with their cathodes con-nected together, protects the Gate-Emitter Junction of IGBTfrom voltage spikes.

2.3 TECHNIQUES TO GENERATE –Ve BIAS DURINGTURN-OFF

Importance of –ve bias during turn-off for practically all semi-conductor switches cannot be overemphasized, as onemay recall from the days of Bipolar transistors. This helpsto quickly remove any charge on the CGS and CGD in thecase of MOSFETs and IGBTs, thus considerably acceler-ating turn-off.


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It is important to understand that turn-on speed of a MOS-FET or IGBT can be increased only upto a level matchedby the reverse recovery of rectifiers or diodes in a powersupply, because in an inductive clamped load (most com-mon), turn-on of a MOSFET or IGBT coincides with turn-off(or reverse recovery completion) of the rectifier diode. Anyturn-on faster than this does not help. Too fast a turn-oncould also cause oscillation in the Drain or Collector cur-rent. However, it is always beneficial to have a Driver withintrinsic low turn-on time and then be able to tailor thiswith a series gate resistor.

Turn-off phenomenon, on the other hand, does not have towait for any other component in the subsystem. It is herethat any enhancement technique can be utilized. AlthoughIXYS drivers themselves feature extremely low turn-on andturn-off times, arrangement to provide –ve bias during turn-off helps still faster turn-off and prevents false turn on evenin electrically noisy environment.

Fig. (12C) demonstrates one way of generating –ve biasduring turn-off. Fig. (18) shows how to generate –ve bias ina transformer coupled Drive circuit arrangement. Here Ze-ner diode can be chosen of appropriate voltage for givingthat much –ve bias (plus one diode drop) during turn-off. InFig. .(16) a method of using isolated DC to DC converterwith outputs of +15 and –5 V is used to power IXDD414,while by connecting isolated ground of this DC to DC Con-verter to the emitter of the IGBT being driven, ensures –5 Vof –ve bias during turn-off.

2.4 NEED FOR UNDER-VOLTAGE PROTECTION

Fig. (2) shows a transfer characteristics (ID vs. VGS) of aMOSFET. As can be seen for values of VGS below VGS(th)the drain current is negligible, but in this vicinity, the de-vice is in its linear (Ohmic) region and concurrent applica-tion of large values of VDS could cause considerable amountof localized heating of the junction. In short, when a MOS-FET is being used as a switch, any operation in its linearregion could cause overheating or device failure. Bringingthe MOSFET quickly into its saturation from its off-state isthe Driver’s job. And, if Vcc is below the minimum requiredvalue, linear operation can ensue to the detriment ofMOSFET. I hasten to add, however, that most PWM ICs,controller ICs and microcomputer ICs have this protectionfeature built-in and, if sharing the same Vcc bus, the DriverIC gets the benefit of this function being implemented else-where in the subsystem.

2.5 OVERLOAD/SHORT CIRCUIT PROTECTION

Any operation of MOSFET/IGBT outside the Safe Operat-ing Area could cause overheating and eventual device fail-

ure and should be prevented by an electronic active moni-toring and corrective arrangement.

Load or current sensing could be done by either a HallEffect Sensor or by a Shunt resistor in series with source/emitter terminal. The voltage picked up, which is propor-tional to current, is low pass filtered and then compared toa preset limit. The comparator output could initiate turn-offof MOSFET/IGBT. A circuit to detect overload/short circuitis shown in Fig. (16), where the output FAULT will go lowwhen it occurs.

All IXDD series of Drivers have an ENABLE pin, which,when driven low, say, by the FAULT output from this com-parator, puts the final N-Channel and P-channel FETs ofthe IXDD Driver in its TRISTATE mode. This not only stopsany output from the Driver, but also provides an environ-ment for implementing soft turn-off. There are two ways ofdoing this. Just by connecting a resistor of appropriatevalue from Gate to source/emitter, the CGS gets dischargedthrough this resistor and, depending on the value of theconnected resistor, soft turn-off of any duration can beachieved. Another way, as shown in the Fig. (9), is to usea signal MOSFET Q1 to pull down the Gate, when shortcircuit is detected. The resistor in series with this signalMOSFET determines the time duration of this soft turn-off.Soft turn-off helps protect IGBT/MOSFET from any voltagetransients generated due to L*dic/dt (or L*diD/dt) that couldotherwise bring about avalanche breakdown. The PC boardlayout for this circuit is shown in Fig. (10).

For an IGBT, Desat detection (Desat=Desaturation of for-ward voltage drop) is a method used for short circuit/over-load protection. When short circuit/overload occurs, theforward voltage drop of the IGBT (VCE) rises to dispropor-tionately high values. One must ignore the initial turn-onrise in VCE, when output from Driver has still not risen tohigh enough value. Nevertheless, when VCE rises to a levelof, say, 7 Volts, in presence of sufficient Gate Drive volt-age, it means the collector current IC has risen to a dispro-portionately high value, signaling overload. When a voltagelevel higher than 6.5 Volts is detected, Gate signal can besoftly turned off, resulting into soft turn-off of the IGBT. Fig.(16) shows how Desat feature can be wired into a totalDriver Circuit, using also other features, such as Opto-isolation and –ve turn-off bias.

3. HIGH SIDE DRIVING TECHNIQUES

3.1 EMPLOYING CHARGE-PUMP AND BOOTSTRAPMETHODS

For driving the upper MOSFET/IGBT in a phase leg em-ployed in a bridge topology, a buck converter or a 2-transitor


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forward converter, low side drivers cannot be used directly.This is because the source/emitter of upper MOSFET/IGBTis not sitting at ground potential.

Fig. (12A) shows how a charge pump creates a higherVcc to be used for the driver IC for the Upper MOSFET/IGBT. Here the pair of N-Channel and P-Channel FETs actsas switches, alternately connecting incoming supply volt-age to output through capacitors and Schottky diodes,isolating it and almost doubling it. Switching frequency inseveral hundred Kilohertz is used and, therefore, low rippleisolated output voltage is available as DC Supply for theDriver of Upper MOSFET/IGBT. Fig. (12C) illustrates howone IXDD408 can be used as charge pump, and anotheras a Driver, in conjunction with IXBD4410 and IXBD4411,for driving a phase leg of two IXFX50N50 MOSFETs. No-tice how a charge pump delivering as much as 500 mAcan be constructed and utilized for driving Size 9 high powerMOSFETs and IGBTs.

Another method is the Bootstrap Technique as shown inFig. (12B). The basic bootstrap building elements are thelevel shift circuit, bootstrap diode DB, level shift transistorQ1, bootstrap capacitor CB and IXDD408 or IXDD414. Thebootstrap capacitor, IXDD408/IXDD414 driver and the gateresistor are the floating, source-referenced parts of thebootstrap arrangement. The disadvantages of this tech-nique are longer turn-on and turn-off delays and 100% dutycycle is not possible. Additionally the driver has to over-come the load impedance and negative voltage present atthe source of the device during turn-off.

3.2 ACHIEVING GALVANIC ISOLATION BY EMPLOY-ING OPTO-COUPLERS TO DRIVE UPPER MOSFET/IGBT

For driving high side MOSFET/IGBT in any topology, opto-couplers can be used with following advantages:

1. They can be used to give a very high isolation voltage;2500 to 5000 Volts of isolation is achievable by use ofproperly certified opto-couplers;

2. Signals from DC to several MHz can be handled byopto-couplers;

3. They can be easily interfaced to Microcomputers or othercontroller ICs or any PWM IC;

One disadvantage is that the opto-coupler adds its ownpropagation delay. Another disadvantage of using an opto-coupler is that separate isolated power supply is requiredto feed the output side of the opto-coupler and the driverconnected to it. However, isolated DC to DC Converterswith few thousand Volts of isolation are readily available.

These can be used to supply isolated and regulated +ve15 V and –ve 5V to the output side of the opto-coupler andthe Driver IC for driving Upper MOSFET/IGBT as is shownin Fig. (16) and Fig. (17). As can be seen, identical chainof opto-coupler, Driver and DC to DC Converters are usedfor even lower IGBTs. This is to guarantee identical propa-gation delays for all signals so that their time of arrival atthe Gate of IGBT bear the same phase relationships withone another as when they originated in the microcomputer.

3.3 USE OF TRANSFORMERS TO OBTAIN GALVANICISOLATION IN DRIVING UPPER MOSFET/IGBT

Using transformers to achieve galvanic isolation is a veryold technique. Depending on the range of frequencies be-ing handled and power rating (voltage and current ratingsand ratios), transformers can be designed to be quite effi-cient. The gate drive transformer carries very small aver-age power but delivers high peak currents at turn-on andturn-off of MOSFET/IGBT.

While designing or choosing a Gate Drive transformer, thefollowing points should be kept in mind:1. Average power being handled by the transformer should

be used as a design guideline. Margin of safety shouldbe taken into account, keeping in mind maximum volt-second product and allowing for worst case transientswith maximum duty ratio and maximum input voltagepossible.

2. Employing bifilar winding techniques to eliminate anynet DC current in any winding. This is to avoid coresaturation.

3. If operation in any one quadrant of B-H loop is chosen,care should be taken for resetting the core.

Advantages of employing transformers for Gate Drive are:

1. There is no need for any isolated DC to DC Converterfor driving an upper MOSFET/IGBT .

2. There is practically no propagation delay time in a trans-former to carry signals from primary side to the sec-ondary side.

3. Several thousand volts of isolation can be built-in be-tween windings by proper design and layouts.

4. They occupy small PC board area.

The disadvantages of using transformers for Gate Driveare:

1. They can be used only for AC signals.

2.Large duty ratios cannot be handled by the transformerwithout being saturated by net DC, unless AC couplingcapacitors are employed in series.


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Two examples of gate Drive circuits, using transformersfollow. In Fig. (15), a phase shift controller outputs its sig-nals to the IXDD404 Dual Drivers, which in-turn, feed thetransformers. The secondary windings of these transform-ers are coupled to the Gates of upper and lower MOSFETsin a “H” Bridge topology.

4.0 IXYS LINE OF MOSFET/IGBT DRIVERS

IXYS Corporation offers the following MOSFET/IGBT Driv-ers:

1. IXBD4410 and IXBD4411 Half Bridge Driver Chipset2. IXDD404 Dual 4 Amp Ultrafast Driver3. IXDD408 Single 8 Amp Ultrafast Driver4. IXDD414 Single 14 Amp Ultrafast Driver5. IXDD415 Dual 15 Amp Ultrafast Driver

4.1 IXBD4410 and IXBD4411 Half Bridge MOSFET/IGBT Driver Chipset

This chip set is best suited to applications in Half Bridge,Full Bridge and 3 Phase Bridge topologies. Here theIXBD4410 is wired as a full-featured Low-Side Driver, whileIXBD4411 is wired as a full-featured High-Side Driver. To-gether, they make up a stand alone Driver System forPhase leg of any of the above mentioned Bridge Configura-tions. The suggested wiring diagram is shown in Fig. (11).Likewise, the wiring diagram is to be repeated for eachphase leg and hence one needs two such cards for “H”Bridge and three such cards for 3-Phase Bridge.

As can be seen in this schematic, to obtain galvanic isola-tion, it uses one ferrite transformer for sending drive sig-nals to IXBD4411 and another ferrite core transformer forreceiving fault and status signals from IXBD4411. T1 repre-sents both these transformers housed in one IC type pack-age. To avoid saturation, capacitors are placed in serieswith each primary winding to which AC (time-varying sig-nals) are transmitted. 1200 Volts of isolation barrier is builtin.

Both IXBD4410 and IXBD4411 are feature-rich Drivers. Theseinclude:

1. Undervoltage and overvoltage lockout protection for Vcc;2. dV/dt immunity of greater than ± 50 V/ns;3. Galvanic isolation of 1200 Volts (or greater) between low

side and high side;4. On-chip negative gate-drive supply to ensure MOSFET/

IGBT turn-off even in electrically noisy environment;5. 5 volt logic compatible HCMOS inputs with hysteresis;6. 20ns rise and fall times with 1000pF load and 100 ns

rise and fall times with 10000pF load;7. 100 ns of propagation delay;

8. 2 Ampere peak output Drive Capability;9. Automatic shutdown of output in response to over-cur-

rent and/or short-circuit;10. Protection against cross conduction between upper

and lower MOSFET/IGBT;11. Logic compatible fault indication from both low and

high-side drivers.

Higher current MOSFET/IGBTs require higher drive cur-rents, especially for operating them at high switching fre-quencies. For these applications, one can use IXDD408 orIXDD414, either in stand-alone mode or in conjunction withIXBD4410 and IXBD4411. It is easy to realize now that onecan easily get all the facilities of feature-rich IXBD4410and IXBD4411 and when higher drive current capability iscalled for, use them in conjunction with IXDD408 or IXDD414.In case of a low-side MOSFET/IGBT, it is simple to useIXDD408 or IXDD414 alone. One such example is given inFig. (11).

For driving upper MOSFET/IGBT of a phase leg, one of theapproaches is to employ a charge pump. Two such appli-cation circuit schematics are shown in Fig. (12C) and Fig.(12D). In Fig.(12C) output from IXBD4410/4411 is boostedup to ± 8 Amps using IXDD408 and the charge pump out-put is boosted to 350 mA, using one driver of IXDD404 fordriving IXFK48N50 (rated at Id=48 Amps and Vd=500 Volts).In Fig. (12D), the output from IXBD4410/4411 is boostedup to ±14 Amps by IXDD414 to drive a Size 9 MOSFETIXFN80N50 (rated at Id=80 Amps and Vd=500 Volts).IXDD404 can still adequately provide 500 mA for the chargepump circuit.

4.2 GENERAL REMARKS ABOUT IXDD SERIES OFDRIVERS

The most important strength of these Drivers is their abilityto provide high currents needed to adequately drive today’sand tomorrow’s large size MOSFETs and IGBTs. This ismade possible by devoting a large portion of the silicon diearea to creating high current (NMOS and PMOS) outputstage. Another important feature of these Drivers is thatthere is no cross conduction, thus giving almost 33% lowertransition power dissipation.

In addition, all these Drivers incorporate a unique facility todisable output by using the ENABLE pin. With the excep-tion of the IXDD408, the ENABLE pin is tied high inter-nally. When this pin is driven LOW in response to detect-ing an abnormal load current, the Driver output enters itsTristate (High Impedance State) mode and a soft turn-off ofMOSFET/IGBT can be achieved. This helps prevent dam-age that could occur to the MOSFET/IGBT due to L*di/dtovervoltage transient, if it were to be switched off abruptly,“L” representing total inductance in series with Drain or


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Collector. A suggested circuit to accomplish this soft turnoff upon detecting overload or short circuit is shown in Fig.(9 ). It is also possible to do this by an independent shortcircuit/overload detect circuit, which could be a part of thePWM or other controller IC. All one needs to do is to takeoutput signal (FAULT) from such a circuit and feed it intothe ENABLE pin of Driver. A resistor RP connected acrossGate and Source or Gate and Emitter (as the case maybe) would ensure soft turn-off of the MOSFET/IGBT, turn-off time being equal to RPx(CGS+CGD)

Detailed specifications of these IXDD series of Drivers areavailable on web site www.ixys.net under heading: “ICs”.All IXDD series of IXYS MOSFET/IGBT Drivers are Low-Side Drivers, but with techniques covered in this Applica-tion Note, one can use them as High-Side Drivers as well.Evaluation Printed Circuit Boards are also available. InAppendix “A”, you will see a comparison between differentDrivers available in the market.

4.2.1 IXDD404

IXDD404 is a dual 4 Ampere Driver, which comes in handyin many circuits employing two MOSFETs or IGBTs. Itcould also be used for two MOSFETs/IGBTs connected inphase leg, provided the voltage level is below 25 VDC.While using High Voltage DC Supplies for driving Phaseleg, H-Bridge or 3 Phase Bridge Circuits, some techniquefor achieving galvanic isolation of upper MOSFET/IGBT Driv-ers is required, in addition to making provision for isolatedpower supplies.

Fig. (15) shows an interesting application for IXDD404 in aPhase Shift PWM Controller application, in which galvanicisolation is obtained by using ferrite core Gate Drive Trans-formers. Note that this Controller operates at a fixed fre-quency. Turn-off enhancement is achieved by using localPNP transistors.

For a vast number of low and medium current MOSFETsand IGBTs, IXDD404 provides a simple answer for drivingthem.

4.2.2 IXDD408 AND IXDD414

IXDD408 is eminently suitable for driving higher currentMOSFETs and IGBTs and IXDD414 can drive larger sizeMOSFET/IGBT Modules. Many circuit schematics apply-ing these in various topologies are possible and some ofthese are shown in different figures in this application note.

The 5 pin TO-263 surface mount version can be soldereddirectly on to a copper pad on the printed circuit board forbetter heat dissipation. It is possible then to use these

high current drivers for very high frequency switching appli-cation, driving high current MOSFET modules for a highpower converter/inverter.

Fig. (8) shows a basic low side driver configuration usingIXDD408 or IXDD414. C1 is used as a bypass capacitorplaced very close to pin No. 1 and 8 of the Driver IC. Fig..(13) shows a method to separately control the turn on andturn off times of MOSFET/IGBT. Turn-on time can be ad-justed by Rgon, while the turn-off time can be varied by Rgoff.The diodes in series are fast diodes with low forward volt-age drop. The 18V, 400mW Zener diodes protect the Gate-Emitter junction of the IGBT. A careful layout of the PCB,making shortest possible length between pin Nos.6 and 7and IGBT Gate and providing generous copper surface fora ground plane, helps achieve fast turn-on and turn-off timeswithout creating oscillation in the Drain/Collector current.

Fig. (13) shows another arrangement and includes a methodfor faster turn-off using a PNP transistor placed very closeto the MOSFET Gate and Source. It is a good practice totie the ENABLE pin of drivers to Vcc through a 10K resis-tor. This ensures that the driver always remains in its EN-ABLED mode except when driven low due to a FAULT sig-nal. Again this FAULT signal puts these two drivers intotheir TRISTATE output mode,

Fig. (14) shows a method to boost output from IXDD408 toa much higher level for driving very high power IGBT mod-ule. Here the turn-on and turn-off times can be varied bychoosing different values of resistors, Rgon and Rgoff. To pro-vide –ve bias of 5 Volts, the IGBT emitter is grounded tothe common of +15V and –5V power supply, which feeds+15V and –5 v to the IXDD408. Notice that the incomingsignals must also be level shifted.

Fig. (16) shows an IXDD414 driving one IGBT of a Con-verter Brake Inverter (CBI) module. Here all protection fea-tures are incorporated. For High Temperature cutoff, abridge circuit is used with the CBI module’s thermistor.Comparator U3 compares voltage drop across the ther-mistor to the stable voltage from the Zener diode. P1 canbe used to preset the cutoff point at which the comparator’soutput goes low. This is fed into the Microcomputer asOVERTEMP signal.

Short circuit protection is provided by continuously moni-toring the voltage drop across a SHUNT. Note that one endof SHUNT is connected to the power supply ground GND1.The voltage picked up from this SHUNT is amplified by alow noise Op Amp and is then compared to the stablevoltage from the same Zener. When short circuit occurs,the comparator output (FAULT) goes low. 1% metal filmresistors are used throughout in both these circuits to en-


11

References:

1. B. Jayant Baliga, “Power Semiconductor Devices”, PWSPublishing Company, Boston, MA (1996)

2. Ned Mohan, Tore M. Undeland, William P. Robbins:“POWER ELECTRONICS: Converters, Applicationsand Design”, John Wiley & Sons, New York (1994)

3. Power Supply Design Seminar - 2001 series, UnitrodeProducts from Texas Instruments.

Recommended for further reading:

1. George J. Krausse, “Gate Driver Design for Switch-Mode Applications and the DE-SERIES MOSFETTransistor”, Directed Energy, Inc. Application Noteavailable from <www.directedenergy.com>.

sure precision and stability.

Principle of DESAT sensing for detecting overload on anIGBT has been explained before in section 2.5 above. Inthe case of AC Motor Drive, each IGBT has to be protectedfrom overload using separate DESAT sensing. Fig. (16)and Fig. (17) show the connection for each IGBT. DESATsensing is done on the isolated side of each opto-coupler,while the resultant FAULT signal is generated on the com-mon input side with respect to GND1. Each FAULT signalis open collector type and hence can be tied together withother FAULT signals from other opto-coupler or from othercomparators. The Microcomputer will stop output drive sig-nals when either FAULT or OVERTEMP signal goes low.After fault is cleared, the Microcomputer can issue a RE-SET signal for resuming normal operation.


12

Fig. (8). Circuit schematic showing how to use IXDD414 to drive an IGBT

Fig. (9). Evaluation circuit to test IXDD408/IXDD414 for soft turn off.


13

Bill of Materials for Fig.(9)

Resistors:R1: 240R2: 560R3: 10KR4: 5KR5: 1MegR6: 1K5R7: Rg-T.B.D.R8: 1Meg

Capacitors:

C1: 1000µF;35VWDCC2: 22µF, 63 VWDCC3: 1pF, silver dipped micaC4: 100pF silver dipped micaC5: 0.1µF, 35WDC TantalumC6: 0.1µF, 35VWDC TantalumC7: 1pF silver dipped micaC8: 0.1µF, 35VWDC TantalumC9: 0.1µF, 35VWDC TantalumC10: 0.1µF, 35VWDC Tantalum

Diodes:D1: 1N4002 or BA 159D2: 1N4002 or BA 159

Zener Diodes:1. Z1: 1N821

Voltage Regulators:1. 78152. LM317T

Transistors:1. Q1: 2N7000

ICs:U1: IXDD408PI or IXDD414PIU2: CD4001U3: LM339U4: CD4011U5: CD4049U6: IXDD408YI or IXDD414YINote: Either use either U1 or U6 but not both.

Trimmers:P1: 5K, 3006P Bourns or SpectrolP2: 1K, 3006P Bpurns or Spectrol


14

Co

mp

on

ent

Sid

e

IXDD408-EV-A IXDD408-EV-A

IXDD414EV-A IXDD414EV-A

Solder Side


IXDD408-EV-A

IXDD408-EV-A

CN

1

P2

P1

U1

C1

D2

D1

R1

C12

C2

T1

C7

C5

U4

C6

T2

C11

U2

C10R3R2

Z1R5CN

2

U5

C8

Q1

C4

C3

R6

R7

R9R4

U3

C9

R8

31 2

CN

3


IXD

D40

8-E

V-A

IXD

D40

8-E

V-A

Fig. (10). +ve and -ve and component layout with silk sceen diagram.

NOTE: To obtain Gerber Files, contact IXYS Corporation at (408) 982-0700 or via e-mail to <[email protected]>.


15

Fig.

11. I

XBD

4410

/441

1 Ev

alua

tion

Boar

d Sc

hem

atic

.


16

Fig. (12A). Basic charge pump doubler

Fig.(12B). Basic bootstrap gate drive technique


17

Fig.

(12C

). Bo

ostin

g ou

ptpu

t gat

e dr

ive

to +

/-8A

and

char

ge p

ump

outp

ut to

350

mA

for 4

00kH

z sw

itchi

ng o

f siz

e 9

devi

ces

with

the

XBD

4410

/441

1 ga

te d

river

chi

p se

t.


18

Fig.

(12D

). Bo

ostin

g ou

tput

gat

e dr

ive

to +

/-4A

and

char

ge p

ump

outp

ut to

500

mA

for 4

00kH

z sw

itchi

ng o

f siz

e 9

devi

ces

with

IXBD

4410

/441

1 G

ate

Driv

er c

hip

set.


19

Fig.

(13)

Turn

off

enha

ncem

ent m

etho

ds

Fig.

(14)

. Tec

hniq

ue to

boo

st c

urre

nt o

utpu

t and

pro

vide

-ve

bias

to a

chie

ve fa

ster

turn

off

for h

igh

pow

er M

OSF

ET a

nd I

GBT

Mod

ules


20


21

Fig.(16). 3-Phase AC Motor drive schematic showing how IXYS CBI (Converter-Brake-Inverter) Module can be drivenby IXDD414 using opto-couplers. All protection features are incorporated.


22

Fig.

(17)

. IXY

S C

BI (C

onve

rter-B

rake

-Inve

rter)

mod

ule

bein

g dr

iven

by I

XDD

414

with

opt

o-co

uple

r inc

orpo

rat-

ing

Des

at, o

verte

mpu

ratu

re a

nd s

hort

circ

uit a

nd c

urre

nt o

verlo

ad p

rote

ctio

n.


23

Bill of Materials for Fig. (16) and Fig. (17)

R1, R3, R5, R10, R11: 10K, 1/4W, 1%R2: 560 Ohms, 1/4W, 1%R4: 2.2 MegOhms, 1/4W, 5%R6: 100 Ohms, 1/4 W, 1%R7: 20K, 1/4W, 1%R8, R9: 61.9K, 1/4W, 1%R12, R13: 1.24K, 1/4W, 1%Rg: T.B.D. based on Ton and Toff & size of IGBTP1: 10K, multi turn trimpot, Bourns 3006P or

Spectrol equivalentC3, C4: 33 pF, silver dipped micaU3, U5 : LM339 ComparatorU4 : OP-07 or LM-101 Op AmpSHUNT : 75 mV @ full load currentLF: Gapped D C Choke for filtering rectified

powerCF: Electrolytic Filter Capacitor with very low

ESR & ESL and screw type terminals tohandle high ripple current. Voltage ratingis based on DC Bus and A C Ripple Voltage

CBI Module: IXYS Corporation Type Nos:MUBW 50-12A8 or any MUBW module fromCBI 1, CBI 2 or CBI 3 series.

Microcontroller: T.I. TMS320F240IXDD414 Driver chip: 7 are required to imple-

ment the A.C.Drive, using Brake feature.HCPL316J( Opto-coupler) : 7 are required to

implement the A.C.Drive With Brake feature.Isolated DC to DC Converter: 7 are required.


24

Fig.

(18)

. A tr

ansf

orm

er c

oupl

ed g

ate

driv

e ci

rcui

t em

ploy

ing

DC

rest

ore

tech

niqu

e sh

owin

g ho

w to

gen

erat

e -v

e bi

as d

urin

g tu

rn o

ff.

Documents

MOSFET/IGBT DRIVERS THEORY AND APPLICATIONSread.pudn.com/downloads157/ebook/699784/mosfet igbt drivers.pdf · IXYS Line of MOSFET/IGBT Drivers 4.1. Technical details of all IXYS Drivers