2. Introduction to MOS Amplifiers: Transfer Function

Biasing & Small-Signal-Model Concepts Reading: Sedra & Smith Sec. 5.4

(S&S 5th Ed: Sec. 4.4)

ECE 102, Fall 2011, F. Najmabadi

NMOS Transfer Function (1)

Transfer Function: Relation between output and input voltages.

vi =

DSDDDD

DSGSD

viRVvvfii-v

+==

:KVL),( :siticsCharacteri NMOS

* To find the transfer function, we start with vGS = 0 and increase vGS

NMOS Transfer Function (2)

As we increase vGS passing Vt, NMOS will come out of cut-off: iD increases leading to a decrease in vDS (due to KVL)

vGS ↑ → iD ↑ → vDS ↓

For vGS < Vt , NMOS is in cutoff: iD = 0

DDDDDDDS ViRVv =−=

DSDDDD

DSGSD

viRVvvfii-v

+==

:KVL),( :siticsCharacteri NMOS

NMOS Transfer Function (2)

To the right of point A, vGS >Vt, and NMOS is ON.

Just to the right of point A: o Vov = vGS − Vt is small. o vDS is close to VDD because

transfer function cannot have a discontinuity.

o Thus, vDS > Vov = vGS − Vt and NMOS is in saturation.

22

2

5.0

5.0

OVDOVoxnDDDS

OVoxnD

VRVL

WCVv

VL

WCi

−=

=

µ

µ

NMOS Transfer Function (3)

As vGS increase: o Vov = vGS − Vt becomes larger; o vDS becomes smaller. o At point B, vDS = Vov = vGS − Vt

To the right of point B, vDS < Vov = vGS − Vt and NMOS enters triode.

Point B is called the “Edge of Saturation”

Exercise: Use NMOS i-v characteristics (and KVL) , find VGS|B and VDS|B

Graphical analysis of NMOS Transfer Function (1) NMOS i-v characteristics is a surface ),( DSGSD vvfi =

* Plot for Vt,n = 1 V and µnCox (W/L) = 2.0 mA/V2

Graphical analysis of NMOS Transfer Function (1)

Looking at surface with vGS axis pointing out of the paper

Note: surface is truncated (i.e., vGS < 5 V)

Graphical analysis of NMOS Transfer Function (3)

KVL equation is a plane in this space. Intersection of KVL plane with the iv

characteristic surface is a line. NMOS operating point is on this line

(depending on the value of vGS.)

vi =

DSDDDD

DSGSD

viRVvvfii-v

+==

:KVL),( :siticsCharacteri NMOS

If we look from the top (iD axis out of the paper), we can see the transfer function.

Graphical analysis of NMOS Transfer Function (4)

Looking at surface with vGS axis pointing out of the paper

Graphical analysis of NMOS Transfer Function (5)

DSDDDD

DSGSD

viRVvvfii-v

+==

:KVL),( :siticsCharacteri NMOS

iD = 0

vDS = 0

The “Load Line” is the relationship between iD and vDS imposed by the circuit (outside of NMOS).

Graphical analysis of NMOS Transfer Function (6)

Every point on the load line corresponds to a specific vGS value.

As vGS increases, NMOS moves “up” the load line. A

B

C

Foundation of Transistor Amplifiers A voltage amplifier requires

vo/vi = const. o Transfer function has to be

linear (but NMOS transfer function is NOT).

Let us consider the response if NMOS remain in saturation at all times: o vGS should be a combination of

constant value and a time-varying signal.

The response to a combination of VGS and vgs (signal) can be found from the transfer function

Response to the signal appears to be linear!

Although the overall response is non-linear, the transfer function for the signal only is linear!

vgs

vds

vGS = VGS + vgs vDS = VDS + vds iD = IDS + id

Signal and response

Constant: Bias

Non-linear relationship among these parameters

Linear relationship among these parameters

An Analogy (1)

Total Height, Hb = Bias (HB) + response to signal (hb) Complicated correlation between total height, Hb , and weight

of the boat. Simple correlation between hb and added weight

Hb = HB

Boat

Pool

Bias

Added Weight (signal)

Hb HB

Bias + signal

hb

Response

An Analogy (2)

Bias: HB Bias + Signal: Hb

Signal & response to signal: hb

Bias: VGS , VDS , ID

Bias + Signal: vGS , vDS , iD

Signal & response: vgs , vds , id

Non-linear correlations among Bias + Signal: vGS , vDS , iD Simple (and linear) correlation between signal and response to the

signal: vgs , vds , id

Added Weight (signal)

Hb

HB

hb

Important Points!

Signal: We want the response of the circuit to this input.

Bias: State of the system when there is no signal (current and voltages in all elements). o Bias is constant in time (may vary extremely slowly compared to

signal) o Purpose of the bias is to ensure that MOS is in saturation at all times.

Response of the circuit and elements within to the signal is different that the response of the circuit and its elements to Bias (or to Bias + signal): o Different transfer function for the circuit o Different iv characteristics for the elements, i.e. relationships among

vgs , vds , id is different than relationships among vGS , vDS , iD .

Limitations and Constraints

Floating Boat analogy Boat should float at all times!

o Sufficient water in the pool

o Cannot put too much weight (depends on the depth of the water!)

Transistor MOS should be in saturation at all

times! o Bias point in Saturation*

o Signal amplitude cannot become too large (depends on Bias point!)**

VGS > Vtn VDS > VGS - Vtn

vGS = VGS + vgs > Vtn vDS = VDS + vds > VGS + vgs- Vtn

*Equations are for NMOS! ** Obviously, the second set is more restrictive

Issues in developing a MOS amplifier:

1. How to establish a Bias point (bias is the state of the system when there is no signal). o Stable and robust bias point should be resilient to variations in

µnCox (W/L),Vt , … due to temperature and/or manufacturing variability.

2. Find the iv characteristics of the elements for the signal (which can be different than their characteristics equation for bias). o This will lead to different circuit configurations for bias versus

signal

3. Compute circuit response to the signal o Focus on fundamental MOS amplifier configurations