Embed Size (px)
Citation preview
1
BJT and MOSFET characteristics and Op-Amps
Prof K.N.Bhat,
ECE Department , IISc Bangalore
email: [email protected]
Micro and Smart Systems
Lecture -32
2
Topics for Discussion • BJTs , MOSFETs and CMOS
•Amplifiers and Op Amp Concepts
• Basic Op-Amp circuits
3
Bipolar Junction Transistor (BJT)
RVI I 0
PNHole collection, I0
EV
IP N
Hole injection E
T
VI I exp( )V
0
Forward Biased Junction Reverse Biased Junction
Hole injectionE
E ET
VI I exp( )V
0 Hole collection, Cp EI I
C Cp C E CI I I I I 0 0
EV
EI P N
RV
PCIPNP Transistor
4
P+ N PEI
CI
BI
PNP Transistor
pEI pCI
CI 0
EBV CBV
C pC co E coI I I I I
( )
1C B CI I ( )I 01
E
B
C
E
B
C
C CB E C C C C
I II I I I I I
0
01 1
5
N+ P NEI
CI
BI
C nC co E coI I I I I
nCInEI
CI 0
C B CI I ( )I 01 ( )
1
NPN Transistor
BEV CBV
E
B
C
C
B
E
Note that the voltage polarities and the current flow directions in NPN transistors are exactly opposite to that of PNP transistors
6
Common Base Characteristics
C E coI I I
Saturation Region
Active Region
Cut off Region
is very close to 1.0 but always < 1
7
OB
IC A
Output Characteristics of a BJT(Common Emitter configuration)
coI ( ) 1 VCE
C B CI I ( )I 01
8
Metal Oxide Semiconductor Field Effect Transistor (MOSFET)
P- Silicon
VGS=0 +VDS
N+ N+ID= 0
P- SubstrateN+ N+
SourceGate
Drain
Device structure VGS = 0 VDS > 0
ID
P- Silicon
+VGS +VDS
N+ N+
VGS > Threshold Voltage, Vth
VDS
IDVGS3
VGS2
VGS1VGS=Vth
ID –VDS is linear when VDS is small
VGS3 > VGS2 > VGS1 > Vth
S D
S D
9
MOSFET Characteristics
ID
P- Silicon
+VGS +VDS
N+ N+
VDS < (VGS-Vth) . ID –VDS is non linear
ID
P- Silicon
+VGS +VDS
N+ N+
VDS > (VGS-Vth). ID Saturates
VGS=2V
VGS=Vth
Triode region
Saturation region
IDVDS=VGS-Vth
Cut off region
VGS = 3V
VGS = 4V
D( sat ) GS thI K(V V ) 2
DSD GS th DS
VI K [(V V )V ]
22
2
10
MOSFET types
ID
P- Silicon
+VGS +VDS
N+ N+
N-ChannelDB
S
G
N - Channel
ID
N- Silicon
-VGS -VDS
P+ P+
P-ChannelDB
S
G
P - Channel
Transfer Characteristics
11
Complementary MOS (CMOS) Inverter Circuit
High1
Low0
Low0
High1
iV oV
N- channel MOSFET
P- channel MOSFET
VDD
iV oV
S
S
D
D
12
Amplifiers• Output of transducers are in the range µV or mV and possess very low energy .
• Signal processing is easier if signal is large in the range of Volts
vo
vin
o ov
in in
v vAv v
ov
in
vAv
Voltage Gain
Transfer Characteristics
iinAmplifierOne or more
Amplifying DevicesVin
+-
+-
vo
io
Current Gain oI
in
iAi
o 0p v I
in in
v iA A Av i
Power Gain
13
Logarithmic Gain
The amplifier gains Av, AI and Ap are usually very large and extend over several orders of magnitude . They are normally expressed in terms of logarithms (in decibels) as follows:
Power Gain in dB= 10 log Ap=10 log10(P0/PI )
Voltage gain in dB = log ( ) log ( )2o o
10 102inin
v v10 20vv
Current Gain in dB = log ( ) log ( )2o o
10 102inin
i i10 20ii
14
Input and Output Resistance
Input Resistance Ri is a measure of the current drawn by the amplifier .
ini
in
VRI
Output Resistance Ro is the internal resistance seen from the output terminals (A and B) of an amplifier . It is the Thevenin’s equivalent resistance looking into the amplifier
iinAmplifierOne or more
Amplifying DevicesVin
+-
A
BRo
15
DC Power Supplies for the amplifierThe DC power supply is required to set up the operating point so that the ac signal can be superimposed as shown below along with the symbol for the amplifier
This allows variation in output signal in response to a small change in the input signal
VDC
vac RL sino o mv V v t
The DC supply (or supplies ) provides the power delivered to the load and the power dissipated as heat within the amplifier .
vo
Vin
Vo Time
Small signal
VDC
16
BJT Amplifier (common Base )
17
EB
T
VV
E oI I e
E E
BE e T
I I1V r V
Te
E
V 25mVr 25I 1mA
Incremental Resistance re of the Junction
18
= 4VVC
Maximum Vo swing is 2Vpeak and then it will get saturated
VBC=2V
Example: RL=1K, VC=4V. Then IC=2mA, VBC=2V.
19
Operational Amplifiers
• The Operational Amplifier (or op-amp) is a high–gain, direct coupled amplifier operates with a Differential Voltage between two input terminals
• The symbol for op-amp is as shown
• It and consists of Multiple stages :
(1) An input stage to provide high input resistance and certain amount of voltage gain
(2) Middle stages to provide a high voltage gain
(3) An output stage to provide a low output resistance
and has at least Five terminals
VS+
VS
v+
v-
+v0
2
3
7
4
6
20
Op Amp Terminals
Symbol and terminals of Op-Amp
VS+
VS
v+
v-
+v0
2
3
7
4
6
Terminal 2 is “Inverting input” . The output that results from input at this terminal will be inverted .
Terminal 3 is “Non-inverting input”. The output that results from input at this terminal will have the same polarity as input
Terminals 4 and 7 are respectively negative and positive DC pwer supplies VS- and VS+ respectively
Terminal 6 is the output terminal
21
The output Voltage Vo of the op-amp is related to the open loop gain and the difference voltage
Op-amp equivalent circuit and ideal model
( )0 o d oV A V A V V oA dV
Equivalent Circuit
+
Vo
Ro
Ri AoVd
+
-
V+
V-
-
V S+
V S-
Model of Ideal Op ampV+
V- -+ Vo =AoVd
+
-dV 0
, ,i o oR R 0 A
Typical values of Ro =75
Op-amps with MOSFET have Ri=1012
22
VS
Slope = A0
v0
Vd
VS+
Op-amp transfer Characteristics (Vo versus Vd)
•Vo versus Vd is almost linear for small values of Vd .
• As Ao is very arge the Vo saturates when it exceeds positive and negative values
• is set by the supply voltages of the op amp and is usually about 1 Volt below them.
satV
satV
23
Basic Op amp CircuitsInverting Amplifier
-
Consider the ideal model :,o iA R
d inV 0 and i 0
. ( )d AV 0 V 0 1 . ( )in 1 2i 0 i i 2
-+ Vo
VS
VAR1
R2
ini
1i
2i
From (1) and (2) s o
1 2
V VR R
2o s
1
RV VR
24
Non-inverting AmplifierR2
-+ VoVS
VAR1 ini
1i
2iConsider ideal op-amp
VA=VS and i1=12
1S o
1 2
RV VR R
1 2o S
1
R RV VR
25
Other configurations of the Op-amp
-+ VoVS
1. Voltage Follower. Buffer stage between two stages to prevent loading
C
-+ Vo
VS
R
1i
2i
2.Integrator: To generate Saw tooth from square wave.
( )o s1V V t dt
RC
3. Differentiator: To generate square wave from triangular wave
-+ Vo
VS
C
R
1i
2i
o SV V
So
dVV RCdt
o2
dVi Cdt
S1
ViR
1 2i i
S1
dVi Cdt
o2
ViR
26
R2
-+ Vo
V2VA
R1
V1 R1
R2
VB
R2
Vo2
-+V2
R1-+ Vo1VB
R1
R2
Op-amp Differential Amplifier
( )4B 1
3 4
RV V 1R R
( )20 o1 o2 1 2
1
RV V V V VR
( )2 2B 1
1o
11
R RV 1 VR
VR
2o22
1
RVVR
27
Instrumentation Amplifier
rg S1 S2rg
g g
V V ViR R
VS1
VS2
( )rg S1 S2V V V
R2
-+ Vo
R1
R1R2
R
R
Rg
-+
-+
A1
A2
A3rgiV1
V2
( ) ( )S1 S2d 1 2 g
g
V VV V V 2R RR
( )( )2 2o d S1 S2
1 g 1
R R2RV V V V 1R R R
Dedicated Differential Amplifier with very high input Resistance . Its gain can be adjusted with a single resistance Rg
28
Merits of Instrumentation Amplifier
• Extremely High Input impedance.
•High Common Mode Rejection Ratio (CMRR) (ie. It is bale to reject a signal that is common to both terminals but to amplify a differential signal )
•The high CMRR is very useful for receiving very small signals buried in large common-mode offsets or noise
29
Instrumentation Amplifier with Fixed GainR2
VS1
VS2
-+ Vo
R1
R1R2
-+
-+
A1
A2
A3
( )d S1 S2V V V
+
-( )2
o S2 S11
RV V VR
