MCH5104 Microprocessor Systems Lecture #1

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MCH5104Microprocessor Systems

Lecture #1

Dr. CHEONG Loong Fah(E5-03-11, [email protected])

MCH5104 lecture #1 2

Objectives of MCH5104

• “Mechatronics synergistically merges mechanical and electronics engineering, and integrates mechanical devices with sensors and actuators, intelligent controllers and computers to realize useful products and systems”.

– Specifically students are able to understand the concepts of a basic computer design (in part I), and

– Students are able to design and build (mechatronic) applications with embedded computer systems (in part II);

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Microprocessors in everyday life

Microcontroller chip which receives temperature inputs

and adjust the AC level accordingly.

Microcontroller chip which receives tire pressure inputs, inform driver and/or adjust the

tire pressure accordingly.


Microcontroller chip which allows for programming of various cooking functions.

Battery operated and computer controlled, the Auto Mower mows a lawn

automatically, guided by a perimeter wire that is buried or stapled to the ground.

Microprocessors in everyday life

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Uses of knowledge learned in MCH5104

• System architects, hardware designers, system-level designer, board-level designers, chip-level designers;

• Designers of mechatronics, biomedical-electronics, and any intelligent systems (e.g. smart car, smart kitchen, game system)

• Supports for these systems;• More efficient software designers;• Sales of telecom equipment: telco switches, network;• Sales of desktop, laptop, handheld PCs, cell phones, and computer

peripherals;


Prerequisite

• Before coming to this course, you should have been exposed to a first course on digital or microprocessor systems.

– be familiar with concepts such as Number Systems (binary, octal,hexadecimal, etc.)

– be familiar with concepts such as digital circuit design (AND, OR, NAND), computer organization (CPU, Memory, Bus), and microprocessor architecture.

• Please come to see us if you do not have this pre-requisite.

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Administrative issues

• Course website: – http://courses.nus.edu.sg/course/eleclf/mch5104 (See Timeline)

• Tutorial Questions will be distributed. They are tailored towards improving general level of understanding of the class, and will not contribute towards your grade.

• Grade comprise of– Projects: 40% (5% (Programming assignment) + 20% (Bootstrap part 1)

+ 15% (Bootstrap part 2))– Final Exam: 60% (closed book, but datasheet available)– Lab room: Digital Lab (#E4-03-07)


Text book and reference• Text book – Lecture-related readings:

– W.A. Triebel and A. Singh, "The 8088 and 8086 Microprocessors: Programming, Interfacing, Software, Hardware, and Applications", 4th edition, Prentice Hall, ISBN 0-13-122804-8.

• References:

– 80X86 IBM PC and Compatible Computers: Assembly Language, Design, and Interfacing, Vols. 1 and 2, 4th ed. by Muhammad Ali Mazidi, Janice G. Mazidi. 2003.

– Pont, Michael J. Patterns for time-triggered embedded systems : building reliable applications with the 8051 family of microcontrollers. Addison-Wesley, c2001.

– Spasov, P. "Microcontroller Technology", 3rd edition, Prentice-Hall, 1999.– Slater, M. "Microprocessor-based Design", Prentice-Hall, 1989.– T.E. Kissell. “Industrial electronics: applications for programmable controllers,

instrumentation and process control, and electrical machines and motor controls”. Prentice Hall, 3rd ed.

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Course Outline

• Microprocessor basics: (Part I)– Review of number systems, the basics;– SW architecture: Registers, addressing modes, instruction set;– Programming techniques;– HW architecture: Memory and I/O interfacing; bus peripherals: UART,

DMA, timer, interrupt controller;

• Peripherals, Applications: (Part II)– Data acquisition, Stepper motor, Case studies– DSP, Microcontrollers, Applications


Lecture 1: Introduction to Microprocessor Systems

• Objectives– Overview of the course, history of micro-processors, brief

functionalities and system perspective of the micro-processor, and internal architecture of the Intel 8088.

• Outline– Number systems.– History of processors – examples of Intel processors.– The basic components of any intelligent devices– System perspective of the micro-processor in early PCs.– Internal architecture of 8088/8086 (part 1).

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Number systems

• Binary– 1 bit (b) = either 1 or 0– 1 Byte (B) = 8 bits– Memorize: 1, 2, 4, 8, 16, 32, 64,

128, 256, 512, 1024.– 1Kilobit = 1024 bits = 2^10 (thus

required 10 bits representation)– 1Megabit ~ 1,000,000 bits = 2^20

(thus 20 bits) = 1,048,576– 1Gigabit ~ 1,000,000,000 bits =

2^30 (thus 30 bits) 1,073,781,842

• Decimal– 1 decimal: from 0 to 9– 1 Thousand = 1000 = 10^3

(thus 3 orders of magnitude)– 1 Million = 1,000,000 = 10^6

(thus 6 orders of magnitude)– 1 Billion = 1,000,000,000 (thus 9

orders of magnitude)

Decimal = bn-1* 2n-1 + .. + b1* 21 + .. + b0* 20


Number systems (cont.)

• 1 Hex digit = group of 4 binary bits;

• 1 Octal digit = group of 3 binary bits;

• Decimal -> Binary -> Hex -> BCD

– 0d = 0000b = 0h = 0bcd– 1d = 0001b = 1h = 1bcd– 2d = 0010b = 2h = 2bcd– 3d = 0011b = 3h = 3bcd– 4d = 0100b = 4h = 4bcd– 5d = 0101b = 5h = 5bcd– 6d = 0110b = 6h = 6bcd– 7d = 0111b = 7h = 7bcd

• BCD (binary coded decimal): the simplest scheme uses the 1st 10 numbers of binary code for BCD number 0 to 9. Useful for display, eg calculator.

• Decimal -> Binary -> Hex -> BCD– 8d = 1000b = 8h = 8bcd– 9d = 1001b = 9h = 9bcd– 10d = 1010b = Ah = not defined– 11d = 1011b = Bh = not defined– 12d = 1100b = Ch = not defined– 13d = 1101b = Dh = not defined– 14d = 1110b = Eh = not defined– 15d = 1111b = Fh = not defined

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Numbers supported• Integers:

– unsigned byte: 0 to 255– unsigned word: 0 to 65,535– signed byte: -128 to +127– signed word: -32,768 to +32,767

• A word may have different sizes in different architectures. i.e (16-bit in 8088/8086, 32-bit in 80386, etc.)

– Negative number are always represented in 2’s complement notation

• ASCII codes– ASCII = American Standard Code

for Information Interchange – to represent alphanumeric characters in the memory.

• BCDs:– unpacked: 1 BCD per byte– packed: 2 BCD’s per byte

• A few related concepts:– N-bit processor: N-bit, also

referred to as data-path, number of bits that can be processed in a processor at a time.

– M-bit address bus: number of lines used to address the total number of memory words (which is maximum at 2^M).

– S-bit data bus: number of lines used to carry data into and out of memory; usually the same as N.


How many locations can a 16-bit bus address? And they range from 0000h to nnnnh?

When adding two 8-digit numbers, how many digits should the sum be?

Examples and quiz

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History of microprocessors• 1971:

– Intel 4004: first commercial available uP, 4-bit processor, intended to be used with other devices in making a calculator.

• 1972:– Intel 8008: an extended 8-bit version

of the Intel 4004• 1974:

– Intel 8080: 8-bit, created the era of uP-based design, required +/- 5V, +12V supply;

– Motorola MC6800, 8-bit, required +5V supply;

• 1977:– Intel 8085: 8-bit, required +5V supply;

• Some time later:;– Motorola MC6809, partially 16-bit

• 1978:– Intel 8086: 16-bit– Motorola MC68000: 16-bit

• Two main directions:– General-purpose uPs:

• Intel: 8086/8088, 80286, 80380, 80486, Pentium, etc.

• Motorola: 68000, 68020, etc.– Embedded or dedicated uPs

• uPs integrated with ROM, RAM, I/O ports, the micro-processor becomes a micro-controller.

• Intel 8051• Motorola MC6801

• The race goes on…


Intel Processors (cont.)

2 GHz40064+6464/64 bit2003Centrino

3 GHz1300400064/64 bit2006Core 2 Duo

1.4 GHz-3.2 GHz40012+864/32 bit2000Pentium 4

450-1.0 GHz 100 16+16 64/32 bit 1999 Pentium III

300-450 66/100 16+16 64/32 bit 1997 Pentium II

166-233 66 16+16 64/32 bit 1997 MMX

60-23360-66 8+8 64/32 bit 1993 Pentium

25-50 25-50 8 32/32 bit 1989 80486DX

16-33 16-33 None 32/32 bit 1986 80386DX

8-20 6-20 None 16/24 bit 1983 80286 – CPU of PC/AT

4.77-8 4.77-8 None 8/20 bit 19798088 – CPU of

early PC, PC/XT

4.77-8 4.77-8 None 16/20 bit 19788086

Internal clock speed

(MHz)

Memory bus speed

(MHz)

Level 1 Cache (KB)

Data/ Addrbus widthYearType

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Sales of 8088-based µ-controller“Few people, even in technology, realize that the original 4- and 8-bit microprocessor architectures of the early 70’s are still being built by the billions each year for use in everything from cameras to toys. We may be focusing on Pentium 4s, but its great-great-great-great-great grandfather, the 8008 is, quantitatively speaking, a greater part of our daily lives”


Basics components of any intelligent devices

keyboard CPU printer

Rx antenna

Baseband chip

speakers

microphone Tx antenna

memory

memory

Cell phone

PC

Input device(s) Processor Output device(s)

Memory

monitor

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A typical computer architecture

Microprocessor(CPU)

Interfaces to I/O devices

Interfaces toRAM/ROM/ and

Hard disk

BUS


Simplified perspective of the µ-processor in the early PC hardware

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applicationsoftware

(Word,Excel,

asm prog)

systemsoftware

(OS,compiler,

assembler)

µ-processor system: software overview• Application software

– Software that is specific for users, such as database, word processing, engineering works;

• System software– Software used to manage

resource, translate HLL into HW understandable messages such as high-voltage, low-voltage, etc.

hardware


How are high level language (C, C++), the assemblylanguage (ASM), and machine language related?

How are a C-program to print a message, anda C-compiler classified?

Examples and quiz

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#include <stdio.h>

main()

{

Printf(“Hello! World\n”);

}

High-level language (C)

00000000101000010000000000011000

00000000100011100001100000100001

10001100011000100000000000000000

10001100111100100000000000000100

10101100111100100000000000000000

10101100011000100000000000000100

00000011111000000000000000001000

Bin

ary

Mac

hine

La

ngua

ge(8

088)

;Define data segment ...

msg DB 'Hello! World', '$',

DB 13, 10

;Define code segment ...

start: mov ax, data

mov ds, ax

lea dx, msg

mov ah, 9

int 21h

;Terminate program normally ...

Assembly language (ASM)

C Compiler

Assembler

• How are the high level language (C, C++), the assembly language (ASM), and machine language related?


8088/8086 Internal Architecture

AH | ALBH | BLCH | CLDH | DL

SPBPSIDI

ESCSSSDSIP

Addr. Gen.

ALU

Instruction queue

Instruction decoder

Timing & controlflags

Memory interface

BIU

EU

16-b

16-b 16-b16-b

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8088/8086 Int. Architecture (cont)

• Bus interface unit (BIU):responsible for bus operations, instruction and data acquisition, connection to outside the microprocessor such as I/O and memory.– instruction queue.– 4 x 16-b segment registers,

instruction pointer, and bus control logic;

• Execution unit (EU):responsible for decoding and executing instructions– instruction decoder– 16-b general-purpose data

registers, – 16-b ALU, – and flags;


Instruction queue and decoder

Bus interface unit (BIU):

• Instruction queue– Instructions are queued in a

pipeline fashion. It is 4 bytes long in the 8088 microprocessor, and 6 bytes long in the 8086 microprocessor.

Execution unit (EU):

• Instruction decoder– Instruction decoder translates

instruction fetched from the memory into a series of actions which the Execution unit carries out.

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Segment vs. Data Registers

• AX = AH + AL, 16-b or 8-b accumulators;

• BX = BH + BL, offset storage for physical address generation;

• CX = CH + CL, default counter for string and loop instructions

• DX = DH + DL, implicit operand or destination, or to hold part of the result in multiplication or division instructions.

• CS: points to the starting address of the Code Segment where executable programs are stored;

• DS: points to the starting addr. of the Data Segment where data is stored;

• ES: points to the starting addr. of the Extra Segment where another data segment can be allocated;

• SS: points to the starting addr. of the Stack Segment where temporary results can be stored;

Bus interface unit (BIU): Execution unit (EU):


Instruction Ptr. & Index Registers

• IP: Instruction Pointer is the same as program pointer, it identifies the next instruction to be fetched in current code segment;

• Together, CS and IP, denoted as CS:IP, generates the physical address of the next instruction to be fetched

• Address of the next instruction =CS:IP = 10h*CS + [IP]

• SP: offset address, used with SS to point to the top of the stack;

– Top of the stack = SS:SP

• BP: offset address, used with SS to point to the data within the stack

– Data within the stack segment = SS:BP

• SI: source index, used with DS to point to the source when in indexing address mode;

– Source data = DS:SI

• DI: destination index, used with ES to point to the destination when in indexing address mode;

– Destination data = ES:DI

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Generating a Physical Address• 8088: 20 physical address

line.• 16-bit register while 20-bit

address?• Phy. Addr.: SHL(CS)4 + IP

– 10h*CS + IP• Example:

– CS = 1007h; IP = 2222h– Phy_addr = 12292h

• Also written in seg_base:offset form; e.g. 12292h can be written as 1007:2222h

0001 0000 0000 0111

0001 0000 0000 0111

0000 0010 0010 0010 0010

0001 0010 0010 1001 0010

CS

SHL(CS)4

IP

Physical address


Status vs. Control Flags• O-overflow: set when an overflow occurred, I.e.

the result overflows the sign bit.

• S-sign: set when the result is negative

• Z-zero: set when the result of the computation or comparison is zero

• A-auxiliary carry: set when there is a carry from the lowest nibble during add.

• P-parity: set when the lower byte of the result contains even number of 1’s (even parity).

• C-carry: set when there is a carry out of the MSB in case of addition.

• D-direction: for string manipulation, if set (for auto-decrementing mode), the string is processed from the highest address towards lowest address.

• I-interrupt: when set, the maskableinterrupts are seen by the CPU.

• T-trap: when set, the processor goes into the single step execution mode, suitable for debugging;

CO D ZSTI A P

Flag registers

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Example


Input device(s) Processor Output device(s)

Memory

Your system

Instructions: using the space in this box, briefly describe a system of your own creation.It should include:• One sentence of what it is and what it does, a microprocessor, some memory,• Inputs (e.g. keystrokes), input device (keyboard, shown in box),• Outputs (e.g. characters displayed on monitor), output device (monitor, shown in box)

Assignment 1a

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End of lecture 1


Helpful slide: Glossary

• Cache: A cache memory is a small high-speed memory, usually made of Static RAM placed between the µP CPU and the main memory to save up the rate at which instructions and data are supplied to the CPU by keeping copies of the most recently/frequently used memory items.

• RAM – main memory: volatile semiconductor memory, usually made of Dynamic RAM, used to store the working files which are to be accessed by the processor.

• ROM: non-volatile semiconductor memory, used to store boot up procedures for a particular computer.

• Hard disk: used to store everything else to be used or not in a computer

• Logic Gates:

AND gate: The output is "true" when both inputs are "true."

OR gate: The output is "true" if either or both of the inputs are "true."

The output is "true" if either, but not both, of the inputs are "true."

The NAND gates is a combination of AND gate followed by an inverter. The NOR gate is a combination of OR gate followed by an inverter.

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MCH5104 Microprocessor Systems Lecture #1