TECHNO'- MANt&l-l . . >-.' November, 1990 Rev. B Spectrace Instruments, Inc., 345 Eut Middlefield Road, Mountain View, California 910'3, (415) 967-0350Spectrace Instruments, Inc_. 67 Montgomery Knoll, Skillm'li.n: New Jersey, 08558, (609) 924-1878 Spectrace Instruments, Inc., 2401 Relearch BouJev&rd #206,'FortColUIlt', Colorado 80526, (303) TABLE OF CONTENTS Section 1 General information Scope of the manual 1-1 Reference documents 1-2 Tool kit 1-2 Service and support 1-2 Section 2 Product description Functional overview 2-1 Hardware architecture 2-3 Software architecture 2-6 Physical description 2-9 Specifications 2-13 Section 3 Safety Section 4 Theory of operation Xray source 4-2 Detector 4-5 Bias supply 4-6 Pulse processor 4-8 ADC micro 4-13 Data memory 4-21 Chamber controller 4-22 He protection system 4-28 Section 5 Installation Hardware 5-1 Software 5-2 Section 6 Periodic maintenance List by frequency of service 6-1 List by items to be serviced 6-2 Section 7 Troubleshooting Troubleshooting chart 7-2 Error message chart 7-18 Test matrix 7-21 Spectrace 5000 Technical Manual Section 8 Section 9 Section 10 Section II Appendix Assembly procedures Test procedures Diagnostic software ECHOA LIGHTEST MEMTEST System status page Test procedures TXCONFIG VERIFYP System and error messages Boot sequence Initia.lization sequence Acquisition sequence List of engineering documentation 10-3 J0-5 10-6 10-7 10-10 10-11 10-17 11-2 11-2 11-3 Spectrace 5000 Technical Manual 2.1 2.2 2.3 2.4 2.5 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 4.11 4.12 4.13 8.1 9.1 9.2 9.3 9.4 10.1 LIST QF FIGURES Funtional block diagram of the 5000 X-ray beam geometry Software architecture External views and connections of the 5000 Location of components in the SOOO Xray tube X-ray power supply controller Diagram of Si(Li) detector Pulsed optical preamplifier Pulse processor PCB Pulse processor test points Pulse processor timing; count rate = ADC micro PCB ADC input circuits ADC timing diagram Dynamic RAM timing Chamber controller PCB high Interlock logic on the chamber controller PCB Helium flush panel Adjustment pots and indicator lights on the signal processing subsystem System out of calibration Waveform on drain of Ql Waveforms in the X ~ R A Y ON warning light circuit Diagnostics for the Spectrace 5000 Spectrace 5000 Technical Manual LIST QF TABLES 10.1 ECHOA command language 10.2 System status page Spectrace 5000 Technical Manual Section I GENERAL INFORMATION Introduction 1-1 Scope of the manual 1-1 Reference documents 1-3 Tool kit 1-3 Service and support 14 Spectrace 5000 Technical Manual 1-1 General Information INTRODUCTION This service manual describes the Spectrace SOOO energy-dispersive X-ray fluorescence analyzer used for elemental analysis. The manual is designed to acquaint the service technician with the instrument, its hardware and software characteristics. its installation, and the service procedures that can be performed on-site. This manual is written for service technicians who have a general experience with electronic circuits and standard bench instruments. No expertise with X-ray or elemental analysis techniques is assumed (the references listed in this section should enable the interested reader to get acquainted with these topics). This manual does assume that anyone working with the Spectrace 5000 has become somewhat familiar with Its operation as described in the operator's manual. SCOPE OF THE MANUAL To achieve its stated goals, the manual is organized as follows: Section 1, General information This section describes the service policy. the organization of this manual, additional documentation, and other information of general interest. Section 2, Product description This section provides a general overview of the product, and a summary of its specifications. Section 3, Safety This section is a compilation and explanation of all safety notices and precautions which are required by government and industry standards applicable to the product. Section 4, Theory of operation This section describes the hardware and software architecture of the product, and the theories of operation of its modules and subassemblies. Section 5, Installation This section describes the environmental preparation requirements, and the hardware and software procedures for the successful installation of the product. Spectrace 5000 Technical Manual 1-2 General Information Section 6. Periodic maintenance This section summarizes the maintenance requirements of the product by indicating the frequency of required service. the items requiring service. and the applicable procedures. Section 7, Troubleshooting This section is a guide to troubleshooting procedures, presented as a table of symptoms, causes and remedies. Section 8. Assembly procedures This section presents detailed procedures for the mechanical disassembly and reassembly of the product and its component modules. Section 9. Test procedures This section presents detailed procedures for the mechanical, electrical and software adjustment. calibration and testing of the product and its component modules. Section 10, Diagnostic software This section describes ROM- and RAM-resident diagnostic software used as part of the various service procedures. Section 11, System and error messages This section presents a summary of system and error messages that may appear on the monitor display during the operation or servicing of the product. Appendices This section contains lists of schematics and other engineering drawing that are mentioned in the other sections of this manual; also tables of jumper and switch settings, fuse types and locations, register addresses and memory address space allocations, parts lists. and similar information. Index This section lists the page numbers where key words appear in this manual. Glossary This section lists definitions of technical terms used in the special context of the product. Revisions and updates This section is reserved for the reader to log and keep changes or additions to the manual. Service bulletins This section is reserved for the reader to keep service publications sent to the field. User notes This section is reserved for the reader to keep additional information that may be useful. Spectrace 5000 Technical Manual General Information I) REFERENCE DOCUMENTS Tracor manuals and publications Spectrace 5000 Operator's Manual Spectrace 5000 marketing brochure and specification sheet "Fundamentals of X-ray Spectrometry" by Donald E. Leyden (Tracor Xray, 1984) OEM manuals IBM DOS version 3.1 Reference Manual IBM DOS version 3.1 Technical Reference Manual IBM PC/AT Guide to Operations IBM PC/ AT Technical Reference Manual IBM PC/AT Hardware Maintenance and Service Manual TOOL KIT The following equipment is required to service the Spectrace 5000 in the field. Test diskette Extender board B N C - t o ~ B N C cable Vacuum test fixture and gauge Copper. brass samples Copper calibration standard Ti-Zr calibration standard Conostan S12 trace elements std. Collimator Digital multimeter and probes IDa MHz oscilloscope and probes IBM PC extender board Universal adjustment tool (tweeker) Misc. hand tools (screwdrivers. etc.) Lens cleaning vacuum/air kit Acetone or TCE Spectrace 5000 Technical Manual 1-4 General Information SERVICE AND SUPPORT The following provisions apply both to in-warranty and servicecontract support of Spectrace products. On-site service On-site service is available during normal business hours. Emergency service is provided if possible. Telephone support A service technician is available from 8:00 AM to 5:00 PM Pacific Time for any help or information required. Extensive troubleshooting is provided if both parties feel the problem may be resolved over the telephone. Call: Spectrace Instruments, Inc. Customer service (415) 967-0350 Customer involvement During warranty period the user may be requested to perform simple diagnostics to assist the technician in localizing the problem. This may include voltage measurements. board swaps. or running special software routines. Complex technical skill is not expected. After the warranty period, the degree of involvement is the user's choice. Trainine; From time to time, we offers on-site and in-factory training for users (Spectrace user school). Equipment exchange AU subassemblies are available for instant ex.change. We normally respond within one working day of the initial request. ReDackiDlz for shipment Whenever possible. packing materials should be saved for use when components must be returned. Sensitive components such as the X-ray tube and the detector assembly require special care in packing. Call customer service for instructions. Spectrace 5000 Technical Manual Section 2 PRODUCT DESCRIPTION Introduction 2-1 Bias supply PCB 24 Pulse processing PCB 24 Data memory PCB 25 Functional overview 2-1 Hardware architecture 2-3 Sample tray 2-3 Atmosphere control 2-3 Chamber controller PCB 2-3 Xray source 2-3 Spectrometer 2-4 ADC micro PCB 2-4 Safety design 2-6 Software architecture 2-6 DOS 2-6 Applications 2-6 Signal flow 2-7 Diagnostics 2-8 Outline of operation 2-8 Physical description 2-9 Sample chamber 2-9 Chamber controller PCB 2-9 Master wiring PCB 2-9 Xray source 2-9 Spectrometer 2-9 Signal processing PCB set 2-10 Data memory PCB 2-] 2 Computer 2-] 2 Printer _ 2-12 Display 2-12 Specifications 2-13 Spectrace 5000 Technical ManuaL 2-1 Product Descriotion INTRODUCTION The Spectrace 5000 is an automated energy dispersive X-ray fluorescence (EDXRF) analyzer used for nondestructive elemental analysis of solids and liquids. The system includes the features and flexibility necessary for solving a wide range of analytical problems, and can be configured to accommodate a variety of sample geometries. For the purpose of introducing the reader to the Spectrace 5000. this section describes it in terms of a general, functional block diagram, a discussion of its hardware and software architecture. a guide to its major components, and a summary of the system specifications. FUNCTIONAL OVERVIEW An instrument of analysis must be able to evoke a signal characteristic of the sample's properties, and transform that signal into a form suitable for electronic processing and analysis. In this context, the Spectrace 5000 consists of four major functional blocks, shown in Figure 2.1. Sample handling and control implements the operator's instructions and the system's control over the conditions in the chamber for analyzing samples. The operator places samples onto the sample tray in the chamber, and selects the acquisition parameters by means of the software running on the computer. The operator's commands and selections (of chamber parameters) are implemented via the chamber controller PCB; a serial link with the computer carries the relevant hardware status and control information. During acquisition, the "primary" X-rays from the X-ray tube hit the sample, and induce the emission of "secondary" Xrays by the elements contained in the sample. Signal detection captures the "secondary" X-rays emitted by the sample and converts them into electrical signals. Signal processing applies some analog and digital hardware and software techniques to refine the signals from the spectrometer, and converts them into digital data. These are sent to an interface PCB in the computer via a parallel data cable. Data analysis and disolay consists of analyzing the data from the signal processor, identifying the elements in and the composition of the sample, and generating and displaying the spectra. This is done by software running in the computer. Spectrace 5000 Technical Manual 2-2 Product Description SPECTROMETER ~ SIGNAL DETECTION secondary x-rays CHAMBER ')primary x-rays X-RAY SOURCE -ATMOSPHERE CONTROL SAFETY INTERLOCKS iSS: BIAS :>:< SUPPLY iSS PCB PULSE PROCESSOR PCB ADC data,... MICRO PCB :t& DATA SIGNAL PROCESSING MEMORY PCB COLORDISPLAY GRAPHICSADAPTER DISPLAY PRINTER GRAPHICS ADAPTER PRINTER control ... MASTER and WIRING status SERIAL PCB INTERFACE ADAPTER 1 CHAMBER CONTROLLER PC/AT KEYBOARD PCB DATA ANALYSIS AND DISPLAY SAMPLE HANDLING AND CONTROL Figure 2.1 Functional block diagram of the 5000 Spectrace 5000 Technical Manual Product Description 23 HARDWARE ARCHITECTURE The discussion in this section is based on the functional block diagram (Figure 2.1) and on the system cabling diagram (drawing no. 0140-0304). Sample tray The sample tray places samples into the X-ray beam. The tray is rotated by a stepper motor controlled by the chamber controller PCB. The tray is equipped with a home sensor to detect the first sample position of a multi-sample tray. Because the sample height (distance from the X-ray source as well as the detector) affects the accuracy of measurements, it is maintained within a 0.005" tolerance. For some samples, such as powder or semiconductors. the surface texture makes a preferred orientation necessary. It is beneficial to rotate the sample to get more accurate answerS. This is accomplished by an optional sample spinner, driven by an AC synchronous motor. Atmosphere control For low-Z samples a vacuum environment is needed and thus the sample chamber is also a vacuum chamber. The vacuum system is also controlled by the chamber controller PCB. For other lowZ and liquid samples, a helium environment is needed. Since helium can diffuse very quickly through the thin Be window on the detector and damage it, an optional helium protection unit is used. Chamber controller PCB The chamber controller PCB is an intermediary between the computer and that part of the hardware which affects the excitation conditions, sample preparation and safety: Position of sample tray Position of filter wheel X-ray tube voltage and current Chamber atmosphere Sample spinner Interlock monitoring and safety The computer issues commands to the board via the 1200-baud RS-232 link. This board then decodes the instruction and executes the operation by either sending data to modules connected to it via the master wiring PCB, such as the Xray power supply. or generates a sequence of pulses to the tray or filter drive stepper motors. The chamber controller PCB also returns system status information to the computer. X-ray source The Spectrace 5000 uses a low power xray tube (less than 50 watts) with a rhodium anode target. Other anode targets are also available. A 30 kV or 50 kV high voltage power supply drives the X-ray tube. The Xray tube generates the Xrays that are incident upon the sample so as to cause the sample to fluoresce. The X-ray power supply controller PCB controls the tube voltage and current. (The chamber controller PCB. in turn, controls the power supply controller.) Tube voltage is controlled by a O-IOV input voltage to the Xray power supply, and the tube current is controlled by heating the filament/cathode of the tube. Spectrace 5000 Technical Manual 2-4 Product DescriptioD The regulation of voltage and current is such that the X ~ r a y output from the tube is kept to within 0.5 % over an 8hour period. The X-rays emitted by the anode pass through a 0.005" Beryllium (Be) window. Then the beam is collimated and filtered. The filter is selected by rotating the 6position filter wheel by means of a stepper motor. which is controlled by the chamber controller PCB. The collimator and X-ray tube define the illumination beam. To minimize scattering, the detector acceptance beam is 900 from the incident beam. The sample is placed at the intercept plane of the two beams. as shown is Figure 2,2. Spectrometer The X-ray spectrometer converts X-rays into a series of pulses whose amplitude is proportional to the X-ray energy. X-ray photons from the sample are converted in the Si(Li) detector into dectron-hole pairs whose number can be precisely determined by physics. Under a biasing voltage (up to 600 volts) these electrons and holes move to the cathode and the anode, respectively, and a small external current results. This signal is amplified by a preamplifier whose critical component is a field effect transistor (FET) inside the cryostat. The preamplifier handles linear and low-noise signals by using the combination of a LN-cooled FET input stage and pulsed optical feedback stabilization. Liquid nitrogen inside a dewar cools the Si(Li) dctector and the FET to reduce noise caused by the leakage current in the detector and thermal noise in the FET. A liquid nitrogen level sensor is mounted on a rod which is immersed in the liquid nitrogen. Bias supply PCB The bias supply PCB fulfills four important functions. It monitors the liquid nitrogen level sensor and issues an alarm if the level drops too low. It protects the detector and the FET from excess leakage current; if the leakage current becomes excessive, the bias voltage is turned off. It supplies detector bias for proper operation. Finally, it passes on the signal from the preamplifier to the signal processing modules in the card cage. Pulse processing PCB The pulse processing PCB performs analog signal processing functions such as amplification, filtering and pulse pile-up rejection. This board generates "live time" (circuit active) and "dead time" (circuit disabled) information which is used in these circuits to reduce spectral distortion. and which allows the operator to optimize the trade-off between data rate and resolution. ADC micro PCB The heart of the Spectrace 5000 is the multichannel pulse height analyzer implementcd in computer hardware and software. The key to this is the microp rocessor-based ana log-to-digi ta I conversion circuit on the ADC micro PCB. Under software control, the output of the pulse processor is converted into a histogram with high precision and accuracy. In addition, this board provides automatic digital zero (baseline) and gain stabilization, dead time correction to the pulse processing PCB, and communicates with the data memory PCB in the computer. Spectrace 5000 Technical Manual Product DescriPtion SAMPLE OPTIONAL COLLIMATORMOUNTING SCREW X-RAY TUBE / K / -, '/ FILTER / / COLLIMATOR X-RAY TUBE FILTEA WHEEL DETECTOR Figure 2.2 X ~ r a y Data memory PCB The data memory PCB is the interface between the ADC micro PCB and the rest of the computer. This board: Downloads the program to the ADC micro PCB; Provides memory into which the ADC writes a spectrum, and from which the computer reads it; Provides priority arbitration between the computer and the ADC; Sends commands to and receive status information from the AOC. beam geometry The spectrum memory is mapped into an unused portion of computer memory, and, as a result, the spectrum is readily available for display purposes. OEM eauinment The power supplies in the system unit, and all equipment associated with the computer (printer, monitor, PCBs) are described in the vendors' manuals. Spectrace 5000 Technical Manual 2-6 Product Description Safety design Due to the potential health hazard of x ~ rays. the Spectrace 5000 has extensive safety interlock circuitry, with sensors and microswitches throughout the system unit, and continuous hardware and software checks of their status. The chamber controller PCB monitors a series circuit of 6 microswitches. which, when connected, indicate that: X-ray tube is installed Detector is installed Front door is closed Back door is closed Chamber lid is closed X-ray tube cathode is connected When the chamber controller PCB senses that this circuit is closed, the EDXRF program funning in the computer (see below) orders the chamber lid to be latched. Thus, closing of the chamber lid is doubly ensured and double-checked. The successful closing of the lid latch causes the X-ray ON warning light to come on. A sensor in the warning light assembly monitors the light. If the light does indeed come on, a relay on the chamber controller PCB and on the X-ray power supply controller PCB finally enable the power supply to energize the X-ray tube. SOFTWARE ARCHITECTURE The major components of the Spectrace 5000 software, and the signal paths between them, are illustrated in Figure 2.3. The operating system, DOS, runs all other programs on the computer, as well as the computer's I/O devices. DOS resides partly in ROM and partly on disk. DOS recognizes disk drives (A:, B:, C:, ete.), I/O devices (CON:, COMI:, COM2:, PRN:, etc.) and I/O ports as the means by which it accepts inputs and outputs. Aoplications EDXRF runs the Spectrace 5000 and does the analysis on the data generated by the detection and signal analysis circuits. A larger version of the program (EDXRFIFP) also includes a fundamental parameters program. Both can be configured in a "test" version to run special tests on the system. In addition to EDXRF, other programs are also needed to run the system: LOCKOUT and UNLOCK implement software security functions in EDXRF, to prevent unauthorized changes in analysis protocols. For EDXRF versions 1.0 and 1.1 only, MKCNFG and RDCNFG are used to edit and read, respectively, the CONFIG file, where data about the options on the system arc stored. EDXRF versions 1.2 and higher use NEWCNFG. XRAYOFF, called from the AUTOEXEC batch file, makes sure that the X-rays are turned off and the chamber lid is unlocked when the system is rebooted. INSTALL and UPDATE are used to load initial and subsequent releases, respectively, of the application software package. FPCONFG is used [0 define X-ray tube, filters and geometry for EDXRFIFP (versions 1.2 and higher). VERIFYP is a diagnostic program used to identify damaged procedure files. Spectrace 5000 Technical Manual 2-7 Product Description r ~ ~ W - - - - - - - - - - - - J DATA EDXRF MEMORY 1 PCB I; (SPECTRA) I I I VOl EGA I CON: I /' SERIALI DISK " A ~ DOS PARALLEL I I I I I I I I C: ADAPTER COM 1:1..I"CON ~ __JL------ ------GRAPHICSKEYBOARD PRINTER Figure 2.3 Software architecture ADC MICRO PCB ENHANCED COLOR DISPLAY CHAMBER CONTROLLER PCB DENOTES SOFTWARE Two subdirectories are created on the hard disk at installation time. HELP contains online explanations of the functions and features of EDXRF. SPECTRAC contains files specific to the operation of the system. Sienal flow Application programs, such as EDXRF, are loaded from the release diskettes in drive A: onto drive C: (and into RAM). Signal processing software is downloaded via the data memory PCB into the ADC micro PCB. The operator interacts with the EDXRF program by typing commands or menu selections on the keyboard (the console port) and reading the menus, spectra and text on the color monitor. Commands to the system unit, generated by EDXRF in response to operator inputs or protocol requirements, go to the chamber controller PCB via the serial communication port of the serial/parallel adapter, and to the signal processing boards via the data memory PCB. Status information from the hardware uses the same paths. Spectrace 5000 Technical Manual 2-8 Product Description Spectral data stored on the data memory PCB are passed to EDXRF for analysis, from which the spectra and other results arc constructed. The spectra arc put on the monitor via the EGA board. Other graphics, such as calibration curves, arc assembled by the VDI graphics interface and sent to the EGA board via DOS. ASCII text bypasses VOl, on its way either to the printer via the serial/parallel adapter or to the EGA board. EDXRF system status Dage The EDXRF application program is described fully in the Spectrace operator's manual. The system status page is described in Section 10 (Diagnostics) because of its usefulness in monitoring the hardware. Diagnostics An important part of the system software architecture is the package of diagnostic programs. The Spectrace 5000 is provided with two classes of diagnostics: (1) diagnostics for the system unit, written by Spectrace Instruments, and (2) diagnostics for the computer, provided by IBM. The system unit diagnostics are described in Section 10. The computer diagnostics are described in the IBM manuals. Outline of ooerallon The X-ray fluorescence measurement, data reduction and display are performed by the computer and its enhanced graphics display system. The EDXRF program initializes the chamber controller and the ADC microprocessor, then either carries out a prepared program or prompts the user for information needed for the analysis. Then it performs a series of operations needed to output the results of the analysis. The computer samples system parameters via the chamber controller PCB, and the signal processing parameters via the data memory PCB. It then initiates the acquisition of a spectrum. While the spectrum is being collected, it is also displayed and updated every second on the enhanced graphics display monitor. While the spectrum is being displayed, KLM markers and cursors can be repositioned anywhere on the spectrum, The spectrum can be scaled vertically as well as horizontally, using log or linear scales. Spectrum peak labels can be attached to a peak and swred. Regions of interest can be defined using the various soft keys. The graphics display is highly interactive and user-friendly. After the collection of a spectrum is complete, the spectrum intensities can be processed through various programs to obtain deconvoluted }jne intensities. This intensity file is processed by the program using a leastsQuares algorithm. The use of the 80287 math coprocessor speeds up the numerous floating-point operations required in this calculation. The nnal elemental concentration can then be displayed as calibration curves, and a hard copy is printed out on the IBM Proprinter. Spcctrace 5000 Technical Manual 2-9 Product Descriotion PHYSICAL DESCRIPTION The Spectrace 5000 consists of two modules: the system unit and an IBM PCI AT computer. The external features and connections of the system unit are shown in Figure 2.4. (The computer is described in its own manuals.) The system unit houses all the components of three major functional blocks shown in Figure 2.1: sample handling, signal detection and signal processing. The locations of these components in the system unit are shown in Figure 2.5; the view in the Figure is with the front door open or removed. The components of the fourth major functional block, data analysis, are built into or connected to the computer. SamDle chamber The sample chamber is located on top of the system unit. It is a mechanical assembly which includes the following: Base plate Chamber lid Sample tray Filter wheel Tray and filter drive motors X-ray tube and detector ports, and Sample spinner and motor (optional). Chamber controller PCB The chamber controller PCB is located in the left-most slot in the system unit'S card cage. It communicates with the rest of the system via the master wiring PCB and the card cage motherboard. Master wiring PCB The master wiring PCB is located on the left side of the system card cage. It is a connector panel for all cables between (1) the chamber controller PCB and the card cage motherboard, (2) the power supplies, motors, solenoids, safety interlocks and other parts of the system, and (3) the serial link to the computer. X-ray source The X-ray source is located just under the chamber. It consists of the X-ray tube which protrudes into the chamber, the X-ray high voltage power supply, and the X-ray power supply controller PCB. Spectrometer The X-ray spectrometer consists of the detector, the preamplifier, and the liquid nitrogen dewar. The detector is a lithium-drifted silicon diode that converts incoming X-rays to an electric charge which is proportional to the X-ray energy of the incoming Xray. This becomes the output signal from the preamplifier which is sent to the pulse processor PCB via the bias supply PCB. The LN dewar is an insulated I 7 ~ 1 i t e r container for the storage of liquid nitrogen, and is equipped with a LN level sensor. Spectrace 5000 Technical Manual 2-1 0 Product Description R8232 CABLE XRAYS ON TO CABLELIQUIDX-RAYS ON CHAMBER NITROGEN,LIGHT CONTROLLERFILLI CABLE 'C, , jNNELfromCHAMBER --I II DATA LID MEMORY 'C' ADC MICRO " PC, = ON/OFF FAN FILTERS AC POWE FUSES ELECTRI OUTLET ,,0 VACUUM LOCK PUMP AND POWER '" HELIUM HOSE VACUUMFRONT DOOR HOSE BACK DOOR I ,::;; Iw Figure 2.4 External views and connections of the 5000 '" ,..:. =!kEs'=l.-) .... = tJ,. l"= R 00 S ,,1'3 .0. HELIUM FLUSH PANEL itI Siena I nracessloe PCB sel The signal processing circuits are contained on three PCBs located in the system card cage and interconnected via the motherboard. The bias supply PCB is located in the right-most slot. This board controls and protects the detector, and receives the signal from the preamplifier. The pulse processor PCB is located in the next slot. This board filters and shapes the signal from the preamplifier. The ADC micro PCB is located in the third slot from the right. This board converts the signal from the pulse processor into digital data. Its output goes to the data memory PCB. Spectrace 5000 Technica.l Manual Product Descriotion 2-11 X-RAY TUBE DETECTOR X-RAY POWEA SUPPLY CURRENT CONTROLLER PCB 12V POWER SUPPLY.,' MASTER -__.. WIRING PCB PULSE PAOCESSOR PCB __ BIAS SUPPLY PCB ;; QADG MICRO PCB o'=' 0 AND m CABLE TO DATA MEMORY PCB o CHAMBER CONTAOLLER PCB , , LIQUID NITROGEN DEWAR 24V POWEA SUPPLY 5V POWER SUPPLY Figure 2.5. Location of components in the 5000 Spectracc 5000 Technical Manual 2-12 Product Description Data memory PCB The data memory PCB occupies a fullsize expansion slot in the computer. It provides memory for storing spectra which are being collected. It also provides the communication path between the computer and the signal processing PCB set. Computer The computer is an IBM PCIAT equipped as follows: 512 Kbytes of RAM 20 Mbyte Winchester disk drive 1.2 Mbyte floppy disk drive 80287 math co-processor Enhanced graphics adapter Printer adapter Serial/parallel adapter Printer cable Serial interface cable (09-to-D25) The adapter boards are located in the PCs expansion slots. The EGA board has an additional 128 Kbytes of memory. (The Spectrace 5000 can also work with an IBM PC or PCjXT if it is equipped with a hard disk, a math c o ~ p r o c e s s o r , and the EGA board.) Printer The Spectrace 5000 is normally equipped with a 200 cps IBM Proprinter with graphics, for printing text and plotting spectra. Display The Spectrace 5000 is normally equipped with the IBM Enhanced Graphics Display monitor for displaying information and spectra. The color monitor has 16 colors and a reSOlution of 640x350 pixels. Spectrace 5000 TechnicaL Manual 2-13 Product Description SPECIFICATIONS SAMPLE CHAMBER Sample Types Solid Powder Liquid Thin film Tray types Single IO-position IO-pos. with spinner Custom Sample sizes 10.OxI2.0" (245x305 mm) max. l.2S" (31.8 mm) l.8S" (47.0 mm) Custom Environment Air Vacuum Helium EXCITATION Geometry Inverted 90 (target-sample-det.) 1.125" (28.6mm) Target-sample 3.6" (91.4 mm) X-ray TUBE Type Bremsstrahlung Target Rh Others optional Window Be Window thickness 0.005" Cooling Natural convection and conduction. X-ray GENERATORS 30 kV: Voltage range 6-30 kV Increments lkV Current range 0-O.3mA Increments O.OlmA >0 kV: Voltage range 6-50 kV Increments IkV Current range 0-0.3SmA Increments O.OlmA Stability Filters Materials Collimators 0.5% over 8 hours 6-position wheel Aluminum Cellulose Rhodium Copper (with 50 kV) I mm hole (min.) Detector Area Resolution Window Window thickness LN dewar X-ray SPECTROMETER Si(Li) 230 mmISS eV FWHM at 5.9 keV, 1000 cps. Be 0.0003" and 0.0005" 17 liters Low LN warning. HV thermal cutoff Amplifier Shaping network Stability Linearity Pileup reject Preamplifier: pulsed optical feedback Live time correction +/-1.0% from a to 20 keps converter Addresses Clock rate Energy calibr. 4.096 JOOMHz Automatic Data Memory Data channels Counts/channel 2048 16 million Time variant O.OI%;oC 0.1% 250 ns above 2.5 keY I us below 2.5 keV Spectrace 5000 Technical Manual 2-14 Product Description SOFTWARE Operating system PC-DOS version 3.1 or higher Application EDXRF EDXRF/FP Menu-driven program with softkeys and options shown on the display for ease of use. A HELP key is available on most menus which brings up a description and instructions for the choices on each menu. Spectral display information Xray spectrum (linear or log) Procedure title Sample ID Tray position kV. rnA, filter KLM markers Peak labels Energy cursor Energy scale Gross/net intensity of region of interest Preset livetime Elapsed livetime % dead time Overlap comparison of two spectra Out out: CRT and graphics printer. Automation Chamber environment Xray tube voltage and current Sample position Filter selection Single pushbutton operation Spectrum processing Digital filter background removal; Empirical peak unfolding by least squares fitting; Gross peak intensities and net peak intensities above background. Analysis techniques Peak ratios Linear and quadratic fit Intensity matrix correction Two concentration matrix corrections Sort Wafer analysis OPERATING ENVIRQNMENT Temperature so to 104F 10 to 40C Humidity 20 to gO% RH non-condensing DIMENSIONS Spectrometer/sample chamber; Height 43.75" (11Ll cm) Width 28.0" (71.1 em) Depth 27.0" (68.6 em). Computer workstation Hei8ht 26.5" (67.3 em) Width 40.0" (101.6 em) Depth 27.0" (68.6 em). WEIGHT Spectrometer/sample chamber 450 Ib' (204.3 kg) Computer and workstation 150 Ib' (68.1 kg) POWER REOUIREMENTS Voltage 115 or 230 VAC Frequency 50 or 60 Hz Current 6 Amps @ 115V (with vac. pump) J3 amps @ 115V Power 700 watts (with vac. pump) 1500 watts OPTIQNS Vacuum pump Helium environment detector protection Sample spinner Special sample trays Computer workstation table/enclosure PCXRF fundamental parameters program Spectrace 5000 Technical Manual Sectiog 4 THEORY OF OPERATION Introduction X-ray tube X-ray power supply controller Current control Voltage control 30/50 kV selection Interlocks XRAY ON warning light PCB Detector Preamplifier Bias supply PCB Detector bias supply Protection circuit Liquid nitrogen level monitor Pulse processor PCB Overview Controls and indicators Fast discriminator Timing section Pulse rejection Count rate range Linear signal path ADC micro PCB Overview ADC inputs Pulse stretcher Rundown current 100 MHz oscillator Address scaler Conversion timing Store, DMA Reset circuit ZERO and GAIN DACs Fast discriminator scaler Dynamic RAM Communications bus Processor Data memory PCB Memory Communication 4-1 4-2 4-3 4-3 4-3 4-3 4-3 4 ~ 4 4-5 4-6 4-6 4-6 4-7 4-7 4-8 4-8 4-8 4-10 4-10 4-11 4-12 4-12 4-13 4-13 4-13 4-13 4-15 4-16 4-16 4-16 4-17 4-18 418 418 418 4 ~ 19 420 421 4-21 421 Spcctrace 5000 Technical Manual Chamber controller PCB 4-22 Overview 4-22 Auto-reset 4-22 Initialization 4-22 Vacuum sense and control 4-22 Stepper motor control 4-22 Home condition 4-24 High voltage control 4-24 Sample spinner 4-24 Interlocks 424 Safety features 4-24 Command/confirm logic 4-25 Interlock circuit 4-25 Communication with the computer 4-26 Inquiry mode 4-26 Command mode 4-27 Receive mode , , , , 4-27 He protection system 4-28 Spectrace 5000 Technical Manual 4-1 Theory of Ooeration INTRODUCTION This section describes the Spectrace 5000 in detail. The presentation consists of descriptions of the several components introduced in Section 2. The reader is referred to the Spectrace 5000 operator's manual and the manuals of OEM products built into the Spectrace 5000 for any details that are not present in this section. NOTE In the following discussion, a reference to a negativetrue signal is indicated by the slash character (f) placed in front of the signal name. Spectrace 5000 Technical Manual 4-2 Theory of Operation X-RAY TUBE The source for illuminating the sample with X-rays is the X-ray tube, shown schematically in Figure 4.1. The tungsten filament is heated by a pulse width modulated AC current from the X-ray power supply controller PCB. The heated filament cathode emits electrons; the current is controlled by the X-ray supply controller PCB. and is limited to 0.35 rnA. The emitted electrons are focused by a focusing electrode to a spot about I to 5 mm2 on the anode. The anode is also called the target, which consists of a thin disk of rhodium plated on a copper block. The anode is typically cut such that the angle between the face of the target and the normal to the exit window is 20. The window is made of thin (O.oosn) beryllium foil, which allows Xrays to escape and at the same time holds a high vacuum. Use of the X-ray tube in quantitative analysis requires careful attention to the following four considerations: It is important to measure the spectrum from the X-ray tube to make sure that the correct target material is used. This can be done by observing the scattered spectrum. The characteristic K and L lines of the target should be present. Slight changes occur in the position and dimension of the filament and other internal dimensions as the tube warms up to its equilibrium temperature. These changes may affect the intensity distribution of the primary beam. It is thus important to wait half an hour at operating voltage and current before making precise Quantitative measurements. To align the X-ray optics, unexposed polariod X-ray film can be placed in the sample socket and illuminated by full power X-rays for IS-30 seconds. The illuminated area is colored and can be used for alignment purposes. The output flux of the X-ray tube at constant kV and rnA decreases 3% for each 1000 hours of operation due to pitting and sublimation of target material on the inside of the tube window. To obtain accurate results, this effect should be calibrated out. FOCUSING ELECTRODE ANODEGLASS ENVELOPE FILAMENT CATHODE SAMPLE Figure 4.1 X-ray tube Spectrace SO 00 Technical Manual 4-3 Theory of Operation X-RAY POWER SUPPLY CONTROLLER The X-ray power supply controller PCB (schematic no. 5919-0161) controls the voltage and current applied to the X-ray tube, as shown in Figure 4.2. It is able to control both 30 kV and SO kV X-ray power supplies {or currents up to 0.35 mAo Current control In an X-ray tube, electrons flow from the filament to the target, where they produce X-rays upon impact. The magnitude of the current depends upon the temperature of the filament and the voltage difference between the filament and the target. An AC current produced by transformer TI heats the filament. A pulse width regulator UI controls the AC current by varying the width of the pulses used to drive the transformer. The regulator has a feedback path designed such that the chip heats the filament to cause a current flow in the tube, which is used to balance the current in the feedback circuit. The current control DAC UlO controls the amount of current taken out of the feedback path. YoHnKe control The X-ray power supply is controlled by varying the control voltage between positive and negative reference voltages. As this control voltage increases (0-10 V), so does the output of the high voltage supply. The power supply has a reference voltage. The output voltage reaches its maximum when the control voltage is equal to the reference voltage. The circuit that generates the control voltage consists of U9. US and Q4. The reference voltage from the power supply is buffered by half of U9 and is used as a reference voltage for US and a digitalto-analog converter (DAC). The output of the DAC is amplified by the other half of U9 and by Q4. 30/50 kY selection To provide the control voltage for either power supply, the gain of the U9-Q4 amplifier is jumper-selectable for either 30 or 50 kY. This is necessary because the chamber controller PCB sets the DAC at full scale for 50 kV. To provide full scale output for 30 kV, the gain of the amplifier is jumpered to a larger value. Interlocks Interlocks are designed to prevent operators, technicians or bystanders from being exposed to Xrays. The input power for the Xray power supplies goes through the interlocks, so if any of them are open, there can be no power for the X-ray power supply. The interlock circuit is described elsewhere in this section. Spectrace 5000 Technical Manual 4-4 Theory of Qoeration 24V POWER SUPPLY PULSE WIDTH REGULATOR f-INTERLOCKS I ir> ,l X-RAY TUBE TRANSFORMER ~ FEEDBACK CHAMBER CONTROLLER PCB X-RAY POWER SUPPLY +REF W -REF VOLTAGE I--WR CONTROL DAC CS CS LCURRENT f4CONTROL DAC OPTICAL ISOLATORS DATAlSTROBE SERIALPARALLEL CONVERTER Figure 4.2 X-ray power supply controller X-RAY ON LIGHT PCB The X-RAYON warning light assembly (schematic no. 5919-0184) is used to provide a visual indication that X-rays are being produced. This light is a safety requirement and is part of the interlock system. No X-rays are produced without the light being lit. The light is a 6-inch fluorescent tube. The AC voltage used to power the light is converted from 12 VDC. A hex CMOS inverter UI is used as an oscillator and driver for QI and Q2. These transistors drive transformer Tl which produces the AC voltage for the light. A capacitor C6 limits the power to the light. An inductor LI limits the current heating the filaments and produces high voltage spikes to break down the gas inside the light. causing the light to turn on. A phototransistor Q3 is used to determine that the light has lit. Spcctrace 5000 Technical Manual 4-5 Theory of Operation TO PREAMP t N-TYPE Si .J--------- LITHIUM+ + _ COMPENSATED - -:I ,. \I REGION '>-,l-+' I ~ __- P-TYPE Si ~ 1 SCHOTIKY DETECTOR BIAS BARRIER CONTACT (200 )( GOLD) X-RAY PHOTON Figure 4.3 Diagram of Si(Li) detector DETECTOR The Si(Li) detector is a layered structure in which a lithium-diffused active region separates the P-type input side from the N-type output side (see Figure 4.3). Under a reverse bias of approximately 600 Y, the active region acts as an insulator with an electric field gradient throughout its volume. When an X-ray photon enters the active region of the detector, photo-ionization occurs as an electron-hole pair is created for each 3.8 eY of photon energy. In the X-ray spectrometric region of I to 20 kY, silicon detectors have excellent efficiency for converting X-ray photon energy into an electric charge. These charges are then fed into a field effect transistor for highly sensitive detection. Physically, in order to protect the Si(Li) detector. both detector and FET are mounted in a unique microphonic absorber and cooled by a cold finger from the liquid nitrogen dewar. Spectrace 5000 Technical Manual 4-6 TheQry of Operation PREAMPLIFIER The pulsed optical preamplifier is shown in Figure 4.4 and schematic no. 50500-02. The FET and the amplifier are in a negative feedback configuration. Cr acts as the integrating capacitor. Output A is proportional to the integrated charge; thus it looks like a staircase. In order to reset the output to zero, an optical feedback loop is used. When the output exceeds a certain value, the LED in the detector assembly is switched on to discharge the gate of the FET and thus reset it to zero. IIr-:=::=---,RESETBIAS CIRCUIT LI ---' SI(U) PREAMPLIFIER DETECTOR Figure 4.4 Pulsed optical preamplifier BIAS SUPPLY PCB The bias supply PCB (schematic no. 59190189) consists of a detector bias supply, a detector protection circuit. and a liquid nitrogen level monitor. Detector bias supply The heart of the bias supply is a bridge oscillator whose amplitude is voltage controllable. This oscillator, consisting of amplifier U5 and its associated components C20. C23. R34, and R43, determines the operating frequency, which is nominally 25-30 kHz. The oscillation amplitude is determined by the feedback network consisting of CR5. CR6. R21, R23, R33, and QI. A variable resistor. R20, is used to calibrate the gain of the oscillator to a nominal value. FET QI functions as a voltage variable resistor and allows the oscillator amplitude to be varied by a control voltage from the stabilizing feedback network. Transistors Q8 and Q9 provide the power gain necessary to drive a voltage multiplier circuit, consisting of TI. C2C8, CRl-CR4, and R16-RI8. This circuit converts the oscillator output to -1000 VDC. The desired detector bias voltage is selected by connecting resistor R3 to the appropriate tap on the voltage divider formed by resistors R5-R15. Thus the detector bias voltage is jumperselecta ble. U3 and its associated components form a voltage stabilizing feedback network which compares the multiplier output voltage with a reference voltage. Any deviation from -1000 VDC produces an error voltage which changes the oscillator amplitude to correct the deviation. A variable resistor R26 is adjusted to set the output of the error amplifier U3 to its nominal value when the multiplier output is -1000 VDC. Thus the bias voltage is also very stable, and has very low ripple. Spectrace 5000 Technical Manual 4-7 Theory of Operation Protection circuit The protection circuit is designed to guard the input FET against damage caused by system warmup due to loss of liquid nitrogen. vacuum failure or electrical transients, or by improper system operation and installation. This circuit monitors the detector leakage and disables the detector bias if the current exceeds safe limits, regardless of the origin of the high current. The magnitude of the leakage current is deduced from the preamplifier reset pulse rate. as it is proportional to the current. The reset pulses are averaged by an R-C integrator. R45 and C35. If this average value exceeds a predetermined limit, the output of U7 switches to zero volts and the output of U6 switches high. A high output from U6 turns off the front panel LED and stops the oscillator by switching Q2 on. When the excessive leakage current stops. the output of U7 switches high and U6 provides about a one second delay before the oscillator is restarted. Liquid nitrogen lenl monitor The liquid nitrogen level monitor provides a visual and an audible alarm whenever the detector dewar needs refilling. When the liquid nitrogen level falls below the sensor. the sensor resistance increases. UB senses this increase and its output switches high. A stable oscillator U9 begins to operate and flash the front panel LED. If the ALARM MUTE switch is pushed, Q7 turns off and Q6 turns on. Since Q7 is now held turned off by Q6, the audio alarm is turned off but the LED continues to flash. If the system does not have a LN sensor, the jumper block should be connected across E2. This disables the alarm circuitry. The LOW LN light should be on. When the dewar is refilled, the output of U8 switches low, thus stopping the oscillator U9. Spectrace 5000 Technical Manual 48 Theory of Operation PULSE PROCESSOR PCB The pulse processor PCB is shown in schematic no. 5919-0190. Its functions are described with the help of the block diagram in Figure 4.5. while Figure 4.6 shows the signals at various test points on the board. Overview The pulse processor PCB is a sophisticated X-ray signal processing circuit which provides linear amplification, noise filtering, and pulse pile-up rejection. This combination of functions is an essential prerequisite for achieving accurate and rapid X-ray analysis. The pulse processor incorporates timevariant filtering which is a significantly different noise reduction technique compared to the Gaussian shaping used in conventional X-ray amplifiers. Time variant filtering provides superior noise filtering without a penalty in count rate performance. This means a narrower spectrum peak width, which is particularly important for low-Z element analysis. Three different signal processing times can be selected. This gives the operator a convenient means of optimizing the tradeoff between energy resolution and data output rate. Special circuits are incorporated to reduce spectral distortions. Baseline stabilization reduces baseline shift with count rate and temperature to a negligible amount. Background and false peaks are reduced by the pulse pile-up rejector. ThiS circuit incorporates a fast and slow channel to produce effective pileup rejection at high count rates and at [ow energies. A unique feature of the pulse processor is the ability to abort unwanted signals before they are fully processed by the time variant filter. When this feature is employed, the analysis rate of the desired portion of the spectrum is increased. Controls and Indicators The pulse processor PCB presents a number of adjustments (gain, coarse and fine calibrate, fast discriminator, zero) and indicator lights (high dead time, pulse amplifier reset) that are acceSSible on the front panel of the PCB module or via the system/PHA status screen (count rate range). These controls find use in the various adjustment and test procedures described elsewhere in this manual. GAIN This is a switch which acts as the coarse gain selector of the amplifier section. As the 1,2,4 labels indicate, the gain change between positions is a factor of two and the total range is four. The appropriate setting of this switch depends on the X-ray energy of interest and the gain of the detector preamplifier. COARSE and FINE CAL/BRATION These are multi turn pots which allow continuous adjustment (hence, exact calibration) of the spectrum with the analyzer's energy scale. The "coarse calibrate" pot varies the gain over a 2.4:1 range which provides an overlap in amplification ranges when the GAIN control is switched. The "fine calibratc" pot varies the gain about 10%. It provides a fine adjustment to facilitate exact energy calibration. Specrrace 5000 Technical Manual 4-9 AMP HIGH LEVEL DISC 022 017 X1 o TP4 TP3 Theory of Operation COARSE FINE TP2 600n$ DELAY TP6 r- ___.J 800 os Figure 4.5 Pulse processor PCB FAST DISC ZERO The function of the fast discriminator is This is a pot which provides a means of to detect both the occurrence and the adjusting the output voltage which time of occurrence of an X-ray signal. corresponds to zero energy. This information is used to start the PA RESET processing of each signal and to detect pulse pile-up. This is a light which flashes each time the detector's pulsed optical preamplifier The FAST DlSC pot varies the threshold resets. The rate of flashing is level of the fast discriminator circuit. proportional to the number of X-rays The threshold is set just above noise level detected per second and thus gives an during initial calibration and rarely indication that the detector is operating. needs to be adjusted. Spectrace 5000 Technical Manual Theory of Operation 4-10 HIGH DT This is an indicator light which is lit up when the input count rate exceeds the value which produces the maximum data output rate at the currently selected count ratc range. It is a visual indicator to the user that the input count rate should be reduced or a higher count rate range selected. TP'\L _ BG-U--------TP3 TP4 -- -TP5 -----r-TPS-----Figure 4.6 Pulse processor test points Fast discriminator A dual channel fast discriminator (U4) develops fast timing pulses from the input signal. These pulses initiate signal processing in the time-variant filter and provide timing information for the pulse rejection logic. The fast discriminator output is available on the module's panel. The dual fast discriminator consists of a variable gain amplifier with two delay line shaped outputs. One is 200 osee wide and the other is 800 osee wide. Each output signal goes to a voltage comparator (US, U8) which produces an output pulse when its input signal is above a threshold voltage. The 200 osee signal channel produces the FFD signal and has very short pulses. so pile-up is not a problem. However, the noise in this channel limits the useful energy threshold to about 2 keY. The 800 nsec channel generates the SO signal and has less noise. so its threshold is below I keY. The signals from both channels are combined in such a manner that only one output signal. FD, occurs for each X-ray exceeding the threshold of either channel. These output pulses are all approximately 200 nsec wide. The advantage of this technique is that it produces a low energy threshold and a short pulse pair resolution. TimIng section The timing function controls the time variant filter and baseline stabilizer, as shown in Figure 4.7. Spectrace 5000 Technical Manual 4-11 Theory of Operation ..QJL I I I I I I I I I I I I I I I I I I I I I 'B I'2\us us 2T 3 45678 9 10 11 12 13 14151617 18192021 22T IU27 pin 11 RE-.... I L PE_ n L --.J AMP BUSY (U20 pin 4) ABY L ----c.......J BG IU2B pin 2; 0 Q7 OFF) ---, INTSW 10 = Q22 OFF)

BLRflNT U25 pin 3) o 0160FF I U40 pin 8

---.JRESET GATE I.. 1 = 08 ON -JU30 pin 5 L LGS U RINTEGRATE I ----I-o =,"8=1,8 us SYNC SAMPLE = 1/2 I LOW 1=38.4 us MED 1=19.2 us HIGH 1=9.6 us Figure 4.7 Pulse processor timing; count rate"" high Pulse rejection The pulse rejection circuit blocks If the overlap of the two pulses occurs on distorted signal pulses from the the tail of the first, only the second pulse amplifier. These pulses can occur when is rejected. the amplifier is recovering from a reset of the pulsed-optical preamplifier; they If the overlap occurs before the peak of also occur when pulses overlap in the the first pulse, both pulses are rejected. main signal channel of the amplifier: Spectrace 5000 Technical Manual 4-12 TheQry of Operation The time relationship of the signal pulses is derived from the output of the dual fast discriminator. Count rate ranee The count ratc range is a parameter selected in the system/PHA status menu. It controls the processing time for an input pulse, and therefore allows the user to optimize the energy resolution and data collection rate for the particular application. The LOW setting provides the longest filtering time which results in the best energy resolution of the spectrum peaks (measured as FWHM, full width at half max). However, the data output rate is limited by the long processing time of each signal. The MED and HIGH settings progressively reduce the processing time and thus increase the data output rate -- at the cost of degrading the resolution. For continuous X ~ r a y input, the maximum data output rate is 10k counts on the LOW setting, 20k on MED and 40k on HIGH. Linear signal Dath The input to the pulse processor from the preamplifier is a series of Dositivegoing steps whose amplitude corresponds to approximately I mV/keV. The pulse processor must transform this signal into an analog signal suitable for conversion by the ADC. U I provides a gain of ~ 4 . It feeds a 600 nsec delay line U2. The output at U2 connects to U6. U6 provides a gain of approximately -2. U6 drives a low pass filter whose time constant is changed by the LOW, MEDIUM, or HIGH count rate selected by the ADC micro PCB. The output of the low pass filter connects to UIQ which drives the baseline restoring circuitry which includes Q16. This is followed by gain buffer VII with a gain of +5. VII drives the gain selection switch and amplifier U12. The other input at UI2 is from U14. U14 combines a correction signal (Z-COR) from the ADC micro PCB and a reference level (ZERO) to produce a baseline stabilization signal. Q17. Q18, and UI3 form the integrator gate circuitry. The integrator, U16, provides the output signal (AMP) to the ADC located on the ADC micro PCB. The L. M, H control selects different integration components on U16. Spcctrace 5000 Technical Manual 4-13 Theory of Operation ADC MICRO rCB Onnlew Figure 4.8 is a general block diagram of this board. The full circuit is shown in schematic no. 5919-0188. The processor is an 80186 with 2Kxl6 bits of ROM and 16Kxl6 bits of dynamic RAM The ADC is a 100 MHz Wilkinson type, which digitizes the analog outputs from the pulse processor PCB. The resulting data are stored in the RAM Other RAM, 4Kx8 bits, is used to generate X-ray mapping pulses. One of the functions of the 80186 is to monitor and correct baseline drift in the pulse processor. The 80186 instructs the pulse processor to sample its baseline periodically. The resulting ADC conversions cause a DMA operation into channell of the 80186 (normal data conversions use DMA channel 0). The 80186 can then monitor the resulting values and control a 12-bit DAC which prov ides zero correction. The separation of valid data events and baseline sample events allows the 80186 to determine the dead time. APe innuts The analog input circuits of the AOC are diagrammed in Figure 4.9. The output from the pulse processor PCB is the AMP signal. This 0-4 volt signal is the input of voltage follower U73; the output connects to the pulse stretcher. The ILG signal from the pulse processor PCB is used to generate a peak detect (PO) signal at U93 pin 13. On the trailing edge of PO, pulse stretcher busy flip-flop U92 is set. Signals PSB and IPSB are used to trigger logic circuits which effect a conversion. Pulse stretcher Amplifier U74 and transistor Q3 form the pulse stretcher for the ADC. The amplifier is unity gain voltage follower, modified to perform pulse stretching. The incoming positive pulse is applied to U74 pin 9. The amplifier loop is closed by means of a diode from the collector of Q3 to the inverting input of the amplifier at U74 pin 3. The stretcher capacitors are also connected at pin 3 through a small resistor. As the input signal goes positive, the diode conducts and pin 3 follows the input up to peak amplitude. As the signal passes through peak amplitude, pin 3 remains at peak voltage due to the stretcher capacitors. At this time the loop opens because of the polarity reversal at the diode which normally closes the loop. The collector of Q3 swings negative with respect to ground. Spectrace 5000 Technical Manual 4-14 FD INP FROM PULSE AMP FROM PULSE UT 16-BIT SCALERPROCESSOR 100 MHz D D O ~ > -0015ADC H:fPROCESSOR [)JI GAIN DAC LATCH ALE >If / MO- 1 16Kx16BIT DYNAMIC R ~ M , MAOMAl ~ T MULTIPLEXER , TRISTATE LATCH 4K x 8 BIT RAM BUS TRANSCEIVER I DO~ D15 I MHz~ 80186 PROCESSOR Figure 4.8 ADC micro PCB Theory of Operation ZCOR""- TO /PULSE PROCESSOR ZERO DAC REFRESH FA1FA12 TO DATA MEMOR Y 0000015 TO DATA MEMOR Y Spectrace 5000 Technical Manual Theory of Ooeration 4-15 VOLTAGE FOLLOWER RESET B AOC BUSY FLIP-FLOP U96 PULSE STRETCHER LINEAR GATE 02 AMP __._-l PULSE STRETCHER BUSY PO FLIp FLOP U92 ZL B U94 C[j5 L G - - . _ ~ STRETCHER CAPACITOR (2000 pfj I RFF CLAMP 01 CLAMP 07 CURRENT SWITCH 05.06.04 ZERO LEVEL BIAS COMPARATOR ZL '------< CSC CURRENT SOURCE U79 Figure 4.9 Rundown cutrent After PSB goes positive, a constant current is applied to the stretcher capacitors C97. C98 to generate a linear discharge. The magnitude of this rundown current is determined by U79, a DAC08. The amount of current is also controlled by DAC un and pot FS. Rundown begins when CSC goes to the I (one) state. This turns transistor 4 off, and, in turn, pinches off FET 5. Because transistor 5 is no longer sinking the output from the current source U79. the voltage swings negative until FET 6 turns on. ADC input circuits The linear rundown current remains switched on until the address (as converted) is stored. CSC goes to the I state after the PSB flip-flop is set. CSC returns to the 0 (zero) state when the ADC is reset. Spectrace 5000 Technical Manual 4-16 Theory of Operation 100 MHz oscillator In the 100 MHz oscillator, transistor 12 is the active device. The crystal connects to the base of the transistor and the 1k resistor at the base keeps the transistor biased in the linear region. The 100 MHz crystal is a fifth overtone type; the oscillation at the proper overtone is determined by the resonant circuit at the collector. The oscillator's output is AC coupled into one input of a two-input EeL NOR gate UIOO. The DC bias at this input is determined by another gate in UIOO having its output connected back to its inputs. This causes its outputs to set at about 3.8 volts or approximately the middle of its output swing. The remaining gates in UIOO buffer and gate the 100 MHz to the scaler. Address scaler The first two stages of the address scaler are 10131 ECL series and the remainder are low-power Schottky TTL. The address scaler is 12 bits in length plus a 13th bit which is described later. U99 is an ECL type 10131 for 100 MHz scaling. U98 and transistors 8-11 translate the ECL levels to TTL levels for readout and/or further scaling in the eleven following TTL scaler stages. The address scaler is composed of two flip-flops described above, followed by II flip-flops the 7400LS TTL family. Note that the output of the third address scaler, the first scaler, the first Q output in U86, connects as carry to two flipflops. One flip-flop of the two is address scaler stage A3. The other f l i p ~ f l o p U91 is the current source control (CSC) flipflop. This flip-flop is set when the carry from pin 5 of the third stage switches positive. Con"erslon timing Figure 4.10 shows the timing of the major signals in the data conversion sequence. The incoming AMP signal goes to the unity gain voltage follower. The output of the voltage follower connects the pulse stretcher circuitry through the linear gate Q2. When /LG from the pulse processor goes negative, the linear gate Q2 is turned off, and the signal is connected to the stretcher capacitors. After /LG returns positive, a SO nsec peak detect pulse (PO) is generated at U93 pin 13. This signal triggers the PSB flip-flop, setting it to the one state. /PSB sets the AOC busy flip-flop and forces B positive. B is differentiated at C147, and the resultant pulse sets the clock synchronizing flip-flop U I 01. The output of this flip-flop switches low, and the clock is now connected to the input of the first address stage and it begins to scale. Four pulses later, A2 switches positive and sets the esc flipflop. esc turns on the rundown current. Since the address scaler started with a negative count of 96, after 96 clock pulses the address stages are all in the I state. One clock pulse later, the address scaler is in channel O. This offset serves two purposes. First, the turn-on of the rundown current is synchronized to the clock by scaling 4 address-advance pulses before setting the esc flip-flop. For good channel profile, it is essential that the start of rundown current be well synchronized to the clock. The second function of the offset is to provide the ADC with settling time. At PD time, several circuits are triggered and several logic transitions occur. The 0.96 usee period before reaching address zero allows settling time. Spectrace 5000 Technical Manual 4-17 Theory of Operation INPUT /1L- _ STRETCHER P.:::S.:::B --..JFSET BY PO t-RESET BY ZERO LEVEL B FSETBY PSB OUTPUT OF FIRST STAGE OF AAAAAAAA AA ADDRESS SCALER/yVVVVVVVYIL- _ CSC-='F4TH--J ADDRESS ADVANCE I.N..:.G=- P_U_L_SE_I _-lii1f-_-r'----H ING 0 STORE I It 1 _ PCS5R Figure 4.10 ADC timing diagram The conversion process continues until Store. DMA the voltage at the stretcher capacitors reaches the zero level bias. With the At this time an address has been small propagation delay from the zero generated. Whether the conversion was level threshold, ZL returns to a logic 0 caused by a baseline sample command, or and resets the PSB flip-flop. The by a valid pulse processor event, was transition of PSB to zero starts the determined at LG time. If the pulse scaling of clock pulses into the clock processor output is the result of a synchronizing flip-flop. The output of baseline sample command, BS at U89 pin the flip-flop switches high in 2 is positive when /LG goes negative, and synchronization to the clock and gates V89 pin 5 reflects this condition. off the clock to the address scaler. Spectrace 5000 Technical Manual 4-18 Theory of Operation The STORE signal at V89 pin 9. therefore. generates either a DMA channel 0 or channel 1 command, depending on the condition of V89 pin 5. Normal ADC conversions use DMA channel O. while baseline sample conversions use DMA channell. In both cases, the presented address is used as the value of the source pointer PCSS-R. Reset circuit When the 80186 processor starts the DMA transfer {channel 0 or I}. jPCS5-R goes negative and the ADC value is enabled onto the DDO-DD I S lines. jPCSS-R also clears the store flip-flop. When jPCSS-R returns positive, U90 pin 8 goes positive and generates the 300nsec RESET pulse. This pulse resets the ADC busy flip-flop U96 which, in turn. resets the esc flipflop U9I. ZERO and GAIN DACs The ZERO and GAIN DACs are used to digitally control the amplifier gain and zero (baseline) offset. The latches US6, US7 and J2-bit DAC U77 can produce a oto -7 volt signal at U78 pin 6. This output controls DAC U79, which determines the rundown current at the stretcher capacitors. Latches US4, U55 and 12-bit DAC U7S generate ZCOR. This signal is fed to the pulse processor PCB and has an approximate range of 0 to ~ 7 volts. If zero drift is detected by the 80186 processor, this DAC compensates for the drift. Fast discriminator scaler When the pulse processor PCB detects an event, an FD pulse is generated. A scaler (U65, U5J, U53) is used to count these events and determine the amount of dead time. /FDLD transfers the total count from the scaler into the latches U50 and U52. The latches can be read by the 80186 by /PCS2-R. Dynamic RAM The 80186 has 16K x 16 bits of dynamic RAM associated with it (U32-U35). This RAM is accessed by lower memory chip select /RAM at U9 pin 33. Figure 4.11 shows RAM cycle timing. When normal access to this memory is required. /GRAM at U49 pin 6 goes negative. /CLK at U37 pin 3 forces SRDY-I low at U23 pin J2. This causes a wait state to be inserted in the memory cycle timing. /INREQ also goes negative, which forces U62 pin 12 positive. When CLK goes positive, QA goes positive. At this time, address lines AAI-AA8 are selected at U30 and U31 as the RAS (row) address MAO-MA7. When QA goes positive. /RAS is generated at U61 pin 8. At the trailing edge of CLK. SEL at U63 pin 8 goes positive. This forces AA9AA14 to be selected at U30-U31. When /QB goes negative at the next CLK time, the column address is latched at CAS time. Refresh timing is generated by timer 0 of the 80186. This timer is set up with a period of approximately IS usec. Therefore, U63 pin 5 goes positive and genera tes a RFSH every 15 usee. The address where the refresh cycle is run is determined by scaler U47. Us value is enabled onto the MAO-MA7 lines through U46. Specuace 5000 Technical Manual Theory of Operation 419 T4 ---I--T1 --1 I 1....-.../ 00/ \\\ \\ \\ \\ \\ Figure 4.11 Dynamic RAM timing Communications bus The ADC micro PCB communicates with the computer through registers and ports located on the data memory board. The ADC micro PCB also reads and writes the data memory through this communication bus physically located on the edge of the PC board. U19, U21, U22, and U38 generate signals (lRQB, /BSY, etc.) used to gain access to the communication bus. U14 and UI5 determine the type action the data memory PCB takes; U 16, U 17 are the data line transceivers. Two interrupts are also used in the communication process. /IPHA1 is used during the download process while /IPHA2 is used during normal communication of instructions, values, etc. These interrupts are controlled by bit 3 of 772660 and are generated on the data memory PCB. Spectrace 5000 Technical Manual 4-20 Theory of Operatjon Processor The 16-bit 80186 microprocessor is described fully in the OEM literature. The following table of pes (peripheral chip selects) is presented as an aid to understanding the ADC micro PCB. PCS Address Name or Function PCSO PCSI-O PCSI-I PCSI-2 PCSI-3 PCS2 PCS4-0 PCS4-1 PCS4-2 pcss PCS6 8000 8080 8082 8084 8086 8100 8200 8202 8204 8280 8300 ADC Status Register bits value/meaning 0,1 External outputs /GI, /G2 2,3 Pulse processor count rate control 4 ..0 Transition kill LN alarm 5 ... 1 map out enable 6 = I ADC enable 7 -0 clear fast discriminator scaler after read (PCS2) 8 -I high voltage ON 9 -1 high dead time in pulse processor 10 -0 low LN level I I -1 sample baseline 12-14 Read external inputs 15 Preamp reset indication GAIN DAC (Write Only) ZERO DAC (Write Only) Mapping RAM input code (write only) Bit 0=1 generates pulse out (write only) Fast discriminator scaler (read only) LSI/micro communication port Data memory latch (upper 8 bits) Write only ~ LSI can read at 772660 bits 8-14 Read only ~ source of DMA-O and DMA-I operations Mapping address Spectrace 5000 Technical Manual Theorv of Operation 4-2 I DAIA MEMORY PCB The data memory PCB is shown in schematic no. 5919-0181. It provides memory for storing the spectra that are being collected. And it provides the communication path between the computer and the system unit. This board occupies one expansion slot in the computer. Memory The data memory is organized as 4K by 24 bits (three bytes). Both the ADC and the computer can access this memory. The ADC accesses it 16 bits at a time, reading or writing to the two least significant bytes. In the computer the contents of this data memory are mapped into its RAM space as a 16Kx8 block. Starting at the beginning of this block, the first three bytes of RAM correspond to the first 24-bit data memory word. The fourth byte does not exist and reading it returns zeros. This pattern is repeated for the entire block of RAM The computer accesses the RAM one byte at a time. Since both the ADC and the computer can access the data memory, a bus arbitration circuit is used to prevent them from accessing it at the same time. When the ADC accesses the data memory, it generates a memory request, and then waits until it receives a grant from the arbitration circuit. When the computer accesses the data memory, the I/O CHANNEL READY line goes low, causing wait states to be generated, until the arbitration circuit sets it high again. Whichever has access to the memory will continue to have access to the memory until completion of the read or write cycle. When both the ADC and the computer try to access the memory within one clock cycle, the ADC is granted access first. When the ADC reads or writes the two least significant bytes of the data memory, the most significant byte is latched into a register or written into the memory from the same register. This register is located in the ADC I/O space. When the computer reads the least significant byte of the data memory, the two most significant bytes are latched into a pair of registers. These two registers are read when the computer reads the next two memory locations. When the computer writes the least significant byte of the data memory, the two most significant bytes are written into memory from two different registers. These two registers are written to when the computer writes to the next two memory locations. Communication The ADC and the computer communicate with each other through registers located in their I/O spaces. The ADC uses interrupts for handshaking; the computer employs polling. Whenever the computer sends a command to the ADC, it writes two bytes, which represent the command, into a pair of registers. This generates an interrupt to the ADC that tells it the computer has a command for it. The interrupt is cleared when the ADC reads the two bytes. The computer will write into the registers only after it has determined that the interrupt has been cleared. Whenever the ADC sends data to the computer in response to a command, it writes two bytes into another pair of registers. This sets a bit in a register the computer uses for polling. When the computer sees that this bit is set, it reads the information sent to it. This action clears the bit that was set. The ADC also sends status information to the computer. This is a byte written to its own register and sets its own polling bit. Spectrace 5000 Technical Manual 4-22 TheQry of Operation CHAMBER CONTROLLER PCB The chamber controller PCB is shown in schematic no. Figure 4.12 is a simplified diagram of this board. Overview The chamber controller PCB is based on an 8031 microcontroller. Communication with the computer is by means of a 4wire RS-232 interface using RxD. TxD. DTR and DSR. The program memory is stored in a 4K x 8 EPROM. An 8282 octal latch is used to separate the address for the EPROM. Two 82555 and a 74LS139 are used to increase the number of I/O lines on the board. Auto-reset In order to ensure that the microcontroller will recover from a random software error, an automatic reset circuit is used. Should a software error cause the auto reset circuit to be serviced too often or not often enough, the auto-reset circuit generates a reset (RST) to the microcontroller. The circuit senses the voltage on a capacitor C8 being charged to +5V. Either one of two comparators will generate RST if the voltage on C8 is too high or too low. A third comparator sends AZRO to the microcontroller to indicate that the reset circuit requires service. Service consists of AZRI being sent to the reset circuit, which discharges capacitor C8. Initialization When the chamber controller PCB is initialized, the filter wheel and the sample tray are rotated until they are in the home position. Vacuum sense and control The status of the vacuum is determined using a thermocouple vacuum sensor mounted in the chamber. One of the wires is heated with an AC current, resulting in a DC voltage between the two wires. As the vacuum increases. there is less air to conduct the heat from the wire. And as the temperature of the wire increases. so does the voltage between the wires. The AC current is supplied to the vacuum sensor by transformer Tl. Ul4 (a 555) generates a square wave for Q23, which drives Tl. Voltage regulator Ul3 is used to adjust the voltage supplied to TI, which regulates the AC current to the vacuum sensor. This is how the vacuum circuit is calibrated. The op-amp UJO amplifies the signal from the vacuum sensor by lOa, filters it. and sends VACOK to the microcontroller when the signal reaches the level set by R84. Stepper motor conCro! The chamber controller PCB can control three stepping motors. One motor is used to turn the filter wheel. and another to turn the sample tray. The third motor. the V-axis motor, can be used with the sample tray motor to drive an X-Y sample table. Each one shorts a line (SIN, YIN) to ground when it is plugged in. This informs the microcontroller of its existence. The circuit used to drive each motor is identical. The motor windings are driven by MOSFET transistors. The inverters serve to buffer the signals from the 8255. The two NAND gates ensure that the motor is driven only in excitation mode. Spec trace 5000 Technical Manual 4-23 Theory of Ooeration AUTO RESET RS232 ATMOSPHERE CONTROL HIGH VOLTAGE CONTROL ABA12 AOA7LATCH ~ XRAYS ON DOD7 DOD7 CS DOD1 MUX INTERLOCK CONTROL STR WRI DATA CONFIRM BIAS DETOK SUPPLY FRONT PCB PANEL S-IN MOTORS F-IN FILTER FILTER WHEEL PRESENT 0104 MOTOR DRIVE Y-HOME S-HOME F-HOME SAMPLE SAMPLE TRAY 0104 MOTOR DRIVE VAC OK Y AXES Y-AXES SENSE 01-04 MOTOR DRIVE Figure 4.12 Chamber controller PCB RST B031 AZRO AZR1 ENABLE DO TxD D7 DSR DTR RxD AO,A1 8255 Y-IN (2 ea.) HOME SENSE VACUUM 4K EPROM Spectrace 5000 Technical Manual 4-24 Theory of Operation Home condition A phototransistor and an LED are used to tell the microcontroller the position of each motor. The home position is indicated when a tab interrupts the beam between the LED and the phototransistor. In each case a comparator buffers the signal from the phototransislor (HOME SAMPLE, HOME FILTER, HOME Y) for the microcontroller. High voltage control The chamber controller PCB controls the X-ray power supply controller PCB via a 3-wire serial interface. The three control lines are DATA. WRI, and STR. The data is send over the DATA line, most significant bit (MSB) first. The MSB selects either the voltage or the current control DACs. The other seven bits set the value of the selected CAe. The STR signal indicates a new bit. The WRI signal writes the value into the DAC. Sample spinner The sample spinner is an AC synchronous hysteresis motor that is turned on and off by a solid state relay. This relay is located on a separate PC board (59110010). On the chamber controller PCB, a signal from U6 (SAMPLE SPINNER) is buffered by U22 and Q4, and controls the relay. Interlocks Safety features The safety features implemented by the interlock circuit provide fail-safe protection against X-rays being turned on. In particular, the interlocks provide the following features: All interlocks must be closed for X-rays to turn on. If any of the interlocks is opened, the Xrays are turned off immediately. The X-RAYS ON warning light must be on for X-rays to turn on. If the interlock circuit is broken, X-rays do not turn on again until the interlocks are closed and the analysis sequence is re-initiated by the operator. The current that powers the X-ray high voltage power supply flows through the interlock circuit. Thus, if the circuit is broken at anyone of the interlocks, there is no power to the X-ray tube. The circuit is designed so that failure of any of the electrical components can only cause the Xrays to turn off, not to turn on. Double, redundant interlocks are provided on the sample chamber lid latch. No Xrays can escape into the operator work area with the lid closed. The interlock switches open and turn off the X-rays if the lid latch fails or is defeated and the lid is opened. Spectrace 5000 Technical Manual 4-25 Theory of OpeoHiQn XRAY POWER SUPPLY CONTROLLER PCB from microprocessor on chamber control pcb OPTICAL" ISOLATOR 12 LV-----' ..LIGHT ON (COMMAND) CURRENT 1--,.--------,--CONTROL to x-ray power supply l.-L===t= = -- ---- --.. to warning lamp module from interlocks VOLTAGE CONTROL to x-ray power supply confirm to microprocessor on chamber control pcb - Ito x-ray power supply,----+----' LIGHT ON from warning (CONFIRM) lamp module Figure 4.13 Interlock logic on the chamber controller PCB Command/confirm logic See Figure 4.13. When the computer requests the X-rays to be on, and when all interlocks are closed, +12V is supplied to the XRAYS ON warning light module. This is the LIGHT ON command. When the warning light turns on. a phototransistor generates the LIGHT ON CONFIRM signal. This signal closes a relay and supplies the