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Magnetic core and semiconductor
switch characterisation for an
Inductive Adder kicker generator
D. Woog
M.J. Barnes, J. Holma, T. Kramer
131/05/2017David Woog - FCC Week 2017, Berlin
• FCC-hh injection
• Inductive Adder concept
• Magnetic core characterisation
• Semiconductor switch characterisation
• Preliminary prototype design
• Milestones and next steps
Content
31/05/2017David Woog - FCC Week 2017, Berlin2
LHC
SPSFCC
Septum magnetsKicker magnets
FCC-hh injection system
Circulating bunch trains
Injected bunch train
Kicker (pulse)
generators
• Injection from high energy booster
(HEB) into FCC
• Injected bunch train needs to be
deflected onto the circular orbit
• Circulating bunches must not be kicked
• Pulsed magnetic field in kicker magnet
requires high power pulse generator
31/05/2017David Woog - FCC Week 2017, Berlin3
• Different high energy booster (HEB) options for FCC are in discussion, based on:
• SPS (0.45 TeV, 1.3 TeV)
• LHC (1.6 TeV, 3.3 TeV, 6.5 TeV)
• FCC (3.3 TeV, 6.5 TeV)
• In every case a reliable and fast injection kicker system is needed
• Baseline HEB is LHC at 3.3 TeVParameter Unit Value
Kinetic Energy [TeV] 3.30
Angle [mrad] 0.18
Pulse flat top length [µs] 2.00
Flat top tolerance [%] ±0.50
Field rise time [µs] 0.425
Voltage [kV] 15.70
Current [kA] 2.50
System impedance [Ω] 6.25
FCC-hh injection
Parameters for FCC-hh injection
31/05/2017David Woog - FCC Week 2017, Berlin4
FCC injection – generator options
• New pulse generator design is needed
• Thyratrons must be avoided as switch
• Semiconductor (SC) switches are a promising alternative
• Two main pulse generator designs based on SC-switches
under consideration:
Inductive Adder (IA)
Solid state Marx generator
Required field rise time: 0.425 µs
→ 0.350 µs of kicker magnet fill time
→ 0.075 µs remain for pulse current rise time
For machine protection reasons high reliability of the kicker system is
necessary!!
→ Thyratron pre-firing problems are unacceptable for FCC
High voltage thyratron
see Poster on Tuesday
by A. Chmielinska «Solid-State
Marx generator for use in the
injection kickers of the FCC»
~340m
m
31/05/2017David Woog - FCC Week 2017, Berlin5
• Stack of 1:1 transformers
• Secondary windings are connected in series
• Parallel branches of primary windings define max. output current
• Parameters such as insulation properties, parasitic inductances, etc. define system impedance
Inductive Adder concept
Schematic drawing of an IA [4]
𝐴c 𝐼sec
Stalk (secondary)
magnetic core𝐼prim
primary windinginsulation
parallel branches
PCB
31/05/2017David Woog - FCC Week 2017, Berlin6
Main components of the IA:
• Magnetic core (following slides)
• Semiconductor switches (following slides)
Pro Con
Based on semiconductor switches
• Ability to turn on and off current
• Hence eliminate PFN/PFL
Output transformer necessary
Modular design High energy storage in capacitors
All electronics ground referenced
Reduced maintenance
Larger dynamic range
Modulation of output pulse possible [5]
Simple replacement of components
Easy to adapt to different applications
Inductive Adder conceptAdvantages and disadvantages of the IA compared to traditional pulse generators (PFN, PFL)
• Pulse capacitor (tested and selected)
• Insulation material (selected)
• High voltage diodes
31/05/2017David Woog - FCC Week 2017, Berlin7
𝐴c =𝑡pulse ∙ 𝑉layer ∙ 𝛼m
∆𝐵c ∙ ηFe
• Important key component of the IA
• Dimensions and material characteristics are
important
• Saturation of core must be avoided
Large core cross sectional area 𝐴c needed
𝐿m𝑅c 𝑉out
Equivalent circuit of the core:
Pulse parameters 𝑡pulse, 𝑉layer
Magnetic flux density swing ∆𝐵c
Core fill factor ηFe
Security margin 𝛼m
Parameters of interest:
• Equivalent loss resistance (𝑅c)• Magnetizing inductance (𝐿m)
• B-H curve
• Frequency behaviour
• Biasing current (𝐼bias)
Magnetic core
31/05/2017David Woog - FCC Week 2017, Berlin8
Measured B-H cures of different core types
Nanocrystalline tape wound
core with 30 cm ruler
31/05/2017David Woog - FCC Week 2017, Berlin9
Thank you to Silvia Aguilera, Michal Krupa and Patrick Odier from CERN BE-BI group for
assistance with measuring the B-H curves.
Measurements on sample cores
Equivalent circuit of test setup:
Test setup for sample cores, based on the prototype for
CLIC DR IA :
• A MOSFET is discharging a capacitor over the primary
winding of the core
• The primary current is measured with a current sensor
• The output voltage is measured on the secondary
winding without load
• On another test setup the B-H curves were measured
Current sensor
Pulse capacitor
MOSFET
Core housing
(primary winding)
𝐿m𝑅c 𝑉out𝐶c𝑆
A
31/05/2017David Woog - FCC Week 2017, Berlin10
𝐼0
𝑅c =𝑉c𝐼0
𝐿m = 𝑉c ∙∆𝑡pulse
∆𝐼m
𝑡pulse = 4.2us
Pulse characterisation of cores
∆𝐼m
Core 1 2 3 4 5 6 7 8
𝑅c in Ω 55 50 65 75 150 160 230 200
𝐿𝐦 in µH 282 367 191 160 56 42 30 30.6
B-H shape square square square square linear linear linear linear
𝑉c = 350 V
31/05/2017David Woog - FCC Week 2017, Berlin11
Results of core measurements
Core 1 2 3 4 5 6 7 8 9 10
𝑅c in Ω 55 50 65 75 150 160 230 200 70 70
𝐿𝐦 in µH 282 367 191 160 56 42 30 30.6 28.8 28.8
B-H shape square square square square linear linear linear linear linear linear
∆𝑩𝐬𝐚𝐭 in T 2.4 2.4 2.4 2.4 2.4 2.4 2.1 2.1 2.0 2.0
𝑰𝐛𝐢𝐚𝐬 in A 1 1 1 1 15 15 5 5 20 20
Cores 1-4 have been chosen as they best suit the requirements:
• Highest inductance of all sample cores
• Biggest ∆𝐵sat• Low biasing current required
High inductance and ∆𝑩𝐬𝐚𝐭 improve the IA design. The higher
losses can be accepted.
31/05/2017David Woog - FCC Week 2017, Berlin12
Semiconductor (SC) switches to replace
Thyratrons:
SiC MOSFETs seem promising
Advantages compared to Si components
• Fast switching times
• Lower values of 𝑹𝐨𝐧(< 0.05 Ω)• Up to 1700 V available
• Wide bandgap technology is a ‘rather’ new
• Devices are still in development
• Nevertheless there are already suitable devices
available
• Capability of devices has to be measured
(𝑡r,0.5−99.5, 𝐼D,pulse(2.5μs,1kV))
• Radiation hardness of SiC devices is of interest
SiC devices 1 2 3 4
𝑉DS 1200 V 1200 V 1700 V 1200 V
𝑡r,10−90 32 ns 9 ns 20 ns 44 ns
𝑡f,10−90 28 ns 22 ns 18 ns 28 ns
𝐼D,25°C 90 A 80 A 72 A 95 A
𝐼D,pulse 250 A 190 A 160 A 237 A
𝑅on 25 mΩ 40 mΩ 45 mΩ 22 mΩ
Considerations on Semiconductor Switches
Examples for SiC MOSFETs available on the market:
• High 𝑉DS is required to reduce
number of layers
• High 𝐼D,pulse is required to reduce
number of branches
• High 𝑅on causes increased voltage
drop
• Fast rise time is required
31/05/2017David Woog - FCC Week 2017, Berlin13
The capability of different sample devices has been tested
• High current capabilities for ~2.5 µs pulse at 1 kV
• Fast current rise times at high voltage from 0.5 to 99.5 %
The switching behaviour of the devices is strongly dependend upon the gate driver circuit
Device 1 2 3
𝑡r,0.5−99.5 64 ns 100 ns 76 ns
𝐼pulse,2.5μs >200 A >200 A >200 A
Semiconductor switches characterisation
• Test results seem promising
• PSpice simulations with measured values show a sufficiently fast rise time
• Further measurements are ongoing
• Radiation hardness is of interest – tests have not been successful yet
• Any experience welcome!
31/05/2017David Woog - FCC Week 2017, Berlin14
Parameter Unit Value
Nr. of constant voltage layers - 21
Nr. of modulation layers - 2
Nr. of branches per layer - 24
Characteristic impedance Ω 6.25
Voltage per layer V 960
Current per branch A 105
Total height mm ~1200
Output voltage kV 15.62
Output current kA 2.5
Based on the component characterisation a prototype IA has been
designed:
• 21 constant voltage layers
• 2 special (modulation) layers for ripple and droop compensation
• 24 parallel branches per layer
Preliminary prototype IA design
31/05/2017David Woog - FCC Week 2017, Berlin15
• Production of hardware components (designed)• Core housing
• Stalk
• End caps
• Development of final PCB (design ongoing)• Gate driver circuit
• MOSFET switch
• HV diode
• Obtain outstanding parts and start prototype assembling
Milestones and next steps
20192018201720162015
• Optimisation
• Final prototype (21+2 layers)
• Final measurements
• Contribution to FCC CDR
• Basic design steps
• Definition of component
requirements
• Component selection
• Characterisation of
components
• Start of hardware design
• Hardware design
• First prototype (~5 layers)
• Measurements
Next steps:
31/05/2017David Woog - FCC Week 2017, Berlin16
Thank you
for your attention!References:
[1] L.S. Stoel et al., “High Energy Booster Options for a Future Circular Collider at CERN”, proceedings,
IPAC’16, Busan, Korea (2016).
[2] D. Woog et al., «Design of an Inductive Adder for the FCC Injection Kicker Pulse Generator», to be
published in the IPAC’17 proceedings, Kopenhagen, Denmark (2017).
[3] M. J. Barnes et al., “Pulsed Power at CERN”, to be published in the EAPPC 2016 proceedings, Lisbon,
Portugal (2016).
[4] T. Kramer et al., “Considerations for the injection and extraction kicker systems of a 100 TeV centre of
mass FCC-hh collider”, IPAC’16, Busan, Korea (2016).
[5] J. Holma et al., “Measurements on prototype inductive adders with ultra-flat-top output pulses for CLIC
DR kickers”, proceedings, IPAC’14, Dresden, Germany (2014).
31/05/2017David Woog - FCC Week 2017, Berlin17
Backup
31/05/2017David Woog - FCC Week 2017, Berlin19
Function
generator
OscilloscopePower supply
Amplifier, incl. 1 Ω Shunt to measure 𝐼prim~ 𝐻
Test core
RC integrator
to measure
𝑈sec 𝑑𝑡 ~ 𝐵
Current
limiting
resistor
Other required parameters:
Core dimensions, weight, fill factor,
no of windings Thanks to S. Aguilera and M. Krupa
BH curve measurement test setup from BE-BI-PI
31/05/2017David Woog - FCC Week 2017, Berlin20
• Radiation hardness of power semiconductor devices is a real concern
• High energy hadrons (HEH, >20 MeV) can cause single event
burnouts (SEB) in power MOSFETs
• SEBs cause short circuits between drain and source
• The behaviour of Si semiconductors under radiation is known
• Little experiences with SiC semiconductors as a new device technology
• Radiation hardness tests in the CHARM facility at CERN have been
successfully made with Si MOSFETs, GTOs and IGBTs
• Using the existing test setup to test SiC MOSFETs was more difficult than
expected
• Reliable measurements were not possible with this setup until now
• Over current protection needs to be adapted to SiC specification
• Any existing experiences in this field are interesting
Radiation hardness tests on SiC MOSFETs
31/05/2017David Woog - FCC Week 2017, Berlin21