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Lecture 010 – Introduction (3/24/10) Page 010-1
CMOS Analog Circuit Design © P.E. Allen - 2010
LECTURE 010 - INTRODUCTION TO CMOS ANALOG CIRCUITDESIGN
LECTURE ORGANIZATIONOutline• Introduction• What is Analog Design?• Skillset for Analog IC Circuit Design• Trends in Analog IC Design• Notation, Terminology and Symbols• SummaryCMOS Analog Circuit Design, 2nd Edition ReferencePages 1-16
Lecture 010 – Introduction (3/24/10) Page 010-2
CMOS Analog Circuit Design © P.E. Allen - 2010
INTRODUCTIONCourse ObjectiveThis course teaches analog integrated circuit design using CMOS technology.
070209-01
VPB1
M4 M5
I6
VPB2
I4 I5
VDD
I7M6 M7
VNB2
M8 M9
M10 M11
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SPECIFICATIONS
Lecture 010 – Introduction (3/24/10) Page 010-3
CMOS Analog Circuit Design © P.E. Allen - 2010
Course Prerequisites• Basic understanding of electronics
- Active and passive components- Large and small signal models- Frequency response
• Circuit analysis techniques- Mesh and loop equations- Superposition, Thevenin and Norton’s equivalent circuits
• Integrated circuit technology- Basics process steps- PN junctions
Lecture 010 – Introduction (3/24/10) Page 010-4
CMOS Analog Circuit Design © P.E. Allen - 2010
Course Organization – Based on 2nd Ed. of CMOS Analog Circuit Design
070209-02
Chapter 9Switched Capaci-
tor Circuits
Chapter 6Simple CMOS &BiCMOS OTA's
Chapter 7High Performance
OTA's
Chapter 10D/A and A/D
Converters
Chapter 11AnalogSystems
Chapter 2CMOS/BiCMOS
Technology
Chapter 3CMOS/BiCMOS
Modeling
Chapter 4CMOS
Subcircuits
Chapter 5CMOS
Amplifiers
Systems
Complex
Circuits
Devices
Simple
Introduction
Chapter 8CMOS/BiCMOS
Comparators
Chapter 10D/A and A/D
Converters
Lecture 010 – Introduction (3/24/10) Page 010-5
CMOS Analog Circuit Design © P.E. Allen - 2010
References 1.) P.E. Allen and D.R. Holberg, CMOS Analog Circuit Design – 2nd Ed., Oxford
University Press, 2002. 2.) P.R. Gray, P.J. Hurst, S.H. Lewis and R.G. Meyer, Analysis and Design of Analog
Integrated Circuits – 4th Ed., John Wiley and Sons, Inc., 2001. 3.) B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, Inc., 2001. 4.) R.J. Baker, H.W. Li and D.E. Boyce, CMOS Circuit Design, Layout, and
Simulation, IEEE Press, 1998. 5.) D. Johns and K. Martin, Analog Integrated Circuit Design, John Wiley and Sons,
Inc., 1997. 6.) K.R. Laker and W.M.C. Sansen, Design of Analog Integrated Circuits and Systems,
McGraw-Hill, Inc., 1994. 7.) R.L. Geiger, P.E. Allen and N.R. Strader, VLSI Techniques for Analog and Digital
Circuits, McGraw-Hill, Inc., 1990. 8.) A. Hastings, The Art of Analog Layout – 2nd Ed., Prentice-Hall, Inc., 2005. 9.) J. Williams, Ed., Analog Circuit Design - Art, Science, and Personalities,
Butterworth-Heinemann, 1991.10.) R.A. Pease, Troubleshooting Analog Circuits, Butterworth-Heinemann, 1991.
Lecture 010 – Introduction (3/24/10) Page 010-6
CMOS Analog Circuit Design © P.E. Allen - 2010
Course PhilosophyThis course emphasizes understanding of analog integrated circuit design.Although simulators are very powerful, the designer must understand the circuit beforeusing the computer to simulate a circuit.
Lecture 010 – Introduction (3/24/10) Page 010-7
CMOS Analog Circuit Design © P.E. Allen - 2010
WHAT IS ANALOG DESIGN?Analysis versus synthesis (design)
ANALYSISSystem Properties DESIGN
System 1
Properties
System 2
System 3
System 4
031028-01
• Analysis: Given a system, find its properties. The solution is unique.• Design: Given a set of properties, find a system possessing them. The solution is rarely
unique.
Lecture 010 – Introduction (3/24/10) Page 010-8
CMOS Analog Circuit Design © P.E. Allen - 2010
The Analog IC Design Process
Conception of the idea
Definition of the design
Implementation
Simulation
Physical Verification
Parasitic Extraction
Fabrication
Testing and Verification
Product
Comparisonwith design
specifications
Comparisonwith design
specifications
Physical Definition
ElectricalDesign
PhysicalDesign
Fabrication
Testing andProduct
DevelopmentFig. 1.1-2
Lecture 010 – Introduction (3/24/10) Page 010-9
CMOS Analog Circuit Design © P.E. Allen - 2010
What is Electrical Design?Electrical design is the process of going from the specifications to a circuit solution. Theinputs and outputs of electrical design are:
-
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M1 M2
M3 M4
M5
M6
M7
vout
VDD
VSS
VBias
CL
+
-
CcAnalogIntegrated
Circuit Design
W/L ratios
Topology
DC Currents
��L
W
Circuit orsystems
specifications
Fig. 1.1-3
The electrical design requires active and passive device electrical models for- Creating the design- Verifying the design- Determining the robustness of the design
Lecture 010 – Introduction (3/24/10) Page 010-10
CMOS Analog Circuit Design © P.E. Allen - 2010
Steps in Electrical Design1.) Selection of a solution
- Examine previous designs- Select a solution that is simple
2.) Investigate the solution- Analyze the performance (without a computer)- Determine the strengths and weaknesses of the solution
3.) Modification of the solution- Use the key principles, concepts and techniques to implement- Evaluate the modifications through analysis (still no computers)
4.) Verification of the solution- Use a simulator with precise models and verify the
solution- Large disagreements with the hand analysis and
computer verification should be carefully examined.
0601216-02
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M5
M3M7
M8
M9M10
M11
M6
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VPB1
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M5
M3
M7
M8
M9
M10
M11
M6
V DD
V PB1
-A
-A-A
+ −v INM1 M2
V NB1
3.245 ?? ?
Lecture 010 – Introduction (3/24/10) Page 010-11
CMOS Analog Circuit Design © P.E. Allen - 2010
What is Physical Design?Physical design is the process of representing the electrical design in a layout consistingof many distinct geometrical rectangles at various levels. The layout is then used tocreate the actual, three-dimensional integrated circuit through a process calledfabrication.
n+ p+ Metal Poly p-well n-substrate
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CIRCUIT LAYOUT FABRICATION
Lecture 010 – Introduction (3/24/10) Page 010-12
CMOS Analog Circuit Design © P.E. Allen - 2010
What is the Layout Process?1.) The inputs are the W/L values and the schematic (generally from schematic entry
used for simulation).2.) A CAD tool is used to enter the various geometries. The designer must enter the
location, shape, and level of the particular geometry.3.) During the layout, the designer must obey a set of rules called design rules. These
rules are for the purpose of ensuring the robustness and reliability of the technology.4.) Once the layout is complete, then a process called layout versus schematic (LVS) is
applied to determine if the physical layout represents the electrical schematic.5.) The next step is now that the physical dimensions of the design are known, the
parasitics can be extracted. These parasitics primarily include:a.) Capacitance from a conductor to groundb.) Capacitance between conductorsc.) Bulk resistance
6.) The extracted parasitics are entered into the simulated database and the design is re-simulated to insure that the parasitics will not cause the design to fail.
Lecture 010 – Introduction (3/24/10) Page 010-13
CMOS Analog Circuit Design © P.E. Allen - 2010
Packaging†
Packaging of the integrated circuit is an important part of the physical design process.The function of packaging is:1.) Protect the integrated circuit2.) Power the integrated circuit3.) Cool the integrated circuit4.) Provide the electrical and mechanical connection between the integrated circuit and
the outside world.Packaging steps:
Dicingthe wafer
Attachment of the chip to a lead frame
Connectingthe chip to
a lead frame
Encapsulating the chip and lead
frame in a package031115-01
Other considerations of packaging:• Speed• Parasitics (capacitive and inductive)
† Rao Tummala, “Fundamentals of Microsystems Packaging,” McGraw-Hill, NY, 2001.
Lecture 010 – Introduction (3/24/10) Page 010-14
CMOS Analog Circuit Design © P.E. Allen - 2010
What is Test Design?Test design is the process of coordinating, planning and implementing the
measurement of the analog integrated circuit performance.
Objective: To compare the experimental performance with the specifications and/orsimulation results.
Types of tests:• Functional – verification of the nominal specifications• Parametric – verification of the characteristics to within a specified tolerance• Static – verification of the static (AC and DC) characteristics of a circuit or system• Dynamic – verification of the dynamic (transient) characteristics of a circuit or system
Additional Considerations:Should the testing be done at the wafer level or package level?How do you remove the influence (de-embed) of the measurement system from themeasurement?
Lecture 010 – Introduction (3/24/10) Page 010-15
CMOS Analog Circuit Design © P.E. Allen - 2010
ANALOG INTEGRATED CIRCUIT DESIGN SKILLSETCharacteristics of Analog Integrated Circuit Design• Done at the circuits level• Complexity is high• Continues to provide challenges as technology evolves• Demands a strong understanding of the principles, concepts and techniques• Good designers generally have a good physics background• Must be able to make appropriate simplifications and assumptions• Requires a good grasp of both modeling and technology• Have a wide range of skills - breadth (analog only is rare)• Be able to learn from failure• Be able to use simulation correctly
Lecture 010 – Introduction (3/24/10) Page 010-16
CMOS Analog Circuit Design © P.E. Allen - 2010
Understanding TechnologyUnderstanding technology helps the analog IC designer to know the limits of thetechnology and the influence of the technology on the design.Device Parasitics:
Connection Parasitics:
Drain
RD
RG RB
RS
CGD CBD
CGS CBS
Gate Bulk
Source
Collector
RC
RB
RSub
RE
Cμ CJS
Cπ
Base
Substrate
Emitter
CGB
050319-05
vin vout
+5V
M2
M1
vin
+5V
M2
M1
050304-01
vout
Lecture 010 – Introduction (3/24/10) Page 010-17
CMOS Analog Circuit Design © P.E. Allen - 2010
Implications of Smaller Technology on IC DesignThe good:• Smaller geometries• Smaller parasitics• Higher transconductance• Higher bandwidthsThe bad:• Reduced voltages• Smaller channel resistances (lower gain)• More nonlinearity• Deviation from square-law behaviorThe challenging:• Increased substrate noise in mixed signal applications• Threshold voltages are not scaling with power supply• Reduced dynamic range• Poor matching at minimum channel length
Lecture 010 – Introduction (3/24/10) Page 010-18
CMOS Analog Circuit Design © P.E. Allen - 2010
Understanding ModelingModeling:
Modeling is the process by which the electrical properties of an electronic circuit orsystem are represented by means of mathematical equations, circuit representations,graphs or tables.Models permit the predicting or verification of the performance of an electroniccircuit or system.
ElectronicCircuits
and Systems
Equations,Circuit
representations,graphs, tables
Prediction orverification of
circuit or systemperformance
Electronic Modeling Process030130-02
Examples:Ohm’s law, the large signal model of a MOSFET, the I-V curves of a diode, etc.
Goal:Models that are simple and allow the designer to understand the circuit performance.
Lecture 010 – Introduction (3/24/10) Page 010-19
CMOS Analog Circuit Design © P.E. Allen - 2010
Key Principles, Concepts and Techniques of Analog IC Design• Principles mean fundamental laws that
are precise and never change.(Webster – A comprehensive andfundamental law, doctrine, orassumption. The laws or facts of natureunderlying the working of an artificialdevice.)
• Concepts will include relationships,“soft-laws” (ones that are generallytrue), analytical tools, things worthremembering.(Webster – An abstract idea generalizedfrom particular instances.)
• Techniques will include the assumptions,“tricks”, tools, methods that one uses to simplify and understand.
(Webster – The manner in which technical details are treated, a method ofaccomplishing a desired aim or goal.)
AnalogIC Design
Process
Techniques"Tricks"
Principles (laws)used in design
Concepts - Information
that enhancesdesign
040511-01
AnalogDesign
Lecture 010 – Introduction (3/24/10) Page 010-20
CMOS Analog Circuit Design © P.E. Allen - 2010
Complexity in Analog DesignAnalog design is normally done in a non-hierarchical manner and makes little use of
repeated blocks. As a consequence, analog design can become quite complex andchallenging.How do you handle the complexity?
1.) Use as much hierarchy as possible.2.) Use appropriate organization
techniques.3.) Document the design in an efficient
manner.4.) Make use of assumptions and
simplifications.5.) Use simulators appropriately.
Systems Level (ADC)
Circuits Level (op amps)
Block Level (amplifier)
Sub-block Level (current sink)
Components (transistor)
Systems
Circuits
Components
031030-03
Lecture 010 – Introduction (3/24/10) Page 010-21
CMOS Analog Circuit Design © P.E. Allen - 2010
AssumptionsAssumptions:
An assumption is taking something to be true without formal proof. Assumptions inanalog circuit design are used for simplifying the analysis or design. The goal of anassumption is to separate the essential information from the nonessential informationof a problem.The elements of an assumption are:
1.) Formulating the assumption to simplify the problem without eliminating theessential information.
2.) Application of the assumption to get a solution or result.3.) Verification that the assumption was in fact appropriate.
Examples:Neglecting a large resistance in parallel with a small resistanceMiller effect to find a dominant poleFinding the roots of a second-order polynomial assuming the roots are real andseparated
Lecture 010 – Introduction (3/24/10) Page 010-22
CMOS Analog Circuit Design © P.E. Allen - 2010
WHERE IS ANALOG IC DESIGN TODAY?Analog IC Design has Reached Maturity
There are established fields of application:• Digital-analog and analog-digital conversion• Disk drive controllers• Modems - filters• Bandgap reference• Analog phase lock loops• DC-DC conversion• Buffers• Codecs• Etc.
Existing philosophy regarding analog circuits:“If it can be done economically by digital, don’t use analog.”
Consequently:Analog finds applications where speed, area, or power have advantages over a digitalapproach.
Lecture 010 – Introduction (3/24/10) Page 010-23
CMOS Analog Circuit Design © P.E. Allen - 2010
Analog IC Design ChallengesTechnology:• Digital circuits have scaled well with technology• Analog does not benefit as much from smaller features
- Speed increases- Gain decreases- Matching decreases- Nonlinearity increases- New issues appear such as gate current leakage
Analog Circuit Challenges:• Trade offs are necessary between linearity, speed, precision and power
• As analog is combined with more digital, substrate interference will become worse
Lecture 010 – Introduction (3/24/10) Page 010-24
CMOS Analog Circuit Design © P.E. Allen - 2010
Digitally Assisted Analog CircuitsUse digital circuits which work better atscaled technologies to improve analogcircuits that do not necessarily improvewith technology scaling.Principles and Techniques:
• Open-loop vs. closed loop - Open loop is less accurate but smaller Faster, less power - Closed-loop is more accurate but larger Slower, more power
• Averaging - Increase of accuracy Smaller devices, more speed
• Calibration - Accuracy increases Increased resolution with same area
• Dynamic Element Matching - Enhancement of component precision
• Doubly correlated sampling - Reduction of dc influences (noise, offset) Smaller devices, more speed
• Etc.
Lecture 010 – Introduction (3/24/10) Page 010-25
CMOS Analog Circuit Design © P.E. Allen - 2010
What is the Future of Analog IC Design?• More creative circuit solutions are required to achieve the desired performance.• Analog circuits will continue to be a part of large VLSI digital systems• Interference and noise will become even more serious as the chip complexity increases• Packaging will be an important issue and offers some interesting solutions• Analog circuits will always be at the cutting edge of performance• Analog designer must also be both a circuit and systems designer and must know:
Technology and modelingAnalog circuit designVLSI digital designSystem application concepts
• There will be no significantly new and different technologies - innovation will combinenew applications with existing or improved technologies
• Semicustom methodology will eventually evolve with CAD tools that will allow:- Design capture and reuse- Quick extraction of model parameters from new technology- Test design- Automated design and layout of simple analog circuits
Lecture 010 – Introduction (3/24/10) Page 010-26
CMOS Analog Circuit Design © P.E. Allen - 2010
NOTATION, TERMINOLOGY AND SYMBOLOGYDefinition of Symbols for Various Signals
Signal Definition Quantity Subscript ExampleTotal instantaneous value of the signal Lowercase Uppercase qA
DC value of the signal Uppercase Uppercase QA
AC value of the signal Lowercase Lowercase qa
Complex variable, phasor, or rms valueof the signal
Uppercase Lowercase Qa
Example:
t
ID iD
id
Idm
Fig. 1.4-1
Dra
in C
urre
nt
Lecture 010 – Introduction (3/24/10) Page 010-27
CMOS Analog Circuit Design © P.E. Allen - 2010
MOS Transistor Symbols
G
S
D
G
S
D
G
S
D
G
S
D
B G
S
D
B
G
S
D
EnhancementNMOS withVBS = 0V.
EnhancementPMOS withVBS = 0V.
EnhancementNMOS withVBS 0V.
EnhancementPMOS withVBS 0V.
SimpleNMOSsymbol
SimplePMOSsymbol
Lecture 010 – Introduction (3/24/10) Page 010-28
CMOS Analog Circuit Design © P.E. Allen - 2010
Other Schematic Symbols
Differential amplifier,op amp, or comparator
+
-
+
-
V1 GmV1
I2
+-
+
-
V1 V2AvV1
+
-
+-
+
-
V2
I1
RmI1
I2I1
AiI1
Voltage-controlled,voltage source
Voltage-controlled, current source
Current-controlled, voltage source
Current-controlled, current source
Independent current source
Independentvoltage sources
+
-V
+
-V
+
-
V
Lecture 010 – Introduction (3/24/10) Page 010-29
CMOS Analog Circuit Design © P.E. Allen - 2010
Three-Terminal NotationQABC
A = Terminal with the larger magnitude of potentialB = Terminal with the smaller magnitude of potentialC = Condition of the remaining terminal with respect to terminal B
C = 0 There is an infinite resistance between terminal B and the 3rd terminalC = S There is a zero resistance between terminal B and the 3rd terminalC = R There is a finite resistance between terminal B and the 3rd terminalC = X There is a voltage source in series with a resistor between terminal B
and the 3rd terminal in such a manner as to reverse bias a PNjunction.
Examples
(a.) Capacitance from drain to gate with the source shorted to the gate.(b.) Drain-source current when gate is shorted to source (depletion device)(c.) Breakdown voltage from drain to gate with the source is open- circuited to the gate.
+
-VGS
S D
G
CDGS
S
DG
IDSS
+
-
S D
G
IDS BVDGO
(a.) (b.) (c.)
Lecture 010 – Introduction (3/24/10) Page 010-30
CMOS Analog Circuit Design © P.E. Allen - 2010
SUMMARY• Successful analog IC design proceeds with understanding the circuit before simulation.• Analog IC design consists of three major steps:
1.) Electrical design Topology, W/L values, and dc currents2.) Physical design (Layout)3.) Test design (Testing)
• Analog designers must be flexible and have a skill set that allows one to simplify andunderstand a complex problem
• Analog IC design has reached maturity and is here to stay.• The appropriate philosophy is “If it can be done economically by digital, don’t use
analog”.• As a result of the above, analog finds applications where speed, area, or power result in
advantages over a digital approach.• Deep-submicron technologies will offer exciting challenges to the creativity of the
analog designer.